Philips Q548.1E Schematic

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Colour Television Chassis
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LA

Contents Page Contents Page

1. Revision List 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 5
4. Mechanical Instructions 9
5. Service Modes, Error Codes, and Fault Finding 16
6. Alignments 34
7. Circuit Descriptions 39
8. IC Data Sheets 49
9. Block Diagrams Wiring Diagram 32" (Frame) 57 Wiring Diagram 37" (Roadrunner) 58 Wiring Diagram 42" (Frame/Roadrunner) 59 Wiring Diagram 47" (Frame) 60 Wiring Diagram 47" (Roadrunner) 61 Wiring Diagram 52" (Frame) 62 Block Diagram Video 63 Block Diagram Audio 64 Block Diagram Control & Clock Signals 65 Block Diagram I2C 66 Supply Lines Overview 67
10. Circuit Diagrams and PWB Layouts Drawing PWB Interface Ambilight: Interface + Single DC-DC Interface Ambilight: Dual DC-DC 69 71 Interface Ambilight: Microcontrollerblock 70 71 6 LED Low-Pow: Microcontroller Block Liteon 72 75 6 LED Low-Pow: Microcontroller Block Liteon 73 75 6 LED Low-Pow: LED Liteon 74 75 8 LED Low-Pow: Microcontroller Block Liteon 76 80 8 LED Low-Pow: Microcontroller Block Liteon 77 80 8 LED Low-Pow: LED Liteon 78 80 8 LED Low-Pow: LED Drive Liteon 79 80 10 LED Low-Pow: Microcontroller Block Liteon 81 85 10 LED Low-Pow: Microcontroller Block Liteon 82 85 10 LED Low-Pow: LED Liteon 83 85
©
Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.
68 71
10 LED Low-Pow: LED Drive Liteon 84 85 12 LED Low-Pow: Microcontroller Block Liteon 86 90 12 LED Low-Pow: Microcontroller Block Liteon 87 90 12 LED Low-Pow: LED Liteon 88 90 12 LED Low-Pow: LED Drive 89 90 SSB: DC/DC +3V3 +1V2 91 119 SSB: DC/DC +3V3 +1V2 Standby 92 119 SSB: Front End 93 119 SSB: PNX8543 - Power 94 119 SSB: PNX8543 - Video Streams/LVDS Output 95 119 SSB: PNX8543 Audio Amplifier 96 119 SSB: PNX8543 Audio 97 119 SSB: PNX8543 Analog AV 98 119 SSB: PNX8543 SDRAM 99 119 SSB: PNX8543 Control MIPS/Flash/PCI 100 119 SSB: PNX8543 Standby Control/Debug 101 119 SSB: Bolt-on 102 119 SSB: Analog IO - Scart 1 & 2 103 119 SSB: YPbPr / Side I/O / S-video 104 119 SSB: HDMI 105 119 SSB: Ethernet 106 119 SSB: PCMCIA 107 119 SSB: Class-D 108 119 SSB: Display Interface (Common) 109 119 SSB: Display Supply 110 119 SSB: PNX5100 - Power 111 119 SSB: PNX5100 - SDRAM 112 119 SSB: PNX5100 - Control / PCI / Debug 113 119 SSB: PNX5100 - LVDS In/Out 114 119 SSB: PNX5100 - AmbiLight 115 119 SSB: SRP List Explanation 116 SSB: SRP List Part 1 117 SSB: SRP List Part 2 118
Published by ER/TY 0964 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18560
2009-Apr-03
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EN 2 Q548.1E LA1.
Revision List

1. Revision List

Manual xxxx xxx xxxx.0
First release.

2. Technical Specifications and Connections

Index of this chapter:
2.1
Technical Specifications

2.2 Directions for Use

2.3 Connections
2.4 Chassis Overview
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model numbers

CTN Styling Published in:
32PFL7404H/12
42PFL7404H/12
47PFL7404H/12
52PFL7404H/12
32PFL8404H/12
37PFL8404H/12
42PFL8404H/12
47PFL8404H/12
Frame 3122 785 18560
3122 785 18560
3122 785 18560
3122 785 18560
Roadrunner 3122 785 18560
3122 785 18560
3122 785 18560
3122 785 18560
2.2 Directions for Use
You can download this information from the following websites:
http://www.philips.com/support http://www.p4c.philips.com
2009-Apr-03
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2.3 Connections

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Back connectors
Side connectors
26-52”
Technical Specifications and Connections
1
11
10 9
EN 3Q548.1E LA 2.
2 3 4
5
6
7
8
19-22”
12
13
EXT 3
AUDIO IN: LEFT / RIGHT HDMI 1 / DVI HDMI 2 / DVI HDMI 3 / DVI
VGA
AUDIO
SPDIF
OUT
OUT
VGA
HDMI 3
HDMI 2 HDMI 1
EXT 2
(RGB/CVBS)
EXT 1
(RGB/CVBS)
TV ANTENNA
Note: The following connector colour abbreviations are used (according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Side Connections

1 - Cinch: Audio - In
Rd - Audio R 0.5 V Wh - Audio L 0.5 V
2 - Cinch: Video CVBS - In
Ye - Video CVBS 1 V
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
/ 75 Ω jq
PP
14

Figure 2-1 Connection overview

3 - S-Video (Hosiden): Video Y/C - In
1 - Ground Y Gnd H 2 - Ground C Gnd H 3 - Video Y 1 V 4 - Video C 0.3 V
4 - Head phone (Output)
Bk - Head phone 32 - 600 Ω / 10 mW ot
5 - Common Interface
68p - See diagram B05C SSB: PCMCIA
15 16
/ 75 Ω j
PP
/ 75 Ω j
PP
jk
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Technical Specifications and Connections
6 - USB2.0
Figure 2-2 USB (type A)
1-+5V k 2 - Data (-) jk 3 - Data (+) jk 4 - Ground Gnd H
7 - HDMI: Digital Video, Digital Audio - In (see connector 15)
8 - Service Connector (UART)
1 - Ground Gnd H 2 - UART_TX Transmit k 3 - UART_RX Receive j

2.3.2 Rear Connections

9 - EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out
12 - VGA: Video RGB - In
Figure 2-4 VGA Connector
1 - Video Red 0.7 V 2 - Video Green 0.7 V 3 - Video Blue 0.7 V 4-n.c.
/ 75 Ω j
PP
/ 75 Ω j
PP
/ 75 Ω j
PP
5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H 9-+5V 10 - Ground Sync Gnd H
+5 V j
DC
11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j
13 - Mini Jack: Audio - In
Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 10 kΩ jo
RMS
/ 10 kΩ jo
RMS
Figure 2-3 SCART connector
1 - Audio R 0.5 V 2 - Audio R 0.5 V 3 - Audio L 0.5 V 4 - Ground Audio Gnd H
/ 1 kΩ k
RMS
/ 10 kΩ j
RMS
/ 1 kΩ k
RMS
5 - Ground Blue Gnd H 6 - Audio L 0.5 V 7 - Video Blue 0.7 V 8 - Function Select 0 - 2 V: INT
/ 10 kΩ j
RMS
/ 75 Ω jk
PP
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3 j
9 - Ground Green Gnd H 10 - n.c. 11 - Video Green 0.7 V 12 - n.c.
/ 75 Ω j
PP
13 - Ground Red Gnd H 14 - Ground P50 Gnd H 15 - Video Red 0.7 V
/ 75 Ω j
PP
16 - Status/FBL 0 - 0.4 V: INT
1 - 3 V: EXT / 75 Ω j 17 - Ground Video Gnd H 18 - Ground FBL Gnd H 19 - Video CVBS/Y 1 V 20 - Video CVBS 1 V
/ 75 Ω k
PP
/ 75 Ω j
PP
21 - Shield Gnd H
10 - Cinch: S/PDIF - Out
Bk - Coaxial 0.4 - 0.6V
/ 75 Ω kq
PP
11 - Cinch: Audio - Out
Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V
/ 10 kΩ kq
RMS
/ 10 kΩ kq
RMS
14 - EXT3: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
15 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In
Figure 2-5 HDMI (type A) connector
1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j 4 - D1+ Data channel j 5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink Control channel jk 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H
16 - Aerial - In
- - IEC-type (EU) Coax, 75 Ω D

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.
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Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

EN 5Q548.1E LA 3.
Index of this chapter:
Safety Instructions
3.1

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).
Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:
Route the wire trees correctly and fix them with the mounted cable clamps.
Check the insulation of the Mains/AC Power lead for external damage.
Check the strain relief of the Mains/AC Power cord for proper function.
Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any inner parts by the customer.
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).
Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
All capacitor values are given in micro-farads (μ=× 10 nano-farads (n =× 10
Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).
An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.
The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction
For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.
-9
), or pico-farads (p =× 10
. Select
-12
-6
),
).
3.2 Warnings
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.
Be careful during measurements in the high voltage section.
Never replace modules or other components while the unit is switched “on”.
When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
3.3 Notes

3.3.1 General

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.
Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.
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MODEL :
PROD.NO:
~
S
32PF9968/10
MADE IN BELGIUM
220-240V 50/60Hz
128W
AG 1A0617 000001
VHF+S+H+UHF
BJ3.0E LA
Precautions, Notes, and Abbreviation List

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
2009-Apr-03

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V
board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format
AARA Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio
ACI Automatic Channel Installation:
algorithm that installs TV channels directly from a cable network by
means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control
signal used to tune to the correct
frequency AGC Automatic Gain Control: algorithm that
controls the video input of the feature
box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA ATV See Auto TV Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz BLR Board-Level Repair BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:
remote control bus on HDMI
connections CL Constant Level: audio output to
connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:
manipulates steepness of chroma
transients CVBS Composite Video Blanking and
Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra
low frequency amplification DDC See “E-DDC” D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz DFI Dynamic Frame Insertion DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion
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Precautions, Notes, and Abbreviation List
EN 7Q548.1E LA 3.
DNR Digital Noise Reduction: noise
reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote
control designed for service
technicians DTCP Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display. EDID Extended Display Identification Data
(VESA standard) EEPROM Electrically Erasable and
Programmable Read Only Memory EMI Electro Magnetic Interference EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by
SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency
Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content
Protection: A “key” encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a “snow vision” mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP “software key”
decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound
2
C Inter IC bus
I
2
D Inter IC Data bus
I
2
I
S Inter IC Sound bus
carrier distance is 6.0 MHz
IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.
The SDI signal is self-synchronizing,
uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.
ITV Institutional TeleVision; TV sets for
hotels, hospitals etc.
LS Last Status; The settings last chosen
by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's
preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound
carrier distance is 4.5 MHz MIPS Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor MOP Matrix Output Processor MOSFET Metal Oxide Silicon Field Effect
Transistor, switching device MPEG Motion Pictures Experts Group MPIF Multi Platform InterFace MUTE MUTE Line NC Not Connected NICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe. NTC Negative Temperature Coefficient,
non-linear resistor NTSC National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air) NVM Non-Volatile Memory: IC containing
TV related data such as alignments O/C Open Circuit OSD On Screen Display OTC On screen display Teletext and
Control; also called Artistic (SAA5800) P50 Project 50: communication protocol
between TV and peripherals PAL Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=
3.575612 MHz and PAL N= 3.582056
MHz) PCB Printed Circuit Board (same as “PWB”) PCM Pulse Code Modulation PDP Plasma Display Panel PFC Power Factor Corrector (or Pre-
conditioner) PIP Picture In Picture PLL Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency POD Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set) POR Power On Reset, signal to reset the uP PTC Positive Temperature Coefficient,
non-linear resistor PWB Printed Wiring Board (same as “PCB”)
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Precautions, Notes, and Abbreviation List
PWM Pulse Width Modulation QRC Quasi Resonant Converter QTNR Quality Temporal Noise Reduction QVCP Quality Video Composition Processor RAM Random Access Memory RGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are
reproduced. RC Remote Control RC5 / RC6 Signal protocol from the remote
control receiver RESET RESET signal ROM Read Only Memory RSDS Reduced Swing Differential Signalling
data interface R-TXT Red TeleteXT SAM Service Alignment Mode S/C Short Circuit SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs SCL Serial Clock I SCL-F CLock Signal on Fast I SD Standard Definition SDA Serial Data I SDA-F DAta Signal on Fast I
2
C
2
C bus
2
C
2
C bus SDI Serial Digital Interface, see “ITU-656” SDRAM Synchronous DRAM SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz SIF Sound Intermediate Frequency SMPS Switched Mode Power Supply SoC System on Chip SOG Sync On Green SOPS Self Oscillating Power Supply SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard S/PDIF Sony Philips Digital InterFace SRAM Static RAM SRP Service Reference Protocol SSB Small Signal Board STBY STand-BY SVGA 800x600 (4:3) SVHS Super Video Home System SW Software SWAN Spatial temporal Weighted Averaging
Noise reduction SXGA 1280x1024 TFT Thin Film Transistor THD Total Harmonic Distortion TMDS Transmission Minimized Differential
Signalling TXT TeleteXT TXT-DW Dual Window with TeleteXT UI User Interface uP Microprocessor UXGA 1600x1200 (4:3) V V-sync to the module VESA Video Electronics Standards
Association VGA 640x480 (4:3) VL Variable Level out: processed audio
output toward external amplifier VSB Vestigial Side Band; modulation
method WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound WXGA 1280x768 (15:9) XTAL Quartz crystal XGA 1024x768 (4:3)
Y Luminance signal Y/C Luminance (Y) and Chrominance (C)
signal
YPbPr Component video. Luminance and
scaled color difference signals (B-Y and R-Y)
YUV Component video
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4. Mechanical Instructions

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Mechanical Instructions
EN 9Q548.1E LA 4.
Index of this chapter:
Cable Dressing
4.1
4.2 Service Positions
4.3 Assy/Panel Removal
4.4 Set Re-assembly

4.1 Cable Dressing

Notes:
Figures below can deviate slightly from the actual situation, due to the different set executions.

Figure 4-1 Cable dressing 32PFL7404H/12

Figure 4-2 Cable dressing 42PFL7404H/12

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Figure 4-3 Cable dressing 47PFL7404H/12

2009-Apr-03

Figure 4-4 Cable dressing 52PFL7404H/12

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Figure 4-5 Cable dressing 32PFL8404H/12

Figure 4-6 Cable dressing 37PFL8404H/12

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Mechanical Instructions

Figure 4-7 Cable dressing 42PFL8404H/12

2009-Apr-03

Figure 4-8 Cable dressing 47PFL8404H/12

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4.2 Service Positions

E_06532_018.eps
171106
1
Required for sets
42"
1
18560_408_090401.eps
090402
3
1
2
1
1
3
1
2
2
For easy servicing of this set, there are a few possibilities created:
The buffers from the packaging.
Foam bars (created for Service).

4.2.1 Foam Bars

Mechanical Instructions
EN 13Q548.1E LA 4.
Figure 4-9 Foam bars
The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure Figure 4-9
for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3 Assy/Panel Removal

The instructions apply to the 8000 series (Roadrunner - with AmbiLight).

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove
the rear cover. Note: it is not necessary to remove the stand while removing the rear cover.
1. Remove all screws of the rear cover.
2. Lift the rear cover from the TV. Make sure that wires and

4.3.2 Speakers

Each speaker unit is mounted with two screws. When defective, replace the whole unit.

4.3.3 Ambi Light

Each Ambi Light unit is mounted on a subframe. Refer to
Figure 4-10
flat coils are not damaged while lifting the rear cover from the set.
for details.
Figure 4-10 Ambi Light unit
1. Remove the Ambi Light cover [1].
2. Unplug the connector(s) [2].
3. Remove the subframe [3].
4. The PWB can now be taken from the subframe. When defective, replace the whole unit.

4.3.4 Main Supply Panel

1. Unplug all connectors.
2. Remove the fixation screws.
3. Take the board out. When defective, replace the whole unit.

4.3.5 IR & LED Board / Stand Support

Refer to Figure 4-11
for details.
2
1
18560_109_090401.eps
090402
Figure 4-11 IR & LED Board / Stand Support
1. Remove the stand.
2. Remove the IR/LED cover [1].
3. Remove the connectors on the IR/LED board.
4. Remove the fixation screws from the IR/LED board. When defective, replace the whole unit.
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4
2
44
3
Stand Support Removal for LCD panel removal
1. Remove the Main Supply Panel as earlier described.
2. Remove the screws [2] and take the support out.

4.3.6 Small Signal Board (SSB)

Caution: It is mandatory to remount screws at their original
position during re-assembly. Failure to do so may result in damaging the SSB.
1. Unplug all connectors.
2. Remove the screws that secure the board.
3. The SSB can now be taken out of the set.

4.3.7 Keyboard Control Panel

1. Remove the right AmbiLight unit.
2. Follow instructions for removing the IR/LED board until 3.
3. Remove the connector on the IR/LED board.
4. Release the cable.
5. Release the clip on top of the unit and take the unit out. When defective, replace the whole unit.

4.3.8 LCD Panel

Mechanical Instructions
Refer to Figure 4-12
to Figure 4-15 for details.
1. Remove the AmbiLight units as earlier described.
2. Remove the subwoofer as earlier described.
3. Remove the Top Support [1].
4. Release the LVDS [2] - and other connectors [3] from the SSB.
5. Remove the subframe of the SSB [4] with the SSB still mounted on it.
6. Release all connectors [5] from the PSU.
7. Remove the subframe of the PSU [6] with the PSU still mounted on it.
8. Remove the stand support as earlier described.
9. Release the connectors [7] on the IR/LED Panel as earlier described.
10. Remove the clips that secure the flare [8].
11. Remove the flare.
12. Now the LCD Panel can be lifted from the front cabinet.
Figure 4-13 LCD Panel - SSB subframe
6
5
6
5
5
5
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6
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2009-Apr-03
Figure 4-12 LCD Panel - top support
Figure 4-14 LCD Panel - PSU subframe
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EN 15Q548.1E LA 4.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.
Notes:
While re-assembling, make sure that all cables are placed and connected in their original position. See Figure 4-1
Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.
, Figure 4-2 and Figure 4-3
Figure 4-15 LCD Panel - panel removal
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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:
Test Points
5.1

5.2 Service Modes

5.3 Step by step Start-up
5.4 Service Tools
5.5 Error Codes
5.6 The Blinking LED Procedure
5.7 Protections
5.8 Fault Finding and Repair Tips
5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.
Perform measurements under the following conditions:
Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.
All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Skip/blank of non-favourite pre-sets.
How to Activate SDM
For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according to Table 5-1
Analog SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.
Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.
Analog SDM can also be activated by, on the SSB, shorting for a moment the solder pads SDM [1] (see
Figure 5-1
).
.
This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section 5.4.1
Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose
To create a pre-defined setting, to get the same measurement results as given in this manual.
To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic step by step start up). See section 5.3
To start the blinking LED procedure where only layer 2 errors are displayed (see also section 5.5
Specifications
Table 5-1 SDM default settings
ComPair).
Step by step Start-up.
Region Freq. (MHz)
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID
Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07
Error Codes).
Default system
DVB-T
Figure 5-1 Service mode pads
After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).
How to Navigate
When the “MENU” (or HOME) button is pressed on the RC transmitter, the set will toggle between the SDM and the normal user menu (with the SDM mode still active in the background).
How to Exit SDM
Use one of the following methods:
Switch the set to STAND-BY via the RC-transmitter.
Via a standard customer RC-transmitter: key in “00”­sequence.
All picture settings at 50% (brightness, colour, contrast).
All sound settings at 50%, except volume at 25%.
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Service Modes, Error Codes, and Fault Finding
PHILIPS
MODEL:
32PF9968/10
PROD.SERIAL NO:
AG 1A0620 000001
040
39mm
27mm
(CTN Sticker)
Display Option
Code
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240108
EN 17Q548.1E LA 5.

5.2.2 Service Alignment Mode (SAM)

Purpose
To perform (software) alignments.
To change option settings.
To easily identify the used software version.
To view operation hours.
To display (or clear) the error code buffer.
How to Activate SAM
Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” or “I+” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the red button on the RC.
Contents of SAM (see also Table 6-5
Hardware InformationA. SW Version. Displays the software version of the
main software (example: Q5431-0.26.2.0= AAAaB_X.Y.W.Z).
AAAA= the chassis name, where “a” indicates the chip version: e.g. TV543/32= Q543, TV543/82= Q548, Q543/92= Q549.
B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region).
X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).
B. SBY PROC Version. Displays the software version
of the stand-by processor.
C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.
Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.
Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section 5.5
Reset Error Buffer. When “cursor right” (or the “OK button) is pressed and then the “OK” button is pressed, the error buffer is reset.
Alignments. This will activate the “ALIGNMENTS” sub­menu. See chapter 6.
Dealer Options. Extra features for the dealers. See Table
6-5.
Options. Extra features for Service. For more information regarding option codes, see chapter 6. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost.
Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for
development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).
– Initialize the NVM.
Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to chapter 6. option, it’s advised to use ComPair (the correct HEX values
):
Error Codes).
Alignments.
Alignments.
Alignments for details. To adapt this
for the options can be found in chapter 8 “Alignments”) or
a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-4
. Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.
Figure 5-2 Location of Display Option Code sticker
Store - go right. All options and alignments are stored
when pressing “cursor right” (or the “OK” button) and then the “OK”-button.
SW Maintenance.
SW Events. Not useful for Service purposes. In case
of specific software problems, the development department can ask for this information.
HW Events. Not useful for Service purposes. In case
of specific software problems, the development department can ask for this information.
Test settings. For development purposes only.
Development file versions. Not useful for Service
purposes, this information is only used by the development department.
Upload to USB. To upload several settings from the TV to
an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a
directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item
separately, press “cursor right” (or the “OK button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.
Download from USB. To download several settings from
the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.
Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this information.
How to Navigate
In SAM, the menu items can be selected with the
“CURSOR UP/DOWN” key (or the scroll wheel) on the RC­transmitter. The selected item will be highlighted. When not
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all menu items fit on the screen, move the “CURSOR UP/ DOWN” key to display the next/previous menu items.
With the “CURSOR LEFT/RIGHT” keys (or the scroll wheel), it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.
With the “OK” key, it is possible to activate the selected action.
How to Exit SAM
Use one of the following methods:
Switch the set to STAND-BY via the RC-transmitter.
Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose
When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When CSM is activated, the layer 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5
When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This information can be handy if no information is displayed.
Only for Q548.1:
When in the Q548.1 chassis CSM is activated, a test pattern will be displayed during 5 s.: 1 s. blue, 1 s. green, and 1 s. red, then again 1 s. blue and 1 s. green. This test pattern is generated by the PNX5120. So if this test pattern is shown, it could be determined that the back end video chain (PNX5120, LVDS, and display) of the SSB is working. For LED backlight TV sets, the test pattern is build as follows: 1 s. blue, 1 s. green, 1 s. red (generated by the PNX5120) and further on with 3 seconds RGB pattern from the LED Dimming Panel.
How to Activate CSM
Key in the code “123654” via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user) menu on the screen!
How to Navigate
By means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus.
Contents of CSM
The contents are displayed on three pages: General, Software versions, and Quality items. However, these group names itself are not shown anywhere in the CSM menu.
General
Set Type. This information is very helpful for a helpdesk/
Error Codes).
workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.
Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.
Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.
Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).
Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).
12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB. Remark: the content here can also be a part of the 12NC of the SSB in combination with the serial number.
12NC display. Shows the 12NC of the display
12NC supply. Shows the 12NC of the supply.
12NC “fan board”. Shows the 12NC of the “fan board”­module (for sets with LED backlight).
12NC “LED Dimming Panel”. Shows the 12NC of the LED dimming Panel (for sets with LED backlight).
Software versions
Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q5431E_1.2.3.4.
Stand-by SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section Software U Example: STDBY_1.2.3.4.
MOP ambient light SW. Displays the MOP ambient light EPLD SW.
MPEG4 software. Displays the MPEG4 software (for sets with MPEG4).
PNX5120 boot NVM. Displays the SW-version that is used in the PNX5120 boot NVM (for sets with PNX5120).
LED Dimming SW. Displays the LED dimming EPLD SW (for sets with LED backlight).
Quality items
Signal quality. Poor/average/good
Child lock. Not active/active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”.
HDMI HDCP key. Indicates of the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the consumer wants to make use of the HDMI functionality, the SSB has to be replaced.
Ethernet MAC address. Not applicable.
Wireless MAC address. Not applicable.
BDS key. Indicates if the “BDS level 1” key is valid or not.
CI slot present. If the common interface module is detected the result will be “YES”, else “NO”.
HDMI input format. The detected input format of the HDMI.
HDMI audio input stream. The HDMI audio input stream is displayed: present / not present.
HDMI video input stream. The HDMI video input stream is displayed: present / not present.
How to Exit CSM
Press the “MENU” (or HOME) button twice on the RC­transmitter.
pgrading).
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Active
Semi St by
St by
Mains
on
Mains
off
GoToProtection
- WakeUp requested
- Acquisition needed
- Tact switch pushed
- stby requested and no data Acquisition required
-St by requested
- tact SW pushed
WakeUp
requested
Protection
WakeUp
requested
(SDM)
GoToProtection
Hibernate
- Tact switch pushed
- last status is hibernate after mains ON
Tact switch
pushed
EN 19Q548.1E LA 5.

5.3 Step by step Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via short cutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic step by step start-up. In combination with the start-up diagrams below, it is shown which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus layer 2 error = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this mode with a faulty FET 7101-1 is done, all ICs supplied by the +3V3 could be destroyed, due to over voltage (12V on 3V3-line). It is recommended to measure first the FET 7101-1 or others FETs on short-circuit before activating SDM via the service pads.
The abbreviations “SP” and “MP” in the figures stand for:
SP: protection or error detected by the Stand-by Processor.
MP: protection or error detected by the MIPS Main
Processor.

Figure 5-3 Transition diagram

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No
EJTAG probe
connected ?
No
Yes
ReleaseAVCsystem reset
Feed warm boot script
Cold boot?
Yes
No
Set I²C slave address
of StandbyµPto(A0h)
An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.
This will allow access to NVM and NAND FLASH and cannotbedone earlier becausetheFLASH needs to
be in Write Protect as long as the suppliesare not available.
Detect EJTAG debugprobe
(pulling pin of the probeinterfaceto
ground byinserting EJTAG probe)
Release AVC system reset
Feed cold boot script
ReleaseAVCsystem reset Feed initializing boot script
disable alive mechanism
Initialise I/O pins of the st-byµP:
- Switch reset-AVC LOW (reset state)
- Switch WP-NandFlash LOW (protected)
- Switch reset-system LOW (reset state)
- Switch reset-5100 LOW (reset state)
- Switch reset-Ethernet LOW (reset state)
-keepreset-NVM high, Audio-reset and Audio-Mute-Up HIGH
Off
Standby Supply starts running.
All standby supply voltagesbecome available.
st-byµPresets
Stand byor
Protec tio n
Mains isapplied
- Switch Audio-Reset high.
It is low in the standby mode if the standby
mode lasted longer than10s.
start keyboard scanning, RC detection. Wake upreasonsare
off.
If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.
Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM initialization, this is no issueinthissetup, the delayisautomatically
covered by the architectural setup)
ReleaseReset-PNX5100.
PNX5100 will start booting.
This 10ms delayisstill present to give some relaxation to the supplies.(ThePCIarbiter on the PNX5100 is never used and is not the reason anymore)
Switch HIGH the WP-NandFlashto
allow access to NAND Flash
This enables the +3V3and+5V converter. Asa result, also+5V-tuner, +2V5, +1V8-PNX8541 and +1V8-PNX5100 (if present) become available.
Confirmation received from NXP that there does not need to be a delay between the riseofthe+1V2and the +3V3.Only requirement is to have the +1V2 before or atthesametime as the +3V3.150msdelayisdeleted.
Delayo
f50msneeded becauseofthelatencyof the detect-1 circuit. This delayisalsoneeded for the PNX5100. The reset of the PNX5100 should only bereleased 10msafter powering the IC.
Detect2 should bepolledonthestandard40ms interval and startup should becontinuedwhen detect2 becomes high.
+12V, +24Vs,ALand Bolt-on power
isswitched on, followed by the +1V2 DCDC converter
Enable the supply detection algorithm
No
Yes
Detect-1 I/O line
High?
Switch ON Platform and display supply by switching
LOW the Standbyline.
Enable the DCDC converter for +3V3and
+5V. (ENABLE-3V3)
Voltage output error:
Layer1: 2
Layer2: 18
No
Detect2 high received
within 2 seconds?
Power-OK error:
Layer1: 3
Layer2: 16
Enter p rot ection
Yes
Wait 50ms
Enter protection
Yes
No
Detect-2 I/O line
High?
Disable 3V3, switch standby line high and wait 4 seconds
Delay1.5second before checking detect2 line
if the detect2_delay_flagisset
Set detect2_delay_flag
Reset detect2_delay_flag
Carefull we dont hit this error directly if the delayflagisset.
Wait fixed time of 15ms
Detect2 high?
Yes
No
Detect-1 I/O line
High?
Wait 50ms
No
Yes
If the supply is hicking, the firstdetect2could
bepositive (12V still present), followed by
negative Supply-fault (already low). Adding a
fixed delay bringsusbehind this delaygap.
These checks prevent the set from going in to standbyonthefalse error condition where the
first 3V3 is negative becauseofahickup, although the 12V was abouttoreappear.
Becauseofthis reappearance,
the 12V check
is OK which would cause protection. If we wait
50ms,the3V3shouldbe back as well.
Detect-2 I/O line
High?
Yes
No
Reset detect2_delay_flag
Only usefull in case of PNX5100 present. To avoid diversity in standbyµP,thereset-PNX5100 will still be switched bythestandbyµP.
To: 18440_216b_090227.eps
To: 18440_216b_090227.eps
Wait 10 ms
Service Modes, Error Codes, and Fault Finding
2009-Apr-03

Figure 5-4 “Off/Stand-by” to “Semi Stand-by” flowchart (part 1)

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Service Modes, Error Codes, and Fault Finding
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270209
Yes
MIPS reads the wake upreason
from standbyµP.
Semi-Standby
Initialize tuner and Multi Standard decoder
Initialize video processing IC's
:
-localcontrast FPGA
-PNX5100(ifpresent)
Initialize source selection
Init ialize AutoTV
3-th try?
Blink Code as
error code
Bootscript ready
in 1250 ms?
Yes
No
Enable Alive check mechanism
Wait until AVC starts to
communicate
SW initialization
succeeded
within 20s?
No
Switch Standby I/O line high
and wait 4 seconds
RPC start (comm. protocol)
Set I²C slave address
of StandbyµPto(60h)
Yes
Disable all supply related protectionsand
switch off the +3V3 +5V DC/DC converter.
switch off the remaining DC/DC
converters
Wait 5ms
Switch AVC PNX8543
in reset (active low)
Wait 10ms
Switch the NVM reset
line HIGH.
FlashtoRam
image transfer succeeded
within 30s?
No
Yes
Code =
Layer1: 2
Layer2: 53
Code =
Layer1: 2
Layer2: 15
Initialize Ambilight with Lights off.
Timing need to be updated if more mature info isavailable.
Timing needs to be updated if more mature info is available.
Timing needs to be updated if more mature info is available.
Initialize audio
Enter protection
Reset-system isswitched HIGH bythe
AVC attheendofthebootscript
AVC releases Reset-Ethernet when the
end of the AVC boot-script is detected
This cannot be done through the bootscript, the I/O is on the standbyµP
Reset-system is connectedtothe Micronas MultiStandard decoder.
Reset-Audio and Audio-Mute-Up are
switched byMIPS code lateroninthe
startup process
Reset-system isswitched HIGH bythe
AVC attheendofthebootscript
AVC releases Reset-Ethernet when the
end of the AVC boot-script is detected
Reset-Audio and Audio-Mute-Up are
switched byMIPS code lateroninthe
startupprocess
Switch on the displayincaseofa LED backlight
display by sending the TurnOnDisplay(1) (I²C)
command to the PNX5100
In caseofa LED backlight display, a LED DIM panel is present which is fed bytheVdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must beclosed. The display startup sequence is taken care of bytheLEDDIM panel. Secondly,
this cmd will alsoenable the LVDS outputof
the 5100 towards the LED DIM panel.
Enable the PWM output towards the displayLVDS
cable in caseofa LED Backlight set.
(CTRL4-PNX5100)
In caseofa LED backlight display, the PWM-dimming signal needs to berouted to the LVDS cable. This routing is not allowed in non-LED sets (see alsodisplay configuration)
Wake upreason
coldboot & not semi-
standby?
5100 SW start
MIPSsends displayparametersand
Bitmap to 5100
Startup screen cfg file
present?
MIPS triggers 5100 to displaythe
startup screen
Startup screen visible
yes
yes
To keep this flowchart readable, the exact displayturn on description is not copied here. Please see the Semi-standby to On description for the detailed display startup sequence. During the complete displaytimeoftheStartup screen, the preheat condition of 100% PWM is valid.
No
No
Startup screen shall only bevisiblewhen there isacoldboot to an active state end situation. The startup screen shall not
bevisiblewhen waking upforreboot reasons or waking upto semi-standby conditions.
The firsttimeafter the option turn on of the startup screen or when the set is virgin, the cfg file is not present and
hence
the startup screen will not be shown.
From : 18440_216a_090227.eps
From: 18440_216a_090227.eps
EN 21Q548.1E LA 5.

Figure 5-5 “Off/Stand-by” to “Semi Stand-by” flowchart (part 2)

2009-Apr-03
Page 22
EN 22 Q548.1E LA5.
Active
Semi Standby
Initialize audio and video
processing IC's and functions
according needed use case.
Assert RGB video blanking
and audio mute
Wait until previous on-state is left more than 2
seconds ago. (to prevent LCD display problems)
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
made in less than 2s, because the standby state will
be maintained for at least 4s.
Switch Audio-Reset low and wait 5ms
Constraints taken into account:
- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.
Restore dimming backlight feature, PWM and BOOST output
and unblank the video.
Wait until valid and stable audio and video, corresponding to the
requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)
CPipe already generates a valid output clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.
Switch on LCD backlight (Lamp-ON)
Switch off the dimming backlight feature, set
the BOOST control to nominal and make sure
PWM output is set to 100%
Switch on the display by sending the
TurnOnDisplay(1) (I²C) cmd to the PNX5100
Switch on the Ambilight functionality according the last status
settings.
The higher level requirement is that the
ambilight functionality may not be switched on
before the backlight is turned on in case the
set contains a CE IPB inverter supply.
Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file
PNX5100 present?
Yes
Switch on the display power by
switching LCD-PWR-ON low
Wait x ms
Switch on LVDS output in 8543
No
The exact timings to
switch on the
display (LVDS
delay, lamp delay)
are defined in the
display file.
Start POK line detection
algorithm
return
The complete algorithm description is
removed here.
Only the start of the algorithm
is mentioned here as reminder.
The sum of the LVDS delay and the Lamp delay needs
to be used because the Lamp delay is specified with
the appearance of the LVDS on the display as
reference. This moment is not known by ceplf, only the
switch on of the LCD power is known. The delta
between both is the LVDS delay.
Display already on?
(splash screen)
No
Yes
Display cfg file present
and up to date, according
correct display option?
Startup screen Option and Installation setting
Photoscreen ON?
Yes
No
Prepare Start screen Display config
file and copy to Flash
No
Yes
18440_217_090227.eps
270209
Service Modes, Error Codes, and Fault Finding
2009-Apr-03

Figure 5-6 “Semi Stand-by” to “Active” flowchart

Page 23
Service Modes, Error Codes, and Fault Finding
18440_219_090227.eps
270209
Semi Standby
Active
Wait x ms (display file)
Mute all sound outputs via softmute
Mute all video outputs
Switch off LCD backlight
Force ext audio outputs to ground
(I/O: audio reset)
and wait 5ms
Switch off the display by sending:
- TurnOnDisplay(0) (I²C) command to the PNX5100
- or sending OUTPUT-ENABLE(0) to the LED DIM panel in case of a LED BL set.
Switch off Ambilight
Set main amplifier mute (I/O: audio-mute)
Wait 100ms
Wait until Ambilight has faded out: Output power
Observer on PNX5100 should be zero
The higher level requirement is that the
backlight may not be switched off before the
ambilight functionality is turned off in case the
set contains a CE IPB inverter supply.
PNX5100 present?
Yes
No
Switch off the display power by
switching LCD-PWR-ON high
Wait x ms
Switch off LVDS output in 8543
The exact timings to
switch off the
display (LVDS
delay, lamp delay)
are defined in the
display file.
Switch off POK line detection
algorithm
EN 23Q548.1E LA 5.

Figure 5-7 “Active” to “Semi Stand-by” flowchart

2009-Apr-03
Page 24
EN 24 Q548.1E LA5.
18440_220_090227.eps
270209
Transfer Wake up reasons to the Stand by µP.
Stand by
Semi Stand by
Disable all supply related protections and switch off
the DC/DC converters (ENABLE-3V3)
Switch OFF all supplies by switching HIGH the
Standby I/O line
Switch AVC system in reset state (reset-system and
reset-AVC lines) Switch reset-PNX5100 LOW Switch Reset-Ethernet LOW
Important remarks:
release reset audio 10 sec after entering
standby to save power
Also here, the standby state has to be
maintained for at least 4s before starting
another state transition.
Wait 5ms
Wait 10ms
Switch the NVM reset line HIGH
Switch WP-Nandflash LOW
Delay transition until ramping down of ambient light is
finished. *)
If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light
*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.
Switch Memories to self-refresh (this creates a more
stable condition when switching off the power).
Service Modes, Error Codes, and Fault Finding
2009-Apr-03

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

Page 25
Service Modes, Error Codes, and Fault Finding
E_06532_036.eps
150208
TO
UART SERVICE
CONNECTOR
TO
UART SERVICE
CONNECTOR
TO
I2C SERVICE
CONNECTOR
TO TV
PC
HDMI I
2
C only
Optional power
5V DC
ComPair II Developed by Philips Brugge
RC out
RC in
Optional
Switch
Power ModeLink/
Activity
I
2
C
ComPair II
Multi
function
RS232 /UART
EN 25Q548.1E LA 5.

5.4 Service Tools

5.4.1 ComPair

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I because ComPair takes care of this.
3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
Specifications
ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.
How to Connect
This is described in the chassis fault finding database in ComPair.
Figure 5-9 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!
How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
Software is available via the Philips Service web portal.
ComPair serial interface cable for Q52x.x. (using 3.5 mm Mini Jack connectors): 3138 188 75051.
Note: When having problems, please contact your local support desk.
2
C or UART commands is necessary,

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.
New in this chassis is the way errors can be displayed:
There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-3
– LAYER 1 errors are one digit errors – LAYER 2 errors are two digit errors.
In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.
Fatal errors, if I and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.
Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
In CSM mode – When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
In SDM mode – When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
In the ON state – In “Display error mode”, set with the RC commands
“mute_06250X _OK” LAYER 2 errors are displayed via blinking LED.
Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.
Basically there are three kinds of errors:
Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section 5.6
Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).
Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.
2
C bus is blocked and the set re-boots, CSM
The Blinking LED Procedure).
Extra Information. Note
).
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EN 26 Q548.1E LA5.
Service Modes, Error Codes, and Fault Finding

5.5.2 How to Read the Error Buffer

Use one of the following methods:
On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only
detected error.
37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
– Note that no protection errors can be logged in the
error buffer.
Via the blinking LED procedure. See section 5.5.3
Clear the Error Buffer.
•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:
By activation of the “RESET ERROR BUFFER” command in the SAM menu.
With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”.
If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the
How to
content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Via error bits in the status registers of ICs.
Via polling on I/O pins going to the stand-by processor.
Via sensing of analogue values on the stand-by processor or the PNX8543.
Via a “not acknowledge” of an I
2
C communication.
Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.
Table 5-2 Layer 1 code overview (multi chassis overview)
LAYER 1 codes
SSB 2
Display supply 3
Platform supply 4 Only for display option 196 and 197
Fan 7
AmbiLight or DC/DC or 3D LED dim panel 8
Table 5-3 Error code overview (multi chassis overview)
Description
Main NVM 2 0 MIPS I Temp. protection 3 12 MIPS I
LAYER 1 error
LAYER 2 error
Monitored
Medium
Error/Prot.
EB: in Error Buffer
BL: Blinking LED
2
C1 E x STM24C128 SSB TV shut down with red LED blinking 2.
2
C4 P BL/EB Supply
Device
Defective board
I2C3213MIPSI2C3 E BL/EB SSB SSB I2C2214MIPSI2C2 E BL/EB SSB SSB
PNX does not boot (HW cause) PNX 5100 does not boot
12V 3 16 St-by µP I/O P BL Supply
12V 3 16 St-by µP I/O P BL Platform Supply
Inverter or display supply 3 17 Mips I/O E EB Supply
Only for display option 196 and 197 4 17 Mips I/O E EB Display Supply
1V2, 1V2, 3V3, 5V to low 2 18 St-by µP I/O P BL SSB PNX 5100 2 21 MIPS I
HDMI MUX 2 23 MIPS I
215St-by µP I
2
C1 P BL SSB SSB
2
C3 E EB PNX 5100 SSB
2
C3 E EB TDA9996 SSB
I2C switch 2 24 Mips I2C2 E EB PCA9540 SSB
Boot-NVM PNX5120 2 25 MIPS
Multi Standard demodulator (Micronas IF) 2 27 MIPS I
ARM (AL) 8 28 MIPS
FPGA (Local contrast) 2 29 MIPS Tuner1 2 34 MIPS I
2
FAN I
C expander 7 41 MIPS I2C2 E EB PCA 9533 FAN mod.
T× sensor 7 42 MIPS I
FAN 1 7 43 MIPS
FAN 2 7 44 MIPS MIPS does not boot (SW cause) 2 53 St-by µP I
Display 5 64 MIPS
FPGA LED dim 2D 2 65 MIPS FPGA LED dim 3D 8 65 MIPS I
I2C3 E EB STM24C08 SSB
2
C3 E EB DRX3616K
DRX3626K
SSB
I2C3 E EB NXP LPC2103 AL mod. or DC/DC I2C3 E EB Altera SSB
2
C3 E EB UV1783S
2
C2 E EB LM 75 T×sensor
HD1816
SSB
I2C2EEB FAN I2C2EEB FAN
2
C1 P BL PNX8543 SSB TV is rebooting endlessly with white LED blinking. I2C2 E BL/EB Altera Display I2C3 E EB Xilinx SSB
2
C2 E EB Altera SSB
Special Remarks
TV is rebooting endlessly with red LED blinking “2”.
TV is rebooting endlessly with red LED blinking “2”
TV shut down with red LED blinking “3”.
TV still in normal operation mode, but without backlights. Enter CSM Layer 1 red LED blinking “3”.
TV shut down with red LED blinking “2”.
TV is rebooting endlessly, with red LED blinking “2” (shown every 20 second).
Activate CSM red LED blinking “2”.
TV is rebooting endlessly, with red LED blinking “2” (shown every minute).
TV is in normal operation but without video displayed (RF).
TV is in normal operation but without AMBILIGHT “on”.
TV is in normal operation but without video displayed (RF).
2009-Apr-03
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Service Modes, Error Codes, and Fault Finding
EN 27Q548.1E LA 5.
Extra Information
Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section 5.8.6
UART Logging). It’s shown that the
loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair.
Main NVM. When there is no I
2
C communication towards the main NVM, LAYER 1 error = “2” will be displayed via the blinking LED procedure. In SDM, LAYER 2 error can be “19”. Check the logging for keywords like “I
Error 13 (I
2
C bus 3 blocked). When this error occurs, the
2
C bus blocked”.
TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.
Error 15 (PNX8543 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8541 completely dead, I between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I blocked (NVM). I
2
C2 can be indicated in the schematics as
2
C link
2
C2 bus is
follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems with: NVM PNX5120, PNX5120 itself, or DDRs.
Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = “3”). When SDM is activated we see blinking LED LAYER 2 error = “16”.
Error 17 (POK). The display is switched “on” with the signal “Lamp On”. If the inverter starts (or 24V display is OK) the POK line becomes “high”. If the POK line is not “high”, the set backlight will be switched “off” and “on” again for 3 times (start-up). If the set POK line becomes “high” after the retries, no error is logged; if the POK stays “low”, error is logged: LAYER 1 error = “3”, LAYER 2 error = “17”. No protection is required, the start-up goes on.
Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = “2” will be displayed automatically. In SDM this gives LAYER 2 error = “18”.
Error 21 (PNX5120). When there is no I
2
C communication towards the PNX5120 after start-up (power “off” by disconnection of the mains cord), LAYER 2 error will blink continuously via the blinking LED procedure in SDM. (start­up the TV with the solder paths short to activate SDM).
Error 23 (HDMI). When there is no I
2
C communication towards the HDMI multiplexer after start up, LAYER 2 error = “23” will be logged and displayed via the blinking LED procedure if SDM is switched “on”.
Error 25 (Boot-NVM PNX5120). When there is no I
2
C communication towards the PNX5120 NVM after start-up, TV is rebooting endlessly with blinking LAYER 1 error = 2 (shown every minute). When SDM is activated we see blinking LED LAYER 2 error = “25”.
Error 27 (Multi Standard demodulator). When there is no
2
C communication towards the Multi Standard
I demodulator after start up, LAYER 2 error = “27” will be logged and displayed via the blinking LED procedure when SDM is switched “on”.
Error 28 (FPGA ambilight). When there is no I
2
C communication towards the FPGA ambilight after start up, LAYER 2 error = “28” will be logged and displayed via the blinking LED procedure if SDM is switched “on”. Note that it can take up several minutes before the TV starts blinking LAYER 1 error = “2” in CSM or in SDM, LAYER 2 error = “28”.
Error 34 (Tuner). When there is no I
2
C communication towards the tuner after start up, LAYER 2 error = “34” will be logged and displayed via the blinking LED procedure when SDM is switched on.
Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because
of hardware problems (NAND flash,...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take up to 2 minutes before the TV starts blinking LAYER 1 error = “2” or in SDM, LAYER 2 error = “53”.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:
Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table 5-3
overview (multi chassis overview)) which causes the failure
of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.
Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table
Error code overview (multi chassis overview)) and will
5-3
be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.
Important remark: For all errors detected by MIPS which are fatal (rebooting of the TV set, with reboot starts after LAYER 1 error blinking), one should short the SDM solder paths at start­up from the power OFF state by mains interruption and not via the power button, to trigger the SDM via the hardware pins.
When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error-buffer. Error codes greater then 10 are shown as follows:
1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit
2. A pause of 1.5 s
3. “n” short blinks (where “n”= 1 to 9)
4. A pause of approximately 3 s,
5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s
6. The sequence starts again.
Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:
1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s
2. Two short blinks of 250 ms followed by a pause of 3 s
3. Eight short blinks followed by a pause of 3 s
4. Six short blinks followed by a pause of 3 s
5. One long blink of 3 s to finish the sequence
6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:
Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the stand-by processor. At the time of this release, this layer 1 error blinking was not working as expected. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section 5.8.6
Activate the SDM. The blinking front LED will show the entire contents of the layer 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.
UART Logging).
Error code
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EN 28 Q548.1E LA5.
Service Modes, Error Codes, and Fault Finding
Important remark:
For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.
Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2
the second last error, etc.... Take notice that it takes some
seconds before the blinking LED starts.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:
Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2.
Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.
Remark on the Supply Errors
The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.
Protections during Start-up
During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section 5.3
up).

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. The audio protection circuit pulls the “supply-fault” low and the tv set will blink LAYER 1 error = 2 or in SDM, LAYER 2 error = 19. Be very careful to overrule this protection via SDM (not to cause damage to the Class D audio amplifier). Check audio part first before activating via SDM. In case one of the
speakers is not connected, the protection can also be triggered.
Repair Tips
It is also possible that the set has an audio DC protection because of an interruption in one or both speakers (the DC voltage that is still on the circuit cannot disappear through the speakers). Caution: (Dis)connecting the speakers during the ON state of the TV can damage the audio amplifier.
Step by step Start-

5.7.3 Important remark regarding the blinking LED indication

As for the blinking LED indication, the blinking LED of layer 1 error displaying can be switched “off” by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched “off” by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and does not recognise the keyboard commands at this time.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra
Information”.

5.8.1 Ambilight

Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair, the light output can be adjusted.

5.8.2 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.3 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button on the TV’s local keyboard for 10 seconds until the “F” disappears from the screen.

5.8.4 DC/DC Converter

Introduction
The best way to find a failure in the DC-DC converters is to check their starting-up sequence at “power-on via the mains cord”, presuming that the stand-by microprocessor is operational.
If the input voltage of DC-DC converters is around 12.7 V (measured on decoupling capacitors 2107 and 2123 and the enable signals are “low” (active), then the output voltages should have their normal values. The +12V and +5VPOD supplies start-up first (enabled by PODMODE signal from the stand-by microprocessor). There is a supplementary condition for 12V to start-up: if the +5V­POD does not start up due to a local defect, then +12V will not be available as well. The +5V-ON supply is enabled by the ONMODE signal (coming also from the stand-by microprocessor). The +1V2 supply starts up when the +12V appears, then at least 100 ms later, the +3V3 will be activated via the ENABLE-3V3 signal from the stand-by microprocessor. If the +12V value is less than 10 V, the last enumerated voltages will not show up due to the under­voltage detection circuit 7105-1 + 6101 and surrounding components. Furthermore, if the +12V is less than 8 V, then also the +1V2 will not be available. The +5V5-TUN generator 7202 (present only for the analogue version of China platforms) will start to operate as soon as the 12V (PSU) is present.
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Service Modes, Error Codes, and Fault Finding
EN 29Q548.1E LA 5.
The consumption of controller IC 7103 is around 19 mA (that means almost 200 mV drop voltage across resistor
3108).
The current capability of DC-DC converters is quite high (short-circuit current is 7 to 10 A).
The DETECT1 signal (active “low”) is an internal protection (error 18) of the DC-DC convertor and will occur if the output voltage of any DC-DC convertor is out of limits (10% of the normal value).
Fault Finding
Symptom: +1V2 not present (even for a short while ~10 ms) – Check 12 V availability (resistor 3108, MOS-FETs
7101 and 7102), value of +12 V, and surrounding
components) – Check the voltage on pin 9 (1.5 V), – Check for +1V2 output voltage short-circuit to GND that
can generate pulsed over-currents 7...10 A through coil
5103.
– Check the over-current detection circuit (2106 or 3131
interrupted).
Symptom: +1V2 present for about 100ms, +3V3 not rising. – Check the ENABLE-3V3 signal (active “low”), – Check the voltage on pin 8 (1.5 V), – Check the under-voltage detection circuit (the voltage
on collector of transistor 7105-1 should be less than
0.8 V),
– Check for output voltages short-circuits to GND (+3V3)
that can generate pulsed over currents 7...10 A through coil 5101,
– Check the over-current detection circuit (2105 or 3127
interrupted).
Symptom: +1V2 OK, +3V3 present for about 100 ms. Possible cause: SUPPLY-FAULT line stays “low” even though the +3V3 and +1V2 is available - the stand-by microprocessor is detecting that and switching “off” all supply voltages. – Check the drop voltage across resistor 3108 (they
could be too high, meaning a defective controller IC or MOS-FETs),
– Check if the boost voltage on pin 4 of controller IC 7103
is less than 14 V (should be 19 V),
– Check if +1V2 or +3V3 are higher than their normal
values - that can be due to defective DC feedback of the respective DC-DC convertor (ex. 3152, 3144).
Symptom: +1V2 and +3V3 show a high level of ripple voltage (audible noise can come from the filtering coils 5101, 5103). Possible cause: instability of the frequency and/or duty cycle of a DC-DC converter or stabiliser. – Check the resistor 3164, capacitors 2102 and 2103,
input and output decoupling capacitors.
– Check AC feedback circuits (2120, 2129, 3141, 3153,
2110, 2114 and 3135).
Symptom: +1V2, +3V3 ok, no +5V5-TUN (analogue sets only). Possible cause: the “+5V5-TUN GENERATOR” circuit (7202 and surroundings components) is defective: check transistor 7202 (it has to have gate voltage pulses of about 10 V amplitude and drain voltage pulses of about 35 V amplitude) and surrounding components. A high consumption (more than 6 mA) from +5V5-TUN voltage can cause also +5V5-TUN voltage to be too low or zero.
Note: when a pair of power MOSFETs (7101 or 7102) becomes defective, the controller IC 7103 should be replaced as well.

5.8.5 Fan self test (only for sets with LED backlight)

In case fans are present, a softest can be done by pushing the red coloured button on the remote control while the TV set is in CSM. Exit CSM and check the status of the fans in the error buffer by entering SAM (062596 + info button on the RC). In case of failure (fully red screen) more detailed information is available in the error buffer (error 41, 42, 43, 44).

5.8.6 UART Logging

When something is wrong with the TV set (f.i.the set is rebooting) checking the UART logging using hyperterminal can be done to find more information. Hyperterminal is a standard Windows application. It can be found via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the Service connector in the TV set, via the ComPair interface (this is compulsory, otherwise ICs are blown in the PC), to the “COMx”-port of the PC. After start-up of Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:
1. COMx
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5. Stop bits = 1
6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: When there is no picture available during reboot, it is possible to check for “error devices” in the logging (LAYER 2 error). This can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the “on” state of the TV. The audio amplifier can be damaged by disconnecting the speakers during “on” state of the set! Sometimes the set can go into protection, but that is not always the case.

5.8.8 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.9 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. See also Table 6-4

5.8.10 Upgrade HDMI EDID NVM

To upgrade the HDMI EDID, see ComPair for further instructions.
for the code.
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EN 30 Q548.1E LA5.
1
SDM2EDID
18440_201_090225.eps
090306

5.8.11 Upgrade VGA EDID NVM

To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has to be short circuited to ground. See ComPair for further instructions.
Figure 5-10 VGA EDID NVM
Service Modes, Error Codes, and Fault Finding
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Service Modes, Error Codes, and Fault Finding
START
Create “repair” directory on USB stick and
connect USB stick to TV-set
Go to SAM mode (062596 i+) and
save the TV settings via “Upload to USB”.
Set is still
operating?
- Replace SSB board by a Service SSB.
- Make the SSB fit mechanically to the set.
Go to SAM mode, and reload settings
via “Download from USB”.
Saved settings
on USB stick?
Program “Display Option” code via 062598
MENU/HOME, followed by 3 digits code (this
code can be found on a sticker inside the set).
Check and perform alignments in SAM
according to the Service Manual.
E.g. option codes, colour temperature...
Connect PC via ComPair interface to Service
connector.
END
Yes
After entering “Display Option” code, set is
going to Standby (= validation of code).
Restart the set.
In case of settings reloaded from USB, the set type, serial number, Display 12NC, are automatically stored when entering display options.
No
- Check if correct “Display Option” code is programmed.
- Verify “Option Codes” according sticker inside the set.
- Default settings for White drive ...see Service Manual
No
Set is starting up & display is OK.
If not already done;
Check latest software on Service website.
Update Main and Standby software via USB.
Q52xE SSB Board swap – v5.1 VDS/JA Updated 18-03-2009 (changes are indicated in red)
Instruction note: SSB replacement Q528.x, Q522.x, Q529.x, Q54x.x
Set is starting up but no display.
Final check of all menus in CSM. Special attention for HDMI Keys.
Program “set type number”, “serial number”,
and “display 12NC”.
Update main software in this step, by using
“autorun.upg” file.
Start TV in Jett mode (DVD i+/OSD)
Open ComPair browser Q52x.
Noisy picture with bands/lines is visible and the
red LED is continuous “on”
(sometimes also the letter “F” is visible).
Press 5 s. the “Volume minus” button on the local
cntrl until the red LED switches “off”, and then
press 5 s. the MENU (*) button of the local cntrl.
(* in some chassis this button is named SOURCE)
The picture noise is replaced by blue mute!
Unplug the mainscord to verify the correct
disabling of the factory-mode.
Program “Display Option” code via 062598 MENU/
HOME, followed by 3 digits code (this code can be
found on a sticker inside the set).
After entering “Display Option” code, set is going
to Standby (= validation of code).
Restart the set.
Set is starting up in “Factory” mode.
Start-up set.
Set behaviour?
Set is going into protection after
replacing the SSB
(blinking LED, error 2).
Take care that speakers are connected! In some sets, the speakers are in the rear cover, and when the set is switched “on” without speakers, it is possible that the Audio protection is triggered.
Advise: remount rear cover before switching “on” (see also SCC_71772).
Q54x.x
H_16771_007.eps
090318

5.8.12 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See Figure 5-11
.
EN 31Q548.1E LA 5.
Figure 5-11 SSB replacement flowchart
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Service Modes, Error Codes, and Fault Finding

5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NAND­Flash, which is connected to the PNX8543 via the PCI bus.
It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU.
Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). It is not possible anymore to replace the NAND-Flash with another one from a scrap-board. Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software (see the DFU for instructions).
3. Perform the alignments as described in section Reset of
Repaired SSB.
4. Check in CSM if the HDMI keys are valid.
For the correct order number of a new SSB, always refer to the Spare Parts list, available on the Philips Spare Part web portal.

5.9.2 Main Software Upgrade

The “UpgradeAll.upg” file is only used in the factory.
The “FlashUtils.upg” file is only used by Service centres that are allowed to do component level repair on the SSB.
Automatic Software Upgrade
In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. FUS _Q5431E_
1.25.5.0_commercial.zip). This can also be done by the
consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:
1. Copy “AUTORUN.UPG” to the root of the USB stick.
2. Insert USB stick in the set while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.
Manual Software Upgrade
In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.
Attention!
In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:
1. Create a directory “UPGRADES” on the USB stick.
2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.
3. Copy the renamed “upg” file into this directory.
4. Insert USB stick into the TV.
5. The renamed “upg” file will be visible and selectable in the upgrade application.
Back-up Software Upgrade Application
If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the “INFO”-button on a Philips remote control or “CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:
1. Create a directory “UPGRADES” on the USB stick.
2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT69_84.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see
Manual Software Upgrade.
section
5. Select the appropriate file and press the “red” button to upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.
File name Description
907.5_PnSEsticker.zip Contains the E-sticker data. Not to be
cabinet_TV543_x.x.x.x.zip Contains acoustic parameters per
ceisp2padll_P2PAD_x.x.x.x.zip Not to be used by Service technicians.
display_TV543_x.x.x.x.zip Not to be used by Service technicians.
EJTAGDownload_Q5431_x.x.x.x.zip Only used by service centra which are
Factory_Q5431_x.x.x.x.zip Only for production purposes, not to be
FlashUtils_Q5431_x.x.x.x.zip Not to be used by Service technicians.
FUS_Q5431_x.x.x.x.zip Contains the “autorun.upg” which is
HDMI_FHD_EDID_Q5431_x.x.x.x.zip Contains the EDID content of the different
HDMI_HD_EDID_Q5431_x.x.x.x.zip Contains the EDID content of the different
lightGuide_TV543_x.x.x.x.zip Not to be used by Service technicians.
OAD_Q5431_x.x.x.x.zip Not to be used by Service technicians.
Pgamma_xxxxxxxx_Q5431_x.x.x.x.zip Contains NVM data for the specific
PQ_Q5431_x.x.x.x.zip Not to be used by Service technicians.
processNVM_Q5431_x.x.x.x.zip Default NVM content. Must be
used by Service technicians.
cabinet. Not to be used by Service technicians.
For ComPair development only.
allowed to do Component Level Repair.
used by Service technicians.
needed to upgrade the TV main software and the software download application.
(FHD) HDMI NVM’s. See ComPair for further instructions.
(HD) HDMI NVM’s. See ComPair for further instructions.
display control board. Not to be used by Service technicians.
programmed via ComPair.
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Service Modes, Error Codes, and Fault Finding
File name Description
StandbySW_CFT69_x.x.x.x.zip Contains the Stand-by software in “upg”
Tcon_xxxxxxxx_Q5431_x.x.x.x.zip Contains NVM data for the specific
UpgradeAll_Q5431_x.x.x.x.zip
UpgradeExe_Q5431_x.x.x.x.zip Only for production purposes, not to be
VGA_FHD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the different
VGA_HD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the different
and “hex” format.
- The “StandbySW_xxxxx_prod.upg” file can be used to upgrade the S tand-by software via USB.
- The “StandbySW_xxxxx.hex” file can be used to upgrade the Stand-by software via ComPair.
- The files “StandbySW_xxxxx_exhex.hex” and “StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes).
display control board. Not to be used by Service technicians.
Only for production purposes, not to be used by Service technicians. Caution:
Never try to use this file, because it will overwrite the HDCP keys!
used by Service technicians.
(FHD) VGA NVM. See ComPair for further instructions.
(HD) VGA NVM. See ComPair for further instructions.
EN 33Q548.1E LA 5.
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6. Alignments

Alignments
Index of this chapter:
General Alignment Conditions
6.1

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings
6.5 Reset of Repaired SSB
6.6 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:
Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V
/ 50 Hz (± 10%).
AC
LATAM-NTSC: 120 - 230 V – US: 120 V
/ 60 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
Connect the set to the mains via an isolation transformer with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.
Test probe: R
> 10 MΩ, Ci < 20 pF.
i
Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”
according to the set sticker (see also section Option
Settings).
– Press OK on the remote control before the cursor is
moved to the left.
– In submenu “Option numbers” select “Store” and press
OK on the RC.
•OR: – In main menu, select “Store” again and press OK on
the RC.
– Switch the set to Stand-by.
Warming up (>15 minutes).
6.2 Hardware Alignments
Not applicable.
6.3 Software Alignments
Put the set in SAM mode (see chapter 5. Service Modes, Error
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:
Tuner AGC.
White point.
To store the data:
Press OK on the RC before the cursor is moved to the left.
In main menu select “Store” and press OK on the RC.
Press MENU on the RC to switch back to the main menu.
Switch the set to stand-by mode.
For the next alignments, supply the following test signals via a video generator to the RF input:
EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz
US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Purpose: To keep the tuner output signal constant as the input signal amplitude varies. No alignment is necessary, as the AGC alignment is done automatically (standard value: “64”). Store settings and exit SAM.

6.3.2 White Point

Set “Active control” to “Off”.
Choose “TV menu”, “TV Settings” and then “Picture” and set picture settings as follows:
Picture Setting
Dynamic backlight Off
Dynamic Contrast Off
Colour Enhancement Off
Picture Format Un scaled
Light Sensor Off
Brightness 50
Colour 0
Contrast 100
Go to the SAM and select “Alignments”-> “White point”.
White point alignment LCD screens:
Use a 100% white screen as input signal and set the following values: – “Colour temperature”: “Normal”. – All “White point” values to: “127”. – “Red BL offset” values to “7”. – “Green BL offset” values to “7”.
In case you have a colour analyser:
Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.
Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1
). Tolerance: dx: ±
0.004, dy: ± 0.004.
Repeat this step for the other colour temperatures that need to be aligned.
When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Table 6-1 White D alignment values
Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.278 0.289 0.314
y 0.278 0.291 0.319
If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.
Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).
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Alignments
EN 35Q548.1E LA 6.
Set the RED, GREEN and BLUE default values according to the values in Table 6-1
.
When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Table 6-2 White tone default settings Frame sets
(7000 series)
White Tone 32" 42" Black level
Colour Temp R G B R G B R G
Normal 127 93 100 127 116 112 8 8
Cool 127 98 122 125 114 124 8 8
Warm 12783 6112710873 8 8
Table 6-3 White tone default settings Roadrunner sets
(8000 series)
White Tone 32" 42" Black level
Colour Temp R G B R G B R G
Normal 12793 9712710399 8 8
Cool 127 100 120 127 109 118 8 8
Warm 12783 5912794 61 8 8
Note: tint settings Frame sets (7000 series) 47" and 52", as well as Roadrunner sets (8000 series) 37" and 47", were not available at time of publishing.

6.3.3 LCD Panel Flicker Alignment

offset
offset

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-4 Example: The options sticker gives the following option numbers:
08192 00133 01387 45160
12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. SeeTable 6-4
for the options.
Diversity
Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM An alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 3.
Precautions, Notes, and Abbreviation List.
.
Note: This is only necessary for Forward Integration models (sets that have the LCD Timing Controller (TCON) located on the SSB) - not applicable to sets in this chassis.
See ComPair for further instructions.

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX5120 ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.
Notes:
After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.
The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

6.4.5 Option Code Overview

Table 6-4 Option and display code overview
CTN (Alt. BOM#)
32PFL7404H/12 08193 00649 01391 45288 10165 28832 00162 00000 181
42PFL7404H/12 08193 00651 01391 45288 10167 28832 00178 00000 183
47PFL7404H/12 08193 00651 01391 45288 10170 28832 00162 00000 186
52PFL7404H/12 08193 00651 01391 45288 10192 28832 00186 00000 208
2
C
32PFL8404H/12 08209 00656 02031 45288 26549 28834 00162 00000 181
37PFL8404H/12 08209 00656 02031 45288 26549 28834 00170 00000 161
42PFL8404H/12 08209 00657 02031 45288 26551 28834 00178 00000 183
47PFL8404H/12 08209 00657 02031 45288 26554 28834 00162 00000 186
Options Group 1 Options Group 2 Disp.
code
Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool. In case of a display replacement, reset the “Operation hours” to “0”, or to the operation hours of the replacement display.
For dealer options, in SAM select “Dealer options”. See Table 6-5
.

6.4.3 (Service) Options

Select the sub menu's to set the initialisation codes (options) of the model number via text menus. See Table 6-5
.
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6.5.1 SSB identification

Whenever ordering a new SSB, it should ne noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

6.6 Total Overview SAM modes

Table 6-5 SAM mode overview

Alignments
Figure 6-1 SSB identification
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Hardware Information A. SW VERSION e.g. “Q5431_0.26.10.0” Display TV & Stand-by SW version and CTN serial
B. Stand-by processor version e.g. “STDBY_84.69.0.0”
C. Production code e.g. “See type plate”
Operation hours Displays the accumulated total of operation hours.TV
Error Displayed the most recent error.
Reset error buffer Clears all content in the error buffer.
Alignment Tuner AGC RF-AGC Take over point adjustment (AGC default
White point Colour temperature Normal 3 difference modes of colour temperature can be se-
Warn
Cool
White point red LCD White Point Alignment. For values,
White point green
White point blue
Red black level offset
Green black level offset
Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / not
Virgin mode Off/On
E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)
Auto store mode None Autostore mode disabled (not in installation menu)
PDC/VPS Autostore mode via ATS (PDC/VPS) enabled
TXT page Autostore mode via ACI enabled
PDC/VPS/TXT Autostore mode via ACI or ATS enabled
number.
switched “on/off” & every 0.5 hours is increase one
value is 64)
lected
see Table 6-1
muted in case no input signal is detected at input con­nectors.
Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)
.
2009-Apr-03
Page 37
Alignments
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Options Digital broadcast DVB Off/On Select DVB On/Off
DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country
DVB - T light Off/On Select DVB T light On/Off
DVB - C Off/On Select DVB C On/Off
DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country
Over the air download Off/On or Country dependent Select Over the air download On/Off or by country
8 days EPG Off/On Select 8 day EPG On/Off
Digital features USB Off/On Select USB On/Off
Display Screen 201 / LCD LGD WUE SBA1 37" Displayed the panel code & type model.
Video reproduction Picture processing None/PNX5120 Select Picture processing None/PNX5120 (Q543.xE
Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-
Source selection EXT1/AV1 type SCART CBVS RGB LR Select input source when connected with external
Ethernet Off/On Select Ethernet On/Off
Wi-Fi Off/On Select Wi-Fi On/Off
DLNA Off/On Select DLNA On/Off
On-line service Off On-line service is Off
PTP (Picture Transfer Protocol) Off/On Select PTP On/Off
Update assistant Off/On Select Update assistant On/Off
Internet software update Off Internet software update is Off
LightGuide Off/On Select LightGuide On/Off
Display fans Not present/Present Select Display fans Present/Not present.
Temperature sensor No sensor N.A
Temperature LUT 0 N.A
E-box & monitor Off/On Select E-box & monitor On/Off
chassis).
MOP local contrast Off/On Select MOP local contrast On/Off
Light sensor Off/On Select Light sensor On/Off
Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference
Pixel Plus type Pixel Plus HD Select type of picture improvement.
Perfect Pixel HD
Pixel Precise HD
Pixel Plus HD (used in Q543.xE)
Pixel Precise HD (used in Q548.1E)
Ambilight None, Select type of Ambilight modules use.
2 sided 2/2
2 sided 4/4
3 sided 2/3/2
3 sided 4/3/4
3 sided 4/5/4
4 sided 4/3/4/3
Ambilight technology LED/Future use Ambilight technology LED is in use.
MOP ambilight Off/On Select MOP ambilight On/Off
CVBS Y/C YPbPr LR
CVBS Y/C YPbPr HV LR
(CVBS) YPbPr LR
EXT2/AV2 type SCART CBVS RGB LR Select input source when connected with external
CVBS Y/C LR
(CVBS) YPbPr LR
CVBS Y/C LR
EXT3/AV3 type None Select input source when connected with external
CVBS
CVBS LR
YPbPr
YPbPr LR
YPbPr HV LR
VGA Off/On Select VGA On/Off
SIDE I/O Off/On Select SIDE I/O On/Off
HDMI 1 Off/On Select HDMI 1 On/Off
HDMI 2 Off/On Select HDMI 2 On/Off
HDMI 3 Off/On Select HDMI 3 On/Off
HDMI 4 Off/On Select HDMI 4 On/Off
HDMI side Off/On Select HDMI side On/Off
HDMI CEC Off/On Select HDMI CEC On/Off
HDMI CEC RC pass through Off/On Select HDMI CEC RC pass through On/Off
HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off
styling).
For 8400 series only
rameters.
equipment.
equipment.
equipment.
EN 37Q548.1E LA 6.
2009-Apr-03
Page 38
EN 38 Q548.1E LA6.
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.
Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1
Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options
Store Store after changing.
Initialise NVM N.A
Store
Software maintenance Software events Display Display information is for development purposes.
Hardware events Display Display information is for development purposes.
Operation hours display 0003 In case the display must be swapped for repair, you
Test setting Digital information QAM modulation: 64-QAM Display information is for development purposes.
Install start frequency 000 Install start frequency from 0 MHz
Install end frequency 999 Install end frequency as 999 MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before instal-
Development file ver­sions
Upload to USB Channel list To upload several settings from the TV to an USB
Download from USB Channel list To download several settings from the USB stick to
Development 1 file version Display parameters DISPT 4.0.8.11 Display information is for development purposes.
Development 2 file version 12NC one zip software Display information is for development purposes.
Personal settings
Option codes
Display-related alignment
History list
Personal settings
Option codes
Display-related alignment
Alignments
Tuner type HD1816-MK1/TD1716-MK4/
System RC support Off/On Select System RC support On/Off.
Embedded user manual Off/On Select Embedded user manual On/Off.
Start-up screen Off/On Select Start-up screen On/Off.
Wallpaper Off/On Select Wallpaper On/Off.
Hotel mode Off Hotel mode is Off.
Clear
Test reboot
Test reboot is to restart the TV.
Clear
Symbol rate: 23:29
Original network ID: 12817
Network ID:12817
Transport stream ID: 2
Service ID: 3
Hierarchical modulation: 0
Selected video PID: 35
Selected main audio PID: 99
Selected 2nd audio PID: -1
Digital + Analogue
Acoustics parameters ACSTS 3.0.6.1
PQF - Fixed settings 1 “4.54.34.32.34”
PQS - Profile set 1 “4.57.34.32.34”
PQU - User styles 1 “4.56.34.32.34”
Initial main software
NVM version Q5431_0.4.3.0
Flash units SW Q5431_0.16.48.24
TD1716-MK3/HD1816-MK2
Select type of Tuner used.
to 4.
5 to 8.
Select Store in the SAM root menu after making any changes.
can reset the “Display operation ho urs” to “0”. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour).
lation.
stick
the TV.
2009-Apr-03
Page 39

7. Circuit Descriptions

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090402
Optional for
Q548 chassis
Circuit Descriptions
EN 39Q548.1E LA 7.
Index of this chapter:
Introduction
7.1
7.2 Power Supply
7.3 DC-DC Converter
7.4 Front-End
7.5 HDMI
7.6 Video and Audio Processing - PNX8543
7.7 Common Interface CI+
Notes:
•Only new circuits (circuits that are not published recently) are described.
Figures can deviate slightly from the actual situation, due to different set executions.
For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

The Q548.1E LA chassis (platform name TV543/82) is a derivative from the Q543.1E LA chassis.
Main difference with the previous chassis is the addition of the PNX5120 Video Back-End Processor.
Roadrunner sets (8000 series) are equipped with AmbiLight.

7.1.1 Implementation

Key components of this chassis are:
PNX8543 Digital Colour Decoder
HD1816AF Hybrid Tuner
DRX3926K Demodulator
TDA9996 HDMI Switch
TPA3123D2PWP Class D Power Amplifier
PNX5120 Video Back-End Processor.

7.1.2 TV543 Architecture Overview

For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1
.
Figure 7-1 Architecture of TV543/82 platform
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7.1.3 SSB Cell Layout

Circuit Descriptions
2009-Apr-03
Figure 7-2 SSB layout cells (top view)
Page 41

7.2 Power Supply

Vo=400V
+3V3_STANDBY
+12V
Audio Supply (+12V)
To Lamps
AC Input
Non- Isolated/Hot
Isolated/Cold
PFC
Flyback
STANDBY (HIIGH=OFF, LOW=ON)
RELAY
Inverter
+24V
18440_208_090226.eps
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Vin AC
STANDBY
+3V3-STANDBY
+12V, +Vsnd, +24V
Max 1.0sec Max 0.5 sec
Min 20 msec
Max 5.0 sec
All power supplies described below are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Service Spare Parts website for the order codes of the boards.

7.2.1 Specifications

Most sets in the TV543 platform use the Integrated Power Board (IPB) - incl. inverter. The 52" sets in this chassis have a conventional PSU - with separate inverter.
Circuit Descriptions
EN 41Q548.1E LA 7.
Figure 7-4 PSU Timing Diagram
In this Service Manual, no detailed information is available because of design protection issues.

7.2.2 Diversity

Below find an overview of the different PSUs that are used:
Table 7-1 Supply diversity
Supplier PSU Model Input Voltage Range
LGIT PLHL-T826B 32PFL7404H/12 High Mains (198 to 265 V
Delta
Delta
Delta DPS-411AP-3 A 52PFL7404H/12 High Mains (198 to 265 V
LGIT PLHL-T826B 32PFL8404H/12 High Mains (198 to 265 VAC)
Delta DPS-298CP A 37PFL8404H/12 High Mains (198 to 265 V
Delta DPS-298CP-4 A 42PFL8404H/12 High Mains (198 to 265 V
Delta DPS-298CP-2 A 47PFL8404H/12 High Mains (198 to 265 VAC)
DPS-298CP-4 A 42PFL7404H/12 High Mains (198 to 265 V
DPS-298CP-2 A 47PFL7404H/12 High Mains (198 to 265 V

7.2.3 Application

An application diagram can be found below:

7.2.5 Power Supply Protection

Power supply protection is implemented via the stand-by controller of the PNX8543 via the following signals:
POWER-OK: signal from PSU to indicate if the supply output from the IPB is normal
DETECT1: signal to indicate if the +5V, +3V3 and +1V2 voltages on the chassis are present
DETECT2: signal to indicate if the +12V voltage on the chassis is present.
)
AC
)
AC
)
AC
)
AC

7.3 DC-DC Converter

Input power is obtained from the IPB module via the following voltages:
)
AC
)
AC
+3V3-STANDBY (stand-by-mode only)
+12V (on-mode)
•+V
(audio power) (on-mode)
snd
+24V (bolt-on power) (on-mode).
Control is achieved by the PNX8543 controller via the STANDBY signal.
Audio power is specifically for audio supply usage only and does not go through any DC conversion.
Below find a block diagram of the on-board DC-DC converters.
Figure 7-3 Application Integrated Power Board

7.2.4 Power Supply Timing

The STANDBY signal controls the on-mode voltages +12V,
and +24V. During chassis cold start from AC mains,
+V
snd
+12V can be expected to be stable within 1.0 seconds, while for a warm start, i.e. wake up from stand-by power state, this timing becomes 0.5 seconds maximum. During AC switch off, stand-by power +3V3-STANDBY decay is at least 20 ms but not more than 5.0 seconds compared to +12V. Refer to
Figure 7-4
:
+
3V3-STANDBY
NCP5422 + 2x
Si4936
+12V
(Sync Dual
Controller
+ Dual FETs)
ST1S10
(Sync Power IC)
ST1S10
(Sync Power IC)
LD3985M
(Linear Regulator)

Figure 7-5 DC-DC converters

LD1117
(Linear Regulator)
LD1117
(Linear Regulator)
+1V2-PNX8543
+3V3
+1V8-PNX8543
+1V8-PNX5100
ENABLE-3V3
+5V_+5V5-TUN
+1V2-PNX5100
+1V2-STANDBY
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I2C-TUNER
IF-AGC
NXP Hybrid
Tuner
SAW Filter
IF Amplifier DRX3926K PNX8543
I2C-SSB
CVBS
2nd SIF
TS
TDA9996
1P06
1P04
1P03
1P02
1P0 5
HDMIA-RX
ARX
BRX
CRX
DRX
HDMIB-RX
PNX8543
D
C
A
B
Out
1M96
A B
HDMI 2
HDMI Side
(optional)
HDMI 3
(optional)
HDMI 1
HDMI 4
(optional)
Edid
18440_213_090227.eps
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TDA9996
CPU
IIC
Platform with embedded EDID
4 * HDMI
inp uts
253 common Bytes
+ 1B subaddres of
Source Physical Address
+3B for input A +3B for input B +3B for input C +3B for input D
E D ID : 253B
3B 3B 3B 3B

7.4 Front-End

The Front-End consist of the following key components:
Tuner HD1816AF
IF demodulator DRX3926K
AGC amplifier UPC3221GV
SAW filter 36M125.
Below find a block diagram of the front-end application.
Circuit Descriptions

Figure 7-8 EDID control (embedded EDID)

Figure 7-6 Front-End block diagram

The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.

7.5 HDMI

In this platform, the TDA9996 HDMI multiplexer is implemented. The EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical sub address: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.
Some delta’s w.r.t. TDA9996 compared to earlier chassis/ platforms are:
+5V detection mechanism
stable clock detection mechanism
integrated EDID
•RT control
HPD control
TMDS output control
CEC control
new hot-plug control for PNX8543 for 5th HDMI input
new EDID structure: EDID stored in TDA9996, therefore there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms.
Some delta’s with respect to PNX8543 compared to earlier chassis/platforms are:
2 HDMI inputs (A & B)
HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.
After replacement of the TDA9996 HDMI multiplexer, the
2
default I
C address should be reprogrammed from C0 to CE, and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.

Figure 7-7 HDMI input configuration

2009-Apr-03
Page 43
Circuit Descriptions
18440_202_090226.eps
TS out/in for
TS in from
CVBS, Y/C,
LV DS for
analog CVBS
analog audio
I
2
S
Dual SPDIF
Low-IF
SSIF, LR
Dual HDMI
SPDIF
CI/CA
MPEG
PRIMARY
LV DS
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
300 MHz
300 MHz
I2C
PWM
GPIO IR ADC UART I2C GPIO Flash
SYSTEM
USB 2.0 CA
PNX8543x
DV INPUT
DV-ITU-656
AV-PIP
SPI
MPEG/H.264
I2S
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
channel decoder
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
CPU
MIPS32 4KEc
01 x22 x
AV-D SP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
channel)
(single or dual
flat panel display
DRAWING
ENGINE
DMA BLOCK
PCI 2.2
EN 43Q548.1E LA 7.

7.6 Video and Audio Processing - PNX8543

The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.
The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling.
For a functional diagram of the PNX8543, refer to Figure 7-9
.

Figure 7-9 PNX8543 functional diagram

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VMSP
HDMI_UIP
PC_RX
AFE
(ADC)
DAC
LV DS_BUF
LV DS_TX
CPIPE_
L2QTV
CPIPE_
L2VO
MCU-DDR
DMA BUS
DDR2-SDRAM
PNX8543x
VCP_
UIP
DENC
DAC
VCP_ WIFD
HDMI_
RX
MBVP_ L2VO2
MBVP_ L2QTV
MBVP_
L2VO1
A
A
GFX2
PIP
CVBS1/Y
monitor
main
CVBS2/C
monitor
HDMI
VCP/PC
LOW IF
CVBS
RGB
Dual HDMI
FPD-LVDS1
LCD panel
MUX
VCP_RX
2D_DE
VIP
(ITU-656)
PC_
UIP
GFX1
FPD-LVDS2
LCD panel
CVBS/Y
C
CAI
TS
TSDO
TSDI CMD
PCMCIA
TSI
MSVD
DV (including
ITU-656)
YPbPr
VGA

7.6.1 Video Subsystem

Circuit Descriptions
Refer to Figure 7-10
for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.
The Video Subsystem consist of the following blocks:
Analogue Front-End (AFE) block
Video and PC Capture (VPC/PC) pipe
HDMI Receiver interface
Memory-Based Video Processor MBVP)
Video Composition Pipe (CPIPE)
Memory Based Video Processor (MBVP) VO-1
Memory Based Video Processor (MBVP) VO-2
Video Composition Pipe (CPIPE)
Dual Flat Panel Display-LVDS (FPD-LVDS)
Digital Encoder (DENC)
Digital Video VIP
2D graphics block.
2009-Apr-03
Figure 7-10 PNX8543 video flow diagram
Page 45

7.6.2 Audio Subsystem

18440_204_090226.eps
090226
VMSP
ADC
MCU
DDR2-SDRAM
PNX8543x
HDMI_RX
CAI
SPDIF-IN
I
2
S
SPDIF
DigIF
ASDEC (DEMODULATION AND DECODING)
TM2270
(MPEG, AC-3, MP3
DECODER)
SPDIF-OUT
AO
AI
APP - AUDIO DSP
(POST PROCESSING)
2
DAC
2
DAC
2
DAC
2
DAC
DMA BUS
I2S-OUT-SD3 I2S-OUT-SD4
I2S-OUT-WS I2S-OUT-SCK I2S-OUT-OSC
Main L, R
HP L, R
SCART2 L, R
SCART1 L, R
HDMI
SPDIF-IN1
IF
SSIF
L, R
TS-IN
SPDIF-Out
SPDIF-IN2
I2S-OUT-SD1 I2S-OUT-SD2
I2S-IN-SD3 I2S-IN-SD4
I2S-IN-WS I2S-IN-SCK I2S-IN-OSC
I2S-IN-SD1 I2S-IN-SD2
SPDIF
ADC
4
4 × I2S
4
4 × I2S
XB3
XB4
from XB4
fast SPDIF
XB1
XB2
4 × I2S
Circuit Descriptions
EN 45Q548.1E LA 7.
Refer to Figure 7-11
for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.
Figure 7-11 PNX8543 audio flow diagram
The Audio Subsystem consist of the following blocks:
Analogue Audio Front End (AAFE) used to capture
Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input
HDMI Receiver interface block
SPDIF input block
Audio Input (AI) block
Audio Output (AO) block
Demodulation & Decoding (ASDEC) DSP for decoding all
analogue terrestrial TV sound standards
Audio Post-Processing (APP) block
Digital Audio decoder.
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JTAG_MMIO
UART2
UART1
IIC2_DMA
IIC3_DMA
MIPS 4KEc
SYSTEM
CONTROLLER
80C51
PCI_XIO
CAI
MCU_DDR
DMA BUS
DCS-NETWORK
DDR2-SDRAM
I2C-2
I2C-3
EJTAG
PNX8543x
UART-1
UART-2
I2C-MC
UART-3
PWMs
GPIOs
CI/CA
PCI/XIO
EJTAG
USB2.0USB
AVD SP
IIC4_DMA
I2C-1

7.6.3 Connectivity and Compute Subsystem

Circuit Descriptions
Refer to Figure 7-12 subsystem.
for the connectivity and compute
The Connectivity Subsystem consists of:
PCI/XIO interface
USB2.0 interface
Three 2-wire UARTs
Four Master/Slave I
Common Interface/Conditional Access Interface.
The Computing Subsystem consists of:
32-bit MIPS RISC core
Enhanced JTAG (EJTAG) block inside the MIPS
JTAG_MMIO blocks
TV controller
Audio/Video DSP (AV_DSP)
Memory Control Unit (MCU).
2
C interfaces
Figure 7-12 PNX8543 connectivity and compute subsystem

7.6.4 Service Notice - FLASH RAM / PNX8543 exchange

The FLASH RAM (item 7M00) and/or PNX8543 (item 7600) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+) keys in the components, unauthorised exchange of these
components will always result in a defective board.

7.7 Common Interface CI+

Together with this platform, an extension to the Common Interface (CI) Conditional Access system is added, called CI+.
CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB.
2009-Apr-03
Page 47
The weakness of the conventional CI module used in a
CAM
PNX8543
TS-INP UT
Transport Streams
CA-Control
CA-MDI
CA-MDO
CA-CTRL
PCI/XIO
Proprietary CA scrambling
CI + StandardisedCCS scrambling
DES/AES
descrambler
MHEG MMI
application
Matrix
Matrix
tuner
channel
decoder
DES/AES
scrambler
CA clien t
MHEG CI+
decoder
demux
(SC )
Command inte rface
Transport stream
inte rface
18440_221_090227.eps
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ARM
SDA
SCL
SEL1
SEL2
SPI C LOCK
SPI LATCH
SPI D ATA OU T
SPI DATA RETURN
PWM CLOCK
BLANK
PROG
SPI LA TCH 2 (only on dc/dc for aurea)
C S EEPROM
TEM P
Scl1
Sd a1
tb d
tb d
Sck
P0.7
MOSI
MISO
P0.8
TxD
RxD
Rxd0
Txd 0
MAT0.0
MAT1.0
tb d
tb d
P0.10
Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual.
The CI+ standard is downwards compatible with the existing CI standard.
The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.

7.8 Ambi Light

Circuit Descriptions

Figure 7-13 CI+ Conditional Access implementation

EN 47Q548.1E LA 7.
The Ambi Light architecture in this platform has been entirely renewed. The characteristics are:
Additional DC/DC board generating 12/16/24 V (optional)
ARM processor (on DC/DC panel or AL board)
Low-power LEDs
SPI interface from ARM to LED drivers
2
C upgradeable via USB
•I
Each AL module has a temperature sensor.

Figure 7-14 Interface between Ambi Light and SSB

7.8.1 ARM controller

The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards.
Refer to Figure 7-14
for the Ambi Light architecture.
Refer to Figure 7-15
below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102).
Figure 7-15 ARM controller interface
Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface.
2009-Apr-03
Page 48
EN 48 Q548.1E LA7.
18310_205_090318.eps
090318
Amb ilig ht modu le 1 Am b ilight mod u le 2 Amb ilight m odu le N
ARM
LED
DRIVER
1
LED
DRIVER
2
LED
DRIVER
N
SPI data in
S o ut Sin So ut S o utS in
SPI clo ck (S CLK) SPI la tch (XL AT)
PRO G (VPRG ) BLANK PW M CLOC K ( GSCLK)
o ut16
o ut16
o ut16
SPI d ata retu rn
18310_206_090318.eps
090318
Amb iligh t mod ule 1 Amb iligh t mod ule 2
ARM
TEMP
SENS OR
Vcc
Pull-upPull-upPull-up
TEMP
SENS OR
Vcc
Amb iligh t mod ule N
TEMP
SENS OR
Vcc
Circuit Descriptions
The SPI bus is a synchronous serial data link standard that operates in full duplex mode.
For debugging purposes, the working principle is given below:
At startup the controller will read-out matrix data from the EEPROM devices (via SPI DATA RETURN)
Before operation, the driver current is set via SPI, with driver in DC mode
During normal operation the controller receives RGB-, configuration-, operation mode- and topology data via I
The controller converts the I
2
C RGB data via the matrixes
2
to SPI LED data
Via data return the controller receives error data (if applicable).
Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I USB). The controller can receive matrix values via I
2
C (via
2
C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness.

7.8.2 LED driver communication (via SPI bus)

C
Refer to Figure 7-16
below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.
Figure 7-16 SPI communication between ARM controller and LED drivers
The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below:
Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.
Data from the ARM controller is linked through the drivers, which are connected in cascade
SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK are going directly from the controller to each driver
SPI DATA RETURN is linked from the last driver to the controller: controller decides which driver returns data.

7.8.3 Temperature Control

Refer to Figure 7-17
for signal interfacing between the ARM
controller and the temperature sensor on the AL boards.
Figure 7-17 Communication between ARM controller and
temperature sensor
2009-Apr-03
Page 49

8. IC Data Sheets

IC Data Sheets
EN 49Q548.1E LA 8.
This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 Diagram SSB: DC/DC +3V3 +1V2 B01A, NCP5422AD (IC 7103)

Block Diagram
+
V
CC
+
+
+
+
+
+
0.25 V
5.0
A
IS+1
IS−1
IS+2
IS−2
8.6 V
7.8 V
70 mV
70 mV
+
S
Set Dominant
R
1.0 V
Q
+
V
CC
BIAS
FAULT
E/A OFF
R
+
E/A1
OSC
CURRENT
SOURCE
OSC
PWM Comparator 1
0.425 V
PWM Comparator 2
GEN
CLK1
CLK2
RAMP1
0.425 V
FAULT
− +
FAULT
RAMP2
E/A OFF
+
+
E/A2
1.0 V
1.2 mA
RAMP1
S Reset
Dominant
R
FAULT
S
Reset Dominant
R
FAULT
non−overlap
non−overlap
FAULT
RAMP2
V
V
BST
CC
BST
CC
BST
GATE(H)1
GATE(L)1
GATE(H)2
GATE(L)2
GND
Pin Configuration
GATE(H)1 GATE(L)1

Figure 8-1 Internal block diagram and pin configuration

V
FB1
COMP1
V
FB2
SO−16
1
16
GND
BST IS+1
IS−1
V
FB1
WWYLWA
A2245PCN
COMP1
A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week
GATE(H)2 GATE(L)2 V
CC
R
OSC
IS+2
IS−2
V
FB2
COMP2
COMP2
F_15400_129.eps
240505
2009-Apr-03
Page 50
EN 50 Q548.1E LA8.
PowerSO-8
DFN8 (4x4)
I_18010_083.eps
130608
Block Diagram
Pin Configuration
IC Data Sheets

8.2 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, ST1S10PH (IC 7202/7222)

2009-Apr-03

Figure 8-2 Internal block diagram and pin configuration

Page 51
IC Data Sheets
G_16290_084.eps
020206
Pin Configuration
Block Diagram
TSOT23-5L/SOT23-5L Flip-Chip

8.3 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, LD3985M (IC 7201)

EN 51Q548.1E LA 8.

Figure 8-3 Internal block diagram and pin configuration

2009-Apr-03
Page 52
EN 52 Q548.1E LA8.
Block Diagram
Pin Configuration
18440_300_090303.eps
090303
DVB-T/QAM/ATV
Demodulator
Stereo Decoder
System Controller
SAW
Main
Tuner
Presaw
Sense
DVB-T/QAM
FEC
DAC
DAC
MPEG-2 TS
CVBS
SIF
I
2
S Audio
I
2
C
GPIO
IF AGC
RF AGC
Integrated Tuner
I
2
C
ADCIF AMP
49XI
50XO
51VSSAH_OSC
52VDDAH_OSC
53VDDH
54VSSH
55VSSL
56VDDL
57TDO
58TMS
59TCK
60TDI
61I2C_SDA2
62I2C_SCL2
63I2S_CL
64I2S_DA
RSTN32
SAW_SW31
GPIO230
VSYNC29
VSSL28
VDDL27
VDDH26
VSSH25
I2C_SDA124
I2C_SCL123
MD722
MD621
MD520
MD419
VDDH18
VSSH17
PDP
VDDAL
_AFE2
VSSAL_AFE2
SIF
CVBS
VDDAH_CVBS
VSSAH_CVBS
PDN
INP
INN
VSSAH_AFE1
VDDAH_AFE1
VDDAL_AFE1
VSSAL_AFE1
IF_AGC
RF_AGC
VDDL
VSSL
GPIO1
MSTRT
MERR
VSSH
VDDH
I2S_WS
MCLK
MVAL
MD0
MD1
MD2
MD3
VSSL
VDDL
123 45678 910111213 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
DRXK
IC Data Sheets

8.4 Diagram SSB: Front End B02A, DRX3926K (IC 7303)

2009-Apr-03

Figure 8-4 Pin configuration

Page 53

8.5 Diagram SSB: PNX8543 - Power B03A-B03H, PNX8543 (IC7600)

Block Diagram
Pin Configuration
18440_301_090303.eps
090303
TS out/in for
TS in from
CVBS, Y/C,
LVD S for
analog CVBS
analog audio
I
2
S
Dual SPDIF
Low-IF
SSIF, LR
Dual HDMI
SPDIF
CI/CA
MPEG
PRIMARY
LVD S
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
300 MHz
300 MHz
I2C
PWM
GPIO IR ADC UART I2C GPIO Flash
SYSTEM
USB 2.0 CA
PNX8543x
DV INPUT
DV-ITU-656
AV-PIP
SPI
MPEG/H.264
I2S
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
channel decoder
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
CPU
MIPS32 4KEc
01 x22 x
AV-D SP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
channel)
(single or dual
flat panel display
DRAWING
ENGINE
DMA BLOCK
PCI 2.2
PNX8543xEH
Transparent top view
1917253 11 19 2771523513 21 29
426121018 26412 22308 20 28614
T
AD
H
AK
P
AB
F
AH
M
Y
D
AF
K
V
B
A
J
R
AC
G
AJ
N
AA
E
AG
L
W
C
AE
U
ball A1 index area
31
32
33
34
AL
AM
AN
AP
IC Data Sheets
EN 53Q548.1E LA 8.

Figure 8-5 Internal block diagram and pin configuration

2009-Apr-03
Page 54
EN 54 Q548.1E LA8.
Block Diagram
Pin Configuration
F_15710_167.eps
230905
MAC/BIU
Interface
SRAM
25 MHz Clk
MII RX MII TX MII Mgt
BIOS ROM Cntl BIOS ROM Data
EE/MORB
PCI AD
PCI CNTL
PCI CLK
3V DSP Physical Layer
Logic
RX-2 KB
SRAM
TX-2 KB
TPRDP/M
EEPROM/LEDs
XT IIM
XR IIM
tgM IIM
ni atad tseT
tuo atad tseT
XT IIM
XR IIM
tgM IIM
TPTDP/M
DP83816
rddA xT
atad rw xT
rddA xR
atad rw xR
atad dr xR
atad dr xT
RAM BIST
Logic
SRAM
RXFilter
.5 KB
121
122
123
124
125
126
127
128
129
130
131
132
9989796959
49
3929190998887868
5848382818
08
97
8777675747
37
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
123
4
56789011121314151
61
71819102122232425262
72
820313
233392
Identification
Pin1
37 38 39 40
120 119 118 117 116 115 114 113 112
110 109
111
NLESVED
NYDRT
NYDRI
NEMARF
2NEBC
61DA
7 1DA
81DA
NPOTS
NRREP
NRRES
RAP
1NEBC
51DA
41DA
31DA
21DA
11DA
01DA
AD9
SSV
AD8
91DA
02DA
12DA
22DA
32DA
LESDI
SSV
DDVICP
CN
DDVICP
CN
SSV
DDVICP
3NEBC
42DA
52DA
AD26
CBEN0
VSS
AUXVDD
RESERVED
VREF
PCIVDD
AD29
AD31
VSS
REQN
GNTN
RSTN
INTAN
AD28
PCICLK
AD30
PMEN/CLKRUNN
VSS
VSS
TPTDP
TPTDM
REGEN
IAUXVDD
VSS
TPRDP
TPRDM
VSS
AD27
AD7
AD6
AD5 VSS
MA1/LED10N
MA2/LED100N
IDEE/3AM
KLCEE/4AM
5AM
MWRN
MD4/EEDO
MD3
EESEL
AD0 AD1 AD2 AD3
AD4
MD0
MCSN
MD1/CFGDISN
MD2
MD5
MD6
MD7
MA0/LEDACTN
PCIVDD
SSV
1C
NC
NC
AUXVDD VSS
OIDM
CDM
KLCXR
6AM/0DXR
7AM/1DXR
8AM/2DXR
9AM/3DXR
EOX
R
01AM/REXR
11AM/VDXR
51AM/3DXT
61AM/LOC
SRC
NEXT
KLCXT
41AM/2DXT
31AM/1DXT
21AM/0DXT
SSV
DDVXUA
SSV
DDVX
UA
2X
1X
DP83816
NC
SSV
DDVXUA
NC
3VAUX
635343
67 68 69 70 71 72
001
101
201
301
401
501
601
701
801
144 143 142 141 140 139 138 137 136 135 134 133
VSS
IAUXVDD
PWRGOOD
MRDN
AUXVDD
CN
SSV
SSV
DDVXUA
NC
RESERVED
CN
NC
RESERVED
VSS
IC Data Sheets

8.6 Diagram SSB: Ethernet B05B, DP83816 (IC7N04)

2009-Apr-03

Figure 8-6 Internal block diagram and pin configuration

Page 55

8.7 Diagram SSB: Class-D B06A, TPA3123D (IC 7L10)

Block Diagram
Pin Configuration
18440_302_090303.eps
090303
1F
SD
PVCCL
PVCCR
VCLAMP
GAIN1
BYPASS
1F
1F
0.22 F
AGND
}
Control
Shutdown
Control
LIN
RIN
BSR
BSL
PGNDR
PGNDL
0.22 F
22 H
22 H
0.68 F
470 F
0.68 F
1F
470 F
GAIN0
AVC C
MUTE
ROUT
LOUT
TERMINAL
I/O/P DESCRIPTION
24-PIN
NAME
(PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
SD
2I
AVCC
RIN 6 I Audio input for right channel
LIN 5 I Audio input for left channel
GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
MUTE 4 I
outputs enabled). TTL logic levels with compliance to AVCC
BSL 21 I/O Bootstrap I/O for left channel
PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
LOUT 22 O Class-D 1/2-H-bridge positive output for left channel
PGNDL 23, 24 P Power ground for left-channel H-bridge
VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors
BSR 16 I/O Bootstrap I/O for right channel
ROUT 15 O Class-D 1/2-H-bridge negative output for right channel
PGNDR 13, 14 P Power ground for right-channel H-bridge.
PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
AGND 9 P Analog ground for digital/analog cells in core
AGND 8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
BYPASS 7 O
external capacitor sizing.
AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properly
Thermal pad Die pad P
secure device to printed wiring board.
IC Data Sheets
EN 55Q548.1E LA 8.
PVCCL
SD
PVCCL
MUTE
LIN
RIN
BYPASS
AGND AGND
PVCCR
VCLAMP
PVCCR
1 2 3
4 5 6 7 8 9
10 11 12

Figure 8-7 Internal block diagram and pin configuration

24 23 22
21 20 19 18 17 16
15 14 13
PGNDL PGNDL LOUT BSL AVC C AVC C GAIN0 GAIN1 BSR ROUT PGNDR PGNDR
2009-Apr-03
Page 56
EN 56 Q548.1E LA8.
18560_300_090403.eps
090403
Pin Configuration
Block Diagram
PNX51xx
Transparent top view
2468 10 121314
15 171619
18 20
21 23
22 242526
1 3 57911
ball A1 index area
AB
AD
AA
AC
Y
W
V
U
R
N
T
P
M
L
K
J
H
F
D
G
E
C
B
A
AF
AE
LV DS RX 1
UIP L3K7
TM327x 1
CONTROLLER
PCI/XIO
I2C-DMA
UART
CPIPE L3K7
LV DS TX 2
UART
PNX51xx
I2C
I2C
TM327x 2
TM327x 3
LV DS TX 3
LV DS TX 1
LV DS TX 4
GFX
16 X GPIO
GIC 3
EJTAG
CLOCK
CAB
Video
LV DS RX 2
AUDIO IN
AUDIO OUT
GIC 1
GIC 2
MEMORY
Video
IC Data Sheets

8.8 Diagram SSB: Ethernet B08D, PNX51xx (IC7C00)

2009-Apr-03

Figure 8-8 Internal block diagram and pin configuration

Page 57

9. Block Diagrams

Wiring Diagram 32" (Frame)

WIRING DIAGRAM 32"
1M83
(AL1)
1. SCL
2. SPI-DATA-IN
3. SDA
4. CONTROL-1
5. CONTROL-2
6. +3V3
7. BLANK
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
TO
BACKLIGHT
KEYBOARD CONTROL
(1114)
(OPTIONAL)
(FRAME / ROADRUNNER)
+ -
SUBWOOFER
8316
(5214)
Block Diagrams
DANGEROUS
HIGH VOLTAGE
CN2
1. HV1
2. N.C.
3. HV1
DANGEROUS
HIGH VOLTAGE
CN3
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY IPB PLHL-T826B
(1005)
8319
CN7
CN1
6. GND
1. N
5. +24V
2. L
4. GND
3. +24V
2. GND
T3.15A
1. +24V
EN 57Q548.1E LA 9.
8M85
CN4
11. FAN_PWM
10. GND_SND
9. +VSND
8. +12V
7. +12V
6. +12V
5. GND1
4. GND1
3. GND1
2. STANDBY
1. 3V3_ST
CN5
12. GND1
11. I2C_DATA
10. I2C_SCL
9. INV_OK
8. A/P_DIM
7. BOOST
6. DIM
5. BL_ON_OFF
4. GND1
3. GND1
2. +12V
1. +12V
LCD DISPLAY
(1004)
8G50
8G51
8M85
8M99
8M20
8M95
1G50
(B07B)
1. N.C
2. N.C ... ... ...
39. N.C
40. N.C
41. N.C
1G51
(B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT ... ... ...
51. GND
1M20
(B03G)
8. +5V
7. KEYBOARD
6. LED1
5. +3V3-STANDBY
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
1M95
(B01B)
11. N.C
10. GNDSND
9. +AUDIO-POWER
8. +12V
7. +12V
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
1M99
(B01B)
12. GND
11. SDA-SET
10. SCL-SET
9. POWER-OK
8. GND
7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1735
(B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
1736
(B06A)
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
1M59
(B08E)
1. SCL-AMBI-3V3
2. GND
3. SDA-AMBI-3V3
4. GND
5. GND
6. +3V3
7. GND
B
SSB
(1150)
8M85
TO
BACKLIGHT
1M85
(AL4)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK-BUF
6. +3V3
5. PWM-CLOCK-BUF
4. SPI-LATCH
3. SPI-DATA-RETURN
2. SPI-DATA-OUT
1. SPI-CLOCK-BUF
(OPTIONAL)
AMBI-LIGHT MODULE
(1175)
AL
AMBI-LIGHT MODULE
(1176)
AL
RIGHT SPEAKER
(5213)
Board Level Repair
8308
Component Level Repair Only For Authorized Workshop
INLET
2009-Apr-03
IR LED PANEL
(1112)
P2
3P
8736
1M83
(AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
4. CONTROL-1
3. SDA
2. GND
1. SCL
P1
8P
LEFT SPEAKER
(5213)
18560_400_090326.eps
090401
Page 58

Wiring Diagram 37" (Roadrunner)

WIRING DIAGRAM 37" (ROADRUNNER)
1M83 (AL1)
1. SCL
2. SPI-DATA-IN
3. SDA
4. CONTROL-1
5. CONTROL-2
6. +3V3
7. BLANK
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
Block Diagrams
8M85
8319
EN 58Q548.1E LA 9.
1M85 (AL4)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK-BUF
LCD DISPLAY (1004)
TO
BACKLIGHT
8M85
6. +3V3
5. PWM-CLOCK-BUF
4. SPI-LATCH
3. SPI-DATA-RETURN
2. SPI-DATA-OUT
1. SPI-CLOCK-BUF
BACKLIGHT
KEYBOARD CONTROL
(1114)
TO
8316
CN2
1. HV1
1G50 (B07B)
1. N.C
2. N.C ...
8G50
8G51
8M85
8M20
2. N.C.
3. HV1
CN3
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY IPB DPS-298CPA B
(1005)
CN7
6. GND
5. +24V
4. GND
3. +24 V
2. GND
1. +24V
CN4
11. FAN_PWM
10. GND_SND
9. +VSND
8. +12V
7. +12V
6. +12V
5. GND1
4. GND1
3. GND1
2. STANDBY
1. 3V3_ST
CN5
12. GND1
11. I2C_DATA
10. I2C_SCL
9. INV_OK
8. A/P_DIM
7. BOOST
6. DIM
5. BL_ON_OFF
4. GND1
3. GND1
2. +12V
1. +12V
8M95
8M99
FUSE
CN1
1. N
2. L
... ...
39. N.C
40. N.C
41. N.C
1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT ... ... ...
51. GND
1M20 (B03G)
8. +5V
7. KEYBOARD
6. LED1
5. +3V3-STANDBY
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
1M95 (B01B)
11. N.C
10. GNDSND
9. +AUDIO-POWER
8. +12V
7. +12V
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
1M99 (B01B)
12. GND
11. SDA-SET
10. SCL-SET
9. POWER-OK
8. GND
7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1735 (B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
1736 (B06A)
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
1M59 (B08E)
1. SCL-AMBI-3V3
2. GND
3. SDA-AMBI-3V3
4. GND
5. GND
6. +3V3
7. GND
B
SSB
(1150)
AMBI-LIGHT MODULE
(1175)
AL
AMBI-LIGHT MODULE
(1176)
AL
RIGHT SPEAKER
(5213)
Board Level Repair
Component Level Repair Only For Authorized Workshop
8308
INLET
2009-Apr-03
IR LED PANEL
(1112)
1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8736
P2
3P
P1
8P
+ -
SUBWOOFER
(5214)
LEFT SPEAKER
(5213)
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
4. CONTROL-1
3. SDA
2. GND
1. SCL
18560_410_090331.eps
090403
Page 59

Wiring Diagram 42" (Frame/Roadrunner)

WIRING DIAGRAM 42"
1M83
(AL1)
1. SCL
2. SPI-DATA-IN
3. SDA
4. CONTROL-1
5. CONTROL-2
6. +3V3
7. BLANK
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
KEYBOARD CONTROL
(1114)
TO
BACKLIGHT
8316
(FRAME / ROADRUNNER)
CN2
1. HV1
2. N.C.
3. HV1
CN3
Block Diagrams
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY IPB DPS-298CP-4A
(1005)
CN7
6. GND
5. +24V
CN1
4. GND
1. N
EN 59Q548.1E LA 9.
8M85
1M85
8319
LCD DISPLAY
(1004)
TO
BACKLIGHT
8M85
1G50
(B07B)
1. N.C
2. N.C ...
8735
... ...
39. N.C
40. N.C
41. N.C
1G51
(B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT ... ... ...
51. GND
1M20
(B03G)
8. +5V
7. KEYBOARD
6. LED1
5. +3V3-STANDBY
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
1M95
(B01B)
11. N.C
10. GNDSND
9. +AUDIO-POWER
8. +12V
7. +12V
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
1M99
(B01B)
12. GND
11. SDA-SET
10. SCL-SET
9. POWER-OK
8. GND
7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1735
(B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
1736
(B06A)
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
8G50
8G51
8M85
CN4
11. FAN_PWM
10. GND_SND
9. +VSND
8. +12V
1. +24V
FUSE
7. +12V
6. +12V
5. GND1
4. GND1
3. GND1
2. STANDBY
1. 3V3_ST
CN5
12. GND1
11. I2C_DATA
10. I2C_SCL
9. INV_OK
8. A/P_DIM
7. BOOST
6. DIM
5. BL_ON_OFF
4. GND1
3. GND1
2. +12V
1. +12V
8308
3. +24 V
2. GND
2. L
8M20
8M95
8M99
INLET
1M59
(B08E)
1. SCL-AMBI-3V3
2. GND
3. SDA-AMBI-3V3
4. GND
5. GND
6. +3V3
7. GND
B
SSB
(1150)
(AL4)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK-BUF
6. +3V3
5. PWM-CLOCK-BUF
4. SPI-LATCH
3. SPI-DATA-RETURN
2. SPI-DATA-OUT
1. SPI-CLOCK-BUF
AMBI-LIGHT MODULE (OPTIONAL)
(1175)
AL
AMBI-LIGHT MODULE (OPTIONAL)
(1176)
AL
+ -
Board Level Repair
SPEAKER RIGHT (5212) SPEAKER LEFT (5211)
Component Level Repair Only For Authorized Workshop
IR LED PANEL
(1112)
P2
3P
P1
8P
2009-Apr-03
+ -
1M83
(AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
4. CONTROL-1
3. SDA
2. GND
1. SCL
18560_412_090331.eps
090403
Page 60

Wiring Diagram 47" (Frame)

WIRING DIAGRAM 47"
Board Level Repair
(FRAME)
Block Diagrams
EN 60Q548.1E LA 9.
TO
BACKLIGHT
KEYBOARD CONTROL
(1114)
Component Level Repair Only For Authorized Workshop
8316
CN2
1. HV1
2. N.C.
3. HV1
CN3
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY IPB DPS-298CP-2A
(1005)
CN1
8319
LCD DISPLAY
(1004)
TO
BACKLIGHT
1G50
(B07B)
1. N.C
2. N.C ...
8735
... ...
39. N.C
40. N.C
41. N.C
1G51
(B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT ... ... ...
51. GND
1M20
(B03G)
8. +5V
7. KEYBOARD
6. LED1
5. +3V3-STANDBY
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
1M95
(B01B)
11. N.C
10. GNDSND
9. +AUDIO-POWER
8. +12V
7. +12V
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
1M99
(B01B)
12. GND
11. SDA-SET
10. SCL-SET
9. POWER-OK
8. GND
7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1735
(B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
1736
(B06A)
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
B
SSB
(1150)
8G50
8G51
CN4
11. FAN_PWM
10. GND_SND
9. +VSND
8. +12V
7. +12V
6. +12V
5. GND1
4. GND1
3. GND1
2. STANDBY
1. 3V3_ST
CN5
12. GND1
11. I2C_DATA
10. I2C_SCL
9. INV_OK
8. A/P_DIM
7. BOOST
6. DIM
5. BL_ON_OFF
4. GND1
3. GND1
2. +12V
1. +12V
FUSE
1. N
2. L
8308
8M20
8M95
8M99
INLET
+ -
IR LED PANEL
SPEAKER RIGHT (5212) SPEAKER LEFT (5211)
(1112)
P2
3P
P1
8P
2009-Apr-03
+ -
18560_401_090326.eps
090331
Page 61

Wiring Diagram 47" (Roadrunner)

KEYBOARD CONTROL
(1114)
1M99 (B01B)
12. GND
11. SDA-SET
10. SCL-SET
9. POWER-OK
8. GND
7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1M95 (B01B)
11. N.C
10. GNDSND
9. +AUDIO-POWER
8. +12V
7. +12V
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
CN4
11. FAN_PWM
10. GND_SND
9. +VSND
8. +12V
7. +12V
6. +12V
5. GND1
4. GND1
3. GND1
2. STANDBY
1. 3V3_ST
CN5
12. GND1
11. I2C_DATA
10. I2C_SCL
9. INV_OK
8. A/P_DIM
7. BOOST
6. DIM
5. BL_ON_OFF
4. GND1
3. GND1
2. +12V
1. +12V
CN1
1. N
2. L
1M20 (B03G)
8. +5V
7. KEYBOARD
6. LED1
5. +3V3-STANDBY
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
1736 (B06A)
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
1735 (B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
WIRING DIAGRAM 47" (ROADRUNNER)
SSB
(1150)
B
INLET
MAIN POWER SUPPLY IPB DPS-298CP-2A
(1005)
TO
BACKLIGHT
IR LED PANEL
(1112)
LCD DISPLAY (1004)
P2
3P
P1
8P
FUSE
8M20
8M95
8M99
8G50
8G51
TO
BACKLIGHT
1G50 (B07B)
1. N.C
2. N.C ... ... ...
39. N.C
40. N.C
41. N.C
1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT ... ... ...
51. GND
18560_411_090331.eps
090401
Board Level Repair
Component Level Repair Only For Authorized Workshop
8319
8316
SPEAKER RIGHT
(5212)
SPEAKER LEFT
(5211)
+ -
+ -
8308
8735
CN7
6. GND
5. +24V
4. GND
3. +24V
2. GND
1. +24V
1M59 (B08E)
1. SCL-AMBI-3V3
2. GND
3. SDA-AMBI-3V3
4. GND
5. GND
6. +3V3
7. GND
CN2
1. HV1
2. N.C.
3. HV1
CN3
1. HV2
2. N.C.
3. HV2
8M85
1M90 (AB1)
6. GND
5. +24V
4. GND
3. +24V
2. GND
1. +24V
1M59 (AB1)
7. GND
6. +3V3
5. CONTROL2
4. CONTROL1
3. SDA
2. GND
1. SCL
DC-DC INTERFACE
(1179)
AB
8M90
1M85 (AL4)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK-BUF
6. +3V3
5. PWM-CLOCK-BUF
4. SPI-LATCH
3. SPI-DATA-RETURN
2. SPI-DATA-OUT
1. SPI-CLOCK-BUF
1M84 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK-BUF
6. +3V3
5. PWM-CLOCK-BUF
4. SPI-LATCH
3. SPI-DATA-RETURN
2. SPI-DATA-OUT
1. SPI-CLOCK-BUF
1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK
6. +3V3
5. CONTROL-2
4. CONTROL-1
3. SDA
2. SPI-DATA-IN
1. SCL
1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK
6. +3V3
5. CONTROL-2
4. CONTROL-1
3. SDA
2. SPI-DATA-IN
1. SCL
AMBI-LIGHT MODULE
(1178)
AL
AMBI-LIGHT MODULE
(1177)
AL
1M85 (AL4)
1. SPI-CLOCK-BUF
2. SPI-DATA-OUT
3. SPI-DATA-RETURN
4. SPI-LATCH
5. PWM-CLOCK-BUF
6. +3V3
7. BLANK-BU
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
1M83 (AL1)
1. SCL
2. SPI-DATA-IN
3. SDA
4. CONTROL-1
5. CONTROL-2
6. +3V3
7. BLANK
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
1M83 (AL1)
1. SCL
2. SPI-DATA-IN
3. SDA
4. CONTROL-1
5. CONTROL-2
6. +3V3
7. BLANK
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
1M84 (AL1)
1. SPI-CLOCK-BUF
2. SPI-DATA-OUT
3. SPI-DATA-RETURN
4. SPI-LATCH
5. PWM-CLOCK-BUF
6. +3V3
7. BLANK-BUF
8. EEPROM-CS
9. TEMP-SENSOR
10. PROG
11. VLED1
12. GND
13. VLED2
14. GND
AMBI-LIGHT MODULE
(1178)
AL
AMBI-LIGHT MODULE
(1177)
AL
1M84 (AB1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
9. TEMP-SENSOR
8. EEPROM-CS
7. BLANK-BUF
6. +3V3
5. PWM-CLOCK-BUF
4. SPI-LATCH1CONN
3. SPI-DATA-RETURN
2. SPI-CLOCK-BUF
1. SPI-LATCH2CONN
8M59
8M82
8M81
8M84
Block Diagrams
EN 61Q548.1E LA 9.
2009-Apr-03
Page 62

Wiring Diagram 52" (Frame)

WIRING DIAGRAM 52"
Board Level Repair
(FRAME)
Block Diagrams
EN 62Q548.1E LA 9.
Component Level Repair Only For Authorized Workshop
INVERTER
KEYBOARD CONTROL
(1114)
INVERTER
INVERTER
CONNECTOR
CONNECTOR
83168319
CN2/1319
14. PDIM_Select
13. PWM
12. On/Off
11. Vbri
10. GND3
9. GND3
8. GND3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24Vinv
2. 24Vinv
1. 24Vinv
CN3/1316
12. N.C.
11. N.C.
10. GND3
9. GND3
8. GND3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24Vinv
2. 24Vinv
1. 24Vinv
MAIN POWER SUPPLY PSU DPS-411AP3A B
(1005)
CN1/1308
1. N
CN6/1M95
11. FAN_PWM
10. GND_SND
9. +VSND
8. +12 V
7. +12V
6. +12V
5. GND1
4. GND1
3. GND1
2. STANDBY
1. 3V3_ST
CN7/1M99
12. GND1
11. I2C_DATA
10. I2C_SCL
9. INV_OK
8. A/P_DIM
7. BOOST
6. DIM
5. BL_ON_OFF
4. GND1
3. GND1
2. +12V
1. +12V
FUSE
2. L
LCD DISPLAY
8308
INLET
(1004)
8G50
8G51
8M99
8M20
8M95
1G50
(B07B)
1. N.C
2. N.C ... ... ...
39. N.C
40. N.C
41. N.C
1G51
(B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT ... ... ...
51. GND
1M20
(B03G)
8. +5V
7. KEYBOARD
6. LED1
5. +3V3-STANDBY
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
1M95
(B01B)
11. N.C
10. GNDSND
9. +AUDIO-POWER
8. +12V
7. +12V
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
1M99
(B01B)
12. GND
11. SDA-SET
10. SCL-SET
9. POWER-OK
8. GND
7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1735
(B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
1736
(B06A)
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
B
SSB
(1150)
+ -
IR LED PANEL
SPEAKER RIGHT (5212) SPEAKER LEFT (5211)
(1112)
P2
3P
P1
8P
2009-Apr-03
+ -
18560_402_090326.eps
090401
Page 63
B02A
FRONT END
B03
PNX8543
B04B
ANALOG IO - SCART 1&2
B05A
HDMI
B04C
YPBR / SIDE IO / S-VIDEO
B03F
PNX8543 - SDRAM
B03G
PNX8543 - CONTROL MIPS/FLASH/PCI
B05C
PCMCIA
B08D
PNX5100 - LVDS IN/OUT
B07B
DISPLAY INTERFACE
B08B
PNX5100 - SDRAM
1G22
SDRAM
7B01 EDE1116AEBG
SDRAM
7B00 EDE1116AEBG
IF-AGC
RF-AGC
4302
4303
5
4
1303
SAW 36M125
2365
2364
2367
2306
2307
2368
3305
33AA3306
33AC
3303
3304
5311
1301 HD1816AF/BHXP
IF-OUT1
RF-AGC
+5V-TUNER
IF-OUT2
MAIN HYBRID
TUNER
11
10
2
3
4
7
6
34
50
39
40
49
47
48
PDP
IF-N
44
SIF
IF-P
PDN
3
1
2
7303 DRX3926K
DEMODULATOR
+3V3A
+5V-TUNER
7302 UPC3221GV
AGC AMPLIFIER
IN
VCC
OUT
AGC CONTROL
1
3311
43
8,18,26,53
CVBS
CVBS-TER-OUT
3348
4315
4314
7345
3301
33
1304
27M
7600 PNX85433EH/M2A
TUN_CA
B03B
LVD S
B03B
ANALOG VIDEO
B03E
HDMI_DV
B05A
MEMORY
B03F
CONROL
B03G
VDD
B03A
PCI
B03G
F2
H3
1
5
SVHS IN
2
4
3
1G37
1G20
CVBS
FRONT-Y_CVBS
FRONT-C
AV3-PB
AV3-Y
AV3- PR
PB
PR
Y
EXT 1
CVBS2
EXT 2
EXT 3
SIDE
I/O
1F01
7
1F02
20
20
21
1
7
11
15
16
20
21
1
7
11
15
16
SCART1
SCART2
AV1_STATUS
8
AV2-PB_SC2-B
AV2-PR_SC2-R
15
11
AV2-Y_SC2-G
7F02 74HC4053PW
14
1
5
Y_CVBS-MON-OUT-SC
CVBS-TER-OUT
19
7F03
19
7F04
REGIMBEAU_CVBS-SWITCH
9,10,11
1
1G30
2
3
14
13
R-VGA
G-VGA
B-VGA
H-SYNC-VGA
V-SYNC-VGA
1
6
10
11
5
15
VGA
CONNECTOR
H2
M1
P1
K1
G1
T2
T1
M4
P4
K4
H1
N3
J3
L3
B03H
AV1_ BLK
16
7F06
AV2-STATUS
8
16
AV2-BLK_LCD-SDA
7F05
B03H
CONTROL
B03H
CONTROL
B03H
CONTROL
B03H
CONTROL
3
RXC-
RX0+
RX0-
RX1+
RX1-
RX2+
RX2-
2
100
99
97
96
94
93
RXC+
7F07-7F08
Y-CVBS-MON-OUT
15
7
11
20
J2
A3
L2
N2
G4
SC1-B
SC1-R
SC1-G
CVBS1
A13
B11
B12
C16
A12
B14
A15
A14
B13
HDMI_RX1_B_P
HDMI_RX2_B_N
HDMI_RX2_B_P
HDMI_RREF
HDMI_RX1_B_N
HDMI_RX0_B_P
HDMI_RXC_B_P
HDMI_RXC_B_N
HDMI_RX0_B_N
7H11 TDA9996
HDMI
SWITCH
C_-
C_+
VDDx_1V8
RXDRXC
RXB
RXA
D0_-
D0_+
D1_-
D1_+
D2_-
D2_+
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
32
23
22
20
19
17
16
14
13
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
90
89
87
86
84
83
81
80
19
1
18 2
1
1H03
3
4
7
9 10
12
6
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
HDMI SIDE
CONNECTOR
19
1
18 2
1
1H01
3
4
7
9 10
12
6
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
HDMI 1
CONNECTOR
1
1H00
3
4
7
9 10
12
6
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
1
1H02
3
4
7
9 10
12
6
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
19
1
18 2
HDMI 2
CONNECTOR
19
1
18 2
HDMI 3
CONNECTOR
AP18 AN18 AL18 AK18 AP19 AN19 AP20 AN20 AM20 AL20 AM19 AL19
AP22
RX51001A+
RX51001A-
RX51001B+
RX51001B-
RX51001C+
RX51001C-
RX51001D+
RX51001D-
RX51001E+
RX51001E-
RX51001CLK+
RX51001CLK-
RX51002A+
RX51002A-
RX51002B+
RX51002B-
RX51002C+
RX5100C-
RX51002D+
RX51002D-
RX51002E+
RX51002E-
RX51002CLK+
RX51002CLK-
AN22 AL22 AK22 AP23 AN23 AP24 AN24 AM24 AL24 AM23 AL23
PNX8543
H264
USB 2.0
7M00 NAND01GW3B2BN6F
NAND
FLASH
1G
18560_403_090326.eps
090326
PCI-AD<->NAND-AD
FE-DATA(0-7)
(0-12)
DDR2-D(0-15)
(16-31)
DDR2-A(0-12)
4321
USB20-DM
USB20-DP
USB 2.0
CONNECTOR SIDE
SW UPLOAD
JPEG
MP3
1M09
3
1
4
2
AL16
AN16
AP16
USB-OC
VIDEO
PCMCIA
CONDITIONAL
ACCESS
CA-MDO(0-7)
MDO(0-7)
CA-MDI(0-7)
7
12
9
2
7F01
RF_AGC
IF_AGC
XI
XO
PD_N
PD_P
+3V3BVDDH
SIF
CVBS
2,16,27,56
+1V2
20
+3V3
VDDL
37
+3V3AVDDAH_AFE1
42
+3V3EVDDAH_CVBS
52
+3V3DVDDAH_OSC
36,46
+1V2A
16
+5V
VDDAL_AFE
AK19
A_P
CA_MD0
CA_MDI
AI51
AI44
CVBS1Y_P
AI23
AI33
AI13
AI42
AI43
AI54
PC3_AI3
VSYNCIN
PC1_AI3
PC2_AI3
PC3_AI1
PC1_AI1
PC2_AI1
AI32
AI22
AI12
AI41
TNR_TSDI
A_N B_P B_N C_P C_N D_P D_N E_P
E_N CLK_P CLK_N
LOUT2_A_P LOUT2_A_N LOUT2_B_P LOUT2_B_N LOUT2_C_P LOUT2_C_N LOUT2_D_P LOUT2_D_N LOUT2_E_P
LOUT2_E_N LOUT2_CLK_P LOUT2_CLK_N
IREF_LVDS
VDDA-LVDS
HSYNCIN
J2
DDR2-VREF-DDRVREF
VREF
J2
DDR2-VREF-DDR
J1
+1V8-PNX85XX
12,37
+3V3-NAND
VDDL
VCC
AB32
DDR2-VREF-CTRL
AA31
+1V8-PNX85XX
USB_FAULT
USB_DP
USB_DM
M_VREF
M_DQ
M_A
M_IREF
VDDL
J1
+1V8-PNX85XX
3B03
AM17
+3V3-PER
USB_RPU
3M21
AN17
+3V3-PER
USB_VBUS
PCI
3M23
AJ21
+3V3-PER
VDD_3V3_PER
AG30
1V8-PMNX85XX
VDD_1V8_DDR
AJ12
+1V2-PNX85XX
VDD_1V2_CORE
AC6
+3V3-STANDBY
VDD_3V3_SBPER
F16
RREF-PNX85XX
VDDA_HDMI_3V3_BIAS
AK20
VDDA-LVDS
AK12
VDDA-ADC
AJ6
VDDA-DAC
VDD_3V3_LVDS
VDDA_3V3_ADAC
VDDA_3V3_AADC
AF5
1V2-STANDBY
VDD_1V2_SBCORE
+5V
3M31
+T
MDX
RREF-PNX85XX
3H64
8,45,91,24, 75,95
VDD_1V8
VDDO_3V3
4
VDDO_3V3
VDDx_3V3
46,55
VDDS_3V3
VDDH_3V3
15,21,34,40, 64,70,85,88
VDDH_3V3
7K04-7K05 74LVC245APW
BUFFER
33 51
52
18
17
1K00
68P
PCMCIA-VCC-VPP
7C00 PNX5100EH/M2
DDR2
B08B
LVD S RX
B08D
SUPPLY
B08A
LVD S TX
B08D
D
A
1G50
TX2
TX1
TX3
TX4
QUAD LVDS
1920x1080 100/120HZ
1G51
+VDISP-OUT
TO DISPLAY
1080p 50/60Hz
TO DISPLAY
1080p 100/120Hz
I2C
I2C
N.C.
(0-12)
DDR2
SDRAM
7C01 EDE5116AJBG
DDR2
SDRAM
7C02 EDE5116AJBG
PNX5100-DDR2-D(0-15)
(16-31)
PNX5100-DDR2-A(0-12)
VREF
J2
PNX5100-DDR2-VREF-DDR
VREF
P24
PNX5100-DDR2-VREF-CTRL
AA5
+1V2-PNX5100
L16
+1V8-PNX5100
P22
+1V2-PNX5100-DDR-PLL1
AB20
+3V3
E17
+3V3
E14
+3V3
AB18
+3V3-PNX5100-LVDS-IN
J5
+1V2-PNX-TRI-PLL1
L5
+1V2-PNX-TRI-PLL2
T5
+1V2-PNX-TRI-PLL3
M22
+1V2-PNX5100-DLL
AE25
+3V3-PNX5100-DDR-PLL0
E15
+1V2-PNX5100-LVDS-PLL
B15
+3V3-PNX5100-LVDS-PLL
AE14
+1V2-PNX5100-CLOCK
VDDL
J1
+1V8-PNX5100
VREF
J2
PNX5100-DDR2-VREF-DDR
VDDL
J1
+1V8-PNX5100
AD14
+3V3-PNX5100-CLOCK
PNX5100
HD-NM
FHD 100Hz
1
2
3
37
38
40
39
41
50
51
49
40
11
5
3
4
2
1
AE20
AF20 AC20 AD20 AC19 AD19 AE19
AF19 AE18
AF18 AC18 AD18
AE17
AF17 AC17 AD17 AC16 AD16 AE16
AF16 AE15
AF15 AC15 AD15

Block Diagram Video

Block Diagrams
EN 63Q548.1E LA 9.
2009-Apr-03
Page 64

Block Diagram Audio

AUDIO
FRONT END
B02A
1301
B05A
HD1816AF/BHXP
MAIN HYBRID
TUNER
HDMI
1
19
HDMI SIDE
CONNECTOR
1
19
HDMI 1
CONNECTOR
1
19
HDMI 2
CONNECTOR
1
19
HDMI 3
CONNECTOR
18 2
18 2
18 2
18 2
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
IF-OUT1
IF-OUT2
RF-AGC
1H03
1
3
4
6
7
9 10
12
1H01
1
3
4
6
7
9 10
12
1H00
1
3
4
6
7
9 10
12
1H02
1
3
4
6
7
9 10
12
RES FOR /32
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
32
23
22
20
19
17
16
14
13
10
11
3
7H11 TDA9996
SWITCH
RXB
RXA
HDMI
4302
4303
+3V3A
VDDx_1V8
VDDO_3V3
VDDx_3V3
VDDH_3V3
D0_+
D0_-
D1_+
D1_-
D2_+
D2_-
RXDRXC
3305
C_+
C_-
1303
1
2
SAW 36M125
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
90
89
87
86
84
83
81
80
8,45,91,24, 75,95 4
46,55
15,21,34,40, 64,70,85,88
2 3
99
100 96
97
93
94
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
2364
2367
2306
5
2307
4
VDD_1V8 VDDO_3V3
VDDS_3V3
VDDH_3V3
5311
2365
33AA3306
2368
33AC
7302 UPC3221GV
+5V-TUN
AGC AMPLIFIER
1
VCC
2
3
IN
4
AGC CONTROL
IF-AGC
RF-AGC
ANALOG - SCART 1&2
B04B
EXT 1
EXT 2
YPBR / SIDE IO / S-VIDEO
B04C
DIGITAL
AUDIO
AUDIO OUT
AUDIO IN
EXT 3
AUDIO IN
SIDE
I/O
AUDIO IN
DVI -> HDMI
16
20
SCART1
16
20
SCART2
OUT
L+R
L+R
L+R
Block Diagrams
PCMCIA
B05C
PCMCIA
CONDITIONAL
ACCESS
7303 DRX3926K
47
PDP
PDN
48
3303
7
3304
6
OUT
+3V3A
3305
1F01
3
1F02
1G25
1G22
1G20
1G18
1
6
2
3
1
6
2
2
4
6
5
3
5
8
2
3
1
HDMIB-RXC+
AP-SCART-OUT-L
AP-SCART-OUT-R
AP-SCART-OUT-L
AP-SCART-OUT-R
AUDIO-IN2-L
AUDIO-IN2-R
AUDIO-OUT-L
AUDIO-OUT-R
AUDIO-IN3-L
AUDIO-IN3-R
AUDIO-IN5-L
AUDIO-IN5-R
HDMIB-RXC-
HDMIB-RX0+
HDMIB-RX0-
HDMIB-RX1+
HDMIB-RX1-
HDMIB-RX2+
HDMIB-RX2-
1
7
11
15
21
1
7
11
15
21
1304
27M
IF-N
IF-P
39
40
49
50
34
33
PD_P
PD_N
DEMODULATOR
XI
XO
IF_AGC
RF_AGC
3F00
3F02
7F00
A-PLOP
7G01
EF
7G00
A-PLOP
1K00
17
18
33 51
52
CVBS
SIF
68P
MDO(0-7)
3311
44
3348
43
8,18,26,53 2,16,27,56 37
42
52
36,46
AUDIO-CL-L
AUDIO-CL-R
A-PLOP
A-PLOP
7K04-7K05 74LVC245APW
BUFFER
CA-MDI(0-7)
PCMCIA-VCC-VPP
FE-DATA(0-7)
7345
+3V3BVDDH +1V2VDDL +3V3AVDDAH_AFE1
+3V3EVDDAH_CVBS
+3V3DVDDAH_OSC
+1V2AVDDAL_AFE
B03C
173
AUDIO-IN1-L
AUDIO-IN1-R
B03C
8
14
B03C
AUDIO-IN4-L
AUDIO-IN4-R
20
4314
PNX8543 - AUDIO AMPLIFIER
7803-1/2
5
7803-3/4
10
12
RREF-PNX85XX
+3V3
CA-MDO(0-7)
SIF
CVBS
ADAC(7)
ADAC(8)
SPDIF-OUT-1
ADAC(5)
ADAC(6)
3H64
B03
7H00 PNX85439EH/M2
B03B
CA_MD0
CA_MDI
TNR_TSDI
B03E
F2
AI51
H3
AI44
B03D
AL9
ADAC7
AL8
ADAC8
AN7
AIN_1_L
AP7
AIN_1_R
AK6
AIN_2_L
AL6
AIN_2_R
V1
SPDIF_OUT
AN11
ADAC5
AP10
ADAC6
AM6
AIN_3_L
AN6
AIN_3_R
AN5
AIN_5_L
AP5
AIN_5_R
AP6
AIN_4_L
AM5
AIN_4_R
B04H
A14
HDMI_RXC_B_N
A15
HDMI_RXC_B_P
B13
HDMI_RX0_B_N
B14
HDMI_RX0_B_P
A12
HDMI_RX1_B_N
A13
HDMI_RX1_B_P
B11
HDMI_RX2_B_N
B12
HDMI_RX2_B_P
C16
HDMI_RREF
EN 64Q548.1E LA 9.
PNX8543
TUNER_CA
ANALOG VIDEO
AUDIO
DIGITAL VIDEO IN
PNX8543
H264
USB 2.0
B03D
B03G
B03G
B03F
AUDIO
VREF_POS
VDDA_3V3_DAC
ADAC1
ADAC2
STANDBY
B03H
ADAC3
ADAC4
CONROL
USB_FAULT
USB_DM USB_DP
USB_RPU
USB_VBUS
PCI
MEMORY
M_IREF
M_VREF
AADC
PO_7
PO_6
PCI
M_DQ
M_A
5902
AN8
5900
AM9
AK9
AN14
AP13
AC5
AD1
AM12
AM11
AL16
AN16
AP16
3M21
AM17
3M23
AN17
PCI-AD24<->NAND-AD
3B03
AA31 AB32
DDR2-D(0-15)
DDR2-A(0-12)
CLASS-D
B06A
VDDA-AUDIO
VDDA-DAC
ADAC(1)
ADAC(2)
AUDIO-MUTE
PNX8543 - AUDIO AMPLIFIER
B03C
AUDIO-RESET
ADAC(3)
ADAC(4)
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
+5V
3M31
USB-OC
+3V3-PER
+3V3-PER
B03F
+1V8-PNX85XX DDR2-VREF-CTRL
(0-12)
+T
7M00 NAND01GW3B2BN6F
NAND
FLASH
1G
12,37
PNX8543 - SDRAM
7B01 EDE1116AEBG
SDRAM
J1 J2
7B00 EDE1116AEBG
USB20-DM
USB20-DP
SDRAM
(16-31)
J1 J2
A-STBY
3L17
7807-1 7807-2
+3V3-NAND
+1V8-PNX85XX DDR2-VREF-DDR
+1V8-PNX85XX DDR2-VREF-DDR
MUTE
A-STBY
AUDIO-RESET
1M09
1
2 3
4
5
6
2
4
5
2
6
CONNECTOR SIDE
4321
7L10 TPA3123D2PWP
PVCC_L
PVCC_R
OUT-L
IN-L
CLASS D
POWER
AMPLIFIER
IN-R
OUT-R
SD
MUTE
A-PLOP
7830 TPA6111A2DGN
HEADPHONE
AMPLIFIER
SHUTDOWN
IN-1
IN-2
USB 2.0
SW UPLOAD
JPEG
MP3
VO_1
VO_2
VDD
1,3
10,12
22
15
7L03
PROTECTION
B04B
B04C
1
7
8
5L07
5L08
STANDBY &
+3V3
+AUDIO-POWER
LEFT-SPEAKER
RIGHT-SPEAKER
YPBR / SIDE IO / S-VIDEO
B04C
HP_LOUT
HP_ROUT
1G21
2
3
1
5L09
5L10
1735
1
2
SPEAKER L
3
4
SPEAKER R
1736
1
2
3
SUBWOOFER
(OPTIONAL)
HEADPHONE
OUT 3.5mm
18540_404_090311.eps
090326
2009-Apr-03
Page 65

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS
B05B
ETHERNET
1N00
ETHERNET
CONNECTOR
PCI-CLK-ETHERNET
B03G
RESET-ETHERNET
B03H
OPTIONAL
B08
PNX5100
7C00 PNX5100EH/M2
CONTROL
B08C
PNX5100
PCI_XIO
B08C
DDR2
B08B
GPIO
B08C
B07B
DISPLAY INTERFACE
3P24
BACKLIGHT-IN BACKLIGHT-OUT
7N04 DP83816AVNGNOPB
MAC
PHYTER II
10/100 Mb/S
60
62
AF24
AE13
27M
1CD0
AF13
L3
B08B
PNX5100-DDR2-D(0-31)
DDR2-A(0-12)
PNX5100-DDR2-CLK_P
P26
PNX5100-DDR2-CLK_N
P25
B23
B07A
DISPLAY INTERFACE (COMMON)
CONTROL
17
25M
1N02
18
61
IRQ-PCI
RESET-PNX5100
PCI-CLK-PNX5100
PNX5100 - SDRAM
J8
K8
PNX5100-BL-CTRL
PCI-AD(0-31)
B03H
B03G
7C01 EDE5116AJBG
7C02
EDE5116AJBG
SDRAM
B01B
Block Diagrams
B02A
FRONT END
B03G
B05C
PCMCIA
PCMCIA
CONDITIONAL
ACCESS
B03G
PNX8543 - CONTROL MIPS/FLASH/PCI
WP-NANDFLASH
B03H
PNX8543 - STANDBY-CONTROL / DEBUG
B05A
HDMI
1K00
1
COMMON INTERFACE
68
7M00 NAND01GW3B2BN6F
19
USB 2.0
CONNECTOR
SIDE
TO IR/LED PANEL
AND KEYBOARD CONTROL
1
2
18
19
4x HDMI
CONNECTOR
TO PIN:
1H02-13 1H00-13 1H01-13 1H03-13
1H02-15 1H00-15
1H01-15 1H03-15
RESET-SYSTEM
CA-MDI(0-7)
PCMCIA-D(0-7)
PCMCIA-A(0-14)
NAND
FLASH
(1G)
1M09
1
2
3
4 3 21
4
1M20
1
2
3
4
5
6
7
8
ARX-DDC-CLK BRX-DDC-CLK
CRX-DDC-CLK
DRX-DDC-CLK
7303 DRX3926K-XK-A3
49
DEMODULATOR
27M
1304
50
32
7K03
7K04-7K05
7K00 7K01
MOCLKA
MDO(0-7) CA-MDO(0-7)
IRQ-CA
IRQ-PCI
NAND-AD(0-7) <-- PCI-AD(24-31)
7
9
PCI-AD(24-31)
9 10 5
CA-MICLK
CA-DATADIR CA-DATAEN
CA-ADDEN
PCI-AD(0-14)
B03H
RC
LED2
+3V3-STAN D B Y
+5V
CEC
7M81
DETECT-12V
B01B
B01A
B03G
B04B
B04B
B04B
B04B
+3V3-STAN D B Y
7D05 NCP303LSN30G
2
INP
3
GND
7H09
CONTROL
7H11 TDA9996
57
SWITCH
12 31
61
79
OUTP
HDMI
LED1
1
EN 65Q548.1E LA 9.
FE-DATA(0-7)
FE-CLK
FE-VALID
FE-SOP
CA-MOCLK_VS2
PCI-AD(0-31)PCI-AD(0-31) PCI-AD(0-31)
XIO-ACK
XIO-SEL-NAND
IRQ-CA
IRQ-PC1
USB-OC
USB20-DM
USB20-DP
LIGHT-SENSOR
4D00
RC_uP
KEYBOARD
4D09
DETECT2
DETECT1
RESET-SYSTEM
AV1- BLK
AV2-BLK_LCD-SDA
AV1- STATU S
AV2- STATU S
RESET-STBY
CEC-HDMI
B03
PNX8543
7600 PNX85433EH/M2A/
TUN_CA
B03B
TNR_TSDI
B10
TNR_MICLK
C10
TNR_MIVAL
B9
TNR_MISTRT
H32
CA_MICLK
CA_MDI
A34
CA_VSN_0
H31
CA_MOCLK
CA_MDO
D31
CA_DATA_DIR
A31
CA_DATA_EN
B31
CA_ADD_EN
J34
CA_RDY
B03G
PCI_AD
A20
XIO_ACK
B20
XIO_SEL_0
B03G
L34
GPIO_3
U4
GPIO_2
AL16
USB_FAULT
AN16
USB_DM
AP16
USB_DP
B03H
AD2
P0_5
AN2
CADC_1
AF2
P1_0
AJ2
PWM_1
AJ3
PWM_0
AN3
CADC_0
AD3
P2_5
AD4
P2_4
AH3
P3_3
AH1
P3_5
AH2
3_4
P
AP2
CADC_2
AP1
CADC_3
AF3
RESET_IN
AG4
P1_2
B05A
RX
HDMI_RX
PNX8543
PCI
CONTROL
STAN DB Y
HDMI_DV
LOUT2_CLK_N
LOUT2_CLK_P
CLK_N
CLK_P
MEMORY
B03F
M_DQ
M_CLK_P
M_CLK_N
PLL_OUT
TRDY_CLK
RESET_SYS
GPIO_2
GPIO_6
GPIO_4
GPIO_5
UA_RX _0
UA_TX _1
XTAL_I
XTAL_O
SPI_CLK
SPI_CSB
SPI_SDO
SPI_SDI
M_A
P1_7
P6_4
P0_1
P6_5
P2_2
P2_7
P1_1
P2_6
P0_6
P0_7
P2_3
AL23
AM23
AL19
AM19
AB34
AB33
AP28
A30
AN28
U3
V2
L32
L31
AG1
AH5
AG2
AK2
AC1
W1
W2
AJ1
AK4
AK3 AJ4
AK1
AE1
AE4
AF1
AE5
AD1
AC5
AD5
B8D
PNX5100 - LVDS IN/OUT
7C00 PNX5100EH/M2
DDR2
B08B
PNX5100
RX51002CLK-
RX51002CLK+
RX51001CLK-
RX51001CLK+
B03F
PNX8543 - SDRAM
DDR2-D(0-31)(0-15)
DDR2-A(0-12)
DDR2-CLK_P
DDR2-CLK_N
B03G
PNX8543 - CONTROL MIPS/FLASH/PCI
PCI-CLK-OUT
PCI-CLK-PNX8543
WC-EEPROM-PNX5100_SPI-DI
PNX8543-LCD-PWR-ON_SPI-DI
B03H
PNX8543 - STANDBY-CONTROL / DEBUG
SDM
SPI-PROG
27M
1D00
SPI-SDI
REGIMBEAU_CVBS-SWITCH
AE16
AD16
AD19
A
C19
7B00 EDE1116AEBG
7B01
EDE1116AEBG
J8
K8
3M30
PCI-CLK-PNX5100
3M46
RESET-SYSTEM
RXD-MIPS
TXD-MIPS
RXD-UP
TXD-UP
RESET-NVM
SPI-CLK
SPI-WP
SPI-CSB SPI-SDO
LAMP-ON-OUT
ENABLE-3V3
POWER-OK
AUDIO-RESET
AUDIO-MUTE
STANDBY
SDRAM
7D07
B02A
B04C
B07B
B01A
B04B
B03C
B06A
E18
E19
E20
E21
E10
E11
E12
E13
B08C
B03H
SPI-PROG
7D06 M24C64-WDW6P
8
7D09 M25P05-AVMN6P
6
3
1 5
2
B01B
2D08
SDM
2D07
EEPROM
(8Kx8)
512K
FLASH
B07B
DISPLAY INTERFACE
1G50
1M04
2
3
1
25
24
1G51
33
32
17
16
1M01
RES
1M99
1M95
TX1CLK-
TX1CLK+
TX2CLK-
TX2CLK+
TX3CLK-
TX3CLK+
TX4CLK-
TX4CLK+
B01B
DC / DC +3V3-STANDBY_+1V2-STANDBY
BACKLIGHT-OUT
B07A
BACKLIGHT-BOOST
N.C.
9
DISPLAY
8
DISPLAY
UART
SERVICE
CONNECTOR
3
1
FOR
FACTORY USE
2
ONLY
4
5
TO
6
POWER SUPPLY
7
9
TO
2
POWER SUPPLY
18560_405_090326.eps
TO
TO
090331
2009-Apr-03
Page 66

Block Diagram I2C

I²C
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
PNX8543 - SDRAM
B03F
HDMI
B05A
FRONT END
B02A
PNX5100 - CONTROL / PCI / DEBUG
B08C
PNX5100 - SDRAM
B08B
PNX5100 - AMBILIGHT
B08E
YPBR / SIDE IO / S-VIDEO
B04C
PNX8543 - STANDBY - CONTROL / DEBUG
B03H
DC / DC +3V3-STANDBY_+1V2-STANDBY
B01B
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
BOLT-ON
B04A
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
1M01
1
3
4
2
FOR
FACTORY USE
ONLY
FLASH
1G
7M00 NAND01GW3B2
7B01 EDE1116AEBG
SDRAM
7B00 EDE1116AEBG
7D09 M25P05
512K
FLASH
1M99
1
6
10
11
5
15
VGA
CONNECTOR
DATA-SDA
CLK-SCL
WC-EEPROM-PNX5100_SPI-DI
7
1G30
12
15
7600 PNX85433EH/M2A
PNX8543
B33
D32
SDA 2
SCL 2
3M91
3M90
AK5
AL5
AC1
MC_SDA
MC_SCL
PO_1
3D46
3D45
56
7D06
M24C64
EEPROM
(NVM)
8
3D56-2
+3V3-PER
RESET-NVM
3D56-1
SDA-UP-MIPS
SCL-UP-MIPS
3D39
3D38
+3V3-STANDBY
RES
RES
SDA2
SCL2
SDA-SET
SCL-SET
3M25
3M24
+3V3-PER
G32
D33
SDA 3
SCL 3
3M19
3M18
49 50
7H11
TDA9996
HDMI
MUX
3H66
3H65
24 23
7303
DRX3926K-XK
DEMODULATOR
MICRONAS
3399
3398
SDA3
SCL3
SDA-SSB
SCL-SSB
3M27
3M26
+3V3-PER
L32
L31
GPIO_4
GPIO_5
3M09
3M10
+3V3-PER
H33
F33
SDA 1
SCL 1
3M15
3M14
SDA1
SCL1
SDA-UP-MIPS
SCL-UP-MIPS
3M93
3M92
+3V3-PER
STANDBY
HDMI_DV
PCI
MEMORY
UART
SERVICE
CONNECTOR
3G63
7D07
61
62
3388
3365
+3V3
+3V3
SDA-TUNER
SCL-TUNER
L1
L2
3388
3365
+3V3B
SDA-AMBI-3V3
SCL-AMBI-3V3
AG1
AH5
UA_RX_0
UA_TX_1
RXD-UP
TXD-UP
3D21
3D22
+3V3-STANDBY
RXD-MIPS
TXD-MIPS
RXD
TXD
D15
C15
DDC_SDA_B
M_DQ
PCI_AD
M_A
DDC_SCL_B
DDC-SDA
DDC-SCL
56
7G31
M24C02
EEPROM
256x8
3G60
3G56
+5V
10
11
HDMI
CONNECTOR 3
1H02
16
15
RES
TO POWER SUPPLY
3H08
3H07
ARX-5V
11
12
HDMI
CONNECTOR 2
1H00
16
15
3H10
3H09
BRX-5V
30
31
HDMI
CONNECTOR 1
1H01
16
15
3H14
3H13
CRX-5V
60
61
HDMI
CONNECTOR
SIDE
1H03
16
15
3H12
3H11
DRX-5V
3H01
3H02
+5V
78
79
6
5
ARX-DDC-DAT
ARX-DDC-CLK
BRX-DDC-DAT
BRX-DDC-CLK
CRX-DDC-DAT
CRX-DDC-CLK
DRX-DDC-DAT
DRX-DDC-CLK
4E18
4E19
3M74
3M73
3M76
3M75
STANDBY BUS
400 kHz
SET BUS
100 kHz
SSB BUS
400 kHz
TUNER BUS
400 kHz
AMBILIGHT BUS
30 kHz
1M04
3
2
1
18560_406_090326.eps
090331
3G61
3G58
+3V3
4202
4201
76
1301
HD1816AF
MAIN
TUNER
3317
3316
7G32
B03G
56
7CD0
M24C08
EEPROM
3CDD
3CDC
K1 K2
7C00
PNX5100EH
PNX5100
3CD8
3CD9
3CDA
3CD9
1M59
1
3
4
5
7
6
2
TO AMBILIGHT
(OPTIONAL)
1CE2
T1.0A
7C01 EDE5116AJBG
SDRAM
7C02 EDE5116AJBG
ERR
53
ERR
23
ERR
27
ERR
34
ERR
13
ERR
14
B03H
B03G
B05A
B03F
DDR2-D
DDR2-A
PCI-AD
ERR
25
ERR15ERR
21
5CE5
PNX5100-DDR2-D(0-31)
PNX5100-DDR2-A(0-12)
Block Diagrams
EN 66Q548.1E LA 9.
2009-Apr-03
Page 67

Supply Lines Overview

SUPPLY LINES OVERVIEW
MAIN
POWER SUPPLY
B01A
DC / DC +3V3_+1V2
B01B
DC / DC +3V3-STANDBY_+1V2-STANDBY
B02A
FRONT END
B03B
PNX8543 - VIDEO STREAMS/LVDS OUTPUT
B03A
PNX8543 - POWER
B07A
DISPLAY INTERFACING (COMMOM)
B07B
DISPLAY SUPPLY
B06A
CLASS-D
B03C
PNX8543 - AUDIO AMPLIFIER
B03G
PNX8543 - CONTROL MIPS/FLASH/PCI
B03H
PNX8543 - STANDBY-CONTROL/DEBUG
B04A
BOLT-ON
B04B
ANALOG IO - SCART 1&2
B04C
YPBR / SIDE IO / S-VIDEO
B05A
HDMI
B03D
PNX8543 - AUDIO
B08A
PNX5100 - POWER
B08B
PNX5100 - SDRAM
B08C
PNX5100 - CONTROL / PCI / DEBUG
B08D
PNX5100 - LVDS IN / OUT
B08E
PNX5100 - AMBILIGHT
B05B
ETHERNET
B03F
PNX8543 - SDRAM
B05C
PCMCIA
CN4
11
66
77
88
1M95
+3V3-STANDBY
7103 NCP5422ADG
+12V
+12VF
+3V3
14
1
2
+1V2-PNX85XX
5103
16
15
+12V
12V/1V2
COVERSION
12V/3V3
COVERSION
5104
5105
+3V3F
+1V2-STANDBY
+3V3-NAND
TO DISPLAY
TO DISPLAY
18560_407_090326.eps
090401
CN2
1
2
3
CN3
1
2
3
HV2
N.C.
HV2
HV1
N.C.
HV1
3V3_ST
+12V
5101
B07a
B01a,B02a, B04a
B03a
B03a,g,h, B04a,B05a,
B02a, B03d,g,h, B04a,b,c, B05a,c, B07a
B03h,B08a
B03c,B06a
CN5
11
66
77
22
33
44
55
88
LAMP-ON-OUT
1M99
BACKLIGHT-BOOST
+12VD
BACKLIGHT-OUT
B07A
B03H
+12V
+12V
GND1
GND1
BL-ON_OFF
A/P_DIM
DIM
BOOST
+12V
+5V
+5V5-TUN
99
+AUDIO-POWER
10 10
SENCE+1V2-PNX5100
B08a
B01b
SENCE+1V2-PNX5100
SENSE+1V2-PNX85XX
B03a
SENSE+1V2-PNX85XX
+1V2
+3V3+3V3
+1V2-PNX5100
+12V
+12V
+VSND
GND_SND
CONTROL
CONTROL
N.C.
B03H
CONTROL
99
INV_OK
POWER-OK
22
33
44
55
STANDBY
B03H
STANDBY
GND1
GND1
GND1
CONTROL
7201
IN OUT
COM
11 11
7308
IN OUT
COM
RES
Dual
Synchronous
Step-Down
Controller
7102-2
7102-1
7U01-2
7101-1
VDDA-LVDSVDDA-LVDS
5615
VDDA-LVDS
VDDA-AUDIOVDDA-AUDIO
5622
VDDA-ADC
5621
VDDA-DAC
+1V2-PNX85XX
+1V2-STANDBY
+1V2-PNX85XX
+3V3-STANDBY+3V3-STANDBY
+3V3F
+1V2-STANDBY
+3V3+3V3
5612
+3V3-PER
RREF-PNX85xx
5600
+1V8-PNX85XX
+5V+5V
+3V3+3V3
+12VD
+VDISP-IN
+12VD
+AUDIO-POWER+AUDIO-POWER
3V3E
5305
+1V2A
5304
3V3A
5307
3V3D
5306
B03a,h
B03a,B08a
B02a
B01a
+5V-TUNER
+5V5-TUN+5V5-TUN
7307
IN OUT
COM
B01b
ANTENNA-SUPPLY
+12V+12V
B01b
3V3B
+5V+5V
7309
IN OUT
COM
B01b
+3V3F
7601
IN OUT
COM
B01a
B03a
B01a
B01a
B03d
B01b
B01b
+3V3-PER+3V3-PER
B03a
+3V3+3V3
B03a
B03d
B03b
B01a
B01b
B01b
B01b
N.C.N.C.
7202
VOLT. REG.
7222
VOLT. REG.
52045203
5221
6217
3108
7315
3389
+AUDIO-POWER+AUDIO-POWER
AUDIO-VDD
7801
3819
CONTROL
4801
7802
RES
B01b
+3V3+3V3
+3V3-PER
+3V3-PER
+3V3-STANDBY
+3V3-STANDBY
+5V
+5V
B01a
B03a
B01b
B01b
5M00
1M20
8
5
TO IR/LED PANEL
5M84
5M88
+3V3
+3V3
+3V3-STANDBY
+3V3-STANDBY
+3V3-PER
+3V3-PER
+5V
+5V
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX8541
+1V2-PNX85XX
B01b
B03a
B01a
B01b
B01b
B01a
+12V
+12V
+5V
+5V
+3V3-STANDBY
+3V3-STANDBY
RES
+3V3
+3V3
+5V
+5V
B01a
B01b
B01b
B01b
B01b
+3V3
+
3V3
+5V
+5V
B01b
CRX-5V
1H00
18
HDMI 2
CONNECTOR
BRX-5V
1H03
18
HDMI SIDE
CONNECTOR
ARX-5V
1H01
18
HDMI 1
CONNECTOR
+3V3-STANDBY+3V3-STANDBY
+1V8-PNX85XX+1V8-PNX85XX
+3V3+3V3
VDDH_3V3
DRX-5V
1H02
18
HDMI 3
CONNECTOR
VDD_1V8
VDDO_3V3
5H01
VDDS_3V3
5H06
5H03
5H00
B01a
B03a
B01b
B01a
+5V+5V
B05a
B03b,g,h
B03f,B05a
SENSE+1V2-PNX85XX
B01A
+5V+5V
B01b
RREF-PMX85XXRREF-PMX85XX
B03a
4P26
4P28
4P39
4P29
4P30
4P31
RES
+VDISP-OUT
+VDISP-IN+VDISP-IN
+3V3+3V3
7P03 PNX8543-LCD-PWR-ON_SPI-DI
7P02
B07b
B07a
B01a
B02a, B03a,c,d,g,h, B04b,c,B05a,b,c, B07a,b, B08a,c,d,e
+5V
+5V
7900
IN OUT
COM
VDDA-AUDIO
+3V3+3V3
VDDA-DACVDDA-DAC
B01a
B01b
B03a
B03a
B08b
B01b
+3V3
+3V3
+3V3-PNX5100-LVDS-PLL
5C70
+3V3-PNX5100-LVDS-IN
5C67
+3V3-PNX5100-CLOCK
5C68
+3V3-PNX5100-DDR-PLL0
5C69
+1V2-PNX5100
+1V2-PNX5100
SENSE+1V2-PNX5100
+1V2-PNX5100-DLL
5C66
+1V2-PNX5100-CLOCK
5C60
+1V2-PNX5100-TRI-PLL1
5C61
+1V2-PNX5100-TRI-PLL2
5C62
+1V2-PNX5100-TRI-PLL3
5C63
+1V2-PNX5100-DDR-PLL1
5C64
+1V2-PNX5100-LVDS-PLL
5C65
B01b
B01a
+3V3F
+3V3F
+1V8-PNX5100
B01a
B08a
7C60
IN OUT
COM
+1V8-PNX5100+1V8-PNX5100
PNX5100-DDR2-VREF-CTRL
PNX5100-DDR2-VREF-DDR
3C20
3C22
+3V3+3V3
B01a
+3V3
+3V3
B01a
+3V3
+3V3
B01a
5N07
+3V3-ET-ANA
+3V3+3V3
5N06
+3V3-ET-DIG
B01a
+1V8-PNX85XX
+1V8-PNX85XX
3B48
DDR2-VREF-DDR
DDR2-VREF-CTRL
3B47
B03a
+5V
+5V
PCMCIA-VCC-VPP
3K00
+T
B01b
+3V3
+3V3
+3V3_BUF
B01a
5K00
CC60
1M59
6
TO AMBI-LIGHT
(OPTIONAL)
Block Diagrams
EN 67Q548.1E LA 9.
2009-Apr-03
Page 68
Circuit Diagrams and PWB Layouts

10. Circuit Diagrams and PWB Layouts

Interface Ambilight: Interface + Single DC-DC

EN 68Q548.1E LA 10.
A
B
C
D
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
E
F
G
H
A
B
C
D
E
2 9
431
5
7
8
10
116
123 45678 9
INTERFACE + SINGLE DC-DC
F126
1M85
*
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16
502382-1470
1M59
1
2
3
4
5
6
7
1735446-7
1M90
1
2
3
4
5
6
1735446-6
+12V
+16V
F115
F116 F117 F118 F119 F120
F121 F122 F123 F124
1M84
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16
502382-1470
3109 100R
+24V
+24V
c001
c002
RES
3110 100R
F101 F102 F103 F104 F105 F106 F108
F109 F110 F111 F112
F113
F125
2108
2109
VLED1
VLED2
+3V3
VLED1
VLED2
9101 9102
9103 9104
RES
RES
100p
100p
(RES)
(RES)
+3V3
+24V
RES
SPI-LATCH2CONN
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH1CONN
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
SPI-LATCH1
SPI-LATCH1CONN
SPI-LATCH2CONN
SPI-LATCH2
SCL
SDA
CONTROL1 CONTROL2
+16V
RES
+24V
3100
0R1
10n
3112
100n
12K
3101
47R
2101
I101
I102
100R
2102
2n2
3104
330R
F114
2104
I105
1%
33K
1M0
3107
3106
3105
5107 RES
30R
5108 RES
30R
I100
220p
5102
2100
220n
7100
5
6 7
8
9
14
17 16
1
2
15K
3102
I106
1100
3.0A 32VT10u
NCP3163BMNR2G
I103
I108
2103
3
VCC
LPK_SENSE
DRV_COL
SWI_COL
BOOT_IN
1
VFB
2
TIM_CAP
NC
GND GND_HS
18
F107
Φ
SWI_EMIT
+24VF
LVI_OUT
19
1101
VIA
+16V
RES
RES
30R
5100
I109
*
63V
T2.0A
*
5103
*
5105
514
10 11 12 13
20 21 22 23 24 25 26 27 28 29
30 31
30R
5101
*
30R
30R
5104
+12V
*
30R
30R
5106
+16V
6100
SS24
3K3
3103
I104
100n
2105
2106
100n
1%
3K3
3108
100n
3111
100K
2107
VSW
12
A
B
C
D
E
1100 A6 1101 A7 1M59 C2 1M84 A2 1M85 A2 1M90 D2 2100 A6 2101 B5 2102 C6 2103 D6 2104 D5 2105 D9 2106 D9 2107 E9 2108 D3 2109 E3
3100 B5 3101 C5 3102 D6 3103 D9 3104 D6 3105 D5 3106 D5 3107 D5 3108 E9 3109 D2 3110 D3 3111 E8 3112 B6
5100 A8 5101 A8 5102 A7 5103 B8 5104 B8 5105 B8 5106 B8 5107 A6 5108 A6 6100 C8 7100 B7 9101 C3 9102 C3 9103 C3 9104 C3 F101 B3 F102 B3 F103 B3 F104 B3 F105 B3 F106 B3 F107 A7 F108 B3 F109 B3 F110 B3 F111 B3 F112 B3 F113 B3 F114 B5 F115 C2 F116 D2 F117 D2 F118 D2 F119 D2 F120 D2 F121 E2 F122 E2
13
F123 E2 F124 E2 F125 B3 F126 A2 I100 A6 I101 C6 I102 C6 I103 C6 I104 D9 I105 D5 I106 D7 I108 D6 I109 A8 c001 E2 c002 E2
A
B
C
D
E
F
G
H
12
I
J
1
STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9
DC/DC INTERFACE
3104 328 58341
3104 328 58351
3104 328 58361
3104 328 58371
2
1101
in
out
out out
3
1M85
in out out out
3 4
5103/5104
out
out out
5105/5106
in
4
out
in in
out
VLED1
24V
12V
16V
12V
VLED2
16V
12V
16V
16V
567
See the stuffing diversities table in the case of components marked with one star (*)
SETNAMECHN
CLASS_NO
DC-DC INTERFACE
08-06-19
08-08-06
08-10-23
NAME
CT
6
7
1
2
3
Peter Van Hove
85
AMBI 2K9
SUPERS.
08-06-06********
DATEMGr CHECK
9
10
8
9
I
08-06-19
1
08-08-06
2
08-09-18
3104 313 6325
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
11
12
3
08-10-23
4
08-12-06
5
13
***031**
13
18310_600_090305.eps
J
A3
090305
2009-Apr-03
Page 69
Circuit Diagrams and PWB Layouts

Interface Ambilight: Dual DC-DC

EN 69Q548.1E LA 10.
A
B
C
D
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
E
F
G
H
1
2
3
4
5
6
7
8
109
11
12
13
A
A
B
C
D
E
1
2 3
4567
DUAL DC-DC
2200
F204
I217
**
9202
F207
3K3
I214
22n
(VLED2)
+16V
+16V
RES
I200
3204
2211
2214
I208
I211
**
10R
1n0
1n0
I212
3210
I215
3200
6R8
3202
6R8
3K9
**
3211
F202
2204
**
47n
3206
RES
33K
2221
RES
**
1%
VSW
**
F200
**
2206
5200
10u
**
35V
4u7
2207
100u
I204
**
**
6200
SS24
**
**
2216 2217
RES
22n
3207
**
RES
RES
4u7
2218
2219
68K
1%
4u7
7200 : TPS54383 in case of 16V or dual dc-dc converter
The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371).
The components marked with two stars (**) belong to the 16V versions
(3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371).
2201
100u35V
7200
TPS54283PWP
9 10 11
4u7
2212
220n
1
PVDD1 PVDD2
BOOT1 SW1 EN1 FB1
ILIM2 SEQ BP
GND GND_HS
4
8
+24VF
A
35V
2203
2202
220n
100u
I213
I216
2205
47n
I206
*
9201
RES
3K3
3209
*
22n
2222 RES
14
Φ
BOOT2
SW2
EN2
FB2
VIA2
15
F203
312 213 65 87
16 17 18 19 20 21 22 23 24 25 26
RES
I201
3201
6R8
3203
*
3212
I205
*
6R8
*
10R
3205
I209
*
1n0
2213
I210
*
1n0
2215
*
33K
3K3
3213
1%
5201
*
10u
*
6201
SS24
RES
22n
3208
*
47K
1%
RES
RES
*
22u
22u
2208
2209
F201
*
10u
2220
*
2210
2223
220u 25V
10u
*
(VLED1)
2224
+12V
10u
B
C
+12V
D
VLED1
E
2200 A4 2201 A4 2202 A5 2203 A5 2204 B3 2205 B6 2206 B1 2207 B2 2208 B7 2209 B7 2210 B8 2211 C3 2212 C4 2213 C6 2214 C3 2215 C6 2216 C2 2217 C7 2218 D1 2219 D2 2220 D7 2221 D3 2222 D5 2223 D8 2224 D8
3200 A3 3201 A6 3202 B3 3203 B6 3204 B3 3205 B6 3206 D3 3207 D2 3208 D7 3209 D5 3210 D3 3211 D3 3212 D6 3213 D6
5200 B2 5201 B7 6200 B2 6201 B7 7200 B4 9201 B5 9202 C4 F200 B2 F201 C7 F202 D3 F203 B5 F204 B4 F207 C4 I200 A3 I201 A6 I204 B2 I205 B6 I206 B6 I208 B3 I209 B6 I210 C6 I211 C3 I212 C3
I213 D5 I214 D4 I215 D3 I216 B5 I217 B4
B
C
D
E
F
G
H
1
2
I
J
1
2 13
3
4
3 45
CLASS_NO
08-06-19
08-08-06
08-10-23
NAME
5
6
7
1
2
3
Peter Van Hove
CHECK
8
678
EMANTESNHC
DC-DC INTERFACE
AMBI 2K9
SUPERS.
DATE
9
08-06-09
10
3 2
3104 313 6325
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
11
130
12
1
08-06-19
2
08-08-06
3
08-09-18
4
08-10-23
5
08-12-06
A3
18310_601_090305.eps
I
J
090305
2009-Apr-03
Page 70
Circuit Diagrams and PWB Layouts

Interface Ambilight: Microcontrollerblock

EN 70Q548.1E LA 10.
A
B
C
D
E
F
G
H
J
K
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
L
M
N
1
2
3
4
5
6
7
98
10
11 15
12
13
14
16
17
18
19
20
A
123
MICROCONTROLLER BLOCK
A
+3V3
2300
B
C
D
7302
LPC2103FBD48
11
X1
12
E
I
+3V3
F
1K0
3339
F317
G
2
3
I308
5
9305 RES
2318
100n
1300
7303
NCP303LSN10T1
IN
RST
GND
NC
CD
+3V3
16M9
1
4
+3V3
RES 9300
3332
10K RES
9301
RES
9302 9303RES
F308
10K
3333
X2
20
RTXC1
25
RTXC2
26
RTCK
4
VBAT
F307
27
DBGSEL
6
RST
+1V8
H
45678
7301
LD2985BM18R
1
3
INH BP
1u0
1 2
3
B3B-PH-SM4-TBT(LF)
71943
VSS
MICRO-
CTRL
P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4
P0.12|DSR1|MAT1.0|AD0.5
P0.14|DCD1|SCK1|EINT1
VDD_1V8
5
+3V3
2322
100n
2321
OUTIN
COM
2
RES
1302
45
Φ
P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0
P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0
P0.8|TXD1|MAT2.1
P0.9|RXD1|MAT2.2
P0.13|DTR1|MAT1.1
P0.15|RI1|EINT2
P0.16|EINT0|MAT0.2
P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1
P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0
P0.27|TRST|CAP2.0
P0.28|TMS|CAP2.1
P0.29|TCK|CAP2.2
P0.30|TDI|MAT3.3
VDD_3V3
17
40
9307
100n
2323
5
4
VSSA
P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7
P0.31|TDO
VDDA
100n
F300
I303
100n
2301
10n
2303
+3V3
3321
F304
F305
F306
3322
2308
100p
31
13 14 18 21 22 23 24 28 29
30 35 36 37
41 44 45 46 47 48
1 2
3 32 33 34 38 39
8
9 10 15 16
42
F315
2324
100n
+1V8
4u7
2302
+3V3
10K
10K
3320
8
10K
10K3303-2
10K3302-4
10K3302-2
45
27
10K3300-2
3323
100R
100R
27
10K
10K
I310
2309
100p
3 6
3 6
27
3301-2
3329
10K
I319
UD-MD
I322
22R
F314
3335
I309
100R
100n
2320
1301
RES
SKHUBHE010
1 8
3302-3 10K
3301-3 10K
3328
I307
F310
3334
1
2
2319
3
4
27
1
10K
RES3325
10K
RES
3 6
3326
3303-3 10K
3303-1 10K
I321
10K
100p
3336
3337
1 8
3301-1 10K
3304-1
10K
3327
I305
I317
2310
F309
10K
6
10K3304-2
6
5
10K3301-4
10K
27
4
3
3300-3 10K
3324
6
10K3300-4
3
1 8
45
3302-1 10K
I313
I314
I318
2312
100p
100p
2311
100n
711
+3V3
10K3304-4
45
10K
1 8
3304-3 10K
3305-1
I311
I312
I315
RES
100p
2313
2314
91011
1K5 1%
1%1K5
7300-2 LM393PT
5
6
I304
TEMP-SENSOR
100K
10K
3310
RES
+3V3
8
7
4
F303
2305
10n
RES
3315
47K
RES
3318
RES
+3V3
RES
1%
3311
1K5
F301
RES
10K
10n
2304
-T
C300
3306-3
RES
3330
3331 3306-2 2 3306-1 3306-4 3307-1 3338 3307-4 4 5 3307-2 2 7 3308-4 3308-2
3308-1
3309-4 3309-1
45
27
10K
3314
10K
+3V3
1%
RES
3317
1K5
F316
1%1K8
3319
RES
3 6
100R 100R
7
100R 100R
8
1
100R
45 1 8
100R 100R 100R 100R 100R
45
100R
27
100R
1 8
100R
54
100R
8 1
100R
3 6
7300-1 LM393PT
3
2
10K3305-3
+3V3
8
4
I300
F320
I302
9103 45
3313
I306
I316
I320
100p
2316
100p
100p
2315
F311 F312
3305-4 10K
F313
3305-2
812
2306
100n
1
PWM-CLOCK-BUF
SPI-DATA-RETURN
PWM-CLOCK-BUF
+3V3
+3V3
3312
10n
2307
3316
CONTROL1
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-LATCH1 SPI-LATCH2
TEMP-SENSOR
EEPROM-CS
BLANK-BUF
PROG
CONTROL2
F302
SCL SDA
1300 E2 1301 H5 1302 C4 2300 A3 2301 A4 2302 A5 2303 A4 2304 B8 2305 B10 2306 B9
A
2307 B10 2308 D4 2309 D5 2310 F6 2311 F7 2312 F7 2313 F7 2314 F7 2315 F7 2316 F8 2318 G2 2319 G6
B
2320 H5 2321 H4 2322 H4 2323 H4 2324 H4
3300-2 D5 3300-3 D7 3300-4 D7 3301-1 D6 3301-2 E5 3301-3 E6 3301-4 D7
C
3302-1 D7 3302-2 D6 3302-3 E6 3302-4 D6 3303-1 E6 3303-2 D6 3303-3 E6 3304-1 D6 3304-2 D7 3304-3 D7 3304-4 D7
D
3305-1 E7 3305-2 G8 3305-3 G9 3305-4 G8 3306-1 E8 3306-2 E8 3306-3 E8 3306-4 E8 3307-1 E8 3307-2 F8 3307-4 F8 3308-1 F8
E
3308-2 F8 3308-4 F8 3309-1 F8 3309-4 F8 3310 A10 3311 A8 3312 A10 3313 B8 3314 B8 3315 B10 3316 B10 3317 B8
F
3318 C10 3319 C8 3320 C5 3321 C5 3322 D5 3323 D5 3324 D7 3325 D6 3326 D6 3327 D6 3328 E5
G
3329 E5 3330 E8 3331 E8 3332 E3 3333 F2 3334 G5 3335 G5 3336 G6 3337 G6 3338 E8 3339 F1
7300-1 B9
H
7300-2 A10 7301 A4 7302 E3 7303 F2 9300 E3 9301 F3 9302 F3
9303 F3 9305 G1 9307 H4 C300 B8 F300 A5 F301 A8 F302 A10 F303 B11 F304 C4 F305 C4 F306 D4 F307 F3 F308 F3 F309 G6 F310 G6 F311 G8 F312 G8 F313 G8 F314 G5 F315 H4 F316 C9 F317 F1 F320 E9 I300 E9 I302 F9 I303 A4 I304 C10 I305 E6 I306 E7 I307 G6 I308 G2 I309 G5 I310 D5 I311 E7 I312 E7 I313 E7 I314 F7 I315 F7 I316 F8 I317 F6 I318 F7 I319 F5 I320 F8 I321 F6 I322 G5
B
C
D
E
F
G
H
I
J
K
L
M
N
08-06-19
08-08-06
08-09-18
08-10-23
08-12-06
O
P
A2
090305
O
CLASS_NO
08-06-19
P
NAME
1
2
3
4
7
98
10
11
1256
13
14
08-08-06
08-10-23
Peter Van Hove
1
2
3
15
SETNAMECHN
DC-DC INTERFACE
AMBI 2K9
SUPERS.
DATECHECK
08-06-09
16
17
3104 313 6325
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
130
19
1
2
3
4
33
5
20
18310_602_090305.eps
2009-Apr-03
Page 71
31043136325.5
18310_550_090309.eps
090309
1100
1101
1301
1302
1M59
1M84
1M85
1M90
2200
2201 2202
2203
2206
2207
2208
2209
2210
2218
2219
2220
2223
2224
2300
2301
2302
2303
2310
2311
2312
2315
2316
2319
2321
2322
2323
3306
3307
3308
3309
3324
3326
3331
3338
5102
5200
5201
6200
6201
7200
7301
9101
9102
9103
9104
9201
9202
1300
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2204
2205
2211
2212
2213
2214
2215
2216
2217
2221
2222
2304
2305
2306
2307
2308 2309
2313
2314
2318
2320
2324
3100
3101
3102
3103
3104
3105 3106 3107
3108
3109
3110
3111
3112
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3300
3301
3302
3303
3304
3305
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322 3323
3325
3327 3328
3329
3330
3332
3333
3334
3335
3336
3337
3339
5100
5101
5103
51045105
5106
5107
5108
6100
7100
7300
7302
7303
9300
9301
9302
9303
9305
9307
C300
F101
F102
F103
F104
F105
F106
F107
F108
F109
F110 F111
F112
F113
F114
F115
F116
F117
F118
F119
F120
F121
F122
F123
F124
F125
F126
F200
F201
F202
F203
F204
F207
F300
F301
F302
F303
F304
F305
F306
F307
F308
F309
F310
F311
F312
F313
F314
F315
F316
F317
F320
I100
I101
I102
I103
I104
I105
I106
I108
I109
I200
I201
I204
I205
I206
I208
I209
I210
I211
I212
I213
I214
I215
I216
I217
I300
I302
I303
I304
I305
I306
I307
I308
I309
I310
I311
I312
I313
I314
I315
I316
I317
I318
I319
I320
I321
I322
c001
c002
Personal Notes:
10000_012_090121.eps
090121
Circuit Diagrams and PWB Layouts

Layout DC/DC Interface Ambilight

EN 71Q548.1E LA 10.
2009-Apr-03
Page 72
Circuit Diagrams and PWB Layouts

6 LED Low-Pow: Microcontroller Block Liteon

EN 72Q548.1E LA 10.
A
B
C
D
E
F
G
H
J
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
L
M
N
1
2
1
3
4
2
5
3
6
4
7
8 9
6
10
11
8
12
13
14
15
MICROCONTROLLER BLOCK LITEON
A
B
C
IN
1M83
F120
1
F121
2
F122
3
F123
4
F124
5
F125
6
F126
7
F127
8
F128
9
F129
10
F130
11
F131
12
F132
13 14
16
15
1M1A
1 2
3
4 5 6 7
8
9 10 11 12 13 14
15
16
1u0
2127
+3V3
VLED1
VLED2
35V10u
2129
2128
10u35V
+3V3
VLED1
VLED2
9111
RES
9113
RES
9112
9114
EEPROM-CS
TEMP-SENSOR
33p
2125
EEPROM-CS
TEMP-SENSOR
SPI-DATA-IN
CONTROL-1 CONTROL-2
BLANK
PROG
CONTROL-1 CONTROL-2
PROG
SCL
SDA
SCL
SDA
SCL SPI-DATA-RETURN
CONTROL-1 CONTROL-2
VLED1
9107 9108
9109 9110
1.5A T
1105
SPI-CLOCK
SPI-LATCH
PWM-CLOCK
SDA
VLED1-F
+3V3
D
7102
LPC2103FBD48
E
OUT
1M84
F133
1
F135
2
F136
3
F139
4
F137
I
F
G
H
5
6
F138
7
F134
8
9 10 11 12 13 14
15 16
1M2A
1
2
3
4
5
6
7
8
9 10 11 12 13 14
15 16
VLED1
VLED2
+3V3
VLED1
VLED2
+3V3
1u0
2130
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
+3V3
10K
3119
F109
2
3
5
9121 RES
2111
100n
1101
7110
NCP303LSN10T1
IN
RST
GND
NC
CD
+3V3
16M9
1
4
+3V3
9101
3118
RES10K
9102
RES 9103
9104
RES
F104
10K
3120
71943
VSS
11
X1
MICRO-
12
CTRL
X2
20
RTXC1
25
RTXC2
26
RTCK
4
VBAT
F102
27
DBGSEL
6
RST
VDD_1V8
5
+3V3
+1V8
100n
2119
VSSA
Φ
P0.0|TXD0|MAT3.1
P0.1|RXD0|MAT3.2
P0.2|SCL0|CAP0.0
P0.3|SDA0|MAT0.0
P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0
P0.8|TXD1|MAT2.1
P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4
P0.12|DSR1|MAT1.0|AD0.5
P0.13|DTR1|MAT1.1
P0.14|DCD1|SCK1|EINT1
P0.15|RI1|EINT2
P0.16|EINT0|MAT0.2
P0.17|CAP1.2|SCL1
P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0
P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7
P0.27|TRST|CAP2.0
P0.28|TMS|CAP2.1
P0.29|TCK|CAP2.2
P0.30|TDI|MAT3.3
P0.31|TDO
VDD_3V3
VDDA
17
40
9119
2120
100n
100n
2121
7101
LD2985BM18R
1
OUTIN
3
INH BP
1u0
2101
COM
2
+3V3
+3V3
10K
3107
3108
F107
F105
F108
3110
3109
100R
100p
2109
31
13 14 18 21 22 23 24 28 29
30 35 36 37
41 44 45 46 47 48
1 2
3 32 33 34 38 39
UD-MD
8
9 10 15 16
42
F103
2113
100n
5
4
10K
100R
2110
2112
2104
100p
3117
22R
3131
100R
100n
F101
100n
2102
10n
72
10K
3101-2
10K
10K
27
3116
3104-2
10K
3130
F112
9106
3 6
3104-3
RES
2103
3105-2 2 7
10K
4u7
10K
5
10K
4
3105-4
10K
1 8
3 6
3106-1
3105-3
I110
RES
2118
+1V8
10K
27
1 8
10K
RES
3106-2
3104-1
3113
10K
10K
10K
RES
3 6
3114
3106-3
10K
100p
3132
3133
10K
1 8
3102-1
10K
3115
2114 RES
I111
10K
10K
10K
10K
45
3 6
3101-3
3112
3104-4
10K
3105-1 1 8
2115
100p
100p
+3V3
10K
10K
45
27
3102-2
3102-4
10K
10K
45
3102-33 6
3101-4
2117
2116
100p
10K
10K
8
1
3103-1
RES
100p
RES
2126
100p
2123
2122
100p
100p
2124
I113
3103-4 I114 I115
3103-2
+3V3
1%
3135
1K5
F116
RES
10K
10n
3137
2105
3111
-T
C140
100p
4
2
2131
+3V3
3140
3123
3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 2 7 3125-4 3126-2 3126-4
3126-1
3127-1 1 8 3127-4
100p
5
10K
7
10K
10K
1K5 1%
1%1K8
45
1 8 27 3 6 1 8
45 27 45
1 8
45
3103-3
+3V3
7116-1 LM393PT
84
RES
3
F118
2
RES
I124 100R 100R 100R 100R 100R
I125
100R 100R 100R 100R 100R
100R 100R
I126
100R
100R 100R
6
10K3
2107
100n
1
PWM-CLOCK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-LATCH-2
TEMP-SENSOR
EEPROM-CS
+3V3
16
+3V3
3136
10n
2108
CONTROL-1
SPI-DATA-IN
SPI-LATCH
BLANK-BUF
PROG
CONTROL-2
3139
SCL
SDA
1K5 1%
F106
1%1K5
100K
7116-2 LM393PT
5
6
10n
47K
10K
TEMP-SENSOR
+3V3
3138
17
18
31211101975
3134
RES
84
7
F117
2106
RES
RES
3141
RES
19
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11
A
2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6
B
2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10
C
3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10
D
3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7
E
3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4
F
3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11
G
3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12
H
3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11
7101 A7 7102 E6 7110 F4 7116-1 B11
7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11
20
A
B
C
D
E
F
G
H
I
J
K
L
M
123 45678 9 10111213
N
1X03
REF EMC HOLE
O
12345
P
1
2
4
5
6
7
8
103
119
12
13
14
CLASS_NO
2008-08-08
2008-10-2723
Peter Van Hove
NAME
CHECK DATE
15
EMANTESNHC
DRIVER 6LED LITEON
2K9
SUPERS.
2008-06-02
16
17
8204 000 8857
3 1
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
130
19
1
232008-08-08
20
18310_610_090305.eps
O
2008-06-10
2008-10-27
P
A2
090305
2009-Apr-03
Page 73
Circuit Diagrams and PWB Layouts
EN
S
GND
Q
HOLD
W
VCC
C
D
EN
MODE
SIN
XHALF
XLAT
SCLK
VCC
SOUT
6
2
0
11
VIA
9
13
12
10
4
IREF
GND GND_HS
OUT
GSCLK
7
14
5
3
1
8
15
XERR
BLANK
C
EN
EN
F203 C5 F204 H6
F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9
INPUT BUFFER
A
All rights reserved. Reproduction in whole or in parts
I
1
H
3221 H11 3222 I8
11
F215 H9
6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3
12
12
10
11
7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3
C
F205 B10 F206 C10
2217 B12 2218 C12 2219 D12 2220 E9
3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6
7
16
F
3216 H6 3217 H6 3218 H6 3219 B11 3220 C11
17 18
3223 C11 3224 H11
N
D
E
F
G
H
I
A
B
C
D
E
F
O
P
O
N
L
M
K
B
20
6
J
18
P
20
7 8 9 10111213
A
B
C
L
J
7 8
4
A
is prohibited without the written consent of the copyright
F
9 10111213
123 456
D
32 8
12
169
194
15
K
G
123 45678
13
C
14
3
G
E E
owner.
5
H
14
G
H
I
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7
9
D
6 15
13 19
5
I
17
MICROCONTROLLER BLOCK LITEON
M
10
B
RES
3207
1K0
1u0
2216
F202
10K
3210
+3V3
33p
2209
6216
SML-310
2211
33p
9212
+3V3
RES
100R
3121
3220
3223
100R
3217
27R
100R
3219
100R
33p
2202
+3V3
2215
100n
F212
F211
33p
2201
+3V3
9
7
10
14
8
74HCT125PW
7201-3
3214
10K
3215
1K2
5
4
7
2
1
8
3
9213
(64K)
Φ
7214
M95010-WDW6
6
12
7
13
14
11
74HCT125PW
7201-4
100R
3212
F207
3224
3K3
+3V3
F213
2217
100p100p
2218
3221
3K3
F209
F204
3204
10K
+3V3
RES
1K0
3209
F208
+3V3
+3V3
RES9214
9209
24
28
303132
33
2326
3
9 10 11 12 13 14 15 16
4 5
27
6
7
8
17 18 19 20 21 22
7215
TLC5946PWP
Φ
PWM CONTROL
LED DRIVER
2
1
29
25
+3V3
PDTC144EU
+3V3
7212
470R
3222
7209
PDTC144EU
1
3
2
+3V3
F210
+3V3
10K
3203
3216
+3V3
14
3
100R
7201-1
74HCT125PW
2
7
1
100n
2214
3213
10K
+3V3
2219
100p
2008-10-2723
RES
100p
2220
2008-08-08
A2
DRIVER 6LED LITEON
2K9
8204 000 8857
CHECK DATE
NAME
1
SUPERS.
18310_611_090305.eps
090305

6 LED Low-Pow: Microcontroller Block Liteon

EN 73Q548.1E LA 10.
2009-Apr-03
Page 74
Circuit Diagrams and PWB Layouts

6 LED Low-Pow: LED Liteon

EN 74Q548.1E LA 10.
1
A
123
3
4
5
6
456
8
914
10
7
11
12 132
8
9
10 11
15
16
12
17
13
LED LITEON
B
A
VLED1-F
VLED2
C
B
VLED2
D
E
F F
G
H
I
J
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
L
M
VLED1-F
9309-227
27
9305-2
9305-445
9305-11 8
Place jumper 9314, 9316, 9317
if VLED < 17V
6
GREEN
RED
BLUE
7003
GND_HS
3
25
7
9318-1
9318-4
72
9320-4 54
9320-1 8
9320-2
1
9301
C
D
3340
560R
3346
560R
3349
E
560R
3369
560R
3370
560R
F
G
3341
1K5
3344
1K5
3353
1K5
3384
1K5
3385
1K5
3387
1K5
3388
1K5
3389
1K5
3390
1K5
3391
1K5
3336
390R
3339
390R 3342
390R
LTW-E500T-PH1
4
GREEN
RED
6
BLUE
7000
GND_HS
3
25
1
7
LTW-E500T-PH1
4
GREEN
RED
BLUE
7001
GND_HS
7
VLED1-F
3331
3
25
16
10K
3325
3326
LTW-E500T-PH1
4
3334
1K0
10K
10K
GREEN
RED
BLUE
F308
7002
GND_HS
F303
3
25
16
7
45
9306-1 18
9306-4
F307
F302
H
9310-11 8
9310-445
9310-2
27
LTW-E500T-PH1
4
18
45
GREEN
RED
BLUE
7004
GND_HS
7
VLED1-F
3301
3303
3
25
16
9319-11 8
10K
10K
VLED1-F
3309
7317 BC847BW
F326
F328
3308
1K0
10K
10K
10K
3304
3306
9312-445
9303-33 6
45
9303-4
9304-227
F325
7315 BC847BW
F329
7316 BC847BW
F330
9312-3
3 6
GREEN
RED
BLUE
GND_HS
Place jumper 9325, 9326, 9327
9326
9327
G
if VLED < 17V
R
B
9313-11 8
B
27
9315-2
9315-445
B
3335
390R 3345
390R 3348
390R
G
R
RG
3311
1K5
3312
1K5
3315
1K5
3316
1K5
3317
1K5
3320
1K5
3321
1K5
3322
1K5
3323
1K5
F348
9311-445
9311-11 8
9311-33 6
560R
560R
560R
560R
560R
3363
560R
3364
560R
3366
560R
3354
3357
3358
3360
3362
I
N
18
A
B
C
D
E
F
G
H
I
197
3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1
7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8
9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13
20
A
B
C
D
E
G
H
I
J
K
L
M
N
1
2
3
456
O
P
1
2
4
5
63
7
8
9
7 8 9
10
CLASS_NO
11
12
EMANTESNHC
13
DRIVER 6LED LITEON
2008-08-08
2008-10-2723
Peter Van Hove
NAME
10 18
11
12
13 20
CHECK
1514
SUPERS.
DATE
16
2K9
2008-06-02
33
17
8204 000 8857
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
19
O
2008-06-10
1
232008-08-08
2008-10-27
P
A2
18310_612_090305.eps
090305
2009-Apr-03
Page 75

Layout 6 LED Low-Pow

3104 313 6313.3
18310_551_090309
090309
1101
1105
1M83 1M84
2101
2102
2103
2104
2105
2106
2107
2108
21092110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
21282129
2130
2131
2201
2202
2203
2209
2210
2211
2214
2215
2216
2217
2218
2219
2220
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3123
3124
3125
3126
3127
3128 3129
3130
3131
3132 3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3203
3204
3205
3207
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3325
3326
3327
3328
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3384
3385
3386 3387 3388
3389 3390 3391
6216
7000
7001
7002
7003
7004
7005
7101
7102
7110
7116
7201
7209
7210
7212
7214
7215
7305
7306
7307
7315
7316
7317
9101
9102
9103
9104
9106
9107
9108
9109
9110
9111
9112
9113
9114
9119
9121
9208
9209
9210
9211
9212
9213
9214
9301
9302
9303
9304
9305
9306
9307
9308
9309
9310
9311
9312
9313
9314
9315
9316
9317
9318
9319
9320
9325
9326
9327
C140
I110
I111
I113
I114
I115
1M1A1M2A
F101
F102
F103
F104
F105
F106
F107 F108
F109
F112
F116
F117
F118
F120
F121
F122
F123
F124
F125
F126
F127
F128
F129
F130
F131
F132
F133
F134
F135
F136
F137
F138
F139
F202 F203
F204
F205
F206
F207
F208
F209
F210
F211
F212
F213
F214
F215
F302
F303
F304
F305
F307
F308
F325
F326
F327
F328
F329
F330
F340
F341
F342
F343
F344
F345
F346
F347F348 F349
I124
I125
I126
Circuit Diagrams and PWB Layouts
EN 75Q548.1E LA 10.
2009-Apr-03
Page 76
Circuit Diagrams and PWB Layouts
-T
OUTIN
INH BP
COM
X2
RTXC1 RTXC2
RTCK
VBAT
DBGSEL
RST
VSS
VSSA
VDDA
VDD_3V3
VDD_1V8
X1
C
NC
GND
RST
IN
CD
C
E
F
G
H
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11
17
F
J
M
A
2
C
4
E
6
G
8
A
10 11 12 13
123 45678 910111213
14
D
OUT
B
7
D
6
F
H
B
D
2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3
11
M
2
1
20
3
19
975
2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10
3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9
7
J
18
3103-2 G10
B
3103-4 G10
10
3104-2 E8
3104-4 D9
3105-2 D8
2108 B12
3105-4 D8 3106-1 E8 3106-2 D8
G
14
G
E
119
13
20
K
18
N
P
L
3107 C7
3109 D7
A
3111 B10
4
3113 D8 3114 E8 3115 E8
19
I
H
15
O
P
I
3116 E8 3117 E7 3118 E5 3119 F4
3123 C11
3103-3 G11
3124-2 E11
3104-1 D8
3124-4 E11
3104-3 E8
3125-2 F11
3105-1 E9
3126-1 F11
3105-3 E8
3126-4 F11 3127-1 F11 3127-4 F11
owner.
17
C
1
is prohibited without the written consent of the copyright
5
C
1
3128 E11 3129 E11 3130 G8
3132 H8
3134 A13
3106-3 E8
3136 A12
3108 C7
3138 B13
3110 D7
3140 C11
3112 D9
3142 F11
7101 A7 7102 E6
All rights reserved. Reproduction in whole or in parts
H
103
4
N
MICROCONTROLLER BLOCK LITEON
5
7110 F4 7116-1 B11
7116-2 A12 9101 E5 9102 F5
3120 F5
9104 F5
3124-1 E11
9107 A5
3124-3 E11
9109 A5
3125-1 F11
9111 A3
3125-4 F11
9113 B3
3126-2 F11
9119 H6 9121 G4 C140 B10
8 9
12
F
12
16
A
13
F101 A8 F102 F5 F103 H7
3131 G7
F105 D7
3133 H8
F107 C7
3135 A11
F109 G3
3137 B11
F116 A10
3139 B12
F118 C11
3141 C13
F121 A1 F122 A1 F123 A1
8
IN
6
3
O
D
E
15
F124 B1 F125 B1 F126 B1
9103 F5
F128 B1
9106 H8
F130 B1
9108 A5
F132 B1
9110 B5
F134 F1
9112 B2
F136 F1
9114 B2
F138 F1 F139 F1 I110 G8
L
K
2
B
16
I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11
F104 F5
I126 F11
F106 B12
F127 B1
F108 D7
F129 B1
F112 G8
F131 B1
F117 B13
F133 E1
F120 A1
F135 E1
F124
F137 F1
VLED1
F134
100n
2120
I124
3 6
VLED2
10K
3101-3
F107
9112
10K
3103-336
9109
+3V3
F139
1K5
3135
1%
10K
3103-445
3136
1%1K5
F109
9108
9101
9107
F130
+3V3
9104
+3V3
2109
100p
RES
3129
100R
5 6 7
8
9
15 16
VLED1-F
1
10 11 12 13 14
2
3
4
3 6
1M84
3124-3
100R
RES
10K
3141
+3V3
1 83124-1
100R
10K
3112
RES
9113
VLED1
F120
3127-4 4 5
+3V3
15 16
100R
13 14
2
3
4 5 6 7
8
9
1M2A
1
10 11 12
3107
10K
RES
2106
10n
F129
+3V3
F106
100p
2118
VLED2
10K
3113
RES
3
5
RES
7101
LD2985BM18R
4
2
1
3110
100R
3116
10K
3133
I110
RES
10K
F103
9106
10K
3106-33 6
+1V8
+3V3
10K
3111
VLED2
3103-1
1
8
I126
10K
RES 9103
F104
+3V3
+3V3
I111
F133
5
9114
3125-4
100R
4
F112
100p
3105-1
10K
1 8
2117
12
+3V3
4
42
5
17
40
71943
31
11
23
P0.5|MISO0|MAT0.1
24
P0.6|MOSI0|CAP0.2
28
P0.7|SSEL0|MAT2.0
29
P0.8|TXD1|MAT2.1
30
P0.9|RXD1|MAT2.2
6
26
20 25
8
P0.27|TRST|CAP2.0
9
P0.28|TMS|CAP2.1
10
P0.29|TCK|CAP2.2
18
P0.2|SCL0|CAP0.0
15
P0.30|TDI|MAT3.3
16
P0.31|TDO
21
P0.3|SDA0|MAT0.0
22
P0.4|SCK0|CAP0.1
14
P0.1|RXD0|MAT3.2
2
P0.20|MAT1.3|MOSI1
3
P0.21|SSEL1|MAT3.0
32
P0.22|AD0.0
33
P0.23|AD0.1
34
P0.24|AD0.2
38
P0.25|AD0.6
39
P0.26|AD0.7
41
P0.13|DTR1|MAT1.1
44
P0.14|DCD1|SCK1|EINT1
45
P0.15|RI1|EINT2
46
P0.16|EINT0|MAT0.2
47
P0.17|CAP1.2|SCL1
48
P0.18|CAP1.3|SDA1
1
P0.19|MAT1.2|MISO1
27
13
P0.0|TXD0|MAT3.1
35
P0.10|RTS1|CAP1.0|AD0.3
36
P0.11|CTS1|CAP1.1|AD0.4
37
P0.12|DSR1|MAT1.0|AD0.5
27
MICRO-
CTRL
Φ
LPC2103FBD48
7102
3 6
3104-2
10K
10K
3104-3
2
3
4 5 6 7
8
9
15 16
1
10 11 12 13 14
1M1A
35V10u
2128
2124
I113
RES
100p
10K
F116
3119
100n
2107
T1.5A
1105
F135
9110
33p
2125
1 8
3
2
130
3126-1
100R
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-06-02
13
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8857
2K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
10K
72
3
2
Peter Van Hove
2008-06-10
3101-2
100K
RES
3134
+1V8
3 6
F122
10K
3105-3
10K
3102-4 4 5
7116-1 LM393PT
3
2
1
84
10n
2108
100R
3109
10K
100p
2110
1 8
3117
10K
3106-1
100n
2111
VLED2
3108
10K
3114
10K
RES
RES
3118
10K
F127
+3V3
VLED1
F121
100n
2113
3103-2
10K
2
7
10K
3 63102-3
RES
3137
10K
F126
F131
9102
3124-2 2 7
1 8
100R
+3V3
3102-1
10K
I125
1u0
2130
F101
9119
3130
22R
C140
10K
3101-4
45
+3V3
F105
27
100p
2116
10K
3106-2
3120
10K
2121
100n
F137
1101
16M9
3125-1 1 8
100R
F108
8
9
15 16
100p
2115
12 13 14
2
3
4 5 6 7
1M83
1
10 11
F138
45
F102
345
10K
3105-4
1X03
REF EMC HOLE
1
2
F123
2123
100p
1u0
2101
2105
10n
100R
3128
1u0
2127
27
VLED1
3125-2
100R
3138
RES
100p
2122
47K
45
RES
100R
3126-4
3142
100R
1 8
4
1
3104-1
10K
NCP303LSN10T1
7110
5
3
2
F128
F136
RES
F132
1%1K5
3140
2102
100n
RES2114
100p
27
3115
10K
3126-2
100R
4
VLED1
+3V3
7116-2 LM393PT
5
6
7
8
F125
10K
3104-4 4 5
+3V3
I114
F118
35V
2129
10u
1 8
10K
3132
3127-1
100R
RES
1K8 1%
3123
1K5 1%
27
3139
10K
3102-2
2119
100n
9111 RES
2112
100n
273105-2
10K
2126
100p
4u7
2103
+3V3
+3V3
10n
2104
100p
2131
100R
3131
F117
9121
I115
RES
3124-4
100R
45
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
+3V3
SCL
PROG
SDA CONTROL-1 CONTROL-2
EEPROM-CS
TEMP-SENSOR
SPI-CLOCK-BUF
PROG
SPI-CLOCK
SDA
CONTROL-2
EEPROM-CS
TEMP-SENSOR
CONTROL-2
CONTROL-1
SPI-DATA-RETURN
SCL
PROG
BLANK
CONTROL-1
SDA
SPI-DATA-IN
SCL
SPI-DATA-RETURN
SPI-LATCH
SPI-DATA-IN
PWM-CLOCK-BUF
PWM-CLOCK
SPI-LATCH
BLANK-BUF
PROG
CONTROL-2
SCL
TEMP-SENSOR
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
EEPROM-CS
TEMP-SENSOR
SPI-LATCH-2
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-LATCH
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
CONTROL-1
UD-MD
SDA
18560_500_090403.eps
090403

8 LED Low-Pow: Microcontroller Block Liteon

EN 76Q548.1E LA 10.
2009-Apr-03
Page 77
Circuit Diagrams and PWB Layouts

8 LED Low-Pow: Microcontroller Block Liteon

EN 77Q548.1E LA 10.
SPI-CS
+3V3
3203
F203
3205
PWM-CLOCK-BUF BLANK-BUF
PROG
SPI-LATCH
SPI-CLOCK-BUF
SPI-DATA-IN SPI-DATA-OUT
SPI-DATA-OUT-FIL
7
10
11
12
9 10111213
+3V3
2214
100n
7214
8
VCC
5
D
(64K)
6
10K
RES
10K
C
1
S
3 11
W
M95010-WDW6
GND
2
Φ
Q
3204
7
HOLD
4
10K
SPI-DATA-RETURN
+3V3
SPI-CLOCK-BUF
SPI-DATA-IN
PWM-CLOCK
SPI-CLOCK
BLANK
SPI-DATA-RETURN
+3V3
33p
2201
33p
2202
33p
2203
1K0
+3V3
1K0
+3V3
1K0
3121
100R
RES
2220
100p
13 19
14
15
169
17
INPUT BUFFER
9208 RES
+3V3
7201-1
14
74HCT125PW
2
F205
3207
1
RES
9209
7201-4
74HCT125PW
12
F206
3209
13
RES
9211
7201-2
74HCT125PW
5
F207
3211
4
RES
9213
7201-3 74HCT125PW
8
EN
9210 RES
EN
9212
EN
9214
3
7
+3V3
14
7
RES
+3V3
14
6
7
RES
+3V3
14
9
F208
10
EN
7
3219
100R
3220
3223
100R
PWM-CLOCK-BUF
100p
22172218
27R
3212
100R
SPI-CLOCK-BUF
100p
BLANK-BUF
100p
2219
SPI-DATA-OUT-FIL
DATA-RETURN-SWITCH
18
20
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7
A
2217 B12 2218 C12 2219 D12 2220 E9
3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3
B
3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8
C
3223 C11 3224 H11
6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7
D
9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10
E
F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9
F
+3V3
+3V3
2216
1u0
7215
TLC5946PWP
25
2210
33p
3217
100R
RES
3218 3215
1K2
1K2
3216
100R
3214
10K
2
6
F204
27
3
4 5 24
33p
2211
2215
100n
28
VCC
Φ
LED DRIVER
PWM CONTROL
GSCLK
BLANK
MODE
IREF
XLAT
SCLK SIN SOUT
XHALF
GND GND_HS
1
29
303132
7
0
8
1
9
2
10
3
11
4
12
5
13
6
14
7
15
OUT
8
16
9
17
10
18
11
19
12
20
13
21
14
22
15
2326
XERR
VIA
33
3222
470R
F210
F211
F212
F213
F214
F215
EEPROM-CS-LOCAL
DATA-RETURN-SWITCH
PWM-R1
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL DATA-RETURN-SWITCH
+3V3
+3V3
3K3
3K3
3224
F209
3221
G
H
1
A
123 45678
32 8
4
5
6
MICROCONTROLLER BLOCK LITEON
A
B
C
B
EEPROM-CS
PDTC144EU
33p
2209
D
PDTC144EU
C
EEPROM-CS-LOCAL
+3V3
3213
7209
3
1
2
7210
3
1
2
10K
F202
7212
PDTC144EU
+3V3
10K
3210
SPI-CS
E E
D
F
G
E
H
F
I
J
G
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
H
L
A
B
C
D
F
G
H
I
J
K
L
I
M
N
123 456
7 8 9 10111213
O
P
12
3
5
6 15
7 8
9
10
6216
SML-310
+3V3
I
M
N
2008-06-10
2008-08-08
??
O
P
A2
090403
11
12
13
14
CLASS_NO
2008-08-08
NAME
Peter Van Hove
SETNAMECHN
DRIVER 6LED LITEON
2
3
SUPERS.
DATECHECK
2K9
16
2008-06-02
C
17 18
8204 000 8857
23
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
194
1
2
3
20
18560_501_090403.eps
2009-Apr-03
Page 78
Circuit Diagrams and PWB Layouts
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
if VLED < 17V
E
123
H
I
3301 F9 3302 F9 3303 F9 3304 G9
3
3308 H9
7
D
9
Place jumper 9314, 9316, 9317
P
R
R
P
5
E
O
3
3314 E12
456
C
4
10
3322 G12
12
H
G
11
3309 I9
G
914
9
10
13
G
B
D
M
3337 D2
F
G
H
456
C
3345 D12
E
17
10 11
19
3305 G9 3306 H9 3307 H9
D
20
12
F
G
2
17
3315 E12 3316 E12 3317 F12
7 8 9
3321 G12
3353 E1
3323 G12
N
3356 E1
B
LED LITEON
8
K
if VLED < 17V
1514
3328 G4 3330 I4 3331 F4 3332 F4
A
J
D
3372 F1
3338 D1 3339 D2 3340 D1
I
A
B
3344 D1
3389 F1
3346 E1
16
7000 C2
F F
8
H
3347 D1
13
I
L
All rights reserved. Reproduction in whole or in parts
3310 D12
13
1
3313 E12
L
3348 E12
3318 F12 3319 F12 3320 F12
3352 E1
9303-3 C10
3354 D13 3355 E1
9304-2 E10
N
J
18
I
O
3364 F13
15
3327 H4
3365 F13 3366 F13 3367 G13
3333 H4
B
C
3336 D2
9310-4 B8
3373 F1 3374 G1 3384 E1
3341 D1 3342 E2 3343 D1
3388 F1
9313-2 B12
3390 G1 3391 G1
9318-4 C8
5
1
K
7307 F4
M
12
B
A
10 18
3311 D12 3312 E12
Place jumper 9325, 9326, 9327
F307 F5
7315 G9 7316 H10
3349 E1 3350 E1 3351 E12
9303-1 C10
F347 G12 F348 G13 F349 G13
9309-4 B6
3357 D13
C
11
E
4
9307 A6
16
3325 G4 3326 H4
63
1
9308 A6 9309-1 B6
3368 G13
3334 F4 3335 D12
3371 F1
9318-3 C8
9311-1 H13 9311-3 H13 9311-4 H12
3385 F1 3386 F1 3387 F1
7
F305 H5
F340 D1
9303-4 C10
7001 C3
6
8
B
RG
9319-1 D9
owner.
12 132
is prohibited without the written consent of the copyright
G
9319-3 D9
20
A
9310-1 B8
9313-4 B12 9314 G5
7317 F9 9301 C1 9302 C1
9316 H5 9317 F5 9318-1 C8
9320-1 D7 9320-2 D7
9312-1 B10
3358 E13 3359 E13
2
3361 E13 3362 E13 3363 F13
F341 D1
11
9320-4 D7 9325 F10 9326 G10 9327 H10
9309-2 B6
3369 F1 3370 F1
9310-2 B8
F304 H5
197
F308 F4 F325 F10 F326 F9
9319-4 D9
9313-1 B12
F302 G5 F303 G4
7004 C8
F327 G10 F328 G9
7002 C4 7003 C6
7005 C11 7305 G4 7306 H5
F329 H10 F330 H10
B
9304-1 E10
F343 D2 F344 D12 F345 D12 F346 D13
F342 D1
9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6
9315-1 C12 9315-2 C12 9315-4 C12
9312-3 B10 9312-4 B10
3360 E13
9306-1 D5 9306-3 D5 9306-4 D5
560R
3359
F349
VLED1-F
9316
3332
10K
9312-11 8
560R
3365
F305
BC847BW
7305
9302
3386
1K5
F304
1K5
3310
F347
390R
3351
3319
1K5
10K
3307
F341F340
1K5
F344
3318
45
1K5
3350
9313-4
560R
3361
3330
10K
560R
3367
3347
1K5
45
3 6
9309-4
3352
9319-3
3355
560R
560R
560R
3371
1K5
3314
2
9309-11 8
16
4
3
7
5
F343
LTW-E500T-PH1
7005
3333
1K0
560R
3368
45
3374
560R
9304-11 8
9304-4
9303-11 8
VLED1-F
3356
1K5
3327
560R
3338
10K
9308
9314
1K0
3302
9317
1K5
3313
9319-445
F346
27
F327
9313-2
BC847BW
7307
36
7306 BC847BW
560R
3373
9318-3
VLED1-F
1K0
3305
560R
3343
3372
560R
F345
9306-336
3306
10K
390R
3345
390R
3348
560R
3369
3317
VLED1-F
F302
3 6
1K5
F307
9312-3
3323
560R
3360
1K5
3
7
25
16
4
F330
LTW-E500T-PH1
7000
3326
10K
560R
3364
1 89305-1
3303
10K
F348
3370
560R
VLED2
1K5
3389
2
3390
1K5
LTW-E500T-PH1
16
4
3
7
5
7003
9325
9307
F342
1 8
1K0
3328
9315-1
390R
3337
9303-445
3 6
1K5
9303-3
3363
3322
560R
3353
1K5
5
1K5
3344
9315-44
9320-2 72
9326
3
7
25
LTW-E500T-PH1
7002
16
4
10K
3301
9301
9310-227
9318-4
45
F308
7316 BC847BW
1K5
3391
9306-4 45
9327
VLED1-F
3 6
9318-1
18
9311-3
8204 000 8857
2K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
3
2
130
3
2
Peter Van Hove
2008-06-10
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-06-02
33
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
3384
1K5
1K5
3385
390R
3335
9320-1 81
560R
3358
F303
VLED1-F
3316
VLED2
1K5
7
3311
1K5
27
9304-22
1 8
9309-2
9310-1
1 8
10K
3304
1 8
9313-1
9319-1
3340
560R
560R
3366
3388
1K5
9311-445
1K0
3334
560R
3346
560R
3357
BC847BW
7317
3309
10K
VLED1-F
3339
390R
9311-11 8
3336
390R
9305-445
54
F325
9320-4
10K
3331
390R
3342
3341
1K5
1K5
3315
560R
3362
BC847BW
7315
3308
1K0
1K5
3321
1K5
3387
560R
9312-445
3354
F328
9305-227
VLED1-F
3320
1K5
3312
3
7
25
1K5
7004
16
4 9315-227
LTW-E500T-PH1
F329
10K
3325
9306-1 18
3349
560R
45
F326
7
25
9310-4
7001
LTW-E500T-PH1
16
4
3
GREEN6GREEN6
PWM-G1
PWM-B1
BLUE6BLUE6
RED6RED6
RED-2
GREEN-2
RED-1
GREEN-1
BLUE-1
PWM-R1
RED-2
BLUE-2
GREEN-2
BLUE-2
PWM-R2
PWM-G2
PWM-B2
18560_502_090403.eps
090403

8 LED Low-Pow: LED Liteon

EN 78Q548.1E LA 10.
2009-Apr-03
Page 79
Circuit Diagrams and PWB Layouts
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
3571 G7
4121
I
NN
98
67
A
3539 E9
3550 E8 3552 F7
3543 E7 3544 E8 3546 E7 3547 E8 3549 F7
8 910
123
M
L
3555 F7 3556 F8
3572 G7 3573 G7 3574 G7 3584 F8
3569 F7 3570 F7
3587 G8 3588 G8
15
P
O
E
F
G
1M3A E2 1M85 D2
3536 E9
8
B
F
O
P
11 12
G
C
D
I
3540 E7 3541 E8
18
567
All rights reserved. Reproduction in whole or in parts
E
4
3589 G8
G
H
2
8 201954
1413
3585 F8
13
LED DRIVE
B
C
D
3
3537 E9
9
11
A
L
10
K
H
18 19
B
F
4 20
3542 E9
3 4
is prohibited without the written consent of the copyright
J
owner.
K
3590 G8 3591 G8
17
6
D
5
17
10
1
9103
E
15 16
3586 F8
16
3553 F8
G
A
C
D
E
F
A
3538 E7
C
B
76
M
12
7006 A5 7007 A7
75
J
12
1K5
3
2
130
3550
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-04-20
11
SETNAMECHN
CLASS_NO
1
SUPERS.
1
NAME
DATECHECK
8204 000 8874
2K9
2LED + CONNECTOR
A2
2008-08-08
2008-05-23
0
2008-08-08
3
2
2008-10-31
Peter Van Hove
2008-05-23
560R
3572
3571
560R
1K5
3586
3537
VLED1
390R
1K5
3547
+3V3
16
4
3
7
5
2
3589
1K5
LTW-E500T-PH1
7006
3544
1K5
3553
560R
3555
1K5
VLED2
7
5
2
+3V3
7007
LTW-E500T-PH1
16
4
3
390R
3539
560R
3573
3585
1K5
3543
560R
VLED2
1X04
REF EMC HOLE
3569
560R
1K5
3584
VLED1
560R
3570
560R
3546
15 16
12 13 14
2
3
4 5 6 7
8
9
1
10 11
1M3A
15 16
12 13 14
2
3
4 5 6 7
8
9
1M85
1
10 11
3591
1K5
560R
3549
3552
560R
1K5
3588
3542
390R
3536
390R
3587
1K5
3556
1K5
560R
3574
3540
3538
560R
560R
3541
1K5
1K5
3590
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
GREEN-2
RED-2
BLUE-2
SPI-CLOCK-BUF
PROG
SPI-DATA-OUT
RED-1
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
GREEN-1
BLUE-1
18560_503_090403.eps
090403

8 LED Low-Pow: LED Drive Liteon

EN 79Q548.1E LA 10.
2009-Apr-03
Page 80

Layout 8 LED Low-Pow

31043136314.3
18490_550_090326.eps
090326
1101
1105
1M83 1M841M85
1X03
2101
2102
2103
2104
2105
2106
2107
2108
21092110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
21282129
2130
2131
2201
2202
2203
2209
2210
2211
2214
2215
2216
2217
2218
2219
2220
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3123
3124
3125
3126
3127
3128 3129
3130
3131
3132 3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3203
3204
3205
3207
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3325
3326
3327
3328
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3384
3385
3386 3387 3388
3389 3390 3391
3536
3537
3538
3539
3540
3541
3542
3543
3544
3546
3547
3549
3550
3552
3553
3555
3556
3569
3570
3571
3572
3573
3574
3584
3585
3586
3587
3588
3589
3590
3591
6216
7000
7001
7002
7003
7004
7005
7006
7007
7101
7102
7110
7116
7201
7209
7210
7212
7214
7215
7305
7306
7307
7315
7316
7317
9101
9102
9103
9104
9106
9107
9108
9109
9110
9111
9112
9113
9114
9119
9121
9208
9209
9210
9211
9212
9213
9214
9301
9302
9303
9304
9305
9306
9307
9308
9309
9310
9311
9312
9313
9314
9315
9316
9317
9318
9319
9320
9325
9326
9327
C140
I110
I111
I113
I114
I115
1X04
1M1A1M2A1M3A
F101
F102
F103
F104
F105
F106
F107 F108
F109
F112
F116
F117
F118
F120
F121
F122
F123
F124
F125
F126
F127
F128
F129
F130
F131
F132
F133
F134
F135
F136
F137
F138
F139
F202 F203
F204
F205
F206
F207
F208
F209
F210
F211
F212
F213
F214
F215
F302
F303
F304
F305
F307
F308
F325
F326
F327
F328
F329
F330
F340
F341
F342
F343
F344
F345
F346
F347F348 F349
I124
I125
I126
Circuit Diagrams and PWB Layouts
EN 80Q548.1E LA 10.
2009-Apr-03
Page 81
Circuit Diagrams and PWB Layouts
-T
OUTIN
INH BP
COM
X2
RTXC1 RTXC2
RTCK
VBAT
DBGSEL
RST
VSS
VSSA
VDDA
VDD_3V3
VDD_1V8
X1
C
NC
GND
RST
IN
CD
C
E
F
G
H
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11
17
F
J
M
A
2
C
4
E
6
G
8
A
10 11 12 13
123 45678 9 10111213
14
D
OUT
B
7
D
6
F
H
B
D
2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3
11
M
2
1
20
3
19
975
2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10
3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9
7
J
18
3103-2 G10
B
3103-4 G10
10
3104-2 E8
3104-4 D9
3105-2 D8
2108 B12
3105-4 D8 3106-1 E8 3106-2 D8
G
14
G
E
119
13
20
K
18
N
P
L
3107 C7
3109 D7
A
3111 B10
4
3113 D8 3114 E8 3115 E8
19
I
H
15
O
P
I
3116 E8 3117 E7 3118 E5 3119 F4
3123 C11
3103-3 G11
3124-2 E11
3104-1 D8
3124-4 E11
3104-3 E8
3125-2 F11
3105-1 E9
3126-1 F11
3105-3 E8
3126-4 F11 3127-1 F11 3127-4 F11
owner.
17
C
1
is prohibited without the written consent of the copyright
5
C
1
3128 E11 3129 E11 3130 G8
3132 H8
3134 A13
3106-3 E8
3136 A12
3108 C7
3138 B13
3110 D7
3140 C11
3112 D9
3142 F11
7101 A7 7102 E6
All rights reserved. Reproduction in whole or in parts
H
103
4
N
MICROCONTROLLER BLOCK LITEON
5
7110 F4 7116-1 B11
7116-2 A12 9101 E5 9102 F5
3120 F5
9104 F5
3124-1 E11
9107 A5
3124-3 E11
9109 A5
3125-1 F11
9111 A3
3125-4 F11
9113 B3
3126-2 F11
9119 H6 9121 G4 C140 B10
8 9
12
F
12
16
A
13
F101 A8 F102 F5 F103 H7
3131 G7
F105 D7
3133 H8
F107 C7
3135 A11
F109 G3
3137 B11
F116 A10
3139 B12
F118 C11
3141 C13
F121 A1 F122 A1 F123 A1
8
IN
6
3
O
D
E
15
F124 B1 F125 B1 F126 B1
9103 F5
F128 B1
9106 H8
F130 B1
9108 A5
F132 B1
9110 B5
F134 F1
9112 B2
F136 F1
9114 B2
F138 F1 F139 F1 I110 G8
L
K
2
B
16
I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11
F104 F5
I126 F11
F106 B12
F127 B1
F108 D7
F129 B1
F112 G8
F131 B1
F117 B13
F133 E1
F120 A1
F135 E1
F124
F137 F1
VLED1
F134
100n
2120
I124
3 6
VLED2
10K
3101-3
F107
9112
10K
3103-336
9109
+3V3
F139
1K5
3135
1%
10K
3103-445
3136
1%1K5
F109
9108
9101
9107
F130
+3V3
9104
+3V3
2109
100p
RES
3129
100R
5 6 7
8
9
15 16
VLED1-F
1
10 11 12 13 14
2
3
4
3 6
1M84
3124-3
100R
RES
10K
3141
+3V3
1 83124-1
100R
10K
3112
RES
9113
VLED1
F120
3127-4 4 5
+3V3
15 16
100R
13 14
2
3
4 5 6 7
8
9
1M2A
1
10 11 12
3107
10K
RES
2106
10n
F129
+3V3
F106
100p
2118
VLED2
10K
3113
RES
3
5
RES
7101
LD2985BM18R
4
2
1
3110
100R
3116
10K
3133
I110
RES
10K
F103
9106
10K
3106-33 6
+1V8
+3V3
10K
3111
VLED2
3103-1
1
8
I126
10K
RES 9103
F104
+3V3
+3V3
I111
F133
5
9114
3125-4
100R
4
F112
100p
3105-1
10K
1 8
2117
12
+3V3
4
42
5
17
40
7
19
43
31
11
23
P0.5|MISO0|MAT0.1
24
P0.6|MOSI0|CAP0.2
28
P0.7|SSEL0|MAT2.0
29
P0.8|TXD1|MAT2.1
30
P0.9|RXD1|MAT2.2
6
26
20 25
8
P0.27|TRST|CAP2.0
9
P0.28|TMS|CAP2.1
10
P0.29|TCK|CAP2.2
18
P0.2|SCL0|CAP0.0
15
P0.30|TDI|MAT3.3
16
P0.31|TDO
21
P0.3|SDA0|MAT0.0
22
P0.4|SCK0|CAP0.1
14
P0.1|RXD0|MAT3.2
2
P0.20|MAT1.3|MOSI1
3
P0.21|SSEL1|MAT3.0
32
P0.22|AD0.0
33
P0.23|AD0.1
34
P0.24|AD0.2
38
P0.25|AD0.6
39
P0.26|AD0.7
41
P0.13|DTR1|MAT1.1
44
P0.14|DCD1|SCK1|EINT1
45
P0.15|RI1|EINT2
46
P0.16|EINT0|MAT0.2
47
P0.17|CAP1.2|SCL1
48
P0.18|CAP1.3|SDA1
1
P0.19|MAT1.2|MISO1
27
13
P0.0|TXD0|MAT3.1
35
P0.10|RTS1|CAP1.0|AD0.3
36
P0.11|CTS1|CAP1.1|AD0.4
37
P0.12|DSR1|MAT1.0|AD0.5
27
MICRO-
CTRL
Φ
LPC2103FBD48
7102
3 6
3104-2
10K
10K
3104-3
2
3
4 5 6 7
8
9
15 16
1
10 11 12 13 14
1M1A
35V10u
2128
2124
I113
RES
100p
10K
F116
3119
100n
2107
T1.5A
1105
F135
9110
33p
2125
1 8
3
2
130
3126-1
100R
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-06-02
13
SETNAMECHN
CLASS_NO
SUPERS.
1
NAME
DATECHECK
8204 000 8857
2K9
DRIVER 6LED LITEON
A2
2008-08-08
??
2008-08-08
10K
72
3
2
Peter Van Hove
2008-06-10
3101-2
100K
RES
3134
+1V8
3 6
F122
10K
3105-3
10K
3102-4 4 5
7116-1 LM393PT
3
2
1
84
10n
2108
100R
3109
10K
100p
2110
1 8
3117
10K
3106-1
100n
2111
VLED2
3108
10K
3114
10K
RES
RES
3118
10K
F127
+3V3
VLED1
F121
100n
2113
3103-2
10K
2
7
10K
3 63102-3
RES
3137
10K
F126
F131
9102
3124-2 2 7
1 8
100R
+3V3
3102-1
10K
I125
1u0
2130
F101
9119
3130
22R
C140
10K
3101-4
45
+3V3
F105
27
100p
2116
10K
3106-2
3120
10K
2121
100n
F137
1101
16M9
3125-1 1 8
100R
F108
8
9
15 16
100p
2115
12 13 14
2
3
4 5 6 7
1M83
1
10 11
F138
45
F102
345
10K
3105-4
1X03
REF EMC HOLE
1
2
F123
2123
100p
1u0
2101
2105
10n
100R
3128
1u0
2127
27
VLED1
3125-2
100R
3138
RES
100p
2122
47K
45
RES
100R
3126-4
3142
100R
1 8
4
1
3104-1
10K
NCP303LSN10T1
7110
5
3
2
F128
F136
RES
F132
1%1K5
3140
2102
100n
RES2114
100p
27
3115
10K
3126-2
100R
4
VLED1
+3V3
7116-2 LM393PT
5
6
7
8
F125
10K
3104-4 4 5
+3V3
I114
F118
35V
2129
10u
1 8
10K
3132
3127-1
100R
RES
1K8 1%
3123
1K5 1%
27
3139
10K
3102-2
2119
100n
9111 RES
2112
100n
273105-2
10K
2126
100p
4u7
2103
+3V3
+3V3
10n
2104
100p
2131
100R
3131
F117
9121
I115
RES
3124-4
100R
45
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
+3V3
SCL
PROG
SDA CONTROL-1 CONTROL-2
EEPROM-CS
TEMP-SENSOR
SPI-CLOCK-BUF
PROG
SPI-CLOCK
SDA
CONTROL-2
EEPROM-CS
TEMP-SENSOR
CONTROL-2
CONTROL-1
SPI-DATA-RETURN
SCL
PROG
BLANK
CONTROL-1
SDA
SPI-DATA-IN
SCL
SPI-DATA-RETURN
SPI-LATCH
SPI-DATA-IN
PWM-CLOCK-BUF
PWM-CLOCK
SPI-LATCH
BLANK-BUF
PROG
CONTROL-2
SCL
TEMP-SENSOR
SPI-DATA-OUT
PWM-CLOCK-BUF
SPI-CLOCK-BUF
EEPROM-CS
TEMP-SENSOR
SPI-LATCH-2
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-LATCH
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
CONTROL-1
UD-MD
SDA

10 LED Low-Pow: Microcontroller Block Liteon

EN 81Q548.1E LA 10.
2009-Apr-03
Page 82
Circuit Diagrams and PWB Layouts

10 LED Low-Pow: Microcontroller Block Liteon

EN 82Q548.1E LA 10.
SPI-CS
+3V3
3203
F203
3205
PWM-CLOCK-BUF BLANK-BUF
PROG
SPI-LATCH
SPI-CLOCK-BUF
SPI-DATA-IN SPI-DATA-OUT
SPI-DATA-OUT-FIL
7
+3V3
2214
100n
7214
8
VCC
5
D
(64K)
6
10K
RES
10K
C
1
S
3 11
W
M95010-WDW6
GND
2
Φ
Q
3204
7
HOLD
4
10K
10
SPI-DATA-IN
SPI-DATA-RETURN
+3V3
SPI-CLOCK-BUF
11
PWM-CLOCK
SPI-CLOCK
BLANK
SPI-DATA-RETURN
12
910111213
+3V3
33p
2201
33p
2202
33p
2203
1K0
+3V3
1K0
+3V3
1K0
3121
100R
RES
2220
100p
13 19
14
15
169
17
INPUT BUFFER
9208 RES
+3V3
7201-1
2
F205
1
7201-4
74HCT125PW
12
F206
13
7201-2
5
F207
4
7201-3 74HCT125PW
8
EN
9210 RES
EN
9212
EN
9214
14
3
7
+3V3
14
7
RES
+3V3
14
6
7
RES
+3V3
14
9
F208
10
EN
7
3219
100R
3220
3223
100R
PWM-CLOCK-BUF
100p
22172218
27R
3212
100R
SPI-CLOCK-BUF
100p
BLANK-BUF
100p
2219
SPI-DATA-OUT-FIL
DATA-RETURN-SWITCH
74HCT125PW
3207
RES
9209
3209
RES
9211
74HCT125PW
3211
RES
9213
18
20
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7
A
2217 B12 2218 C12 2219 D12 2220 E9
3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3
B
3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8
C
3223 C11 3224 H11
6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7
D
9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10
E
F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9
F
+3V3
+3V3
2216
1u0
7215
TLC5946PWP
2210
33p
3217
100R
RES
3218 3215
1K2
1K2
3216
100R
3214
10K
25
2
6
F204
27
3
4 5 24
33p
2211
28
VCC
Φ
LED DRIVER
PWM CONTROL
GSCLK
BLANK
MODE
IREF
XLAT
SCLK SIN SOUT
XHALF
GND GND_HS
1
29
2215
100n
7
0
8
1
9
2
10
3
11
4
12
5
13
6
14
7
15
OUT
8
16
9
17
10
18
11
19
12
20
13
21
14
22
15
2326
XERR
VIA
30
313233
3222
470R
F210
F211
F212
F213
F214
F215
EEPROM-CS-LOCAL
DATA-RETURN-SWITCH
PWM-R1
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL DATA-RETURN-SWITCH
+3V3
+3V3
3K3
3K3
3224
F209
3221
G
H
1
A
123 45678
32 8
4
5
6
MICROCONTROLLER BLOCK LITEON
A
B
C
B
EEPROM-CS
PDTC144EU
1
33p
2209
D
PDTC144EU
C
EEPROM-CS-LOCAL
1
+3V3
3213
7209
3
2
7210
3
2
10K
F202
7212
PDTC144EU
+3V3
10K
3210
SPI-CS
E E
D
F
G
E
H
F
I
J
G
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
H
L
A
B
C
D
F
G
H
I
J
K
L
I
M
N
123 456
7 8 9 10111213
O
P
12
3
5
6 15
7 8
9
10
6216
SML-310
+3V3
I
M
N
2008-06-10
2008-08-08
??
O
P
A2
090306
11
12
13
14
CLASS_NO
2008-08-08
NAME
Peter Van Hove
SETNAMECHN
DRIVER 6LED LITEON
2
3
SUPERS.
DATECHECK
2K9
2008-06-02
16
C
17 18
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3
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2009-Apr-03
Page 83
Circuit Diagrams and PWB Layouts

10 LED Low-Pow: LED Liteon

EN 83Q548.1E LA 10.
1
A
123
3
4
5
LED LITEON
B
A
C
B
VLED1-F
VLED2
D
9301
9302
C
E
F341F340
F342
LTW-E500T-PH1
4
GREEN
RED
BLUE
F343
7000
GND_HS
3
25
16
7
LTW-E500T-PH1
4
GREEN
RED
BLUE
7001
GND_HS
7
F F
D
G
H
I
J
G
3338
560R
3340
560R
3343
560R
3346
560R
3349
E
560R
3352
560R
3355
560R
3369
560R
3370
560R
3371
F
560R
3372
560R
3373
560R
3374
560R
3341
1K5
3344
1K5
3347
1K5
3350
1K5
3353
1K5
3356
1K5
3384
1K5
3385
1K5
3386
1K5
3387
1K5
3388
1K5
3389
1K5
3390
1K5
3391
1K5
3336
390R 3337
390R 3339
390R 3342
390R
VLED1-F
PWM-B1
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
L
M
H
I
PWM-R1
PWM-G1
N
6
8
456
VLED2
VLED1-F
9307
9309-2
9309-11 8
7002
LTW-E500T-PH1
4
3
GREEN
RED
25
16
BLUE
7307
10K
10K
VLED1-F
3327
3330
BC847BW
F308
3334
1K0
F303
3328
1K0
10K
3333
1K0
10K
10K
3331
10K
3332
VLED1-F
3325
3326
GND_HS
7
7305 BC847BW
F305
7306 BC847BW
3
25
16
9306-4 45
9306-1 18
F307
9317
F302
9314
F304
9316
27
9305-227
9305-445
1 89305-1
9306-336
Place jumper 9314, 9316, 9317
if VLED < 17V
15
3
2
16
7
Place jumper 9325, 9326, 9327
G
if VLED < 17V
R
9315-44
1 8
9315-1
B
3335
390R 3345
390R 3348
390R 3351
390R
16
12
5
9313-4
9313-2
9313-1
45
27
1 8
G
R
B
F344
B
RG
3310
1K5
3311
1K5
3312
1K5
3313
1K5
3314
1K5
3315
1K5 3316
1K5 3317
1K5 3318
1K5 3319
1K5 3320
1K5 3321
1K5 3322
1K5 3323
1K5
F347
17
F346
F345
F348
9311-3
9311-445
9311-11 8
3 6
13
3354
560R
3357
560R
3358
560R
3359
560R
3360
560R
3361
560R
3362
560R
3363
560R
3364
560R
3365
560R
3366
560R
3367
560R
3368
560R
RED-1
GREEN-1
BLUE-1
F349
GREEN-2
RED-2
BLUE-2
9310-4
9310-227
45
36
18
45
PWM-B2
PWM-R2
PWM-G2
11
8
9310-1
1 8
LTW-E500T-PH1
4 9315-227
914
10
7
9308
9309-4
45
7003
LTW-E500T-PH1
4
GREEN
RED
5
BLUE
GND_HS
3
2
16
7
9318-3
9318-1
9318-4
54
9320-2 72
9320-1 81
9320-4
GREEN
RED
BLUE
7004
GND_HS
7
VLED1-F
3301
3303
12 132
GREEN6GREEN6
10K
10K
VLED1-F
RED6RED6
BLUE6BLUE6
3304
3306
3
25
16
10K
10K
VLED1-F
3307
3309
9
9319-3
9319-445
9319-1
3 6
1 8
7317 BC847BW
F326
3302
1K0
F328
3305
1K0
10K
3308
1K0
10K
3 6
9303-3
9303-445
9303-11 8
9304-22
9304-11 8
45
9304-4
F325
7315 BC847BW
7316 BC847BW
F330
10 11
9312-11 8
9312-445
9312-3
3 6
7
9325
F327
F329
9326
9327
LTW-E500T-PH1
4
GREEN
RED
5
BLUE
BLUE-2
RED-2
GREEN-2
7005
GND_HS
18
A
B
C
D
E
F
G
H
I
197
3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1
7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8
9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13
20
A
B
C
D
E
G
H
I
J
K
L
M
N
1
2
3
O
P
1
2
4
5
456
63
7
8
9
7 8 9
10
11
CLASS_NO
12
SETNAMECHN
13
DRIVER 6LED LITEON
2
2008-08-08
3
Peter Van Hove
NAME
10 18
11
12
13
1514
SUPERS.
DATECHECK
16
2K9
2008-06-02
17
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O
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1
2008-08-08
2
??
3
P
33
A2
20
18310_632_090306.eps
090306
2009-Apr-03
Page 84
Circuit Diagrams and PWB Layouts

10 LED Low-Pow: LED Drive Liteon

EN 84Q548.1E LA 10.
A
B
C
D
E
F
G
H
J
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
L
1
45
6
7
8 20
9
10
11
12
13
142 3
15
17
18 1916
A
1
2 3 456
7
8
9
10
LED DRIVE
A
7006
GREEN
RED
BLUE
GND_HS
2
3
7
2
LTW-E500T-PH1
GREEN-1
RED-1
B
BLUE-1
4
5
LTW-E500T-PH1
4
GREEN
RED
5
BLUE
7007
GND_HS
7
3
16
2
LTW-E500T-PH1
4
GREEN
RED
5
BLUE
7008
GND_HS
7009
LTW-E500T-PH1
4
3
1616
7
2
GREEN
RED
5
BLUE
GND_HS
7
3
16
C
1M85
1 2
3
4 5
D
E
I
F
6 7
8
9 10 11 12 13 14
15 16
1M3A
1
2
3
4
5
6
7
8
9 10 11 12 13 14
15 16
+3V3
VLED1
VLED2
+3V3
VLED1
VLED2
G
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
3538
560R
3540
560R
3543
560R
3
560R
3549
560R
3552
560R
3555
560R
3569
560R
3570
560R
3571
560R
3572
560R
3573
560R
3574
560R
GREEN-2
RED-2
BLUE-2
3541
1K5 3544
1K5 3547
1K5
546
3550
1K5 3553
1K5 3556
1K5 3584
1K5 3585
1K5 3586
1K5 3587
1K5 3588
1K5 3589
1K5 3590
1K5 3591
1K5
390R
390R
390R
390R
3536
3537
3539
3542
1M3A E2 1M85 D2
3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7
A
3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8
B
3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8
7006 A2 7007 A4 7008 A5 7009 A6
C
B
C
D
E
F
G
D
H
E
I
F
J
K
G
L
M
12
O
P
12 14
3
4
5
1X04
REF EMC HOLE
3
4
67
5678 910
CLASS_NO
2008-08-14
2008-10-3123
Peter Van Hove
NAME
8 1211
9
10
13 19
15
EMANTESNHC
4 LED + CONNECTOR
LITEON 2K9
SUPERS.
CHECK DATE
2008-07-29
16
1
232008-10-24
8204 000 8897
11
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
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130
20
18310_633_090306.eps
M
NN
O
2008-08-14
2008-10-31
P
A2
090306
2009-Apr-03
Page 85

Layout 10 LED Low-Pow

1M83 1M841M85
1X03
3342 3339
3337
7000
3336
9110
9114
2130
9107
2202
9302
3338
3374
3385
3389
3340
3369
3384
3390
3121
3391
3356
3343
3373
3346
3372
3386
3350
3212
9214
3347
3371
3387
3349
3370
3388
3352
3344
3220
2218
9210
3355
7201
3353
3341
3209
9301
9211
9108
2220
Circuit Diagrams and PWB Layouts
3107
3108
3109
21092110
I113
3103
I115
3124
3130
2120
2123
2131
3142
7002
9103
9101
3118
3101
9104
3128 3129
3132 3133
I110
1101
I111
I114
7102
3102
2114
3110
2119
9109
9111
9112
9113
2125
3221
3224
3216
2211
6216
3222
2203
1105
9212
3211
9208
3219
3207
2217
9213
9209
3223
2219
2201
2216
3214
2215
7001
3215
3218
7215
2210
3328
3325
3326
3217
9316
9314
7305
21282129
2101
2102
2103
7101
2104
3331
3332
3334
9308 9307
9317
3333
3327
3330
7307
7306
9309
9305
9306
3120 3119
9121
3127
3106
9102
3113
3114
3117
7110
2111
2117 2116
3115
3131
3126
2126
9106
2112 3116 9119
2113
2124 2121
3104
2122
3105
3125
2115
2118
3112
2209
7209
7210
3213
7212
2214
3204
3210
7214
7003
3203
3205
3136
3138
3139
2106
2108
2107
3134 3141
9318
9320
C140
3111
2105
3137
3135
3140
3123
7116
9310
EN 85Q548.1E LA 10.
3305
3306
9326
7315
7004
9313
3363
3364
3365
3366
3367
3368
3354
3357
3358
3359
3360
3361
3310
3311
3312
3313
3315
3318
3321
3322
3323
7005
3362
3351
3345
3348
3335
1X04
3555
3569
3570
3571
3572
3573
3574
3586
3587
3588
3589
3590
3591
3553
3538
3540
3543
3546
3549
9311
7006
7007
3552
7008
3541
3544
3547
3550
3556
3584
3585
3537
3539
3536
7009
3542
9315
3316
3317
3314
3319
3320
2127
3301
3302
3303
3304
3307
3308
3309
9325
9327
7316
7317
9312
9303
9304
9319
3104 313 6315.2
F347F348 F349
F135
F346
F345
F344
F326
F330
F325
F329
F215
F214
F116
F213
F328
F327
F106
F118
F209
F202 F203
F133
F136
I126
F107 F108
F105
F104
F109
F134
I125
F112
F117
I124
F137
F103
F102
F132
F130
F212
F101
F210
F308
F305
F211
F303
F307
F304
F204
F302
F123
F127
F139
F126
1M1A1M2A1M3A
F131
F138
F207
F208
F125
F205
F120
F122
F128
F121
F206
F342
F124
F340
F343
F341
18310_553_090309
090309
F129
2009-Apr-03
Page 86
Circuit Diagrams and PWB Layouts

12 LED Low-Pow: Microcontroller Block Liteon

EN 86Q548.1E LA 10.
A
B
C
D
E
F
G
H
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
L
M
N
1
2
3
1
4
2
5
3
6
7
4
8 9
6
10
11
8
12
975
13
14
10 11 12 13
15
MICROCONTROLLER BLOCK LITEON
A
B
C
IN
1M83
F120
1
F121
2
F122
3
F123
4
F124
5
F125
6
F126
7
F127
8
F128
9
F129
10
F130
11
F131
12
F132
13 14
15 16
1M1A
1 2
3
4 5 6 7
8
9 10 11 12 13 14
15 16
1u0
2127
+3V3
VLED1
VLED2
35V
35V10u
2129
2128
10u
+3V3
VLED1
VLED2
9111
RES
9113
RES
9112
9114
TEMP-SENSOR
33p
2125
TEMP-SENSOR
SPI-DATA-IN
CONTROL-1 CONTROL-2
BLANK
EEPROM-CS
PROG
CONTROL-1 CONTROL-2
EEPROM-CS
PROG
SCL
SDA
SCL
SDA
SCL SPI-DATA-RETURN
CONTROL-1 CONTROL-2
VLED1
9107 9108
9109 9110
1105
T1.5A
SPI-CLOCK
SDA
SPI-LATCH
PWM-CLOCK
+3V3
VLED1-F
D
7102
LPC2103FBD48
E
OUT
1M84
F133
1
F135
2
F136
3
F139
4
F137
I
F
J
G
H
5
6
F138
7
F134
8
9 10 11 12 13 14
15 16
1M2A
1
2
3
4
5
6
7
8
9 10 11 12 13 14
15 16
VLED1
VLED2
+3V3
VLED1
VLED2
+3V3
1u0
2130
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
+3V3
10K
3119
F109
2
3
RES
5
9121
100n
2111
1101
7110
NCP303LSN10T1
IN
RST
GND
NC
CD
+3V3
16M9
9101
3118
RES
10K
9102
RES 9103
9104
RES
F104
+3V3
10K
3120
1
4
71943
VSS
11
X1
MICRO-
12
CTRL
X2
20
RTXC1
25
RTXC2
26
RTCK
4
VBAT
F102
27
DBGSEL
6
RST
VDD_1V8
5
+3V3
+1V8
2119
100n
VSSA
Φ
P0.0|TXD0|MAT3.1
P0.1|RXD0|MAT3.2
P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0
P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0
P0.8|TXD1|MAT2.1
P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5
P0.13|DTR1|MAT1.1
P0.14|DCD1|SCK1|EINT1
P0.15|RI1|EINT2
P0.16|EINT0|MAT0.2
P0.17|CAP1.2|SCL1
P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0
P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7
P0.27|TRST|CAP2.0
P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2
P0.30|TDI|MAT3.3
P0.31|TDO
VDD_3V3
VDDA
17
40
9119
100n
2120
2121
100n
7101
LD2985BM18R
1
OUTIN
3
INH BP
1u0
2101
COM
2
+3V3
+3V3
10K
3107
3108
F107
F105
F108
3109
3110
100R
2109
100p
31
13 14 18 21 22 23 24 28 29
30 35 36 37
41 44 45 46 47 48
1 2
3 32 33 34 38 39
UD-MD
8
9 10 15 16
42
F103
100n
2113
5
4
10K
100R
2110
2112
2104
100p
3117
100n
F101
2102
10n
72
10K
3101-2
10K
27
3116
3104-2
10K
3130
22R
F112
3131
100R
100n
10K
9106
2103
10K
273105-2
10K
3 6
3 6
3104-3
3105-3
RES
+1V8
4u7
10K
10K
27
45
RES
3106-2
3105-4
3113
10K
10K
10K
1 8
3106-33 6
3106-1
I110
RES
10K
100p
2118
3133
+3V3
3104-4 4 5
10K
1 8
3105-1
100p
10K
3112
10K
2115
10K
10K
27
3 6
3101-3
3102-2
10K
3 63102-3
45
3101-4
100p
100p
2116
10K
3102-4 4 5
10K
8
10K
1
3103-1
RES
RES
100p
100p
2122
2117
2123
100p
2124
I113 I114 I115
2126
100p
3103-445
3103-2
10K
10K
1 8
1 8
10K
3102-1
3104-1
10K
10K
RES
3115
3114
RES2114
I111
10K
3132
+3V3
1%
3135
1K5
F116
RES
10K
10n
2105
C140
100p
2
-T
2131
3137
+3V3
3140
3123
3124-4
3128 3129
3124-2 2 7 3124-3
3125-1 1 8
3142 3125-2 3125-4 3126-2 3126-4
3126-1
3127-1 3127-4 4 5
100p
10K
7
10K
10K
1%1K5
RES
F118
RES
1K8 1%
45
1 83124-1
3 6
27 4 27 45
1 8
1 8
3103-336
7116-1 LM393PT
3
2
100R 100R 100R 100R 100R 100R 100R 100R
5
100R 100R
100R 100R
100R
100R 100R
+3V3
84
I124
I125
I126
10K
3111
100n
2107
1
PWM-CLOCK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
TEMP-SENSOR
+3V3
16
+3V3
10n
2108
CONTROL-1
SPI-DATA-IN
SPI-LATCH
SPI-LATCH-2
EEPROM-CS
BLANK-BUF
PROG
CONTROL-2
3136
3139
SCL SDA
1%1K5
F106
1K5 1%
100K
7116-2 LM393PT
5
6
TEMP-SENSOR
7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11
20
A
B
C
D
E
F
G
H
I
J
K
L
M
17
3134
RES
+3V3
8
7
4
F117
2106
RES
10n
3138
47K
RES
3141
10K
RES
18
19
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11
A
2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6
B
2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10
C
3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10
D
3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7
E
3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4
F
3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11
G
3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12
H
3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11
7101 A7 7102 E6 7110 F4 7116-1 B11
123 45678 910111213
N
1X03
REF EMC HOLE
2008-06-10
2008-08-08
??
O
P
A2
090403
O
345
1
2
P
1
2
4
5
6
7
8
103
119
12
13
14
CLASS_NO
2008-08-08
NAME
Peter Van Hove
2
3
15
SETNAMECHN
DRIVER 6LED LITEON
2K9
SUPERS.
DATECHECK
2008-06-02
16
17
8204 000 8857
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
130
19
1
2
3
13
20
18560_510_090403.eps
2009-Apr-03
Page 87
Circuit Diagrams and PWB Layouts

12 LED Low-Pow: Microcontroller Block Liteon

EN 87Q548.1E LA 10.
SPI-CS
+3V3
3203
F203
3205
PWM-CLOCK-BUF BLANK-BUF
PROG
SPI-LATCH
SPI-CLOCK-BUF
SPI-DATA-IN SPI-DATA-OUT
SPI-DATA-OUT-FIL
7
10
11
12
9 10111213
+3V3
2214
100n
7214
8
VCC
5
D
(64K)
6
10K
RES
10K
C
1
S
3 11
W
M95010-WDW6
GND
2
Φ
Q
3204
7
HOLD
4
10K
SPI-DATA-RETURN
+3V3
SPI-CLOCK-BUF
SPI-DATA-IN
PWM-CLOCK
SPI-CLOCK
BLANK
SPI-DATA-RETURN
+3V3
33p
2201
33p
2202
33p
2203
1K0
+3V3
1K0
+3V3
1K0
3121
100R
RES
2220
100p
13 19
14
15
169
17
INPUT BUFFER
9208 RES
+3V3
7201-1
14
74HCT125PW
2
F205
3207
1
RES
9209
7201-4
74HCT125PW
12
F206
3209
13
RES
9211
7201-2
74HCT125PW
5
F207
3211
4
RES
9213
7201-3 74HCT125PW
8
EN
9210 RES
EN
9212
EN
9214
3
7
+3V3
14
7
RES
+3V3
14
6
7
RES
+3V3
14
9
F208
10
EN
7
3219
100R
3220
3223
100R
PWM-CLOCK-BUF
100p
22172218
27R
3212
100R
SPI-CLOCK-BUF
100p
BLANK-BUF
100p
2219
SPI-DATA-OUT-FIL
DATA-RETURN-SWITCH
18
20
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7
A
2217 B12 2218 C12 2219 D12 2220 E9
3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3
B
3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8
C
3223 C11 3224 H11
6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7
D
9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10
E
F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9
F
+3V3
+3V3
2216
1u0
7215
TLC5946PWP
25
2210
33p
3217
100R
RES
3218 3215
1K2
1K2
3216
100R
3214
10K
2
6
F204
27
3
4 5 24
33p
2211
2215
100n
28
VCC
Φ
LED DRIVER
PWM CONTROL
GSCLK
BLANK
MODE
IREF
XLAT
SCLK SIN SOUT
XHALF
GND GND_HS
1
29
303132
7
0
8
1
9
2
10
3
11
4
12
5
13
6
14
7
15
OUT
8
16
9
17
10
18
11
19
12
20
13
21
14
22
15
2326
XERR
VIA
33
3222
470R
F210
F211
F212
F213
F214
F215
EEPROM-CS-LOCAL
DATA-RETURN-SWITCH
PWM-R1
PWM-G1
PWM-B1
PWM-R2
PWM-G2
PWM-B2
EEPROM-CS-LOCAL DATA-RETURN-SWITCH
+3V3
+3V3
3K3
3K3
3224
F209
3221
G
H
1
A
123 45678
32 8
4
5
6
MICROCONTROLLER BLOCK LITEON
A
B
C
B
EEPROM-CS
PDTC144EU
33p
2209
D
PDTC144EU
C
EEPROM-CS-LOCAL
+3V3
3213
7209
3
1
2
7210
3
1
2
10K
F202
7212
PDTC144EU
+3V3
10K
3210
SPI-CS
E E
D
F
G
E
H
F
I
J
G
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
H
L
A
B
C
D
F
G
H
I
J
K
L
I
M
N
123 456
7 8 9 10111213
O
P
12
3
5
6 15
7 8
9
10
6216
SML-310
+3V3
I
M
N
2008-06-10
2008-08-08
??
O
P
A2
090403
11
12
13
14
CLASS_NO
2008-08-08
NAME
Peter Van Hove
SETNAMECHN
DRIVER 6LED LITEON
2
3
SUPERS.
DATECHECK
16
2K9
2008-06-02
C
17 18
8204 000 8857
23
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
194
1
2
3
20
18560_511_090403.eps
2009-Apr-03
Page 88
Circuit Diagrams and PWB Layouts

12 LED Low-Pow: LED Liteon

EN 88Q548.1E LA 10.
1
A
123
3
4
5
6
8
914
456
10
7
LED LITEON
B
A
VLED1-F
9307
VLED2
9308
C
B
VLED2
D
E
VLED1-F
9309-2
9309-11 8
9309-4
45
9301
9302
C
F341F340
F342
LTW-E500T-PH1
4
GREEN
RED
BLUE
F343
7000
GND_HS
3
25
16
7
LTW-E500T-PH1
4
GREEN
RED
BLUE
7001
GND_HS
7002
LTW-E500T-PH1
4
3
GREEN
RED
25
16
BLUE
7
GND_HS
3
25
16
7
9305-227
9305-445
1 89305-1
27
LTW-E500T-PH1
4
GREEN
RED
5
BLUE
7003
GND_HS
3
2
16
7
9318-3
9318-1
9318-4
F F
G
H
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
L
M
D
3338
560R
3340
560R
3343
560R
3346
560R
3349
E
560R
3352
560R
3355
560R
3369
560R
3370
I
J
560R
560R
560R
560R
560R
3371
3372
3373
3374
F
G
3341
1K5 3344
1K5 3347
1K5 3350
1K5 3353
1K5 3356
1K5
3384
1K5
3385
1K5
3386
1K5
3387
1K5
3388
1K5
3389
1K5
3390
1K5
3391
1K5
H
I
3336
390R 3337
390R 3339
390R 3342
390R
PWM-B1
PWM-R1
PWM-G1
VLED1-F
3331
3332
10K
10K
VLED1-F
3325
3326
10K
10K
VLED1-F
3327
3330
54
9320-2 72
9320-1 81
9306-1 18
9306-4 45
9306-336
F307
7307 BC847BW
F308
3334
1K0
7305 BC847BW
F303
3328
1K0
10K
3333
1K0
10K
F305
7306 BC847BW
9317
F302
Place jumper 9314, 9316, 9317
9314
F304
9316
if VLED < 17V
9320-4
N
1
2
3
456
7 8 9
9310-227
9310-4
45
36
18
45
PWM-B2
PWM-R2
PWM-G2
11
8
9310-1
1 8
LTW-E500T-PH1
4 9315-227
GREEN
RED
BLUE
7004
GND_HS
7
VLED1-F
3301
3303
12 132
GREEN6GREEN6
BLUE6BLUE6
10K
10K
VLED1-F
3304
3306
3
25
16
RED6RED6
10K
10K
VLED1-F
3307
3309
9
9319-3
9319-445
9319-1
1 8
3 6
7317 BC847BW
F326
3302
1K0
F328
3305
1K0
10K
3308
1K0
10K
3 6
9303-3
9303-445
9303-11 8
9304-22
9304-11 8
9304-4
45
F325
7315 BC847BW
7316 BC847BW
F330
10 11
9312-11 8
9312-3
9312-445
3 6
7
9325
F327
F329
9326
9327
LTW-E500T-PH1
4
GREEN
RED
5
BLUE
BLUE-2
RED-2
GREEN-2
7005
GND_HS
10
15
3
2
16
7
Place jumper 9325, 9326, 9327
G
if VLED < 17V
R
11
9315-44
1 8
9315-1
B
3335
390R 3345
390R 3348
390R 3351
390R
16
12
5
12
9313-1
1 8
B
F344
B
F347
17
9313-4
9313-2
45
27
G
R
F345
RG
3310
1K5
3311
1K5
3312
1K5
3313
1K5
3314
1K5
3315
1K5
3316
1K5
3317
1K5
3318
1K5
3319
1K5
3320
1K5
3321
1K5
3322
1K5
3323
1K5
F348
9311-445
9311-3
3 6
9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13
20
18
13
F346
RED-1
GREEN-1
3354
560R
3357
560R
3358
560R
3359
560R
3360
560R
3361
560R
3362
560R
3363
560R
3364
560R
3365
560R
3366
560R
3367
560R
3368
560R
9311-11 8
BLUE-1
F349
GREEN-2
RED-2
BLUE-2
197
3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12
A
3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12
B
3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2
C
3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12
D
3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13
E
3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1
F
3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1
7000 C2
G
7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1
H
9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5
I
9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8
13
A
B
C
D
E
G
H
I
J
K
L
M
N
2008-06-10
2008-08-08
??
O
P
A2
090403
O
CLASS_NO
P
1
2
4
5
63
7
8
9
10 18
11
12
13
2008-08-08
NAME
Peter Van Hove
2
3
1514
SETNAMECHN
DRIVER 6LED LITEON
2K9
SUPERS.
DATECHECK
2008-06-02
16
17
8204 000 8857
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
19
1
2
3
33
20
18560_512_090403.eps
2009-Apr-03
Page 89
Circuit Diagrams and PWB Layouts
C
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
GND_HS
GREEN
RED
BLUE
3549 F9 3550 F10
10 11
7
7
3552 F9 3553 F10
B
C
5
3587 G10
D
3573 H9
G
H
A
3 4
17
6
9
G
H
C
H
F
1312
7006 B2
3556 F10
3547 F10
3589 H10 3590 H10 3591 H10
7011 B8
3555 G10
3546 F9
7 8 9
56
F
8
206
1918
10
4
12
A
E
3574 H9 3584 G10 3585 G10
M
3586 G10
3571 G9 3572 G9
F
12
12
3
1
11
O
16
13
K
10
L
A
1211
14
3538 E9
7007 B3
3588 G10
7008 B5 7009 B6 7010 B7
3543 F9 3544 F10
J
2 3 4
H
1M3A F2
G
E
16
15
P
O
45
owner.
M
L
8
3569 G9 3570 G9
D
E
3537 E11
18 19
14
G
12
3539 F11 3540 F9 3541 E10 3542 F11
is prohibited without the written consent of the copyright
J
3
1M85 D2 3536 E11
LED DRIVE
15
B
D
NN
98
K
I
P
B
A
91011
All rights reserved. Reproduction in whole or in parts
B
C
20
I
F
E
D
5
17
67
12
C
3543
560R
1K5
3584
3569
560R
3
4 5 6 7
8
9
15 16
1M85
1
10 11 12 13 14
2
3587
1K5
560R
3549
3552
560R
560R
3555
1K5
3586
VLED2
1K5
3544
+3V3
1X04
REF EMC HOLE
3570
560R
560R
3572
3571
560R
16
+3V3
3542
390R
14
2
3
4 5 6 7
8
9
15
1
10 11 12 13
1M3A
NAME
DATECHECK
8204 000 8898
2K9 LITEON
6 LED + CONNECTOR
A2
2008-08-14
130
3
2
2008-10-29
Peter Van Hove
2008-10-29
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-07-30
11
SETNAMECHN
CLASS_NO
SUPERS.
2
3573
560R
VLED1
560R
3546
560R
3574
390R
3539
3589
1K5
390R
3536
1K5
3553
3585
16
4
3
7
5
2
1K5
7011
LTW-E500T-PH1
390R
3537
7006
16
4
3
7
5
2
3
7
5
2
LTW-E500T-PH1
7007
LTW-E500T-PH1
16
4
3
7
5
2
LTW-E500T-PH1
7010
16
4
3591
1K5
1K5
3588
16
4
3
7
5
2
5
2
7009
LTW-E500T-PH1
16
4
3
7
LTW-E500T-PH1
7008
1K5
1K5
3590
3541
VLED1
VLED2
3556
1K5
3538
560R
560R
3540
1K5
3547
3550
1K5
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
RED-1
GREEN-1
BLUE-1
SPI-CLOCK-BUF
PROG
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
GREEN-2
RED-2
BLUE-2
18560_513_090403.eps
090403

12 LED Low-Pow: LED Drive

EN 89Q548.1E LA 10.
2009-Apr-03
Page 90

Layout 12 LED Low-Pow

9113
2203
1105
9212
3211
9208
3219
3207
2217
9213
9209
3223
2219
2201
9108
2220
1X03
1M83 1M84 1M85
3342
2130
9110
9114
9107
2202
9302
3339
3338
3389
3374
3385
3369
3340
3390
3384
3121
3356
3391
3343
3373
3346
3350
3372
3386
3212
9214
3347
3349
3371
3387
3352
3370
3344
3388
2218
3220
9210
7201
3353
3355
3341
3337
7000
3209
9301
3336
9211
9109
9112
9111
2125
3221
3216
2211
6216
3222
7001
Circuit Diagrams and PWB Layouts
3107
21092110
3108
3109
3128
3110
3103
I115
3124
3130
2120
2123
2131
3142
7002
9103
3118
3101
9104
3129
3132 3133
I113
1101
I114
7102
3102
2114
9101
3106
I110
9102
2119
I111
21282129
3224
7215
2216 2215
3214
3217
3215
3218
9314
2101
2102
2103
7101
2104
3331
3332
3334
9308 9307
9317
3327
3333
3330
2210
3325
3326
3328
7307
9316
7306
9305
9309
9306
7305
EN 90Q548.1E LA 10.
9313
3354
3357
3358
3360
3361
3362
3365
3366
3367
3368
3359
3363
3120 3119
9121
3127
3113
3114
3117
7110
2111
2117 2116
3115
3131
3126
2126
9106
2112 3116 9119
2113
2124 2121
3104
2122
3105
3125
2115
2118
3112
2209
7209
7210
3213
7212
2214
3210
7214
7003
3203
3205
3136
3138
C140
2106
3139
3111
2108
2105
3137
2107
3135
3140
3134
3204
3123
3141
7116
9318
9320
7004
9310
2127
3305
3306
3301
3303
3304
3307
3308
3309
3302
9325
9327
9326
7315
7316
7317
9312
3364
9315
3310
3311
3312
3313
3315
3316
3345
3348
3317
3335
3351
3323
3314
3318
3320
3321
3322
3319
3555
3569
3570
3571
3572
3573
3574
3591
3553
3586
3587
3588
3589
3590
3538
3540
3543
3546
3549
7005
9319
9303
9304
9311
7006
7007
7008
7009
7010
3552
3541
3544
3547
3550
3556
3584
3585
3536
3537
3539
1X04
7011
3542
31043136335.2
F135
F346
F347F348 F349
F345
F344
F326
F330
F329
F215
F214
F328
F325
F327
F106
F116
F213
F118
F209
F202 F203
F133
F136
F107 F108
F105
F104
F109
I126
F134
I125
F112
F117
I124
F137
F103
F102
F132
F130
F212
F101
F210
F308
F305
F211
F303
F307
F304
F302
F123
F127
F139
F126
1M1A1M2A1M3A
F131
F138
F207
F208
F204
F205
F120
F122
F128
F121
F129
F124
F206
F340
F125
F343
F342
F341
18490_551_090326.eps
090331
2009-Apr-03
Page 91

SSB: DC/DC +3V3 +1V2

Circuit Diagrams and PWB Layouts
EN 91Q548.1E LA 10.
1
2100 B2
A
2101 B4 2102 D1 2103 D4 2104 B6 2105 D6 2106 E5
B
C
A
D
B
E
F
C
G
D
H
E
I
J
F
K
is prohibited without the written consent of the copyright
owner.
All rights reserved. Reproduction in whole or in parts
G
L
7
3130 E5 3131 E6 3132 C7 3133 C8 3134 C8 3135 D8 3136 D7
3137 D6 3138 E9 3139 E7 3140 E8 3141 E8 3142 E6 3143 E6
3158 F3 3159 H1 3160 H1 3164 D4 5100 B8 5101 C8 5102 E8
10
5103 E8 5104 B11 5105 E11 6100 E6 6101 F5 6102 G7 6103 F7
84
3144 F8 3145 E11 3146 E10 3147 F11 3148 F10 3149 F11 3150 F11
92
3151 G11 3152 G11 3153 F8 3154 F8 3155 F8 3156 F7 3157 F7
11
6104 B2 7100-1 C2 7100-2 B1 7101-1 B5 7101-2 C6 7102-1 C7 7102-2 D6
7103 C4 7104 D2 7105-1 E3 7105-2 E4 7106 F7 7107-1 E10 7107-2 F10
12
F100 C4 F101 C7 F102 D6 F103 D6 F104 E7 F105 F4 F106 C2
133
F107 B7 F108 D10 F109 E10 F110 F10 F111 E12 F112 D9 F113 F7
F114 D4 F115 D4 I100 B3 I101 B1 I102 C1 I103 B4 I106 D4
I107 D3 I108 D4 I109 C2 I111 D5 I112 B5 I113 C5 I114 D8
15
I115 C5 I116 D5 I117 D5 I118 D6 I119 D6 I120 D6 I121 C6
I122 E5 I124 E4 I125 F3 I126 F5 I127 F2 I128 D1 I129 E6
16
I130 F7 I131 E8 I132 E8 I133 F8 I134 F8 I136 E9 I137 E11
1714
I138 F11 I141 H2 I143 C8 I144 C8 I146 E5 I147 F7 I148 C8
18
2107 B6 2108 B5 2109 C6 2110 C8 2111 C8 2112 C9 2113 C7
2114 C8 2115 D7 2116 E9 2117 E9 2118 E9 2119 E9 2120 E8
2121 E8 2122 B11 2123 B11 2124 C12 2125 E12 2127 E12 2128 F7
2129 F8 2130 F7 2131 F7 2132 F5 2133 H2 2134 H2 2135 H2
2140 C9 2141 C9 3100 B2 3101 B2 3102 C2 3103 C1 3105 C1
5
3106 C2 3107 C3 3108 B4 3109 C5 3110 C5 3113 C5 3114 C5
3115 C6 3116 C5 3117 D1 3118 E1 3119 E4 3120 E4 3121 E4
6
3122 F2 3124 C6 3125 D6 3126 D6 3127 D6 3128 D5 3129 D5
1234567891011121314
DC / DC +3V3_+1V2
220u 25V
+12VF
+12V
+3V3
+1V2-PNX85XX
+3V3F
SENSE+1V2-PNX85XX
ENABLE-3V3
PROT-DC
RES
3100
4
BC847BPN
7100-2
I101
3
10K
3103
I102
0V
2
10K
3105
100n
2102
GND-SIG
I128
3117
33K
33K
3118
GND-SIG
5
7104 BC847BW
1
3V3-ST
I109
6
7100-1 BC847BPN
1
GND-SIG
3101
22K
6104
I100
BAS316
F106
3102
100R
3V3
10K
22K
3107
3106
3
2
3122
10K
I127
RES
7105-1
BC857BS
DETECT1
NCP5422ADR2G
F100
I107
2103
100n
GND-SIG GND-SIG
I124
1
7105-2
BC857BS
2
I125
6
3158
100K
F114
F115
I106
I108
GND-SIG
4
3
22K
2100
100n
2101
GND-SIG
3164
10R
3108
I103
1u0
22R
3109
7103
14
Φ
VCC
4
BST
7
1
VFB
10
2
8
1
COMP
9
2
13
ROSC
39K
3119
330R
3120
5
F105
1
H1
GATE
2
L1
16
H2
GATE
15
L2
5
+1
6
-1
IS
12
+2
11
-2
GND
3
I146
1K0
3121
I126
1K0
6101
PDZ9.1-B
12V UNDER-VOLTAGE DETECTION
7101-1
I112
3110 22R
I115
I116
78
FDS6930B
2
1
2108
3n3
I113
4
4R7
4R7
3113
3114
3115
3116
22R
I117
I120
I111
2105
3128
2K7
3129
I122
1K0
100n
2106
3130
2K7
+12VF
2132
10u
22u
RES
2104
2107
VSW
56
7101-2
FDS6930B
3
22R
I118
100n
BAS316
1u0
I121
2
2109
3124
4R7
3125
4R7
3126
1K0
F103
2K2
3131
6100
3n3
7102-2
56
4
3
I119
FDS6930B
F102
2K2
3127
3137
6K8
I129
3142
68R
3143
68R
I147
6103
I130
3
7106
BC817-25W
2
BOOSTER
+1V2-PNX85XX
78
1
F104
7102-1
FDS6930B
3136
6K8
2131
100n 3156
470R
BAS316
3157
470R
F107
12V/3V3 CONVERSION
F101
22R
3133
3132
RES
RES
I144
1n0
2113
RES
I114
1n0
2115
RES
12V/1V2 CONVERSION
22R
3139
RES
I132
1n0
2128
RES
I134
1n0
2130
F113
1
RES
6102
PDZ18-B
RES 5100
10u 5101
10u
6K8
22R
3134
I143
100n
2114
I148
1K0
3135
RES 5102
10u
5103
10u
6K8
22R
3141
3140
RES
I131
2129
100n
I133
1K0
3153
3154
15K
GND-SIG
22u
3n3
2112
2111
2110
F112
2119
10u
3n3
2120
1u0
2121
3144
120R
1%
1K0
3155
1%
GND-SIG
22u
22u
22u
2141
2140
RES
F108
RESFRES
RES
2116
2117
2118
*
10R
3138
10u
10u
10u
RES
F109
I136
3146
3148
6
7107-1
F110
7107-2
3145
2
1
3147
3
I138
5
4
3150
10K
BC847BS
10K
BC847BS
5104
10u
10u
22u
2122
2123
RES
2124
220u 25V
RES
6.3V
2125
330u
F111
5105
100R
I137
1K0
3149
3K3
2K2
3151
1K0
22u
2127
1%
3152
1%120R
19
20
A
B
C
A
D
B
E
C
G
D
H
E
I
J
F
K
G
L
100p
2133
2134
M
H
GND-SIG
4K7
3159
3160
470R
1%
GND-SIG
N
12345678910
O
P
1
2
I141
100p
100n
2135
GND-SIG
MULTI 12NC : 3139_123_64421 / 64541 / 64561
BD 12NC : 3139_123_64431 / 64551 / 64571
CELL 12C : 8239_125_14871
H
M
N
11 12 13 14
1X05
REF EMC HOLE
1X06
REF EMC HOLE
1X12
REF EMC HOLE
Round screw hole of 4.02mm
3
4
510
6 18
1X02
REF EMC HOLE
1X07
REF EMC HOLE
Round screw hole of 4.5mm
987
11
1X03
REF EMC HOLE
Oval screw hole of
5mm x 4.02mm
12
REF EMC HOLE
13
1X08
14
DC343514
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
NAME
Kailash
SV
1
CHECK DATE
15
PCB SB SSB BD
TV543_2K9
SUPERS.
16
**** *** *****
2008-10-17
********EMANTESNHC
1
1 2008-12-16
3139 123 6443
17
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
13010
19
01
20
18440_500_090223.eps
" X100 ~ X199 "
O
2009-01-16
P
A2
090224
2009-Apr-03
Page 92
Circuit Diagrams and PWB Layouts

SSB: DC/DC +3V3 +1V2 Standby

EN 92Q548.1E LA 10.
1
A
1M95 D1
B
1M99 B1 2200 C1 2201 C1 2202 C2
C
D
A
E
F
G
1M99
1 2 3
B
4 5 6
FROM PSU
7 8
9 10 11 12
1-1735446-2
C
H
D
I
E
1 2 3 4 5 6 7 8
FROM PSU
9 10 11
1-1735446-1
J
K
F
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
L
78
3211 C12 3212 B14 3213 B13 3214 C13 3215 C14
3221 G12 3222 G12 3223 F13 3224 F12 3225 C5
3226 C5 3227 C6 3228 D6 3229 D6 3230 D6
3231 D6 3232 D4 3233 E4 3234 E5 4201 B2
4202 C2 5203 B9 5204 B11 5221 F9 5222 F11
102
2203 C2 2204 D2 2205 D3 2206 E1 2207 E2
2208 E2
2210 B6 2211 D4 2212 B9
2213 B9 2214 B9 2215 B12 2216 C13 2217 B12
2218 B12 2219 C10 2220 D2 2221 F9 2222 F9
2223 F9 2224 F12 2225 F12 2226 F13 2227 F13
5
2228 F13 2229 F13 2230 E2 2231 C1 2232 C2
2233 B6 2235 C32209 B5 2236 C2 2237 C2 3200 B1
6
3201 B1 3204 D2 3207 B10 3208 C11 3210 C12
1234567
DC / DC +3V3-STANDBY_+1V2-STANDBY
7201
3225
3226
10K
I212
10K
I213
LD3985M122
1
3
5
6
I215
1
BC847BPN(COL)
OUTIN
INH BP
COM
2
4
7223-2
BC847BPN(COL)
I218
3227
3
220K
6K8
3228
10K
3230
I217
2
7224-1
5
I202
4
2233
100n
2210
RES
10K
3229
3K3
3231
I219
F218
F227
1u0
5
+1V2-STANDBY
4
7224-2
BC847BPN(COL)
3V3-ST
3
DETECT-12V
1M95
+3V3-STANDBY
F228 F201 F202
F203 F204 F205 F206 F223 F224 F225 F226
F214
F216
68R3200 68R
3201
4201 4202
100p2201
2231 100p
2200 100p
F207 F208 F209 F210 F211 F212 F213
F215
F217
RES
2206
100n
RES
100p2232
GNDSND
2207
RES
100n
2220
RES
2208
RES
GNDSND
100p2203
1n0
3204 68R
RES
100n
10n2235
100p2203
2202 100p
2203 100p
RES
2204 1n0
2205 1n0
1n02230
RES
+3V3-STANDBY
STANDBY
+12V
+AUDIO-POWER
+12VD
LAMP-ON-OUT
BACKLIGHT-OUT
BACKLIGHT-BOOST
POWER-OK
SCL-SET SDA-SET
+1V2-STANDBY
3232
3233
10K
I214
6225
PDZ8.2-B
1K0
2211
2
1u0
2209
+12V
1u0
6
7223-1 BC847BPN(COL)
1
I216
3234
22K
6217 B12 6225 D4 7201 A6 7202-1 B10 7202-2 C10
DC / DC
+12V
DC / DC
+12V
11
7203 B14 7204 D10 7222-1 E10 7222-2 F10 7223-1 D5
5203
33R
5221
33R
2212
2221
7223-2 C6 7224-1 E6 7224-2 C7 F201 B1 F202 B1
9
10u
2213
10u
2222
12
13
14
15
164
17
18
193
209
A
F203 B1 F204 B1 F205 B1 F206 B1 F207 D1
I203
10u
10u
2214
RES 3207
100K
PDTC144EU
RES 7204
F208 D1 F209 D1 F210 D1 F211 D1 F212 D1
ST1S10PH
I204
7202-1
2
7202-2
ST1S10PH
F213 D1 F214 E1 F215 E1 F216 E1 F217 E1
1
6
A
SW
INH
VIN
SYNCSWVFB
GND
HSPA
8
4
10 11
VIA
3208
100K
2219
100n
F218 B6 F219 B12 F220 B14 F221 D14 F222 F12
11
I205
7
35
9
I207
+3V3
5204
10u
RES
F223 B1 F224 B1 F225 C1 F226 C1 F227 D6
F219
10u
2215
3210
2218
100K
25V220u
RES
2216
3214
4n7
I203 B9 I204 B10 I205 B11 I206 B14 I207 D11
1%
13
I210 F9 I212 C5 I213 D5 I214 D4 I215 E5
RES
I216 D5 I217 D6 I218 C6 I219 C6
F230
ENABLE-3V3
15
+5V5-TUN
+5V
PROT-DC
4121018
F220
I206
3213
3K9
1K0
3215
F221
7203 BC847BW
3212
10K
B
C
D
A
E
B
F
C
G
H
D
F228 B1 F229 B12 F230 B15 F231 F12 I202 B6
6217 SS36
10u
2217
F229
1%
1K0
3211
18K
I
E
7222-1
1
I210
10u
2223
ST1S10PH
10u
ST1S10PH
A
INH
VIN
SYNCSWVFB
GND
4
7222-2
10 11
VIA
6
SW
HSPA
5222
7
35
928
F222
2u0
4n7
2225
4K7
3221
3224
RES
3222
1%
100K
1%
1K0
22u2224
2226 22u
F231
2227
3223
22u2228
220u 25V
2229 22u
RES
RES
1%470R
+1V2-PNX5100
SENSE+1V2-PNX5100
J
K
F
L
G
M
H
N
O
P
MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571
CELL 12C : 8239_125_14871
12345 14 15
2
3 1715
5
64
7 13
6 7 8 9 10 11 12 13
" X200 ~ X299 "
8
9
10
11
12
14
DC343514
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
Kailash
NAME
SV
1
CHECK DATE
********EMANTESNHC
PCB SB SSB BD
TV543_2K9
**** *** *****
SUPERS.
2008-10-17
16
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
3139 123 6443
0213010
191
G
M
H
N
O
2009-01-16
1
2008-12-16
1
P
A2
20
18440_501_090223.eps
090224
2009-Apr-03
Page 93
TCK TDI TDO TMS
GPIO1 GPIO2
VIA
MSTRT
MERR
MCLK MVAL
0 1 2 3 4 5 6 7
RF_AGC
IF_AGC
SIF
CVBS
DA
CL
WS
VSYNC
VIA
MD
I2S
I2C
I2C
PD
VDDH VDDL
VSSH VSSL
VSSAH_AFE1
VSSAH_CVBS
VSSAH_OSC
VSSAL_AFE1
VSSAL_AFE2
GND_HS
VDDAH_AFE1
VDDAH_CVBS
VDDAH_OSC
VDDAL_AFE1
VDDAL_AFE2
XI
XO
P N
SCL2
SDA1
RSTN
SAW_SW
SCL1
SDA2
C
I
O2IGND
O1
GND
COM
OUTIN
RF-IN
MT
MT
SHDN BP
COM
OUTIN
RF-IN
MT MT
MTMT
SHDN BP
COM
OUTIN
AGC CONTROL
I313 D7 I314 D7 I318 G6 I319 G6 I321 H8 I322 F11 I323 F11 I324 B11 I325 G16 I326 H9 I327 H11 I328 I10 I329 J10 I331 I9
I306 I15
N
C
2352
20
Y
B
owner.
15
4303
7
I307 H14
Y
N
L
4304
Y
N
2361
Y
*
Y
Y
A
E
I308 H15
F324 E2
16
*
Pend new 12nc
*
4313
17
4306
All rights reserved. Reproduction in whole or in parts
LGI
Y
1
19
10
Y
F325 E2 F327 E5 F332 E5 F333 E5 F334 E5 F335 F5 F336 G10 F337 I11 F338 J8 F339 E14 I301 F14 I303 F15
F304 D11
2350
*
2362
RES
7
*
TUNER BOUNDARY SCAN
N
N
*
F305 D11 F306 B3 F308 B15 F309 C15 F310 C15 F311 D15 F312 F10 F313 F10 F314 J16 F315 I16 F316 H8 F317 E2 F318 E2 F319 E2 F320 E2 F321 E2 F322 E2 F323 E2
7312-1 G15
19
9
N
12
N
Y
10
7312-2 G16 7314-1 I15 7314-2 J16 7315 H9 7316-1 I11 7316-2 J11 7345-1 I15 7345-2 H15 A310 E2 A311 F2 A312 F1 A322 E5 A323 F5 A324 G7 A325 F6 A326 G7 A327 G6 A328 E4 A329 F4 F301 D11 F302 D11 F303 D11
5306 C12
*
*
M
4307
4317
RESERVED
6
1301
Y
N
N
5
*
Y
RFS
5307 D14 5308 B11 5309 B3 5310 D4 5311 H4 5313 B10 6301 H9 6302 H10 7302 G5 7303 E12 7307 B2 7308 B11 7309 B9
4314 I15
Y
8
N
O
*
O
N
Y
Y
Y
N
4315 J15 4316 E2 4317 F7 4318 F7 4319 F10 4320 H4 4321 H5 4322 I5 4323 G3 4324 G7 4325 G7 4326 F1 4327 F1 5301 D3 5302 G3 5303 G8 5304 B14 5305 C12
3396 E14
* *
2
*
G
4302
N
*
2302
MK2
Y
N
Y
18
N
3397 E14
3398 F11 3399 F11 33AA H5 33AB H5 33AC H5 4302 E2 4303 F2 4304 F3 4306 E5 4307 F4 4308 F5 4312 E5 4313 F5
3372 I10
4
N
N
Y4318
4312
1300
F
N
12
*
*
2360
3373 J10 3374 J10 3375 J10 3376 I11 3377 H10 3386 B2 3387 H10 3388 E10 3389 H10 3391 I15 3392 I16 3393 E14 3394 E14 3395 E14
3357 G14
L
15
2349
Y
2359
4308
*
N
D
2351
*
17
*
YN
* I…C ADRESS C0
3358 G15 3359 G15 3360 I16 3361 I16 3362 I15 3363 J15 3364 H9 3365 E10 3366 G10 3367 I10 3368 I9 3369 I10 3370 I11 3371 I10
3318 C12
N
NY
Y
H
63
N
RES
3345 I14 3346 H15 3347 I15 3348 H15 3349 I14 3350 D10 3351 D10 3352 D10 3353 D10 3354 D11 3355 F15 3356 F15
3309-1 F15
1
11
RES
3
*
132
8
C
5
" X300 ~ X399 "
3309-2 F15 3309-3 E15 3309-4 E15 3310-1 F15 3310-2 F15 3310-3 F15 3310-4 F15 3311 G15 3312 H7 3313 H7 3316 D7 3317 D7
2364 H4
J
E
13
K
14
K
J
20
2365 H6 2366 H6 2367 H4 2368 H6 2369 C3 2370 G7 2371 C8 2372 C9 2373 C9 3301 C4 3302 E10 3303 G7 3304 G7 3305 H7 3306 H3 3307 H3 3308-1 E15 3308-2 E15 3308-3 E15 3308-4 E15
2344 C11
M
A
P
2358
18
P
14
2345 H15 2346 H14 2347 G10 2348 G10 2349 E5 2350 E5 2351 F5 2352 F5 2353 F14 2354 G16 2355 H10 2356 H9 2357 H8 2358 E2 2359 E2 2360 E2 2361 F5 2362 E5 2363 E2
K
9
not in Arch2K8
TDI
11
HD1816 MK1
*
*
4
TCK
2318 C14 2319 C14 2320 C14 2321 C13 2322 C13 2323 C13 2324 C13 2325 D13 2326 D13 2327 D13 2328 D13 2329 D14 2330 D14 2331 E11 2332 E11 2334 F11 2335 H7 2336 C2 2337 C2 2341 E7 2342 E7
D
F
H
I
0R05
I
16
E
F
G
H
I
J
K
L
A
B
C
D
E
F
G
H
I
J
910111213141516
1234567
*
BD 12NC : 3139_123_64431 / 64551 / 64571
is prohibited without the written consent of the copyright
8 9 10 11 12 13 14 15 16
A
B
C
2302 E2 2304 D3 2305 D3 2306 G4 2307 G4 2308 G7 2309 G8 2310 G8 2311 C12 2312 C12 2313 C12 2314 C13 2315 C13 2316 C13 2317 C13
N
CELL 12C : 8239_125_14871
TDO
MULTI 12NC : 3139_123_64421 / 64541 / 64561
12345678
LG1
G
B
FRONT END
D
TMS
L
1300 E6 1301 D1 1303 G3 1304 E11 1306 F1 2300 F6 2301 C4
5311
820n
+3V3B
2364
10n
2317
100n
F306
3307
510R
RES
30R
5306
F315
4321
RES
I313
4325
2315
100n
RES
220K
3XXX
22K
3XXX
RES
4XXXRES
4XXXRES
4K7
3375
A329
+5V-TUNER
3308-2
2 7 47R
5305
30R
5310
30R
RES
I329
49
50
3305
6K8
45717
25
54
3
152855
29
101
69 70 71 72 73 74
38
415135
91 92 93 94
68
95 96 97 98 99
10082
83
84
67 85
86 87 88 89 90
162756
66
75 76 77 78 79 80 81
3742523646818
26
53
2
48
47
33
32
31
44
59 60 57 58
11 12 13 14 19 20 21 22
6
5
10
62
24
61
63
64
1
34
39
40
9
7303
DRX3926K-XK-A3
DEMODULATOR
Φ
43
65
4 30
23
F323 F324
47R
3398
+5V-TUNER
18K
10u
5307
3355
220R
3369
+5V-TUNER
7
RES
10K
3395
3309-2
47R2
+5V-TUNER
10K
3370
RES
F327
4304
+3V3B
10n
2367
2358 4n7
F332
+1V2A
560R
33AC
3371
27K
3306
150R
3359
100n
2319
2361 100n
3
2
1
84
7316-1 LM393PT
2332
12p
10K
3393
16V47u
2305
2u2
3310-3
47R36
2328
4314
BC847BPN
7312-1
2
6
1
+12V
A328
+5V-TUNER
TV543_2K9
3139 123 6443
CHECK DATE
NAME
1
SUPERS.
1
CLASS_NO
********EMANTESNHC
25
3PC332
03
2008-10-17
ROYAL PHILIPS ELECTRONICS N.V. 2008
**** *** *****
SV
2009-01-16
DC343514
Wang Bing Bing
2009-01-1623
4303
13010
1 2008-12-16
-- -- --
2008-10-17
A2
PCB SB SSB BD
4320
4323
47R
3310-1
18
2345
22u
+3V3E
F321
F320
+1V2
F310
3302 10K
F309
A325
+3V3A
150R3361RES
I314
4317
10K
F305
3351
+3V3A
A323
10K
3357
4324
RES
2318
100n
+1V2-PNX85XX
3311 100R
4319
RES
2334
100n
4312
10K
3308-3
47R36
3350
A312
10n2306
2322
2u2
3348
18K
4307
+5V
+3V3D
F322
+3V3A
4302
2366
100n
RES
10n
2365
4u7RES
F325
2363
100n
2323
+1V2A
A324
3362
RES
100R
5304
10u
I326
+3V3B
SIF-GND
F334
100n
2356
+5V5-TUN
+5V-TUNER
I328
I322
ANTENNA-SUPPLY
2360 10n
+3V3
I303
2312
10u
3303
220R
4n72359
I319
5301
30R
F337
4313
4K73365
47R
3316
+3V3
03
+5V-TUNER
A326
4322
RES
3394
10K
RES
3
1 2
5 4
36M125
1303
OFWX6966M
BZX384-C6V8
I321
6302
3349
150R
100n2349
3354
22R
F339
47R
3310-4
45
3p3
36
2354
47R
3309-3
2313
10u
I308
F318
+5V
680n
5303
F314
+3V3B
I324
A322
27K
3372
3367
2R2
3301
6K8
2350 100n
27M
1304
F301
4
2301
22n
7345-2
BC847BPN(COL)
5
3
I327
RES
5
3
4
F336
BC857BS 7314-2
3366
4K7
4318
10K3376
F319
I306
3345
10K
+3V3D
+5V-TUNER
30R
RES
F308
5313
4K7
3364
+3V3B
4315
F316
F312
4308
2336
1u0
2u2
2320
2314
I331
100n
3318
120R
RES
ANTENNA-SUPPLY
3317
+12V
47R
10K
3373
2353 100n
1
32
+3V3E
7308
LD1117DT12
3368
220R
4306
F338
F311
I325
5
+5V-TUNER
3309-4
47R4
3360 150RRES
I307
100n
2316
2351 100n
100p
2310
100n
2337
RES
5309
4u7
BC847BPN 7312-2
5
3
4
25
33AB
470R
6301
BAS316
F303
3352 10K
2373
2u2
1u0
2371
100K
3377
RES
2321
100n
3396
10K
18R
3391
2302
4n7
+1V2
2307 10n
150R
3358
NC1
NC2
RF_AGC
SCL SDA
XTAL_OUT
1XXX
HD1816
TUNER
+5V
AS
DC_PWR
IF_OUT1 IF_OUT2
I323
470R
3356
3389
2R2
2357
22n
22p
2308
100n
2344
2u2
2369
I318
3309-1
47R18
I301
F333
3387
100K
2346
22u
3353 10K
RES
2
6
1
2368
10n
7314-1
BC857BS
100p
2309
2329
2u2
2
4
3
2330
100n
7315 BCP56
1
100n
2300
NC
RF_AGC SCL SDA
VTU_TP
AIF
ANT_PWR B1
B2
DIF1
DIF2
IF_AGC
TUNER
TDTC-G321D
1XXX
A327
NC1
NC2
RF_AGC
SCL SDA
XTAL_OUT
+5V
AS
DC_PWR
IF_OUT1 IF_OUT2
1XXX
TUNER
2335
22n
F304
+5V-TUNER
2325
100n
33AA
560R
100n
2326
RES 3363
100R
LK112M33TR
3
2
54
1
7309
820n
5302
RES
A310
3392
10u
68R
2311
RES
2348 18p
2u2
2327
100n
2304
100n2352
+12V
150R
3347
3388 4K7
+3V3B
12p
2331
F313
4316
A311
RES
3346
470R
18p
2342
2K7
3374
5
6
7
84
7316-2 LM393PT
47R3399
2
6
1
2u2
2324
7345-1 BC847BPN(COL)
10K
3397RES
3304
220R
F317
F335
5
GND2
2 INPUT1
3 INPUT2
7OUTPUT1
6OUTPUT2
4 VAGC
1
VCC
7302
UPC3221GV-E1
8
GND1
5
RES 30R5308
47R
3308-4
4
47R
3308-1
18
2 7 47R
3310-2
4R7
3386
2355
100n
2362 100n
2370
F302
2p2
2341
18p
18p2347
2372
100n
2
54
1
RES
LK112SM50
7307
3
RF-AGC
IF-AGC
IF-AGC
MCLK
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7
MERR
MSTRT
MVAL
RF-AGC
PDN
ANTENNA-CTRL
PDP
FE-DATA(6)
FE-DATA(5)
FE-DATA(4)
FE-DATA(7)
FE-DATA(2)
FE-DATA(1)
FE-DATA(0)
FE-DATA(3)
CVBS
FE-CLK
FE-SOP
FE-VALID
SIF
CVBS-TER-OUT
ANTENNA-CTRL
SDA-TUNER
SCL-TUNER
SCL-TUNER SDA-TUNER
IF-N
IF-P
FE-DATA(0:7)
RESET-SYSTEM
PDP
PDN
SDA-SSB
SCL-SSB
IF-P
IF-N
18440_502_090223.eps
090224
Circuit Diagrams and PWB Layouts

SSB: Front End

EN 93Q548.1E LA 10.
2009-Apr-03
Page 94

SSB: PNX8543 - Power

COM
OUTIN
VDD_1V2_HDMI_1
VPP_ID_8543
VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_2 VDDA_HDMI_3V3_BIAS
VDDA_3V3_VID_4
VDDA_3V3_MCAB
VDD_3V3_LVDS
VDD_3V3_PER
VDD_3V3_SBPER
VDDA_3V3_USB
1
VDDA_1V2_USB_PLL
GNDA_USB
0
VDDA_1V2_ADC4A
VDDA_1V2_CAB
VDD_1V8_DDR
VDD_1V2_SBCORE
VDDA_1V2_DLL
VDDA_3V3_DDRPLL0
VDD_1V2_DDRPLL0
7
4
VSS_DDRPLL
VDDA_3V3_VIDOUT
JTAG_VSST1
VSSA_DLL
VDDA_3V3_VID_1_2
VDDA_3V3_VID_1_1
VDDA_3V3_HDMI_PLL_2
VDDA_3V3_DCSCCO VDDA_1V2_DCS_A
VDD_1V2_HDMI_2
VPP_ID_8542
VDDA_1V2_AADC
VDD_1V2_CORE
VDDA_1V2_LVDS_PLL
VDDA_3V3_ADAC
VSSA_DDRPLL0
VDDA_3V3_AADC
VDDA_3V3_LVDS
VDDA_3V3_ACT
VSS_CL
VDDA_3V3_HDMI_PLL_1
VDD_3V3_HDMI_TERM_1
VDDA_1V2_HDMI_EQ
VDDA_1V2_VID
C
VSS
VSS
VSS
VSS
VSS
COM
OUTIN
8 1513
1
F
D
F619 D14 F620 E14 F621 E15 F622 F15 F623 G15 F624 G15 F625 D8 F626 H15 I600 C3 I613 B14 I614 B13 I615 G4 I616 C8
M
1812
K
G
17
112
F611 A15 F612 B15 F615 C16 F616 C14 F617 D15 F618 D15
" X600 ~ X699 "
1864
P
H
F
A
B
5627 C7 7600-10 G2 7600-9 B9 7601 B3 7602 D5 C600 E3 F600 C4 F601 E2 F602 C8 F603 D8 F604 E8 F605 E6 F606 F6 F607 E7 F608 F8
F609 F7 F610 G8
O
16
All rights reserved. Reproduction in whole or in parts
16
A
is prohibited without the written consent of the copyright
3
C
5610 F8 5611 G7 5612 A15 5613 B16 5614 C16 5615 D16 5616 C15 5617 B15 5618 B14 5619 D16 5620 D15 5621 E15 5622 E15 5623 F15 5624 G15 5625 G15 5626 E5
2
D
19
L
H
G
20
M
17
2699 C7 26A1 E7 26A2 D7 26A3 C7 26A4 C7 3601 D6 5600 C2 5601 D7 5602 C7 5603 D4 5604 D7 5605 E5 5607 F5 5608 E6 5609 F6
I
C
E
K
2678 G14 2679 G15 2680 H14 2681 H15 2682 H12 2683 H12 2684 H13 2685 H13 2686 H14 2687 H14 2688 H14 2689 H14 2690 H15 2691 B6 2692 B6 2693 B7 2694 H13 2695 H13 2696 H13 2697 D5
19
J
5
N
P
1
J
2657 C13 2658 C14 2659 C15 2660 B16 2661 B16 2662 C16 2663 C15 2664 D14 2665 D14 2666 D14 2667 D14 2668 D14 2669 D14 2670 D16 2671 D16 2672 F15 2673 F14 2674 F14 2675 F14 2676 F14 2677 F15
10
20
14
6
CELL 12C : 8239_125_14871
BD 12NC : 3139_123_64431 / 64551 / 64571
12
2634 F5 2635 F5 2636 F7 2637 F7 2638 F8 2639 F8 2640 G7 2641 G7 2642 G8 2643 G8 2644 B12 2645 B13 2646 B13 2647 B13 2648 B13 2649 B13 2650 B14 2651 B14 2652 B14 2653 B14 2654 B15
144 15
owner.
2655 B15 2656 B15
2610 A6 2611 A6 2612 A7 2613 A7 2614 A7 2615 A7 2616 A7 2617 A8 2618 A8 2619 A8 2620 A8 2621 B6 2622 B6 2623 C7 2624 C7 2625 C7 2626 E7 2627 C7 2628 D7 2629 D7 2630 E7
7
I
L
MULTI 12NC : 3139_123_64421 / 64541 / 64561
2631 D7 2632 E5 2633 E5
7 8 9 1011121314151617
A
B
C
D
E
F
G
H
I
J
9
B
N
PNX8543 - POWER
13
2609 A6
1234567891011121314151617
1234
53
9
56
L
A
B
C
D
E
F
G
H
I
J
K
L
2600 C4 2601 C2 2602 C4 2603 C2 2604 D2 2605 D3 2606 D2 2607 E2 2608 A6
1110
E
87
O
F603
K
F604
I616
+3V3
10u
26A4
26A3
I600
+3V3F
100n
+1V2-PNX85XX
RES
2651
100n
+3V3
RES
100n
2650
4
LD1117
7602
1
3
2
10u
2697
F607
1u0
2621
100n
2692
RES
26A2
10u
100n
2649
RES
2648
100n
RES
33R
5627
6.3V330u
2606
+3V3
N30 AE30
AM3
T6
AA30
1u0
2637
F23 F24 F28
AC6 AD6
AJ26
F17
AD30
W30 AK30
AJ21
F6 H29 J29
J6
W6
AJ22 AJ27 AJ28
AJ8 F10
T21
T30
U21
V21
W21
E13
E17
AK20 AK21 AK24 AL21
C17
AF5 AF6 AG5 AG6
AG30
Y21
AH30
R21
R30
V6
AJ13 AJ14 AJ20 AJ23 F18 F19 F20 F25
AB30
C13
P6 R6 H5
F16
AJ12
F26 F9 K30 L30 U30 V30
AK8 AK12
T5
AC30
E14
E16
AJ19
AB6
AJ17
D4
AJ30
P30
AF30D14
D16
AJ18
AK17
L6 M6 N6
AJ6
7600-9
PNX85439E
VDD
AJ16
AJ7
K6
AA6
T3
Y30
3601
100R
33R
5623
100n
2627
SENSE+1V2-PNX85XX
26A1
22u
C600
5601
33R
100n
2641
2678
100n
RES
33R
5626
2689
1u0
2610
100n
+3V3-PER
100n
2644
RES
F625
100n
2633
2600
10u
+3V3-STANDBY
100n
2622
2664
100n
+1V2-PNX85XX
RES
33R5622
RES
100n
2667
2699
10u
VDDA-LVDS
+1V2-PNX85XX
+1V2-PNX85XX
2665
100n
2675
100n
100n
2618
100n
2620
100n
2612
33R
5602
100n
2613RES
+3V3
2656 1u0
+3V3
F616
F608
+1V2-PNX85XX
100n
2625
22u
2602
100n
2624
2676
100n
2660
100n
04
2008-10-17
ROYAL PHILIPS ELECTRONICS N.V. 2008
**** *** *****
SV
2009-01-16
DC343514
Vincent Yap / Lee CW
2009-01-1623
2659
1u0
1 2008-12-16
-- -- --
2008-10-17
A2
PCB SB SSB BD
TV543_2K9
3139 123 6443
CHECK DATE
NAME
1
SUPERS.
1
CLASS_NO
********EMANTESNHC
25
3PC332
2679
1u0
13010
2696
100n
2674
100n
1u0
+3V3
2690
+1V2-PNX85XX
2671
100n
+3V3
+1V2-PNX85XX
+3V3
F621
F624
5625
33R
2632
100n
RES
1u0
2670
100n
2668
+1V2-PNX85XX
F606
F609
+1V2-PNX85XX
2677
100n
+1V2-PNX85XX
2661
1u0
5617
33R
2614
100n
RES
2688
100n
5605
33R
2623
RES
100n
1u0
2684
+3V3-PER
2604
1u0
100n
2654
5619
33R
2617
100n
RES
33R
5604
F622
100n2673
2630
100n
2681 100n
2682
100n
100n
2662
VDDA-AUDIO
33R
5616
+1V2-PNX85XX
2605
100n
100n
2601
I614
+3V3
+1V8-PNX85XX
F611
VDDA-ADC
F620
2694
T18 T19 T20
100n
R15 R16 R17
AA5
R18 R19 R20 T14 T15 T16 T17
P16 P17
AA21 P18
P19
P2 P20 P21 P33 R14
G5
G6
AA20
H6
K2
L33
L5 M2 N5
P14 P15
E4
F21
AA19
F22
F27
F29
F30
F5F7F8
G29
AP34
AA18
B34
D12
D13
D17
D18
E12
E18
E3
AA17
AM31
AM32
AM33
AM34
AN1
AN32
AN33
AN34
AP33
AA16
AK25 AL1 AL2 AL3 AL30 AM1 AM18
AM2
AM21
AM22
AA15
AJ15 AJ24 AJ25 AJ29 AJ33 AJ5 AJ9 AK10 AK13 AK23
Y20
Y33
Y5
Y6
AC33 AE6 AF33 AG31 AH29 AH6
W17
W18
W19
W20
Y14
Y15
Y16
Y17
Y18
Y19
AC31
V14
V15
V16
V17
V18
V19
V20
W14
W15
W16
AB5
U14 U15 U16 U17 U18 U19 U20 U33
U6
AB4
PNX85439E
AA14
AB31
T31
100n
2615RES
7600-10
1u0
2669
100n
2687
2636
100n
2685
100n
33R
5609
100n
2695
2607
330u 6.3V
5612
33R
+1V2-PNX85XX
+3V3
2653
100n
100n
2631
5614
33R
F617
2608
1u0
33R
5603
VDDA-DAC
2680 100n
5621 33R
5613
33R
+1V2-PNX85XX
I615
+1V2-PNX85XX
RREF-PNX85XX
2626
F618
10u
33R
5615
2616
100n
RES
100n
+3V3
2628
1u0
2638
2686
100n
2635
100n
5607
33R
33R
5620
100n
2663
5608
33R
2643
100n
100n
2666
+3V3
100n
2611
100n
2634
33R
5610
F615
F623
RES
1u0
2642
F619
F626
VDDA-AUDIO
F612
5618
33R
100n
2609
5611
33R
RREF-PNX85XX
F600
+1V8-PNX85XX
10u
2603
LD1117DT18
7601
1
32
2655
100n
F610
100n
2652
+3V3
+3V3
+1V2-STANDBY
2657
100n
+1V8-PNX85XX
RES
2691
100n
33R
5624
F601
100n
2639
RES
100n
2647
2646
100n
1u0
RES
2640
2645
100n
RES
33R
5600
10u
F602
2629
2658
100n
2619
100n
I613
2672
100n
2693
100n
RES
100n
F605
2683
18440_503_090223.eps
090224
Circuit Diagrams and PWB Layouts
EN 94Q548.1E LA 10.
2009-Apr-03
Page 95
Circuit Diagrams and PWB Layouts
C
CA_RST
1
DIR
CA_MOCLK
CA_RDY
4
0 1
0
1
0
2
1
0
TNR_MIVAL
TNR_MISTRT
CA_MDO
3
7
6
5
4
3
2
7
6
5
4
TNR_MICLK
TNR_ERROR
CA_MDI
CA_MISTRT
EN
TNR_TSDI
CA_VCCEN
CA_VPPEN
CA_MIVAL
CA_MOSTRT
CA_MOVAL
CA_OOB_EN
3
2
1
0
CA_ADD_EN
5 6 7
CA_VSN
CA_MICLK
CA_DATA
CA_CDN
N
IREF_LVDS
N P
B
CLK
N P
C
N P
D
N P
E
LOUT2_A
N P
LOUT2_B
LOUT2_CLK
N P
LOUT2_C
N P
LOUT2_D
N P
LOUT2_E
N P
P
N
P
A
N P
NC
NC NC
NC
F704 D7 F705 D7 F706 D7 F707 D7 F708 D7 F709 D7 F710 D7 F711 D7 F712 D7 F713 E7
3710 G7 3711 H1 3714 H2 4700 H6 4701 H2 4702 G4 7600-11 B2 7600-12 F5
K
181615
6
7600-5 B5 F700 B6 F701 H2 F702 C7 F703 C7
E
F
3707-2 F6 3707-3 F6 3707-4 F6 3708-1 F6 3708-2 F6 3708-3 F6 3708-4 F6 3709-1 F8 3709-2 G8 3709-3 F6
L
M
8
C
B
3709-4 G6
G
H
N
O
P
20
I
17
NC
3
O
20
K
A
B
P
91413
G
I
89
2
19
H
11
J
1
" X700 ~ X799 "
7
D
7
G
5
10 11 12
A
B
C
D
E
F
56
owner.
8
A
9
N
18
M
L
1413
NC
789101112
1234567
3700 B6 3707-1 F6
C
19
BD 12NC : 3139_123_64431 / 64551 / 64571
106
D
J
F
543
All rights reserved. Reproduction in whole or in parts
MULTI 12NC : 3139_123_64421 / 64541 / 64561
CELL 12C : 8239_125_14871
I
171615
2
4
1234
PNX8543 - VIDEO STREAMS / LVDS OUTPUT
E
12
H
10 11 121
is prohibited without the written consent of the copyright
A
B
C
D
E
F
G
H
I
3710 33R
3708-1 1 8
36
47R
CHECK
3708-3 47R
03101
3
2
2009-01-16
DC343514
2009-01-16
SV
**** *** *****
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-10-17
05
3PC332
25
********SETNAMECHN
CLASS_NO
1
SUPERS.
1
NAME
DATE
Vincent Yap / Lee CW
3139 123 6443
TV543_2K9
PCB SB SSB BD
A2
2008-10-17
-- -- --
2008-12-161
3709-4
47R45
36
4700
3709-3
47R
AM24
AN22
AP22
AK22 AL22
AL23 AM23
AN23
AP23
AN24
AP24
AL24
AP18
AK18 AL18
AL19
AM19
AN19
AP19
AN20
AP20
AL20
AM20
PNX85439E
7600-5
AK19
AN18
LVDS
4702
C11 D11 E11 A10
A33
J32 A34
C12
B10
B9
C10
D10 E10 A9 A11
H30 J33
J31
E32
E34
D34
C31
J34
C34
C33
H34 F34 F32 F31
G34
E33 C32 B32 J30 K34 K33
B31
K32 A32
D31 A31
H32H31
G33 G31 G30
TUN_CA
7600-12
PNX85439E
F700
27
45
47R
3708-2
F701
3707-4 47R
813709-1 47R
VDDA-LVDS
4K7
3711
2747R3707-2
36
18
47R3707-3
3707-1 47R
K31
W5 F11 F12
AF29
AG29
AM30R5AN30
AP30
AN31
AP31
AP32
M30
T29 U29 V29
W4
W29
Y29
AA29
AB29
AC29
AD29
AE29
AL29
AM29
T4
AN29
K29
L29 M29 N29 P29 R29
AM26
AN26
AP26
R4
Y4
AM27
AN27
AK28 AL28
AM28
AK29
AK15
AL17
AN21
C4
AP21
AL25
AM25
AN25
AP25
AK26
AL26
7600-11
PNX85439E
R2
F13 F14 F15 C14 AJ11 AL12
NC
3700
12K
4701
72
RES
47R
3709-2
10K
3714
453708-4 47R
F712
F711
F709
F710
F704
F703
F713
F702
F708
F707
F706
F705
RX51001CLK+
RX51001C­RX51001C+
RX51001D­RX51001D+
RX51001E-
RX51001E+
CA-MDI2
CA-MDI6
RX51002B-
CA-MISTRT
CA-MIVAL
CA-MDO(7)
+3V3-PER
FE-ERR FE-ERR
RX51001A+
RX51001A-
RX51001CLK-
CA-MDO(1) CA-MDO(2) CA-MDO(3) CA-MDO(4) CA-MDO(5) CA-MDO(6)
CA-MOSTRT
CA-CD1 CA-CD2
CA-VS1
CA-MOCLK_VS2
IRQ-CA
CA-MOCLK_VS2
FE-DATA(0:7)
FE-DATA(0) FE-DATA(1) FE-DATA(2) FE-DATA(3) FE-DATA(4) FE-DATA(5) FE-DATA(6) FE-DATA(7)
CA-MDO(0:7)
CA-MDO(0)
CA-RST
CA-DATADIR
CA-DATAEN
CA-ADDEN
FE-CLK
FE-SOP
FE-VALID
CA-MDI0 CA-MDI1
CA-MDI3 CA-MDI4 CA-MDI5
CA-MDI7
CA-MICLK
CA-MOVAL
RX51002A-
RX51002A+
RX51002B+
RX51002C­RX51002C+
RX51002D­RX51002D+
RX51002E-
RX51002E+
RX51002CLK-
RX51002CLK+
RX51001B-
RX51001B+
18440_504_090223.eps
090224

SSB: PNX8543 - Video Streams/LVDS Output

EN 95Q548.1E LA 10.
2009-Apr-03
Page 96
Circuit Diagrams and PWB Layouts
VIA
GND_HS
VO
IN-
VDD
1
SHUTDOWN
BYPASS
2
GND
2
1
C
I819 B3 I821 C2 I822 C3 I823 C3 I833 A7 I835 B7 I836 D7 I837 E7 I839 C12 I840 C13 I845 H6 I846 H6 I847 H7 I848 H7 I849 H7
I850 H9 I851 H9
RES
PNX8543 - AUDIO AMPLIFIER
7830 G7 F800 G1 F801 G2 F802 G2 F803 B9 F804 D9 F805 E9 F808 C11 F809 A9 F811 C14 F812 B4 I810 F2 I811 F3
CELL 12C : 8239_125_14871
K
16
I
9
10
I812 F4 I813 F3 I814 A7 I815 B7 I816 D7 I817 E7 I818 B2
5
3835-4 H6 3839 H7 3840 D9 3841 C11 4801 A3 6801 B2 7801 B4 7802 C3 7803-1 A8 7803-2 B8 7803-3 D8 7803-4 E8 7807-1 C12 7807-2 C14 7808 F2 7809 F3
L
11
N
104
owner.
O
20
J
5
D
BD 12NC : 3139_123_64431 / 64551 / 64571
MULTI 12NC : 3139_123_64421 / 64541 / 64561
3819-1 B3 3819-2 B3 3819-3 C3 3819-4 C3 3820 C2 3821 G1 3822 G1 3830-1 B13 3830-2 C13 3830-3 C11 3830-4 C11 3831 A9 3832 C9 3833 B12 3834 E9 3835-1 H6 3835-2 G7 3835-3 F7
F
RESERVED FOR ITV
17
O
G
is prohibited without the written consent of the copyright
15
3810 F2 3811 F3 3812 F3 3813 F4 3814 G2 3815 G3 3816-1 B8 3816-2 B7 3816-3 C7 3816-4 C8 3817-1 D7 3817-2 D8 3817-3 F7 3817-4 F8 3818 B2
F
4
B
C
2
1223
191311
1918
2824 G2 2825 G2 2826 A7 2827 B7 2830 D7 2831 E7 2832 H6 2833 H6 2834 G8 2835 G7 2836 G7 2837 H6
139
17
6
J
RES
P
RES
M
P
H
10 11 12 13 14
A
B
C
D
E
F
G
H
A
B
A
H
G
K
20
BATHROOM SPEAKER
L
8
7
1
1
All rights reserved. Reproduction in whole or in parts
A
6
RES
M
6789
EMC
N
18
E
15
0R
4 5 6 7 8 9 10 11 12 13 14
12345
14
D
14
RES
E
EMC
B
C
D
E
F
G
H
1800 G1 2800 B2 2806 A8 2808 C8 2809 E8 2810 F8 2811 D7 2812 E7 2822 C12 2823 B8
123
" X800 ~ X899 "
16
C
3 12
I
8
7
2824
1n0
220p
2831
I847
5
3819-4
22K
4
45
F811
22K
3830-4
1u0
2822RES
I817
3841
I822
I850
1K0
3832
I835
I837
12
13
14
4
11
LM324
7803-4
220p
2827
3833
10K
I823
I821
3839
10K
3831
1K0
+AUDIO-POWER
F805
2825
1n0
3835-1 22K18
22K3835-4 4 5
10
9
8
4
11
LM324
7803-3
I836
7801
BC807-25W
BC847BW
7802
3816-4
10K
54
F812
AUDIO-VDD
3n3
2812
F801
I810
BC847BW
7808
2808
33p
AUDIO-VDD
63
3818
4R7
3830-3
22K
I814
I851
10K
3811
2836 33p
33p2835
I812
I813
1u0
2800
3810
10K
I816
I815
5K6
3813
4801
I839
36
3820
10K
10K
3817-3
1
7
F804
3
4
9
2
6
5
8
10 11
7830
TPA6111A2DGN
AMPLIFIER
Φ
F800
F802
2810
33p
10K
3816-1
18
33p
2823
I840
10K
18
3817-1
+3V3
33p
2809
3812
5K6
DATE
NAME
1
SUPERS.
1
CLASS_NO
********EMANTESNHC
25
3PC332
06
2008-10-17
ROYAL PHILIPS ELECTRONICS N.V. 2008
**** *** *****
SV
2009-01-16
DC343514
Hor Siew Lee
2009-01-1623
13010
1 2008-12-16
-- -- --
2008-10-17
A2
PCB SB SSB BD
TV543_2K9
3139 123 6443
CHECK
I849
I846
2830
220p
LM324
7803-1
3
2
1
4
11
2 3
45
502382-0370
1800
1
2826
220p
AUDIO-VDD
AUDIO-VDD
6801
BZX384-C6V8
1u0
2834
3814
470R
27
3840
1K0
22K3835-2
18
AUDIO-VDD
1
AUDIO-VDD
3819-1
22K
7807-1 BC847BPN(COL)26
I818
18
1u02837
3830-1
22K
I848
1u02832
7
4
11
LM324
7803-2
5
6
3835-3 22K36
1K0
3834
7
I811
3816-2
10K
2
100R3822
27
3819-2
22K
470R
3815
7809
BC847BW
F808
AUDIO-VDD
F809
3830-2
27
22K
10K
3817-2
27
2811
3n3
3821 100R
I845
I819
I833
2833 1u0
4
100n
2806
3817-4
10K
5
4
F803
BC847BPN(COL)
7807-2
5
3
3816-3
36
36
10K
+AUDIO-POWER
3819-3
22K
AUDIO-RESET
ADAC(3)
ADAC(4)
HP_ROUT
HP_LOUT
A-STBY
ADAC(7)
AUDIO-OUT-L
AUDIO-OUT-R
ADAC(5)
ADAC(6)
AUDIO-CL-L
AUDIO-CL-R
ADAC(8)
A-PLOP
AUDIO-RESET
ADAC(3)
ADAC(4)
18440_505_090223.eps
090224

SSB: PNX8543 Audio Amplifier

EN 96Q548.1E LA 10.
2009-Apr-03
Page 97

SSB: PNX8543 Audio

SPDIF_IN
ADAC7BUF ADAC8BUF
P
NADAC5
P
NADAC4
P
N
P
AOUT
ADAC6 N
RESREF
VCOM_ADC
P
OSCLK
VSSA_ADAC
7
P
N
R
AIN_5
SPDIF_OUT
ADAC1
AGND1
NEG
R
L
I2S_OUT_WS
VRNEG
VREF
I2S_OUT
I2S_OUT_SD
ADAC
VREF_AADC
AADC
AADC
POS
8
I2S_IN_WS
SD4
SD3
SD2
SD1
4
OSCLK SCK
I2S_IN
I2S_IN
3
2
1
L R
1 2
AIN_1
L R
AIN_2
L R
AIN_3
L R
AIN_4
L
ADAC3
VDDA_3V3_DAC
SCK
NADAC2
OUT IN
INHBP
COM
C
2900 B5
5
3
BD 12NC : 3139_123_64431 / 64551 / 64571
MULTI 12NC : 3139_123_64421 / 64541 / 64561
X
100K
X
P
10
22K
3927
XX
4
18
10
11 12
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
2910-1 B7 2910-2 B7
16
X
CELL 12C : 8239_125_14871
33K33K
A
FLAVORS 22"
123456789101112
123456789
2921 C11 2922 E11
3925
X
100K
X
PNX8543 - AUDIO
owner.
4903 & 4904
16
M
33K
87
P
E
33K33K
15K
3924
2901 B5 2902 B5 2903 C5 2904 C5 2905 D5 2906 D5 2907 E5 2908 E5 2909 E5
2935 E4 2936 E11
4905 & 4906
33KX33K
X
OTHERS
YES
X
F
X
4901 & 4902
G
21
2910-3 C7 2910-4 C7 2912 C7 2915-1 C9 2915-2 C9 2915-3 C9 2915-4 C9 2919 C10 2920 C10
3903-2 C2 3903-4 C2
33K
X
3926
17
I
3923
B
FLAVORS 32"/42"
17
is prohibited without the written consent of the copyright
YES
33K
YESX
2923 E11 2924 G5 2925 G6 2926 A4 2927 B4 2928 B4 2929 C4 2930 C4 2931 C4 2932 D4 2933 D4 2934 E4
3912-1 E9 3912-2 E9
All rights reserved. Reproduction in whole or in parts
220K
1
C
33K
5
X33K
33K
L
22K
13
J
G
33K
33K
X
33K
2937 E11 2938 E11 2939 E12 3900-1 B2 3900-2 B3 3900-3 A3 3900-4 A2
3925-1 D3 3925-2 E3
PnS SS
RES
3904
K
RES
D
9 15
J
3
8
3904-3 C2 3904-4 B2 3905-3 C3 3905-4 B3 3906 G6 3907 G6 3908 G6 3909 C11 3910 C11 3911-1 F9 3911-2 F9 3911-3 D9 3911-4 D9
4906 D4 5900 B7
11
10
RES
I
N
C
X
O
6
N
3912-3 E9 3912-4 D9 3913 F9 3914 F9 3915 F9 3923-1 D3 3923-4 C3 3924-1 D2 3924-2 D2
I906 C4 I907 D4
RES
F
33K
A
15
YES
11 20199
3926-1 E2 3926-2 E2 3927-1 E3 3927-2 E3 3932 F6 3933 F6 4901 B4 4902 C4 4903 D3 4904 E4 4905 C4
I917 F7 I918 F7
12 13
H
12
K
3903
2
" X900 ~ X999"
X
18
5901 C10 5902 B7 6900 E2 6901 D2 7600-7 C7 7900 B11 F901 C10 F902 F10 I901 A4 I902 B4 I903 B4 I904 C4
I905 C4
M
I919 G7 I920 F9 I921 B7 I922 C10
4
L
B
7
H
2019
E
14
6
D
3905
I908 D4 I909 E4 I910 E4 I911 C9 I913 C11 I914 C7 I916 B7
4904
X
O
14
4903
3926-1 33K18
I918
I908
33p
2907
RES
F902
1u0
2929
RES
I909
3914 33R
27
I920
3925-2
33K
I916
27
2931
1u0
5
33K
3900-2
100n
2915-4
4
2915-3
100n
36
45
33R
3911-4
36
45
3911-3 33R
33R3912-4
4906
27
4905
8
100n
2915-2
2915-1
100n
1
AN8
AJ10
U5 C19
V1
AM7
AK9
AK7 AL7
AM8 AM9
AP8
AM15 AL15
AM14
AA2
Y2
Y3 AA1 AA3 AA4
Y1
B1
AM6 AN6
AP6 AM5
AN5 AP5
C1
AN15 AL14
AK14 AP15
AM10
AL9
AP9
AL8
AN9
D3
AN7 AP7
AK6 AL6
AM12 AN12 AP12
AM11
AL11
AK11
AN11 AP11
AL10
AP10 AN10
AN14 AP14
AL13
AP13 AN13 AM1333K27
AUDIO
PNX85439E
7600-7
3924-2
4K7
3906
1u02932
5900
33R
27
45
33R3911-2
3900-4 33K
5901
33R
1u0
2933
2910-4
100n
45
100n
2910-3
36
2718
2910-2
100n 100n
2910-1
2
7
33R3912-2
3905-4
33K
45
VDDA-AUDIO
36
33K
3905-3
AUD_GND
I921
VDDA-AUDIO
3n3
2923
2922
3n3
4 5 33K3903-4
F901
2927
1u0
I919
33R
5902
RES
33p
2909
2919
10u
3912-3 33R
36
3915 68R
4901
4902
4
2
1
3
5
I901
I914
LD2985BM33R
7900
I922
I904
I902
1u0
2926
45
3904-3 3 6
3904-4 33K
33K
3908
75R
1
8
3912-1
33R
33K3924-1 1 8
1u0
2935
RES
33p
2904
I903
I917
33p2903
RES
RES
2901
I911
33p
33K3926-2 2 7
3903-2 33K27
RES
2902
33p
45
2928
1u0
8
33K
3923-4
3911-1 33R
1
I905
2908
33p
RES
I906
22K
3910
3909
22K
2921
10u
RES
33p
2900
AUD_GND
DATE
NAME
1
SUPERS.
1
CLASS_NO
********EMANTESNHC
25
3PC332
07
2008-10-17
ROYAL PHILIPS ELECTRONICS N.V. 2008
**** *** *****
SV
2009-01-16
DC343514
Hor Siew Lee
2009-01-1623
13010
1 2008-12-16
-- -- --
2008-10-17
A2
PCB SB SSB BD
TV543_2K9
3139 123 6443
CHECK
33R3913 RES
33K
3925-1
18
2924
100n
2934
1u0
36
3900-3
33K
I913
3907
4K7
I910
2905
10u
2912
VDDA-AUDIO
33p
RES
3933
VDDA-AUDIO
33p
47K
RES
2906
47K
3932
10u
2925
I907
+5V
3927-2
7281
33K
3927-1
33K
3923-2
33K
27
+3V3
VDDA-DAC
10n
2920
6900
CDS4C12GTA
12V
2930 1u0
AUD_GNDAUD_GND
3900-1 1 8 33K
6901
CDS4C12GTA
12V
3n3
3n3
2938
2939
3n3
2936
2937
3n3
ADAC(4)
ADAC(3)
ADAC(2)
ADAC(1)
ADAC(5)
ADAC(7)
ADAC(4)
ADAC(3)
ADAC(8)
ADAC(8)
ADAC(7)
ADAC(7) ADAC(8)
SPDIF-IN
AUDIO-IN5-R
AUDIO-IN4-R
AUDIO-IN3-R
AUDIO-IN5-L
AUDIO-IN3-L
AUDIO-IN2-L
AUDIO-IN2-R
AUDIO-IN1-L
AUDIO-IN4-L
AUDIO-IN1-R
ADAC(1)
ADAC(2)
SPDIF-OUT-1
ADAC(6)
18440_506_090223.eps
090224
Circuit Diagrams and PWB Layouts
EN 97Q548.1E LA 10.
2009-Apr-03
Page 98
Circuit Diagrams and PWB Layouts
DAC
AI11
SYNC_IN_2
CVBS1Y
PC3_AI3
PC3_AI2
PC3_AI1
N
PC2_AI3
AI54
AI53
AI52
AI2P_IF AI2N_IF
HSYNCIN
VSYN
AGC
AI33
REF 3
REF 5
AI43
AI42
AI41
SYNC_IN_1
AI4N
AI44
AI31
AI23
P N
AI22
AI21
PC1_AI1
PC2_AI2
PC2_AI1
CVBS2C
P
BIAS
AI51
REF 4
AI32
REF 2
REF 1
GND_A3_TG
PC1_AID
PC1_AI3
PC1_AI2
OUT
IN
AI5N
CURREF
PC3_AID
PC2_AID
AI1P_IF
AI1N_IF
AI13
AI12
C
IA29 A6 IA30 G12 IA33 F12 IA35 E3 IA43 E13 IA44 D13 IA45 H11
IA46 H12IA13 G6 IA14 H5 IA15 H5 IA16 H5 IA17 C12 IA18 C13
A
B
Y
3A33
27R
A
E
N
O
FOR CINCH
20
2A11
19
FOR CINCH
IA19 F13
IA20 E12 IA21 F12 IA22 C12 IA24 D12 IA25 F12 IA27 H12 IA28 A6
FA11 C6 FA13 B6 FA14 D3 IA03 E3
IA04 E3 IA05 F3
56R
*
CINCH
O
M
F
L
3A29
J
owner.
Y
Y
IA06 F3 IA07 F3 IA09 F6 IA11 G6 IA12 G53A56 D5
4A01 D12 4A02 E12 4A03 E12 4A04 E5 4A05 E5
5
2A44
FOR SCART
N
4A06 F5 5A00 C12
5A01 B12 5A02 C12 5A03 F12 5A04 E12 5A05 D12 5A06 B6 5A07 C6
5A08 D6 7600-1 D3 CA01 H10
7
*
**
3A47 H12 3A49 H11
13
I
N
N
2A67
2A66
2A65
Y N
Y
N
H
Y
18
56R
C
3A50 D3 3A51 F3 3A52 E2 3A53 E2 3A54 B5 3A55 C5
SCART
1
N
17
C
15
E
3A29 F12 3A30 E13 3A31 E12 3A32 D13 3A33 D12 3A34 G14
3A35 G12 3A36 G14 3A37 G12 3A38 H14 3A39 H12 3A40 A6 3A41 A6
3A42 B6 3A43 B7 3A44 A6 3A45 B7 3A46 G14
Y
42
CINCH
56R
27R
3A32
3A08 E3 3A09 F3 3A10 F2 3A11 F2 3A13 D3
3A14 B5 3A15 C6 3A16 C5 3A17 C6 3A18 D5 3A19 D6 3A20 F14
3A21 F12 3A22 C13 3A23 C12 3A24 B13 3A25 B12 3A26 C13 3A27 C12
3A28 F13
G
3
N
2A41
11 12
121
M
47R
47R
D
18R
8
27R
Y
*
2A68 F11 2A69 F11 2A70 E10
2A71 G6 2A72 C5 2A73 C6 2A74 C5 2A75 C6 2A76 D5 2A77 D6
3A06 E3 3A07 E3
15
P
K
16
YYN
*
4
2A41 F11 2A42 F12 2A43 F12 2A44 E11
2A45 E12 2A46 E12 2A47 D11 2A48 D12 2A49 D12 2A50 F11 2A51 G6
2A52 G11 2A53 H11 2A54 A7 2A55 B7 2A56 A7 2A57 G11 2A59 H12
2A60 H11 2A65 E9 2A66 E10 2A67 E10
K
F
2A47
D
*
* *
7
FOR SCART
FOR CINCH
FOR SCART
1716
SCART
18
H
Y
PNX8543 - ANALOG AV
2A70
2A32 C11 2A33 C12 2A34 C12 2A35 B11 2A36 B12 2A37 B12
2A38 C11 2A39 C12 2A40 C12
2A10
2A12
*
3A31
N
20
L
Y
N
13
14
19
G
N
105
I
2A20 F6 2A21 F6 2A22 G6 2A23 G6
2A24 G6 2A25 G6 2A26 H6 2A27 H6 2A28 H6 2A29 H6 2A30 H6
2A31 F12
J
9
*
*
*
2A69
2A68
3A30
6
2A03 E3 2A04 F2 2A06 B6 2A07 C6 2A08 D6 2A09 D5
2A10 E11 2A11 E11 2A12 D11 2A13 E6 2A14 E6 2A15 E6 2A16 E6
2A17 F6 2A18 F6 2A19 F6
N
N
18R
MULTI 12NC : 3139_123_64421 / 64541 / 64561
is prohibited without the written consent of the copyright
CELL 12C : 8239_125_14871
B
All rights reserved. Reproduction in whole or in parts
15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A
B
*
*
47R
D
E
F
G
H
2A02 D3
6
18R
10
4111
*
1234567891011121314
" XA00 ~ XA99 "
3A28
32
SCART
9
BD 12NC : 3139_123_64431 / 64551 / 64571
P
8
*
*
C
D
E
F
G
H
A
B
C
IA25
3A34
27R2A50
22n
22n
2A06
100n
2A59
2A17 22n
IA06
3A23
47R
3A25
47R
22n2A30
3A33
2A20
IA46
22n
2A21 22nRES
56R
3A15
2A23 22n
3A29
3A35
47R
1u8
5A05
2A57 22n
22n2A53
27R
3A20
IA21
3A10
3A28
RES
75R
27R
3A24
22n2A52
3A49 390R
IA24
2A33
150p
3A26
27R
2A40
150p
27R3A36
3A31
3A06
10n2A13
10K
180R
3A51
IA12
18R
3A18
3A07
4K7
3A53 100R
18R
IA07
3A44
IA11
22n
2A31
47R
3A47
IA14
5A03
1u8
22n2A69
IA18
IA20
2A5522n
2A16 22n
27R3A38
FA13
IA33
2A27 22n
2A5422n
180R
3A50
2A47 22n
IA45
22n
2A07
2A71 100p
22n
2A03
IA17
150p
2A49
22n2A19
180R
3A09
IA29
56R
3A45
3A13
180R
3A22
27R
3A30
4A04
IA05
IA28
RES
270p
2A04
2A29 22n
47R
3A37
1u8
5A02
2A39
150p
18R
3A14
100R3A52
22n2A22
FA14
2A34
150p
150p
2A46
22n
2A65
22n
2A08
SIF-GND
2A10 22n
150p
CA01
2A48
2A43
150p
IA04
2A32
22n
SIF-GND
3A27
47R
3A19
IA22
56R
3A4218R
22n2A28
1u8
4A06
5A01
4A05
IA15
4K7
3A08
2A15 22n
RES
2A09
10n
3A16
18R
FA11
IA30
56R
IA35
3A41
IA09
150p
2A45
5A04
1u8
J4
H4
G2
R1 R3
T2
U1
M1 M3
M4 M5
K1
K3 K4 K5
N4
L4
B3
A3
B2
A2
C3
J5
T1 P1
P3 P4 P5
H1 H2 H3
G3
F2 F3 F4 G1
F1
A1
D2 D1
L1 L2 L3
E2
E1
J1 J2 J3
G4
PNX85439E
7600-1
C2
N1 N2 N3
IA19
ANALOG_VIDEO
IA27
2A25 22n
IA16
3A32
150p
2A42
3A43
56R
4A02
22n2A14
2A70 22n
22n2A68
47R
3A39
22n 2A56
3A46 27R
22n2A26
22n
2A41
3A21
47R
2A37
4A03
150p
IA03
330n
5A06
3A54
18R
RES
RES
5A00
1u8
2A18
22n
RES
2A77
100p
100p
2A76
RES
2A36
150p
RES
22n
2A35
3A11RES 75R
2A12 22n
22n
2A11
56R
3A17
RES
2A66 22n
2A02
270p
100p
2A72
RES 2A73
100p
IA44
RES
4A01
RES
100p
2A75
2A74
100p
RES
5A07
330n
RES
3A55RES
18R
22n2A44
330n
5A08
IA13
RES
RES 3A56
18R
2A24 22n
2A51 22n
IA43
2A67 22n
2A60 12p
18R
3A40
22n
2008-12-161
03101
2A38
**** *** *****
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-10-17
08
3PC332
25
********SETNAMECHN
CLASS_NO
1
SUPERS.
1
NAME
DATECHECK
3139 123 6443
TV543_2K9
PCB SB SSB BD
A2
2008-10-17
-- -- --
SC1-B
AV2-PB_SC2-B
SC1-G
AV2-Y_SC2-G
R-VGA
H-SYNC-VGA
AV3-Y
AV3-PB
AV3-PR
3
2
2009-01-16
Vincent Yap / Lee CW
DC343514
2009-01-16
SV
B-VGA
G-VGA
AV2-PR_SC2-R
SC1-R
CVBS1
Y_CVBS-MON-OUT
V-SYNC-VGA
SIF
CVBS2
FRONT-C
FRONT-Y_CVBS
CVBS
18440_507_090223.eps
090224

SSB: PNX8543 Analog AV

EN 98Q548.1E LA 10.
2009-Apr-03
Page 99

SSB: PNX8543 SDRAM

M_DQ
M
M_A
M_BA
M_CLK
M_DQM
M_DQS0
N P
M_DQS1
N P
M_DQS2
N P
M_DQS3
P
0 1 2 3 4 5 6 7 8 9 10 11 12
0 1 2
M_CASB
M_CKE
N P
M_CSB
0 1 2 3
N
RASB
ODT
IREF
31
30
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
VREF
WEB
0
1
2
3
4
5
6
7
12
11
10
9
8
7
6
5
4
3
0 1 2 3 4 5 6 7 8 9 10 11 12
CK
VDDL
VREF
VSSDL
14
VDDQ
QSSVSSV
BA
A
LDQS
UDQS
NC
DQ
CKE WE
ODT
RAS
1
CS
CAS
0
0 1 2
VDD
LDM
UDM
15
13
12
11
10
9
8
7
6
5
4
3
0 1 2 3 4 5 6 7 8 9 10 11 12
CK
VDDL
VREF
VSSDL
14
VDDQ
QSSVSSV
BA
A
LDQS
UDQS
NC
DQ
CKE WE
ODT
RAS
1
CS
CAS
0
0 1 2
VDD
LDM
UDM
15
13
C
J
12
4
3B37 G12 3B38 G12 3B39 G12 3B40 G12 3B41 H12 3B42 H12 3B43 H12 3B44 H12 3B45 H12 3B46 H12 3B47 B10 3B48 B12 3B49 B10 3B50 B12 7600-2 A5 7B00 F10 7B01 F3 FB00 B11
O
P
All rights reserved. Reproduction in whole or in parts
FB01 B10 FB02 C6
H
J
17
CELL 12C : 8239_125_14871
H
is prohibited without the written consent of the copyright
10
3B27 H8 3B28 H9 3B29 H8 3B30 H9 3B31 G12 3B32 G12 3B33 G12 3B34 G12 3B35 G12 3B36 G12
K
M
F
5121
13
O
2
14
" XB00 ~ XB99 "
13
3B12 G6 3B13 G6 3B14 G6 3B15 G6 3B16 G6 3B17 G6 3B18 G6 3B19 G6 3B20 H6 3B21 H6 3B22 H6 3B23 H6 3B24 H6 3B25 H6 3B26 H8
L
7
1918
M
19
20
N
2B37 F12 2B38 F12 2B39 F12 2B40 F12 2B41 F13 2B42 H12 3B00 C3 3B03 C7 3B04 D7 3B05 H2 3B06 H2 3B07 H3 3B08 H2 3B09 H3 3B10 G6 3B11 G6
863
2B17 F6 2B18 F6 2B19 F6 2B20 F7 2B21 H6 2B22 B10 2B23 E10 2B24 E10 2B25 F8 2B26 F8 2B27 F8 2B28 F8 2B29 F8 2B30 F9 2B31 F9 2B32 F9 2B33 F9 2B34 F11 2B35 F11 2B36 F12
owner.
L
161
20
K
C
F
3
B
D
I
4
2B08 F2 2B09 F2 2B10 F3 2B11 F3 2B12 F3 2B13 F5 2B14 F5 2B15 F6 2B16 F6
B
PNX8543 - SDRAM
A
G
I
12
G
16
6
BD 12NC : 3139_123_64431 / 64551 / 64571
MULTI 12NC : 3139_123_64421 / 64541 / 64561
1514
A
B
C
D
E
F
G
H
I
P
E
10 18
11
2 3 4 5 6 7 8 9 10 11 12 13
1 2 3 4 5 6 7 8 9 10 11 12 13
A
D
C
E
9
17
A
B
C
D
E
F
G
H
I
2B00 D7 2B01 D6 2B02 E5 2B03 E5 2B04 F1 2B05 F2 2B06 F2 2B07 F2
N
115
1
85
RES
9
7
1%1%1K0
3B50 3B48
1K0
3B12
33R
330u
2B22
N31 N32
AA31
V31
V32
AB32
AE32
6.3V
AK31
AJ34 AJ31 R34 R31
AG33 AG34
AH31 AH32
N34 N33
U32 M31
AL34
R32 M32
AL33 AE34 AK34 AF34 AG32
R33 U34
AH33
V34
M33
T33
M34
P31 T32 P32
U31
W31
AH34 AK33
AJ32 AL32 AL31 AF31 AK32 AF32
P34 T34
AC32 W34 Y31
AC34 AD33 AA32
W32
AE31
AB33 AB34
MEMORY
AA34 AE33
AD34 V33 Y32
AA33 AD31 Y34 AD32 W33
PNX85439E
7600-2
3B19
33R
+1V8-PNX85XX
33R
3B25
33R
3B30
3B29
33R
3B05
220R
RES
3B32
33R
33R
3B31
3B09
33R
FB02
FB01
2B05
100n
100n
2B04
33R
3B11
33R
3B08
F8
H2
K3
220R
3B00
P9J7A7H8B2
B8
D2
D8
E7
F2
C7C9E9G1G3
G7
J2
A3
E3
J3
N1
A1E1J9M9R1
J1
A9
G9
C1
C3
L1 R3 R7 R8
K9
K7
B3
B7 A8
H1 H9 F1 F9 C8 C2
F3 F7 E8
A2
E2
G8 G2
D7
D3
D1
D9
B1
B9
H7
H3
N7 P2 P8 P3
L2 L3
L7
J8
K2
K8
L8
M8 M3
M2 P7 R2
M7 N2 N8 N3
7B00
HYB18TC512160B2F-3S
Φ
SDRAM
100n
2B36
2B35
100n
3B06
33R
3B46
33R
33R
3B45
3B10
33R
+1V8-PNX85XX
100n
2B01
1u0
2B03
2B02
330u 6.3V
RES
33R
3B20
3B03
5K6
100n
2B33
2B42 100n
+1V8-PNX85XX
33R
3B18
3B17
33R
3B28
33R
33R
3B27
FB00
820R
3B04
100n
2B06
3B3433R
100n
2B09
2B08
100n
2B30
100n
100n
2B29
2B13
100n
+1V8-PNX85XX
100n
2B38RES
2B37
100n
RES
3B14
33R
33R
3B13
2B27
100n
100n
2B26
33R
3B40
3B39
33R
CHECK
3139 123 6443
TV543_2K9
PCB SB SSB BD
A2
2008-10-17
-- -- --
2008-12-161
03101
3
2
2009-01-16
Vincent Yap / Lee CW
DC343514
2009-01-16
SV
**** *** *****
ROYAL PHILIPS ELECTRONICS N.V. 2008
2008-10-17
09
3PC332
25
********SETNAMECHN
CLASS_NO
1
SUPERS.
1
NAME
DATE
3B49
1K0 1% 1%1K0
3B47
B8
D2
D8
E7
F2
F8
H2
K3
G7
J2
A3
E3
J3
N1
P9J7A7H8B2
R1
J1
A9G9C1C3C7C9E9G1G3
K9
K7
B3
B7 A8
A1E1J9
M9
C2
F3
F7
E8
A2 E2
L1 R3 R7 R8
D9
B1
B9
H7 H3 H1 H9
F1
F9 C8
L3
L7
J8
K2
K8
L8
G8 G2
D7 D3 D1
P7 R2
M7 N2 N8 N3 N7 P2 P8 P3
L2
SDRAM
Φ
HYB18TC512160B2F-3S
7B01
M8 M3
M2
2B11
100n
2B10
100n
100n
2B34
33R
3B07
2B15
100n
100n
2B14
100n
2B21
DDR2-VREF-DDR
2B12
100n
2B28
100n
2B32
100n
100n
2B31
RES
RES
2B20
22u
100n
2B18
2B17
100n
RES
100n
2B16RES
33R
3B42
3B41
33R
33R
3B16
3B15
33R
3B24
33R
3B23
33R
33R
3B22
3B21
33R
100n
2B07
3B36
33R
33R3B35
100n
2B25
33R
3B33
RES
RES
22u
2B41
2B39
100n
DDR2-VREF-CTRL
RES
220R
3B26
33R
3B44
3B43
33R
DDR2-VREF-CTRL
+1V8-PNX85XX
DDR2-VREF-DDR
RES 2B19
100n
33R
3B38
3B37
33R
RES
DDR2-VREF-DDR
100n
2B40
2B24
1u0
6.3V330u
2B23RES
2B00
100n
DDR2-BA2
DDR2-ODT
DDR2-RAS
DDR2-WE
DDR2-CLK_N
DDR2-D18
DDR2-D19
DDR2-BA2 DDR2-BA2
DDR2-WE
DDR2-CKE
DDR2-CLK_N
DDR2-CS
DDR2-D16 DDR2-D17
DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D29 DDR2-D27 DDR2-D31
DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D30
DDR2-DQM2 DDR2-DQS2_P DDR2-DQS2_N
DDR2-ODT
DDR2-RAS
DDR2-DQM3
DDR2-DQS3_P DDR2-DQS3_N
DDR2-D7 DDR2-D8 DDR2-D9
DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3
DDR2-DQS0_N DDR2-DQS0_P
DDR2-DQS1_N DDR2-DQS1_P
DDR2-DQS2_N DDR2-DQS2_P
DDR2-DQS3_N DDR2-DQS3_P
DDR2-A0 DDR2-A1
DDR2-A10 DDR2-A11 DDR2-A12
DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9
DDR2-BA0 DDR2-BA1
DDR2-CAS
DDR2-CLK_P
DDR2-CKE
DDR2-CLK_P
DDR2-CS
DDR2-D0 DDR2-D1
DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18
DDR2-D2
DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31
DDR2-D3
DDR2-D27 DDR2-D29
DDR2-D4
DDR2-D5
DDR2-D6
DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9
DDR2-DQM0 DDR2-DQS0_P DDR2-DQS0_N
DDR2-ODT
DDR2-RAS
DDR2-DQM1
DDR2-DQS1_P DDR2-DQS1_N
DDR2-WE
DDR2-A0 DDR2-A1
DDR2-A10 DDR2-A11 DDR2-A12
DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9
DDR2-BA0 DDR2-BA1
DDR2-CAS
DDR2-A0 DDR2-A1
DDR2-A10 DDR2-A11 DDR2-A12
DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9
DDR2-BA0 DDR2-BA1
DDR2-CAS
DDR2-CLK_P
DDR2-CKE
DDR2-CLK_N
DDR2-CS
DDR2-D0 DDR2-D1
DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15
DDR2-D3 DDR2-D2 DDR2-D4 DDR2-D5
18440_508_090223.eps
090224
Circuit Diagrams and PWB Layouts
EN 99Q548.1E LA 10.
2009-Apr-03
Page 100
Circuit Diagrams and PWB Layouts
EN 100Q548.1E LA 10.

SSB: PNX8543 Control MIPS/Flash/PCI

123456789
A
B
C
D
E
F
G
H
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
I
J
K
L
A
B
+3V3-PER
RES 3M01-2 10K2
RES 3M01-3
+3V3-PER
+3V3-PER
RES
3M07
3M09 3M10 10K
3M85 10K
C
D
RES 3M05
10K 10K3M08 10K
10K3M11 10KRES 3M77 10K3M78
10KRES 3M12 10K3M13RES
45
7
10K
PNX8543-BL-BOOST_SPI-CLK
PNX8543-LCD-PWR-ON_SPI-DI
E
F
G
H
I
J
K
owner.
L
DEBUG / RS232 INTERFACE
M
FOR FACTORY USE ONLY
TXD-UP
RXD-UP
N
TXD
RXD
O
FOR UART SERVICE CONNECTOR
P
MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571
CELL 12C : 8239_125_14871
1
2M92
234567891011
12345
PNX8543 - CONTROL MIPS/FLASH/PCI
BOOTMODE_PNX8543-BL-CTRL
RESET-SYSTEM
EJTAG-TCK
EJTAG-TDI EJTAG-TDO EJTAG-TMS
EJTAG-TRSTN
IRQ-CA RXD-MIPS TXD-MIPS
PBS-I2C-SCL
TXD-MIPS2 RXD-MIPS2
3M73 100R 3M74 100R
3M75
100p
2M93
EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS EJTAG-TRSTN
BOOTMODE_PNX8543-BL-CTRL
WC-EEPROM-PNX5100_SPI-DI IRQ-PCIIRQ-PCI IRQ-CA RXD-MIPS TXD-MIPS PNX8543-LCD-PWR-ON_SPI-DI
PNX8543-BL-BOOST_SPI-CLK
SPI-DO_I2C-SDA PBS-I2C-SCL
TXD-MIPS2 RXD-MIPS2
SCL2
SDA2
PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31
FM21
FM22
S4B-PH-SM4-TB(LF)
CDS4C12GTA
CDS4C12GTA
6M02
RES
6M01
RES
FM23
100R
FM24
100R3M76
FM25
CDS4C12GTA
CDS4C12GTA
6M00
6M03
RES
4M03
RES 1M01
1 2 3 4
56
K01SER 3M01-4 10K36 10K3M01-1 1 8
SPI-DO_I2C-SDA
100p
+3V3-PER
10K
10K3M06
3M00
FM39
4M02
FM28
FM40 FM41 FM42 FM43
3M14
100R
3M15
100R
3M16RES
100R
3M17RES
100R
3M18
100R
3M19
100R
3M90
100R
3M91
100R
FM37
5
1M04 4 2
3 7 8 1
MSJ-035-10A B AG PPO
54321
7600-8
PNX85439E
IM21
IM19
SCL-UP-MIPSSCL1
SDA-UP-MIPSSDA1
SCL-UP-MIPSSCL2
SDA-UP-MIPSSDA2
AP27
AN28
AN4 AP3 AP4 AM4 AL4
U2 U3 U4 L34 L32 L31 V2 V3 V4 V5
AK27 AL27
AP29
A29 B29 C29 D29 A28 B28 C28 D28 E28 A27 B27 C27 D27 E27 A26 B26 E24 D24 C24 B24 A24 E23 D23 C23 B23 A23 E22 D22 C22 B22 A22 E21
BL_PWM
RESET_SYS
TCK TDI TDO
TRSTN
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9
UA2_TX UA2_RX
CLK_27_OUT
SCL-SSBSCL3
SDA-SSBSDA3
SCL-SET
SDA-SET
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
PCI_AD
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
CONTROL
EJTAG
USB
SCL-UP-MIPS
SDA-UP-MIPS
SCL-SSB
SDA-SSB
SCL-SET
SDA-SET
PCI
TRDY
+3V3
+3V3
+3V3
10 11 12 13 14 15 16 17
6
SDA
SCL SDA
SCL SDA
FAULT
PWR_EN
RREF
USB_RPU
USB_ID
USB_VBUS
7600-3
PNX85439E
PCI_CBE
DEVSEL
FRAME
IDSEL
INTA_OUT
PERR SERR STOP TRDY
REQ_B
GNT_B
PLL_OUT
XIO_ACK
XIO_AD25
XIO_SEL
F33
1SCL
H33
1
D32
2
B33
2
D33
3SMT
G32
3
AN16
DM
AP16
DP
AL16 AK16 AM16
AM17 AP17 AN17
3M24
FM34
FM35
3M92
D21
0
C21
1
B21
2
A21
3
IM20
A30
CLK
A25 C26 B30 C30 D26
IRDY
E25
PAR
C25 D25 B25 E26
D30
REQ
E30
GNT
E31 E29
IM08
AP28
A20 B19
B20
0
C20
1
D20
2
E20
3
3M79
LIGHT-SENSOR
100K
RES
3M80
10K
3M81
10K
IM23
IM24 IM25 IM26
2K7
4K7
3M20
3M21 3M22
3M25
2K7
3M26
1K2
3M93
4K7
3M34 100R
0R FOR /82
3M29
27R
IM28
LED2
LED1
3M94 15K 3M95
3M27
1K2
3M35
100R
SCL1 SDA1
SCL2 SDA2
SCL3 SDA3
12K
1K5 10K
10K3M23
PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3
PCI-CLK-PNX8543
LIGHT-SENSOR
RC
LED2
LED1
KEYBOARD
15K
USB20-DM
USB20-DP
USB-OC
+3V3-PER
+3V3-PER
+3V3-PER
+3V3-PER
+3V3-PER
PCI-DEVSEL
PCI-FRAME
PCI-AD24
IM07
PCI-IRDY
PCI-PAR PCI-PERR PCI-SERR PCI-STOP PCI-TRDY
PCI-GNT
PCI-CLK-OUT
XIO-ACK
XIO-SEL-NAND
IM85
IM84
FM36
6M04
NUP1301ML3
+3V3
RES
3M82
7M80 BC847BW
+5V
3M99
7M81 BC847BW
RES
+5V
2M00
EMC
0R4
3M31
IM18
+T
3M32
100K 56K
3M33
3M36-1 10K 3M36-3
3M36-2 27
3M38-3 36 10K
+3V3-STANDBY
10K
10K
RES
3M83
IM88
+3V3-STANDBY
+3V3-STANDBY
10K
10K
RES
3M96
IM89
IM90
10n
2M01
EMC
RESRES
NUP1301ML3
5
10K3M38-2 27
IM86
IM87
2M95
3M88
10n
2M02
EMC
5M01
30R
6M05
18
4
+3V3-PER
PCI-CLK-OUT
3M86
100R
3M87
220R
47n
10K36 10K 10K3M36-4
10n
10n
10n
2M04
2M03
EMC
EMC
6.3V
2M05
47u
RES
2M16
3M37-2 10K
27 36
100p
2M91
100p
2M90
100R
100p
2M89
4M88
100p
2M88
3M89
100R
100p
2M87
3M98
10R
100p
2M86
USB
CONNECTOR
10n
1M09 FM38 FM08 FM09 FM10
292303-4
+3V3-PER
10K3M37-3 10K3M37-4 5 4
RESERVED
7M02
CDCVF2505
3M40
33R
+5V
CLKI
IM31
5M80 5M81 5M82 5M83 5M84 5M85 5M87 5M88
TO LED PANEL
1 2 3 4
+3V3-PER
6
VDD3.3V
GND
30R 30R 30R 30R 30R 30R 30R 30R
3M30
*
3M43
*
3M46
*
2M17
10n
2M18
100n
2M21
81
CLKO
10p
2M19
3
0
10p
2
1
IM32
1Y
5
2
IM33
7
3
IM34
4
1M20
FM00
1
FM01
2
FM02
3
FM03
4
FM04
5
FM05
6
FM06
7
FM07
8
1735446-8
" XM00 ~ XM99 "
FLASH
5M00
33R
3M68
+3V3-NAND
10K
18
3M59-1
36 45
27
3M54-2
36
3M54-3
45 18
RESERVED
1
CHECK DATE
+3V3-NAND
100R3M58-1
NAND-AD(0)
100R3M58-2 2 7
NAND-AD(1)
100R3M58-3 3 6
NAND-AD(2)
100R3M58-4 4 5
NAND-AD(3)
100R18
NAND-AD(4)
100R3M59-2 2 7
NAND-AD(5)
100R3M59-3
NAND-AD(6)
100R3M59-4
NAND-AD(7)
3M66
2K2
3M67
10K
SCL-SET
SDA-SET
EJTAG-TRSTN EJTAG-DETECT EJTAG-TDI
EJTAG-TDO
EJTAG-TMS
EJTAG-TCK
100R
100R 100R3M54-4 100R3M54-1
WP-NANDFLASH
FM45
6
10K
3M44-3
3
XIO-ACK
NAND-CLE NAND-ALE NAND-WEn NAND-REn
+3V3
+3V3
18
3M44-2273M44-1
RES
100K
3M45
********EMANTESNHC
3M44-4
PCB SB SSB BD
TV543_2K9
**** *** *****
SUPERS.
2008-10-17
45
+3V3
XIO-SEL-NAND
PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31
+3V3-NAND
+3V3-NAND
PCI-AD0 PCI-AD1 PCI-CBE1 PCI-CBE2
*
3M30 3M43 3M46
3M39
2M20
3M41
3M42
+5V
/32 N.S. N.S. 0R
33R
15p
33R
33R
FOR LIGHT GUIDE
502382-0470
/82 27R N.S. 27R
PCI-CLK-PNX8543
PCI-CLK-ETHERNET
PCI-CLK-PNX5100
IM35
1P09
1 2 3 4
56
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
She King Chuang
NAME
SV
DC343514
+3V3-NAND
7M00
NAND01GW3B2BN6F
NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)
NAND-CLE NAND-ALE XIO-SEL-NAND NAND-REn NAND-WEn WP-NANDFLASH XIO-ACK
PCA9540B
+3V3
10K
RES
3M70
22R3M72
29
0
30
1
31
2
32
3
41
4
42
5
43
6
44
7
16
CLE
17
ALE
IM13
9
CE
8
RE
18
WE
19
WP
IM14
7
R B
+3V3
100p
2M12
3
7M01
VDD
SC0 5
SCL14SD0
+3V3
10K3M71
RES
25
SC1
I2C
INP
-BUS
FIL
SD1 7SDA2
CTRL
VSS
6
RESERVED FOR DISPLAY
4M05 4M06
FOR BOUNDARY SCAN
RES
3M47 10K
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
USB
USB-OC
USB20-DM USB20-DP
PCI-DEVSEL PCI-FRAME
PCI-IRDY
PCI-TRDY PCI-STOP PCI-PERR
PCI-SERR
PCI-REQPCI-REQ PCI-GNT
4M84
RES
3M84
10K
RES
4M83
3M97
10K
19181716151413121110987
FM33
12
37
VCC
Φ
[FLASH]
1G
IO
NC
VSS
36
13
8
3139 123 6443
13010
12 13 14 15 16 17 18 19 20
6 7 8 9 10 11 12 13 14 15 16 17
1 2 3 4 5
6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47 48
FM11
FM12 FM13
FM17
FM14
FM15
FM16
10
20
100n
2M10
SCL-DISP
SDA-DISP
FOR FACTORY
USE ONLY
RES
+3V3
53261-0871
1
1 2008-12-16
2M11
1M03
10
100n
1 2 3 4 5 6 7 8
9
2009-01-16
1M01 J4
5M85 J10
1M03 J17
5M87 J10
1M04 K4
5M88 J10 6M00 K4
1M09 D10
6M01 J3
1M20 J11
6M02 J4
1P09 I12
6M03 K3
2M00 C8
6M04 E8
2M01 C8
6M05 E9
2M02 C9
7600-3 E6
2M03 C9
A
A
B
B
C
C
D
E
D
F
E
G
F
H
I
G
J
H
K
L
I
M
J
N
K
O
P
A2
L
18440_509_090223.eps
2M04 C9 2M05 D9 2M10 C16 2M11 C17 2M12 G15 2M16 D9
2M17 G10 2M18 G10 2M19 H11 2M20 H11 2M21 H11 2M86 K9 2M87 K9 2M88 J9 2M89 J9 2M90 I9 2M91 I9 2M92 K2 2M93 K3 2M95 I8 3M00 B4
3M01-1 C2
3M01-2 B2
3M01-3 B2
3M01-4 B2
3M05 C2
3M06 B4
3M07 C2
3M08 C2
3M09 C2
3M10 C2
3M11 C2
3M12 D2
3M13 D2
3M14 D4 3M15 D4 3M16 D4 3M17 E4 3M18 E4 3M19 E4 3M20 C6 3M21 D6 3M22 D6 3M23 D6 3M24 D6 3M25 D6 3M26 E6 3M27 E6 3M29 G6 3M30 G11 3M31 C8 3M32 D8 3M33 D8 3M34 F6 3M35 H7 3M36-1 E8 3M36-2 E8 3M36-3 E8 3M36-4 E8 3M37-2 F9 3M37-3 F9 3M37-4 F9 3M38-2 G8 3M38-3 G8 3M39 H11 3M40 H9 3M41 H11 3M42 H11 3M43 G11 3M44-1 I14 3M44-2 I14 3M44-3 I14 3M44-4 I14 3M45 K14 3M46 G11 3M47 K15 3M54-1 F13 3M54-2 F13 3M54-3 F13 3M54-4 F13 3M58-1 D13 3M58-2 D13 3M58-3 D13 3M58-4 D13 3M59-1 D13 3M59-2 D13 3M59-3 D13 3M59-4 D13 3M66 D13 3M67 E13 3M68 C13 3M70 J14 3M71 J15 3M72 K14 3M73 J3 3M74 J3 3M75 K3 3M76 K3 3M77 C2 3M78 C2 3M79 I6 3M80 J6 3M81 K6 3M82 I8 3M83 I8 3M84 J7 3M85 C2 3M86 I9 3M87 I9 3M88 J8 3M89 K9 3M90 E4 3M91 E4 3M92 E6 3M93 E6 3M94 C7 3M95 C7 3M96 J8 3M97 K7 3M98 K9 3M99 J8 4M02 B5 4M03 C4 4M05 H15 4M06 H15 4M83 K7 4M84 J7 4M88 J9 5M00 C13 5M01 C9 5M80 J10 5M81 J10 5M82 J10 5M83 J10 5M84 J10
7600-8 B5 7M00 C15 7M01 G15 7M02 G10 7M80 J8 7M81 K8 FM00 J10 FM01 J10 FM02 J10 FM03 J10 FM04 J10 FM05 J10 FM06 J10 FM07 J10 FM08 E9 FM09 E9 FM10 E9 FM11 J16 FM12 J16 FM13 J16 FM14 J16 FM15 J16 FM16 J16 FM17 J16 FM21 J4 FM22 J3 FM23 K3 FM24 K3 FM25 K4 FM28 B4 FM33 C15 FM34 E6 FM35 E6 FM36 D8 FM37 J4 FM38 E9 FM39 B4 FM40 C5 FM41 C5 FM42 C5 FM43 C5 FM45 E14 IM07 F7 IM08 G6 IM13 E15 IM14 E15 IM18 C8 IM19 D5 IM20 F6 IM21 C5 IM23 C6 IM24 D6 IM25 D6 IM26 D6 IM28 H6 IM31 H10 IM32 H11 IM33 H11 IM34 H11 IM35 I12 IM84 K7 IM85 J7 IM86 I8 IM87 I8 IM88 J8 IM89 K8 IM90 K8
090224
2009-Apr-03
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