Philips Q548.1E Service Manual

Colour Television Chassis

Q548.1E

LA

18560_000_090401.eps

090401

Contents Page Contents Page

1. Revision List 2

2. Technical Specifications and Connections 2

3. Precautions, Notes, and Abbreviation List 5

4. Mechanical Instructions 9

5. Service Modes, Error Codes, and Fault Finding 16

6. Alignments 33

7. Circuit Descriptions 39

8. IC Data Sheets 49

9. Block Diagrams Wiring Diagram 32" (Frame) 59 Wiring Diagram 37" (Roadrunner) 60 Wiring Diagram 42" (Frame/Roadrunner) 61 Wiring Diagram 47" (Frame / Roadrunner) 62 Wiring Diagram 52" (Frame) 63 Block Diagram Video 64 Block Diagram Audio 65 Block Diagram Control & Clock Signals 66 Block Diagram I2C 67 Supply Lines Overview 68

10. Circuit Diagrams and PWB Layouts Drawing PWB Interface Ambilight + Single DC-DC Interface Ambilight Dual DC-DC (AB2) 70 72 Interface Ambilight Microcontrollerblock (AB3) 71 72 6 LED Ambilight Microcontroller 73 76 8 LED Ambilight Microcontroller 77 81 10 LED Ambilight Microcontroller 82 86 12 LED Ambilight Microcontroller 87 91 SSB: DC/DC +3V3 +1V2 (B01A) 92 127 SSB: DC/DC +3V3 +1V2 Standby (B01B) 93 127 SSB: Front End (B02A) 94 127 SSB: PNX8543 - Power (B03A) 95 127 SSB: PNX8543 - Video/LVDS Out

SSB: PNX8543 Audio Amplifier (B03C) 97 127

©

Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

(AB1) 69 72

(B03B) 96 127

SSB: PNX8543 Audio (B03D) 98 127 SSB: PNX8543 Analog AV (B03E) 99 127 SSB: PNX8543 SDRAM (B03F) 100 127 SSB: PNX8543 Control MIPS/Flash/PCI (B03G) 101 127 SSB: PNX8543 Standby Control/Debug (B03H) 102 127 SSB: Bolt-on (Pt. no. 1) (B04A) 103 127 SSB: Bolt-on (Pt. no. 3) (B04A) 104 128 SSB: Analog IO - Scart 1 & 2 (Pt. no. 1) (B04B) 105 127 SSB: Analog IO - Scart 1 & 2 (Pt. no. 3) (B04B) 106 128 SSB: YPbPr / Side I/O / S-video (B04C) 107 127 SSB: HDMI (B05A) 108 127 SSB: Ethernet (Pt. no. 1) (B05B) 109 127 SSB: Ethernet (Pt. no. 3) (B05B) 110 128 SSB: PCMCIA (B05C) 111 127 SSB: Class-D (B06A) 112 127 SSB: Display Interface (Common) (B07A) 113 127 SSB: Display Supply (Pt. no. 1) (B07B) 114 127 SSB: Display Supply (Pt. no. 3) (B07B) 115 128 SSB: PNX5100 - Power (B08A) 116 127 SSB: PNX5100 - SDRAM (B08B) 117 127 SSB: PNX5100-Ctrl/PCI/Debug (Pt. no. 1)(B08C)118 127 SSB: PNX5100-Ctrl/PCI/Debug (Pt. no. 3)(B08C)119 128 SSB: PNX5100 - LVDS In/Out (B08D) 120 127 SSB: PNX5100 - AmbiLight (B08E) 121 127 SSB: SRP List Explanation 122 SSB: SRP List Part 1 (Pt. no. 1) 123 SSB: SRP List Part 2 (Pt. no. 1) 124 SSB: SRP List Part 1 (Pt. no. 3) 125 SSB: SRP List Part 2 (Pt. no. 3) 126

Published by ER/TY 0968 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18562

2009-Aug-07

EN 2 Q548.1E LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

Manual xxxx xxx xxxx.1

• All Chapters: added CTNs to the manual, see Table 2-1

• Chapter 2: added AV output characteristics to section

2.3.2 Rear Connections

• Chapter 6: changed option codes of all sets, see Table 6-6

• Chapter 6: introduced “option 9” for dedicated sets, see

Table 6-7

• Chapter 10: introduction of an alternative Ethernet Controller, see diagram 8.7 Diagram SSB: Ethernet (Pt. no.

3) B05B, LAN9420 (IC7N04)

• Chapter 10: introduction of SSB Pt. 3, see diagrams

SSB: Bolt-on (Pt. no. 3) no. 3), SSB: Ethernet (Pt. no. 3), SSB: Display Supply (Pt. no. 3) and SSB: PNX5100-Ctrl/PCI/Debug (Pt. no. 3).

Manual xxxx xxx xxxx.2

• All Chapters: added 47PFL8404H/60 to the manual, see

Table 2-1

• Chapter 5: removed SSB replacement flowchart

• Chapter 6: added section 6.6 Service SSB delivered

without main software loaded.

2. Technical Specifications and Connections

, SSB: Analog IO - Scart 1 & 2 (Pt.

Index of this chapter:

2.1 Technical Specifications

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model numbers

CTN Styling Published in:

32PFL7404H/12

32PFL7404H/60

32PFL7674H/12

32PFL7674H/60

32PFL7684H/12

32PFL7684H/60

32PFL7694H/12

32PFL7694H/60

32PFL7864H/12

32PFL7864H/60

32PFL8404H/12

32PFL8404H/60

37PFL8404H/12

37PFL8404H/60

37PFL8684H/12

37PFL8694H/12

Frame 3122 785 18560

Frame 3122 785 18561

Roadrunner 3122 785 18561

Roadrunner 3122 785 18560

Roadrunner 3122 785 18561

Roadrunner 3122 785 18560

Roadrunner 3122 785 18561

CTN Styling Published in:

42PFL7404H/12 Frame 3122 785 18560

42PFL7404H/60

42PFL7674H/12

42PFL7674H/60

42PFL7864H/12

42PFL7864H/60

42PFL8404H/12

42PFL8404H/60

42PFL8654H/12

42PFL8684H/12

42PFL8684H/60

42PFL8694H/12

42PFL8694H/60

47PFL7404H/12

47PFL7404H/60

47PFL7864H/12

47PFL8404H/12

47PFL8404H/60

52PFL7404H/12

52PFL7404H/60

Frame 3122 785 18561

Roadrunner 3122 785 18561

Roadrunner 3122 785 18560

Roadrunner 3122 785 18561

Frame 3122 785 18560

Frame 3122 785 18561

Roadrunner 3122 785 18561

Roadrunner 3122 785 18560

Roadrunner 3122 785 18561

Frame 3122 785 18560

Frame 3122 785 18561

2.2 Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

2009-Aug-07

2.3 Connections

Technical Specifications and Connections

EN 3Q548.1E LA 2.

Side connectors

26-52"

1

19-22"

2 3 4

5

Back connectors

11

AUDIO

OUT

12

10 9

SPDIF

EXT 2

OUT

(RGB/CVBS)

VGA

EXT 1

(RGB/CVBS)

6

7

8

Note: The following connector colour abbreviations are used (according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Side Connections

1 - Cinch: Audio - In

Rd - Audio R 0.5 V Wh - Audio L 0.5 V

2 - Cinch: Video CVBS - In

Ye - Video CVBS 1 V

/ 10 kΩ jq

RMS

/ 10 kΩ jq

RMS

/ 75 Ω jq

PP

AUDIO IN: LEFT / RIGHT HDMI 1 / DVI HDMI 2 / DVI HDMI 3 / DVI

13

EXT 3

14

Figure 2-1 Connection overview

4 - Head phone (Output)

Bk - Head phone 32 - 600 Ω / 10 mW ot

5 - Common Interface

68p - See diagram B05C SSB: PCMCIA

6 - USB2.0

VGA

HDMI 3

HDMI 2 HDMI 1

15 16

1 2 3 4

TV ANTENNA

18440_001_090217.eps

10000_022_090121.eps

090527

090121

jk

3 - S-Video (Hosiden): Video Y/C - In

1 - Ground Y Gnd H 2 - Ground C Gnd H 3 - Video Y 1 V 4 - Video C 0.3 V

/ 75 Ω j

PP

/ 75 Ω j

PP

Figure 2-2 USB (type A)

1-+5V k 2 - Data (-) jk 3 - Data (+) jk 4 - Ground Gnd H

2009-Aug-07

EN 4 Q548.1E LA2.

Technical Specifications and Connections

7 - HDMI: Digital Video, Digital Audio - In (see connector 15)

8 - Service Connector (UART)

1 - Ground Gnd H 2 - UART_TX Transmit k 3 - UART_RX Receive j

2.3.2 Rear Connections

9 - EXT1/2: Video RGB - In, CVBS - In/Out, Audio - In/Out (*)

20

21

10000_001_090121.eps

2

1

090121

Figure 2-3 SCART connector

1 - Audio R 0.5 V 2 - Audio R 0.5 V 3 - Audio L 0.5 V

/ 1 kΩ k

RMS

/ 10 kΩ j

RMS

/ 1 kΩ k

RMS

4 - Ground Audio Gnd H 5 - Ground Blue Gnd H 6 - Audio L 0.5 V 7 - Video Blue 0.7 V 8 - Function Select 0 - 2 V: INT

/ 10 kΩ j

RMS

/ 75 Ω jk

PP

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j

9 - Ground Green Gnd H 10 - n.c. 11 - Video Green 0.7 V 12 - n.c.

/ 75 Ω j

PP

13 - Ground Red Gnd H 14 - Ground P50 Gnd H 15 - Video Red 0.7 V 16 - Status/FBL 0 - 0.4 V: INT

/ 75 Ω j

PP

1 - 3 V: EXT / 75 Ω j 17 - Ground Video Gnd H 18 - Ground FBL Gnd H 19 - Video CVBS/Y 1 V 20 - Video CVBS 1 V 21 - Shield Gnd H

/ 75 Ω k

PP

/ 75 Ω j

PP

(*) Note: The AV output on SCART 1 or 2 will be enabled (SW controlled) for analogue RF channels only, if the decoder is turned “on” in the Menu: select Setup -> Installation -> Decoder

-> Status: select SCART 1 or 2 -> Channel: select any analogue channel.

10 - Cinch: S/PDIF - Out

Bk - Coaxial 0.4 - 0.6V

/ 75 Ω kq

PP

11 - Cinch: Audio - Out

Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V

/ 10 kΩ kq

RMS

/ 10 kΩ kq

RMS

12 - VGA: Video RGB - In

1

5

6

11

10000_002_090121.eps

10

15

090127

1 - Video Red 0.7 V 2 - Video Green 0.7 V 3 - Video Blue 0.7 V 4-n.c.

/ 75 Ω j

PP

/ 75 Ω j

PP

/ 75 Ω j

PP

5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H 9-+5V 10 - Ground Sync Gnd H

+5 V j

DC

11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j

13 - Mini Jack: Audio - In

Wh - Audio L 0.5 V Rd - Audio R 0.5 V

/ 10 kΩ jo

RMS

/ 10 kΩ jo

RMS

14 - EXT3: Cinch: Video YPbPr - In, Audio - In

Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V

/ 75 Ω jq

PP

/ 75 Ω jq

PP

/ 75 Ω jq

PP

/ 10 kΩ jq

RMS

/ 10 kΩ jq

RMS

15 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In

19

18 2

10000_017_090121.eps

1

090428

Figure 2-5 HDMI (type A) connector

1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j 4 - D1+ Data channel j 5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink Control channel jk 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

16 - Aerial - In

- - IEC-type (EU) Coax, 75 Ω D

Figure 2-4 VGA Connector

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

2009-Aug-07

Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

EN 5Q548.1E LA 3.

Index of this chapter:

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages

with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).

• All capacitor values are given in micro-farads (μ=× 10 nano-farads (n =× 10

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

-9

), or pico-farads (p =× 10

. Select

-12

-6

),

).

3.2 Warnings

• All ICs and many other semiconductors are susceptible to

electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

2009-Aug-07

EN 6 Q548.1E LA3.

Precautions, Notes, and Abbreviation List

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

MODEL :

PROD.NO:

32PF9968/10

AG 1A0617 000001

MADE IN BELGIUM

220-240V 50/60Hz

~

VHF+S+H+UHF

BJ3.0E LA

S

10000_024_090121.eps

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

128W

090121

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels directly from a cable network by

means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA ATV See Auto TV Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz BLR Board-Level Repair BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections CL Constant Level: audio output to

connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:

manipulates steepness of chroma

transients CVBS Composite Video Blanking and

Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra

low frequency amplification DDC See “E-DDC” D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz DFI Dynamic Frame Insertion DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion

2009-Aug-07

Precautions, Notes, and Abbreviation List

EN 7Q548.1E LA 3.

DNR Digital Noise Reduction: noise

reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote

control designed for service

technicians DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display. EDID Extended Display Identification Data

(VESA standard) EEPROM Electrically Erasable and

Programmable Read Only Memory EMI Electro Magnetic Interference EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by

SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency

Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound

2

I

C Inter IC bus

2

I

D Inter IC Data bus

2

I

S Inter IC Sound bus

carrier distance is 6.0 MHz

IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used

for broadcast grade video.

Uncompressed digital component or

digital composite signals can be used.

The SDI signal is self-synchronizing,

uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's

preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz MIPS Microprocessor without Interlocked

Pipeline-Stages; A RISC-based

microprocessor MOP Matrix Output Processor MOSFET Metal Oxide Silicon Field Effect

Transistor, switching device MPEG Motion Pictures Experts Group MPIF Multi Platform InterFace MUTE MUTE Line NC Not Connected NICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital

sound system, mainly used in Europe. NTC Negative Temperature Coefficient,

non-linear resistor NTSC National Television Standard

Committee. Color system mainly used

in North America and Japan. Color

carrier NTSC M/N= 3.579545 MHz,

NTSC 4.43= 4.433619 MHz (this is a

VCR norm, it is not transmitted off-air) NVM Non-Volatile Memory: IC containing

TV related data such as alignments O/C Open Circuit OSD On Screen Display OTC On screen display Teletext and

Control; also called Artistic (SAA5800) P50 Project 50: communication protocol

between TV and peripherals PAL Phase Alternating Line. Color system

mainly used in West Europe (color

carrier= 4.433619 MHz) and South

America (color carrier PAL M=

3.575612 MHz and PAL N= 3.582056

MHz) PCB Printed Circuit Board (same as “PWB”) PCM Pulse Code Modulation PDP Plasma Display Panel PFC Power Factor Corrector (or Pre-

conditioner) PIP Picture In Picture PLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customer

can give directly the desired frequency POD Point Of Deployment: a removable

CAM module, implementing the CA

system for a host (e.g. a TV-set) POR Power On Reset, signal to reset the uP PTC Positive Temperature Coefficient,

non-linear resistor PWB Printed Wiring Board (same as “PCB”)

2009-Aug-07

EN 8 Q548.1E LA3.

Precautions, Notes, and Abbreviation List

PWM Pulse Width Modulation QRC Quasi Resonant Converter QTNR Quality Temporal Noise Reduction QVCP Quality Video Composition Processor RAM Random Access Memory RGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are

reproduced. RC Remote Control RC5 / RC6 Signal protocol from the remote

control receiver RESET RESET signal ROM Read Only Memory RSDS Reduced Swing Differential Signalling

data interface R-TXT Red TeleteXT SAM Service Alignment Mode S/C Short Circuit SCART Syndicat des Constructeurs

d'Appareils Radiorécepteurs et

Téléviseurs SCL Serial Clock I SCL-F CLock Signal on Fast I SD Standard Definition SDA Serial Data I SDA-F DAta Signal on Fast I

2

C

2

C bus

2

C

2

C bus SDI Serial Digital Interface, see “ITU-656” SDRAM Synchronous DRAM SECAM SEequence Couleur Avec Mémoire.

Color system mainly used in France and East Europe. Color carriers=

4.406250 MHz and 4.250000 MHz SIF Sound Intermediate Frequency SMPS Switched Mode Power Supply SoC System on Chip SOG Sync On Green SOPS Self Oscillating Power Supply SPI Serial Peripheral Interface bus; a 4-

wire synchronous serial data link

standard S/PDIF Sony Philips Digital InterFace SRAM Static RAM SRP Service Reference Protocol SSB Small Signal Board STBY STand-BY SVGA 800 × 600 (4:3) SVHS Super Video Home System SW Software SWAN Spatial temporal Weighted Averaging

Noise reduction SXGA 1280 × 1024 TFT Thin Film Transistor THD Total Harmonic Distortion TMDS Transmission Minimized Differential

Signalling TXT TeleteXT TXT-DW Dual Window with TeleteXT UI User Interface uP Microprocessor UXGA 1 600 × 1 200 (4:3) V V-sync to the module VESA Video Electronics Standards

Association VGA 640 × 480 (4:3) VL Variable Level out: processed audio

output toward external amplifier VSB Vestigial Side Band; modulation

method WYSIWYR What You See Is What You Record:

record selection that follows main

picture and sound WXGA 1280 × 768 (15:9) XTAL Quartz crystal XGA 1024 × 768 (4:3)

Y Luminance signal Y/C Luminance (Y) and Chrominance (C)

signal

YPbPr Component video. Luminance and

scaled color difference signals (B-Y and R-Y)

YUV Component video

2009-Aug-07

4. Mechanical Instructions

Mechanical Instructions

EN 9Q548.1E LA 4.

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

4.1 Cable Dressing

Notes:

• Figures below can deviate slightly from the actual situation, due to the different set executions.

Figure 4-1 Cable dressing 32PFL7xxx/xx

18560_104_090401.eps

090402

Figure 4-2 Cable dressing 42PFL7xxx/xx

18560_102_090401.eps

090402

2009-Aug-07

EN 10 Q548.1E LA4.

Mechanical Instructions

Figure 4-3 Cable dressing 47PFL7xxx/xx

18560_101_090401.eps

090402

2009-Aug-07

Figure 4-4 Cable dressing 52PFL7xxx/xx

18560_100_090401.eps

090401

Mechanical Instructions

EN 11Q548.1E LA 4.

Figure 4-5 Cable dressing 32PFL8xxx/xx

18560_103_090401.eps

090402

Figure 4-6 Cable dressing 37PFL8xxx/xx

1

8560_105_090401.eps

090402

2009-Aug-07

EN 12 Q548.1E LA4.

Mechanical Instructions

Figure 4-7 Cable dressing 42PFL8xxx/xx

18560_106_090401.eps

090402

2009-Aug-07

Figure 4-8 Cable dressing 47PFL8xxx/xx

18560_107_090401.eps

090402

Mechanical Instructions

EN 13Q548.1E LA 4.

4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:

• The buffers from the packaging.

• Foam bars (created for Service).

4.2.1 Foam Bars

Required for sets

1

42"

4.3.2 Speakers

Each speaker unit is mounted with two screws. When defective, replace the whole unit.

4.3.3 Ambi Light

Each Ambi Light unit is mounted on a subframe. Refer to

Figure 4-10

for details.

1

2

3

1

2

3

10000_018_090121.eps

Figure 4-9 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure Figure 4-9 larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

for details. Sets with a display of 42" and

4.3 Assy/Panel Removal

090121

1

Figure 4-10 Ambi Light unit

1. Remove the Ambi Light cover [1].

2. Unplug the connector(s) [2].

3. Remove the subframe [3].

4. The PWB can now be taken from the subframe.

When defective, replace the whole unit.

4.3.4 Main Supply Panel

1. Unplug all connectors.

2. Remove the fixation screws.

3. Take the board out.

When defective, replace the whole unit.

4.3.5 IR & LED Board / Stand Support

Refer to Figure 4-11

for details.

2

1

18560_408_090401.eps

090402

The instructions apply to the 8000 series (Roadrunner - with AmbiLight).

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove

the rear cover. Note: it is not necessary to remove the stand while removing the rear cover.

1. Remove all screws of the rear cover.

2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

2009-Aug-07

EN 14 Q548.1E LA4.

Mechanical Instructions

2

1

Figure 4-11 IR & LED Board / Stand Support

1. Remove the stand.

2. Remove the IR/LED cover [1].

3. Remove the connectors on the IR/LED board.

4. Remove the fixation screws from the IR/LED board. When defective, replace the whole unit.

Stand Support Removal for LCD panel removal

1. Remove the Main Supply Panel as earlier described.

2. Remove the screws [2] and take the support out.

4.3.6 Small Signal Board (SSB)

Caution: It is mandatory to remount screws at their original

position during re-assembly. Failure to do so may result in damaging the SSB.

1. Unplug all connectors.

2. Remove the screws that secure the board.

3. The SSB can now be taken out of the set.

18560_109_090401.eps

090402

1

18560_110_090401.eps

Figure 4-12 LCD Panel - top support

4

2

3

1

090402

4

4.3.7 Keyboard Control Panel

1. Remove the right AmbiLight unit.

2. Follow instructions for removing the IR/LED board until 3.

3. Remove the connector on the IR/LED board.

4. Release the cable.

5. Release the clip on top of the unit and take the unit out. When defective, replace the whole unit.

4.3.8 LCD Panel

Refer to Figure 4-12

to Figure 4-15 for details.

1. Remove the AmbiLight units as earlier described.

2. Remove the subwoofer as earlier described.

3. Remove the Top Support [1].

4. Release the LVDS [2] - and other connectors [3] from the SSB.

5. Remove the subframe of the SSB [4] with the SSB still mounted on it.

6. Release all connectors [5] from the PSU.

7. Remove the subframe of the PSU [6] with the PSU still mounted on it.

8. Remove the stand support as earlier described.

9. Release the connectors [7] on the IR/LED Panel as earlier described.

10. Remove the clips that secure the flare [8].

11. Remove the flare.

12. Now the LCD Panel can be lifted from the front cabinet.

44

18560_111_090401.eps

Figure 4-13 LCD Panel - SSB subframe

090402

2009-Aug-07

Mechanical Instructions

EN 15Q548.1E LA 4.

6

5

Figure 4-14 LCD Panel - PSU subframe

8

5

18560_112_090401.eps

6

090402

8

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position. See Figure 4-1

• Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

to Figure 4-8

7

Figure 4-15 LCD Panel - panel removal

8

18560_113_090401.eps

090720

2009-Aug-07

EN 16 Q548.1E LA5.

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Step by step Start-up

5.4 Service Tools

5.5 Error Codes

5.6 The Blinking LED Procedure

5.7 Protections

5.8 Fault Finding and Repair Tips

5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Skip/blank of non-favourite pre-sets.

How to Activate SDM

For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according to Table 5-1

• Analog SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.

• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.

• Analog SDM can also be activated by, on the SSB, shorting for a moment the solder pads SDM [1] (see

Figure 5-1

).

1

SDM1SDM

.

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section 5.4.1 ComPair

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose

• To create a pre-defined setting, to get the same measurement results as given in this manual.

• To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic step by step start up). See section 5.3 Step by step Start-up

• To start the blinking LED procedure where only layer 2 errors are displayed (see also section 5.5 Error Codes

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz)

Europe, AP(PAL/Multi) 475.25 PAL B/G

Europe, AP DVB-T 546.00 PID

).

.

Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

Default system

DVB-T

18440_200_090225.eps

Figure 5-1 Service mode pads

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

How to Navigate

When the “MENU” (or HOME) button is pressed on the RC transmitter, the set will toggle between the SDM and the normal

).

user menu (with the SDM mode still active in the background).

How to Exit SDM

Use one of the following methods:

• Switch the set to STAND-BY via the RC-transmitter.

• Via a standard customer RC-transmitter: key in “00”sequence.

090306

• All picture settings at 50% (brightness, colour, contrast).

• All sound settings at 50%, except volume at 25%.

2009-Aug-07

Service Modes, Error Codes, and Fault Finding

EN 17Q548.1E LA 5.

5.2.2 Service Alignment Mode (SAM)

Purpose

• To perform (software) alignments.

• To change option settings.

• To easily identify the used software version.

• To view operation hours.

• To display (or clear) the error code buffer.

How to Activate SAM

Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” or “I+” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the red button on the RC.

Contents of SAM (see also Table 6-8

):

• Hardware Information – A. SW version. Displays the software version of the

main software (example: Q5431-0.26.2.0= AAAaB_X.Y.W.Z).

• AAAA= the chassis name, where “a” indicates the chip version: e.g. TV543/32= Q543, TV543/82= Q548, Q543/92= Q549.

• B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region).

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. SBY PROC version. Displays the software version

of the stand-by processor.

– C. Production Code. Displays the production code of

the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section 5.5 Error Codes

).

• Reset Error Buffer. When “cursor right” (or the “OK button) is pressed and then the “OK” button is pressed, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” submenu. See chapter 6. Alignments.

• Dealer Options. Extra features for the dealers. See Table

6-8.

• Options. Extra features for Service. For more information regarding option codes, see chapter 6. Alignments. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

• Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct HEX values

for the options can be found in chapter 8 “Alignments”) or

a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-6

. Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Display Option

Code

39mm

040

PHILIPS

MODEL:

32PF9968/10

27mm

PROD.SERIAL NO:

AG 1A0620 000001

(CTN Sticker)

10000_038_090121.eps

090121

Figure 5-2 Location of Display Option Code sticker

• Store - go right. All options and alignments are stored

when pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• SW Maintenance.

– SW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this information.

– HW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this information.

• Test settings. For development purposes only.

• Development file versions. Not useful for Service

purposes, this information is only used by the development department.

• Upload to USB. To upload several settings from the TV to

an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a

directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item

separately, press “cursor right” (or the “OK button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download from USB. To download several settings from

the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.

Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this information.

How to Navigate

• In SAM, the menu items can be selected with the

“CURSOR UP/DOWN” key (or the scroll wheel) on the RCtransmitter. The selected item will be highlighted. When not

2009-Aug-07

EN 18 Q548.1E LA5.

Service Modes, Error Codes, and Fault Finding

all menu items fit on the screen, move the “CURSOR UP/ DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys (or the scroll wheel), it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAM

Use one of the following methods:

• Switch the set to STAND-BY via the RC-transmitter.

• Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose

When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When CSM is activated, the layer 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This information can be handy if no information is displayed.

Only for Q548.1:

When in the Q548.1 chassis CSM is activated, a test pattern will be displayed during 5 s.: 1 s. blue, 1 s. green, and 1 s. red, then again 1 s. blue and 1 s. green. This test pattern is generated by the PNX5120. So if this test pattern is shown, it could be determined that the back end video chain (PNX5120, LVDS, and display) of the SSB is working. For LED backlight TV sets, the test pattern is build as follows: 1 s. blue, 1 s. green, 1 s. red (generated by the PNX5120) and further on with 3 seconds RGB pattern from the LED Dimming Panel.

How to Activate CSM

Key in the code “123654” via the standard RC transmitter.

Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to Navigate

By means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus.

Contents of CSM

The contents are displayed on three pages: General, Software versions, and Quality items. However, these group names itself are not shown anywhere in the CSM menu.

General

• Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.

).

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB. Remark: the content here can also be a part of the 12NC of the SSB in combination with the serial number.

• 12NC display. Shows the 12NC of the display

• 12NC supply. Shows the 12NC of the supply.

• 12NC “fan board”. Shows the 12NC of the “fan board”module (for sets with LED backlight).

• 12NC “LED Dimming Panel”. Shows the 12NC of the LED dimming Panel (for sets with LED backlight).

Software versions

• Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q5431E_1.2.3.4.

• Stand-by SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section Software Upgrading). Example: STDBY_1.2.3.4.

• MOP ambient light SW. Displays the MOP ambient light EPLD SW.

• MPEG4 software. Displays the MPEG4 software (for sets with MPEG4).

• PNX5120 boot NVM. Displays the SW-version that is used in the PNX5120 boot NVM (for sets with PNX5120).

• LED Dimming SW. Displays the LED dimming EPLD SW (for sets with LED backlight).

Quality items

• Signal quality. Poor/average/good

• Child lock. Not active/active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”.

• HDMI HDCP key. Indicates of the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the consumer wants to make use of the HDMI functionality, the SSB has to be replaced.

• Ethernet MAC address. Not applicable.

• Wireless MAC address. Not applicable.

• BDS key. Indicates if the “BDS level 1” key is valid or not.

• CI slot present. If the common interface module is detected the result will be “YES”, else “NO”.

• HDMI input format. The detected input format of the HDMI.

• HDMI audio input stream. The HDMI audio input stream is displayed: present / not present.

• HDMI video input stream. The HDMI video input stream is displayed: present / not present.

How to Exit CSM

Press the “MENU” (or HOME) button twice on the RCtransmitter.

2009-Aug-07

Service Modes, Error Codes, and Fault Finding

EN 19Q548.1E LA 5.

5.3 Step by step Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via short cutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic step by step start-up. In combination with the start-up diagrams below, it is shown which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus layer 2 error = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this mode with a faulty FET 7101-1 is done, all ICs supplied by the +3V3 could be destroyed, due to over voltage (12V on 3V3-line). It is recommended to measure first the FET 7101-1 or others FETs on short-circuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:

• SP: protection or error detected by the Stand-by Processor.

• MP: protection or error detected by the MIPS Main Processor.

St by

Hibernate

Mains

off

- WakeUp requested

- Acquisition needed

- Tact switch pushed

- stby requested and no data Acquisition required

Tact switch

pushed

- Tact switch pushed

- last status is hibernate after mains ON

Mains

on

Semi St by

GoToProtection

WakeUp

requested

- St by requested

-tact SW pushed

WakeUp

requested

(SDM)

Protection

Active

GoToProtection

Figure 5-3 Transition diagram

18440_215_090227.eps

090702

2009-Aug-07

EN 20 Q548.1E LA5.

Detect2 should bepolledonthestandard 40ms interval and startup should be continued when detect2 becomes high.

This enables the +3V3and+5V converter. Asa result, also+5V-tuner, +2V5, +1V8-PNX8541 and +1V8-PNX5100 (if present) become available.

Delayof50ms needed becauseofthelatency of the detect-1 circuit. This delayisalso needed for the PNX5100. The reset of the PNX5100 should only bereleased 10msafter powering the IC.

Service Modes, Error Codes, and Fault Finding

Off

Mains isapplied

Standby Supply starts running.

All standby supply voltagesbecome available.

st-byµPresets

InitialiseI/Opins of the st-byµP:

- Switch reset-AVC LOW (reset state)

- Switch WP-NandFlash LOW (protected)

- Switch reset-system LOW (reset state)

- Switch reset-5100 LOW (reset state)

- Switch reset-Ethernet LOW (reset state)

-keepreset-NVM high, Audio-reset and Audio-Mute-Up HIGH

start keyboard scanning, RC detection. Wake upreasonsare

Switch ON Platform and display supply by switching

isswitched on, followed by the +1V2 DCDC converter

Delay1.5second before checking detect2 line

No

Enable the DCDC converter for +3V3and

off.

Reset detect2_delay_flag

LOW the Standbyline.

+12V, +24Vs,ALand Bolt-on power

if the detect2_delay_flagisset

Detect2 high received

within 2 seconds?

Yes

Wait fixed time of 15ms

Detect2 high?

Yes

Reset detect2_delay_flag

+5V. (ENABLE-3V3)

Wait 50ms

No

Enter protection

Stand byor

Protec tion

If the protection state was left by short circuiting the

SDM pins, detection of a protection condition during

startupwillstall the startup. Protection conditions in a

playing set will be ignored. The protection mode will

not be entered.

- Switch Audio-Reset high.

It is low in the standbymodeifthestandby

mode lasted longer than10s.

Carefull we don’t hit this error

directly if the delayflagisset.

Power-OK error:

Layer1: 3

Layer2: 16

If the supply is hicking, the firstdetect2could

bepositive (12V still present), followed by

negative Supply-fault (already low). Adding a

fixed delay bringsusbehind this delaygap.

Confirmation received from NXP that there does not need to be a delay between the rise of the +1V2 and the +3V3.Only requirement is to have the +1V2 before or atthesame time

as the +3V3.150ms delayisdeleted.

Set detect2_delay_flag

Detect-1 I/O line

High?

Yes

Enable the supply detection algorithm

Set I²C slave address

of StandbyµPto(A0h)

Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM

No

initialization, this is no issueinthissetup, the delayisautomatically

covered bythearchitectural setup)

Switch HIGH the WP-NandFlashto

allow access to NAND Flash

ReleaseReset-PNX5100.

PNX5100 will start booting.

Wait 10 ms

Detect EJTAG debugprobe

(pulling pin of the probe interface to

ground byinserting EJTAG probe)

EJTAG probe

connected ?

No

Cold boot?

Yes

Release AVC system reset

Feed cold boot script

ReleaseAVCsystem reset

Feed warm boot script

No

Detect-2 I/O line

High?

Yes

Wait 50ms

Detect-1 I/O line

High?

No

Detect-2 I/O line

High?

Yes

Voltage output error:

Layer1: 2

Layer2: 18

Yes

ReleaseAVCsystem reset

Feed initializing boot script

disable alive mechanism

Disable 3V3, switch standby

No

line high and wait 4 seconds

No

Enter p rotect ion

This will allow access to NVM and NAND FLASH and can not bedone earlier becausetheFLASHneeds to

beinWriteProtectas long as the suppliesare not available.

Only usefull in case of PNX5100 present. To avoid diversity in standbyµP,thereset-PNX5100 will still be switched bythestandbyµP.

This 10ms delayisstill present to give some relaxation to the supplies. (The PCI arbiter on the PNX5100 is never used and is not the reason anymore)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

These checks prevent the set from going in to standbyonthefalse error condition where the

first 3V3 is negative becauseofahickup,

although the 12V was abouttoreappear.

Becauseofthis reappearance, the 12V check

is OK which would cause protection. If we wait

50ms,the3V3should be back as well.

2009-Aug-07

To: 18440_216b_090227.eps

Figure 5-4 “Off/Stand-by” to “Semi Stand-by” flowchart (part 1)

18440_216a_090227.eps

090702

Service Modes, Error Codes, and Fault Finding

EN 21Q548.1E LA 5.

From: 18440_216a_090227.eps

3-th try?

Yes

Blink Code as

error code

Enter protection

Reset-system is connected to the Micronas MultiStandard decoder.

This cannot bedonethrough the bootscript, the I/O is on the standbyµP

Timing need to be updated if more mature info isavailable.

No

Code = Layer1: 2 Layer2: 15

Switch AVC PNX8543

in reset (active low)

Wait 10ms

Switch the NVM reset

line HIGH.

Disable all supply related protectionsand

switch off the +3V3 +5V DC/DC converter.

Wait 5ms

switch off the remaining DC/DC

converters

Switch Standby I/O line high

and wait 4 seconds

No

Code =

Layer1: 2

Layer2: 53

From : 18440_216a_090227.eps

Reset-system isswitched HIGH bythe

AVC at the end of the bootscript

AVC releases Reset-Ethernet when the

end of the AVC boot-script is detected

Reset-Audio and Audio-Mute-Up are

switched byMIPS code later on in the

startup process

Bootscript ready

in 1250 ms?

Yes

Set I²C slave address

of StandbyµPto(60h)

RPC start (comm. protocol)

FlashtoRam

image transfer succeeded

within 30s?

Yes

SWinitialization

No

succeeded within 20s?

Yes

Enable Alive check mechanism

MIPS reads the wake upreason

from standbyµP.

5100 SW start

Wake upreason

coldboot & not semi-

standby?

yes

Startup screen cfg file

present?

yes

MIPSsends displayparametersand

Bitmap to 5100

MIPS triggers 5100 to displaythe

startup screen

Startup screen visible

Reset-system isswitched HIGH bythe

AVC attheendofthebootscript

AVC releases Reset-Ethernet when the

end of the AVC boot-script is detected

Reset-Audio and Audio-Mute-Up are

switched byMIPS code later on in the

startupprocess

Timing needs to be updated if more mature info is available.

Wait until AVC starts to

communicate

Startup screen shall only bevisiblewhen there isacoldboot to an active state end situation. The startup screen shall not

bevisiblewhen waking upforrebootreasons or waking upto semi-standby conditions.

The first time after the option turn on of the startup screen or when the set is virgin, the cfg file is not present and hence the startup screen will not be shown.

To keep this flowchart readable, the exact displayturn on description is not copied here. Please see the Semi-standby to On description for the detailed display startup sequence. During the complete displaytimeoftheStartup screen, the preheat condition of 100% PWM is valid.

Initialize audio

Switch on the displayincaseofa LED backlight

display by sending the TurnOnDisplay(1) (I²C)

command to the PNX5100

Enable the PWM outputtowards the displayLVDS

cable in caseofa LED Backlight set.

(CTRL4-PNX5100)

Initialize tuner and Multi Standard decoder

Initialize source selection

Initialize video processing IC's

- local contrast FPGA

- PNX5100 (if present)

Init ialize AutoTV

Initialize Ambilight with Lights off.

:

In caseofa LED backlight display, a LED DIM panel is present which is fed bytheVdisplay.To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must beclosed. The display startup sequence is taken care of bytheLEDDIM panel. Secondly, this cmd will alsoenable the LVDS outputof the 5100 towards theLEDDIMpanel.

In caseofa LED backlight display, the PWM-dimming signal needs to beroutedtotheLVDS cable. This routing is not

allowed in non-LED sets (see alsodisplay configuration)

Semi-Standby

Figure 5-5 “Off/Stand-by” to “Semi Stand-by” flowchart (part 2)

18440_216b_090227.eps

090702

2009-Aug-07

EN 22 Q548.1E LA5.

Service Modes, Error Codes, and Fault Finding

Constraints taken into account:

- Display may only be started when valid LVDS output clock can be delivered by the AVC.

- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.

Semi Standby

The assumption here is that a fast toggle (<2s) can

only happen during ON->SEMI ->ON. In these states,

the AVC is still active and can provide the 2s delay. A

transition ON->SEMI->STBY->SEMI->ON cannot be

made in less than 2s, because the standby state will

CPipe already generates a valid output clock in the semi-standby state: display

startup can start immediately when leaving

be maintained for at least 4s.

the semi-standby state.

Wait until previous on-state is left more than 2

seconds ago. (to prevent LCD display problems)

Assert RGB video blanking

and audio mute

Display already on?

(splash screen)

No

Switch on the display power by

The exact timings to

switch on the

display (LVDS

delay, lamp delay)

are defined in the

display file.

The sum of the LVDS delay and the Lamp delay needs

to be used because the Lamp delay is specified with

the appearance of the LVDS on the display as

reference. This moment is not known by ceplf, only the

switch on of the LCD power is known. The delta

The complete algorithm description is

removed here.

Only the start of the algorithm

is mentioned here as reminder.

between both is the LVDS delay.

switching LCD-PWR-ON low

Wait x ms

Switch on LVDS output in 8543

No

Start POK line detection

algorithm

return

PNX5100 present?

Yes

Switch on the display by sending the

TurnOnDisplay(1) (I²C) cmd to the PNX5100

Delay Lamp-on with the sum of the LVDS delay and

the Lamp delay indicated in the display file

Switch off the dimming backlight feature, set

the BOOST control to nominal and make sure

PWM output is set to 100%

Switch on LCD backlight (Lamp-ON)

Wait until valid and stable audio and video, corresponding to the

requested output is delivered by the AVC

the backlight has been switched on for at least the time which is

indicated in the display file as preheat time.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

AND

Yes

Initialize audio and video

processing IC's and functions

according needed use case.

2009-Aug-07

The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or

at the same time as the unblanking of the video.

The higher level requirement is that the

ambilight functionality may not be switched on

before the backlight is turned on in case the

set contains a CE IPB inverter supply.

Figure 5-6 “Semi Stand-by” to “Active” flowchart

Restore dimming backlight feature, PWM and BOOST output

Switch on the Ambilight functionality according the last status

Yes

and unblank the video.

settings.

Startup screen Option and Installation setting

Photoscreen ON?

Yes

Display cfg file present

and up to date, according

correct display option?

No

Prepare Start screen Display config

file and copy to Flash

Active

18440_217_090227.eps

No

270209

Service Modes, Error Codes, and Fault Finding

Active

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

EN 23Q548.1E LA 5.

Force ext audio outputs to ground

(I/O: audio reset)

Switch off Ambilight

Wait until Ambilight has faded out: Output power

Observer on PNX5100 should be zero

Switch off POK line detection

Switch off LCD backlight

Mute all video outputs

Wait x ms (display file)

and wait 5ms

algorithm

The higher level requirement is that the

backlight may not be switched off before the

ambilight functionality is turned off in case the

set contains a CE IPB inverter supply.

No

Switch off LVDS output in 8543

Wait x ms

Switch off the display power by

switching LCD-PWR-ON high

PNX5100 present?

Yes

Switch off the display by sending:

- TurnOnDisplay(0) (I²C) command to the PNX5100

- or sending OUTPUT-ENABLE(0) to the LED DIM panel in case of a LED BL set.

Semi Standby

Figure 5-7 “Active” to “Semi Stand-by” flowchart

The exact timings to

switch off the

display (LVDS

delay, lamp delay)

are defined in the

display file.

18440_219_090227.eps

270209

2009-Aug-07

EN 24 Q548.1E LA5.

Service Modes, Error Codes, and Fault Finding

Semi Stand by

If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is

finished. *)

Transfer Wake up reasons to the Stand by µP.

Switch Memories to self-refresh (this creates a more

stable condition when switching off the power).

Switch AVC system in reset state (reset-system and

reset-AVC lines)

Switch reset-PNX5100 LOW

Switch Reset-Ethernet LOW

Wait 10ms

Switch the NVM reset line HIGH

Switch WP-Nandflash LOW

Disable all supply related protections and switch off

the DC/DC converters (ENABLE-3V3)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.

Important remarks:

release reset audio 10 sec after entering

standby to save power

Also here, the standby state has to be

maintained for at least 4s before starting

another state transition.

Wait 5ms

Switch OFF all supplies by switching HIGH the

Standby I/O line

Stand by

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

18440_220_090227.eps

270209

2009-Aug-07

Service Modes, Error Codes, and Fault Finding

EN 25Q548.1E LA 5.

5.4 Service Tools

5.4.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:

1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to Connect

This is described in the chassis fault finding database in ComPair.

ComPair II

RC in

Optional

Switch

Figure 5-9 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• Software is available via the Philips Service web portal.

• ComPair serial interface cable for Q52x.x. (using 3.5 mm Mini Jack connectors): 3138 188 75051.

Note: When having problems, please contact your local support desk.

Power ModeLink/

Activity

HDMI

2

I

2

C or UART commands is necessary,

TO TV

TO

UART SERVICE

CONNECTOR

2

C

I

RS232 /UART

ComPair II Developed by Philips Brugge

Optional power

5V DC

10000_036_090121.eps

C only

UART SERVICE

CONNECTOR

RC out

TO

I2C SERVICE CONNECTOR

Multi

function

PC

090121

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed:

There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-3

– LAYER 1 errors are one digit errors – LAYER 2 errors are two digit errors.

• In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• Fatal errors, if I and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

• In CSM mode – When entering CSM: error LAYER 1 will be displayed

by blinking LED. Only the latest error is shown.

• In SDM mode – When SDM is entered via Remote Control code or the

hardware pins, LAYER 2 is displayed via blinking LED.

• In the ON state – In “Display error mode”, set with the RC commands

“mute_06250X _OK” LAYER 2 errors are displayed via blinking LED.

• Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.

Basically there are three kinds of errors:

• Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section 5.6 The Blinking LED Procedure

• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section Extra Information that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

2

C bus is blocked and the set re-boots, CSM

).

. Note

2009-Aug-07

EN 26 Q548.1E LA5.

Service Modes, Error Codes, and Fault Finding

5.5.2 How to Read the Error Buffer

Use one of the following methods:

• On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only

detected error.

– 37 23 00 00 00: Error code 23 was first detected and

error code 37 is the last detected error.

– Note that no protection errors can be logged in the

error buffer.

• Via the blinking LED procedure. See section 5.5.3 How to

Clear the Error Buffer.

•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:

• By activation of the “RESET ERROR BUFFER” command in the SAM menu.

• With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”.

• If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the

content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection).

There are several mechanisms of error detection:

• Via error bits in the status registers of ICs.

• Via polling on I/O pins going to the stand-by processor.

• Via sensing of analogue values on the stand-by processor or the PNX8543.

• Via a “not acknowledge” of an I

2

C communication.

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Table 5-2 Layer 1 code overview (multi chassis overview)

LAYER 1 codes

SSB 2

Display supply 3

Platform supply 4 Only for display option 196 and 197

Fan 7

AmbiLight or DC/DC or 3D LED dim panel 8

Table 5-3 Error code overview (multi chassis overview)

Description

Main NVM 2 0 MIPS I Temp. protection 3 12 MIPS I

LAYER 1 error

LAYER 2 error

Monitored

Medium

Error/Prot.

EB: in Error Buffer

BL: Blinking LED

2

C1 E x STM24C128 SSB TV shut down with red LED blinking 2.

2

C4 P BL/EB Supply

Device

Defective board

I2C3213MIPSI2C3 E BL/EB SSB SSB I2C2214MIPSI2C2 E BL/EB SSB SSB

PNX does not boot (HW cause) PNX 5100 does not boot

12V 3 16 St-by µP I/O P BL Supply

12V 3 16 St-by µP I/O P BL Platform Supply

Inverter or display supply 3 17 Mips I/O E EB Supply

Only for display option 196 and 197 4 17 Mips I/O E EB Display Supply

1V2, 1V2, 3V3, 5V to low 2 18 St-by µP I/O P BL SSB PNX 5100 2 21 MIPS I

HDMI MUX 2 23 MIPS I

215St-by µP I

2

C1 P BL SSB SSB

2

C3 E EB PNX 5100 SSB

2

C3 E EB TDA9996 SSB

I2C switch 2 24 Mips I2C2 E EB PCA9540 SSB

Boot-NVM PNX5120 2 25 MIPS

Multi Standard demodulator (Micronas IF) 2 27 MIPS I

ARM (AL) 8 28 MIPS

FPGA (Local contrast) 2 29 MIPS Tuner1 2 34 MIPS I

2

FAN I

C expander 7 41 MIPS I2C2 E EB PCA 9533 FAN mod.

T× sensor 7 42 MIPS I

FAN 1 7 43 MIPS

FAN 2 7 44 MIPS MIPS does not boot (SW cause) 2 53 St-by µP I

Display 5 64 MIPS

FPGA LED dim 2D 2 65 MIPS FPGA LED dim 3D 8 65 MIPS I

I2C3 E EB STM24C08 SSB

2

C3 E EB DRX3616K

DRX3626K

SSB

I2C3 E EB NXP LPC2103 AL mod. or DC/DC I2C3 E EB Altera SSB

2

C3 E EB UV1783S

2

C2 E EB LM 75 T×sensor

HD1816

SSB

I2C2EEB FAN I2C2EEB FAN

2

C1 P BL PNX8543 SSB TV is rebooting endlessly with white LED blinking. I2C2 E BL/EB Altera Display I2C3 E EB Xilinx SSB

2

C2 E EB Altera SSB

Special Remarks

TV is rebooting endlessly with red LED blinking “2”.

TV is rebooting endlessly with red LED blinking “2”

TV shut down with red LED blinking “3”.

TV still in normal operation mode, but without backlights. Enter CSM Layer 1 red LED blinking “3”.

TV shut down with red LED blinking “2”.

TV is rebooting endlessly, with red LED blinking “2” (shown every 20 second).

Activate CSM red LED blinking “2”.

TV is rebooting endlessly, with red LED blinking “2” (shown every minute).

TV is in normal operation but without video displayed (RF).

TV is in normal operation but without AMBILIGHT “on”.

TV is in normal operation but without video displayed (RF).

2009-Aug-07

Service Modes, Error Codes, and Fault Finding

EN 27Q548.1E LA 5.

Extra Information

• Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section 5.8.6 UART Logging

). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair.

• Main NVM. When there is no I

2

C communication towards the main NVM, LAYER 1 error = “2” will be displayed via the blinking LED procedure. In SDM, LAYER 2 error can be “19”. Check the logging for keywords like “I

• Error 13 (I

2

C bus 3 blocked). When this error occurs, the

2

C bus blocked”.

TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 15 (PNX8543 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8541 completely dead, I between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I blocked (NVM). I

2

C2 can be indicated in the schematics as

2

C link

2

C2 bus is

follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems with: NVM PNX5120, PNX5120 itself, or DDRs.

• Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = “3”). When SDM is activated we see blinking LED LAYER 2 error = “16”.

• Error 17 (POK). The display is switched “on” with the signal “Lamp On”. If the inverter starts (or 24V display is OK) the POK line becomes “high”. If the POK line is not “high”, the set backlight will be switched “off” and “on” again for 3 times (start-up). If the set POK line becomes “high” after the retries, no error is logged; if the POK stays “low”, error is logged: LAYER 1 error = “3”, LAYER 2 error = “17”. No protection is required, the start-up goes on.

• Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = “2” will be displayed automatically. In SDM this gives LAYER 2 error = “18”.

• Error 21 (PNX5120). When there is no I

2

C communication towards the PNX5120 after start-up (power “off” by disconnection of the mains cord), LAYER 2 error will blink continuously via the blinking LED procedure in SDM. (startup the TV with the solder paths short to activate SDM).

• Error 23 (HDMI). When there is no I

2

C communication towards the HDMI multiplexer after start up, LAYER 2 error = “23” will be logged and displayed via the blinking LED procedure if SDM is switched “on”.

• Error 25 (Boot-NVM PNX5120). When there is no I

2

C communication towards the PNX5120 NVM after start-up, TV is rebooting endlessly with blinking LAYER 1 error = 2 (shown every minute). When SDM is activated we see blinking LED LAYER 2 error = “25”.

• Error 27 (Multi Standard demodulator). When there is no

2

I

C communication towards the Multi Standard demodulator after start up, LAYER 2 error = “27” will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 28 (FPGA ambilight). When there is no I

2

C communication towards the FPGA ambilight after start up, LAYER 2 error = “28” will be logged and displayed via the blinking LED procedure if SDM is switched “on”. Note that it can take up several minutes before the TV starts blinking LAYER 1 error = “2” in CSM or in SDM, LAYER 2 error = “28”.

• Error 34 (Tuner). When there is no I

2

C communication towards the tuner after start up, LAYER 2 error = “34” will be logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because

of hardware problems (NAND flash,...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take up to 2 minutes before the TV starts blinking LAYER 1 error = “2” or in SDM, LAYER 2 error = “53”.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:

• Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table 5-3 Error code

overview (multi chassis overview)) which causes the failure

of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table

5-3 Error code overview (multi chassis overview)

be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

Important remark: For all errors detected by MIPS which are fatal (rebooting of the TV set, with reboot starts after LAYER 1 error blinking), one should short the SDM solder paths at startup from the power OFF state by mains interruption and not via the power button, to trigger the SDM via the hardware pins.

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error-buffer. Error codes greater then 10 are shown as follows:

1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit

2. A pause of 1.5 s

3. “n” short blinks (where “n”= 1 to 9)

4. A pause of approximately 3 s,

5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s

6. The sequence starts again.

Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:

1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s

2. Two short blinks of 250 ms followed by a pause of 3 s

3. Eight short blinks followed by a pause of 3 s

4. Six short blinks followed by a pause of 3 s

5. One long blink of 3 s to finish the sequence

6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:

• Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the stand-by processor. At the time of this release, this layer 1 error blinking was not working as expected. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section 5.8.6 UART Logging

• Activate the SDM. The blinking front LED will show the entire contents of the layer 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.

) and will

).

2009-Aug-07

EN 28 Q548.1E LA5.

Service Modes, Error Codes, and Fault Finding

Important remark:

For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

• Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.

• Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2

the second last error, etc.... Take notice that it takes some

seconds before the blinking LED starts.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:

• Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2.

• Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply Errors

The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-up

During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section 5.3 Step by step Start-

up).

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. The audio protection circuit pulls the “supply-fault” low and the tv set will blink LAYER 1 error = 2 or in SDM, LAYER 2 error = 19. Be very careful to overrule this protection via SDM (not to cause damage to the Class D audio amplifier). Check audio part first before activating via SDM. In case one of the

speakers is not connected, the protection can also be triggered.

Repair Tips

• It is also possible that the set has an audio DC protection because of an interruption in one or both speakers (the DC voltage that is still on the circuit cannot disappear through the speakers). Caution: (Dis)connecting the speakers during the ON state of the TV can damage the audio amplifier.

5.7.3 Important remark regarding the blinking LED indication

As for the blinking LED indication, the blinking LED of layer 1 error displaying can be switched “off” by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched “off” by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and does not recognise the keyboard commands at this time.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra

Information”.

5.8.1 Ambilight

Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair, the light output can be adjusted.

5.8.2 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.3 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button on the TV’s local keyboard for 10 seconds until the “F” disappears from the screen.

5.8.4 DC/DC Converter

Introduction

• The best way to find a failure in the DC-DC converters is to check their starting-up sequence at “power-on via the mains cord”, presuming that the stand-by microprocessor is operational.

• If the input voltage of DC-DC converters is around 12.7 V (measured on decoupling capacitors 2107 and 2123 and the enable signals are “low” (active), then the output voltages should have their normal values. The +12V and +5VPOD supplies start-up first (enabled by PODMODE signal from the stand-by microprocessor). There is a supplementary condition for 12V to start-up: if the +5VPOD does not start up due to a local defect, then +12V will not be available as well. The +5V-ON supply is enabled by the ONMODE signal (coming also from the stand-by microprocessor). The +1V2 supply starts up when the +12V appears, then at least 100 ms later, the +3V3 will be activated via the ENABLE-3V3 signal from the stand-by microprocessor. If the +12V value is less than 10 V, the last enumerated voltages will not show up due to the undervoltage detection circuit 7105-1 + 6101 and surrounding components. Furthermore, if the +12V is less than 8 V, then also the +1V2 will not be available. The +5V5-TUN generator 7202 (present only for the analogue version of China platforms) will start to operate as soon as the 12V (PSU) is present.

2009-Aug-07

Service Modes, Error Codes, and Fault Finding

EN 29Q548.1E LA 5.

• The consumption of controller IC 7103 is around 19 mA (that means almost 200 mV drop voltage across resistor

3108).

• The current capability of DC-DC converters is quite high (short-circuit current is 7 to 10 A).

• The DETECT1 signal (active “low”) is an internal protection (error 18) of the DC-DC convertor and will occur if the output voltage of any DC-DC convertor is out of limits (10% of the normal value).

Fault Finding

• Symptom: +1V2 not present (even for a short while ~10 ms) – Check 12 V availability (resistor 3108, MOS-FETs

7101 and 7102), value of +12 V, and surrounding

components) – Check the voltage on pin 9 (1.5 V), – Check for +1V2 output voltage short-circuit to GND that

can generate pulsed over-currents 7...10 A through coil

5103.

– Check the over-current detection circuit (2106 or 3131

interrupted).

• Symptom: +1V2 present for about 100ms, +3V3 not rising. – Check the ENABLE-3V3 signal (active “low”), – Check the voltage on pin 8 (1.5 V), – Check the under-voltage detection circuit (the voltage

on collector of transistor 7105-1 should be less than

0.8 V),

– Check for output voltages short-circuits to GND (+3V3)

that can generate pulsed over currents 7...10 A through coil 5101,

– Check the over-current detection circuit (2105 or 3127

interrupted).

• Symptom: +1V2 OK, +3V3 present for about 100 ms. Possible cause: SUPPLY-FAULT line stays “low” even though the +3V3 and +1V2 is available - the stand-by microprocessor is detecting that and switching “off” all supply voltages. – Check the drop voltage across resistor 3108 (they

could be too high, meaning a defective controller IC or MOS-FETs),

– Check if the boost voltage on pin 4 of controller IC 7103

is less than 14 V (should be 19 V),

– Check if +1V2 or +3V3 are higher than their normal

values - that can be due to defective DC feedback of the respective DC-DC convertor (ex. 3152, 3144).

• Symptom: +1V2 and +3V3 show a high level of ripple voltage (audible noise can come from the filtering coils 5101, 5103). Possible cause: instability of the frequency and/or duty cycle of a DC-DC converter or stabiliser. – Check the resistor 3164, capacitors 2102 and 2103,

input and output decoupling capacitors.

– Check AC feedback circuits (2120, 2129, 3141, 3153,

2110, 2114 and 3135).

• Symptom: +1V2, +3V3 ok, no +5V5-TUN (analogue sets only). Possible cause: the “+5V5-TUN GENERATOR” circuit (7202 and surroundings components) is defective: check transistor 7202 (it has to have gate voltage pulses of about 10 V amplitude and drain voltage pulses of about 35 V amplitude) and surrounding components. A high consumption (more than 6 mA) from +5V5-TUN voltage can cause also +5V5-TUN voltage to be too low or zero.

Note: when a pair of power MOSFETs (7101 or 7102) becomes defective, the controller IC 7103 should be replaced as well.

5.8.5 Fan self test (only for sets with LED backlight)

In case fans are present, a softest can be done by pushing the red coloured button on the remote control while the TV set is in CSM. Exit CSM and check the status of the fans in the error buffer by entering SAM (062596 + info button on the RC). In case of failure (fully red screen) more detailed information is available in the error buffer (error 41, 42, 43, 44).

5.8.6 UART Logging

When something is wrong with the TV set (f.i.the set is rebooting) checking the UART logging using hyperterminal can be done to find more information. Hyperterminal is a standard Windows application. It can be found via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the Service connector in the TV set, via the ComPair interface (this is compulsory, otherwise ICs are blown in the PC), to the “COMx”-port of the PC. After start-up of Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:

1. COMx

2. Bits per second = 115200

3. Data bits = 8

4. Parity = none

5. Stop bits = 1

6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: When there is no picture available during reboot, it is possible to check for “error devices” in the logging (LAYER 2 error). This can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the “on” state of the TV. The audio amplifier can be damaged by disconnecting the speakers during “on” state of the set! Sometimes the set can go into protection, but that is not always the case.

5.8.8 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.9 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. See also Table 6-6

5.8.10 Upgrade HDMI EDID NVM

To upgrade the HDMI EDID, see ComPair for further instructions.

for the code.

2009-Aug-07

EN 30 Q548.1E LA5.

5.8.11 Upgrade VGA EDID NVM

To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has to be short circuited to ground. See ComPair for further instructions.

Service Modes, Error Codes, and Fault Finding

SDM2EDID

Figure 5-10 VGA EDID NVM

1

18440_201_090225.eps

090306

2009-Aug-07

Service Modes, Error Codes, and Fault Finding

EN 31Q548.1E LA 5.

5.8.12 SSB Replacement

Follow the instructions in section 6.5 Reset of Repaired SSB and 6.6 Service SSB delivered without main software loaded case a SSB has to be exchanged.

5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NANDFlash, which is connected to the PNX8543 via the PCI bus.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). It is not possible anymore to replace the NAND-Flash with another one from a scrap-board. Perform the following actions after SSB replacement:

1. Set the correct option codes (see sticker inside the TV).

2. Update the TV software (see the DFU for instructions).

3. Perform the alignments as described in section Reset of

Repaired SSB.

4. Check in CSM if the HDMI keys are valid.

For the correct order number of a new SSB, always refer to the Spare Parts list, available on the Philips Spare Part web portal.

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.

• The “FlashUtils.upg” file is only used by Service centres that are allowed to do component level repair on the SSB.

in

1. Create a directory “UPGRADES” on the USB stick.

2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.

4. Insert USB stick into the TV.

5. The renamed “upg” file will be visible and selectable in the upgrade application.

Back-up Software Upgrade Application

If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “INFO”-button on a Philips remote control or “CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:

1. Create a directory “UPGRADES” on the USB stick.

2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT69_84.0.0.0.upg) into this directory.

3. Insert the USB stick into the TV.

4. Start the download application manually (see section Manual Software Upgrade

.

5. Select the appropriate file and press the “red” button to upgrade.

Automatic Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. FUS _Q5431E_

1.25.5.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:

1. Copy “AUTORUN.UPG” to the root of the USB stick.

2. Insert USB stick in the set while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software Upgrade

In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.

File name Description

EDID_Q5481_x.x.x.x.zip Contains the EDID content of the

EJTAGDownload_Q5481_x.x.x.x.zip Only used by service centra which are

FUS_Q5481_vx.x.x.x.zip Contains the “autorun.upg” which is

VGA_HD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the

processNVM_Q5481_x.x.x.x.zip Default NVM content. Must be

Software_history_vx.x.x.x.pdf Contains a history overview of the

different VGA NVM. See ComPair for further instructions.

allowed to do Component Level Repair.

needed to upgrade the TV main software and the software download application.

different (HD) VGA NVM. See ComPair for further instructions.

programmed via ComPair.

software.

Attention!

In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:

2009-Aug-07

EN 32 Q548.1E LA5.

File name Description

StandbySW_CFT73_x.x.x.x.zip Contains the Stand-by software in

VGA_FHD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the

“upg” and “hex” format.

- The “StandbySW_xxxxx_prod.upg” file can be used to upgrade the Standby software via USB.

- The “StandbySW_xxxxx.hex” file can be used to upgrade the Stand-by software via ComPair.

- The files “StandbySW_xxxxx_exhex.hex” and “StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes).

different (FHD) VGA NVM. See ComPair for further instructions.

Service Modes, Error Codes, and Fault Finding

2009-Aug-07

6. Alignments

Alignments

EN 33Q548.1E LA 6.

Index of this chapter:

6.1 General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings

6.5 Reset of Repaired SSB

6.7 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V

/ 50 Hz (± 10%).

AC

– LATAM-NTSC: 120 - 230 V – US: 120 V

/ 60 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: R

> 10 MΩ, Ci < 20 pF.

i

• Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

• First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also section Option

Settings).

– Press OK on the remote control before the cursor is

moved to the left.

– In submenu “Option numbers” select “Store” and press

OK on the RC.

•OR: – In main menu, select “Store” again and press OK on

the RC.

– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:

• Tuner AGC.

• White point.

To store the data:

• Press OK on the RC before the cursor is moved to the left.

• In main menu select “Store” and press OK on the RC.

• Press MENU on the RC to switch back to the main menu.

• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Purpose: To keep the tuner output signal constant as the input signal amplitude varies. No alignment is necessary, as the AGC alignment is done automatically (standard value: “64”). Store settings and exit SAM.

6.3.2 White Point

• Set “Active control” to “Off”.

• Choose “TV menu”, “TV Settings” and then “Picture” and set picture settings as follows:

Picture Setting

Dynamic backlight Off

Dynamic Contrast Off

Colour Enhancement Off

Picture Format Un scaled

Light Sensor Off

Brightness 50

Colour 0

Contrast 100

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:

• Use a 100% white screen as input signal and set the following values: – “Colour temperature”: “Normal”. – All “White point” values to: “127”. – “Red BL offset” values to “7”. – “Green BL offset” values to “7”.

In case you have a colour analyser:

• Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.

• Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1

). Tolerance: dx: ±

0.004, dy: ± 0.004.

• Repeat this step for the other colour temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values

Value Cool (11000K) Normal (9000K) Warm (6500K)

x 0.278 0.289 0.314

y 0.278 0.291 0.319

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.

• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

2009-Aug-07

EN 34 Q548.1E LA6.

Alignments

• Set the RED, GREEN and BLUE default values according to the values in Table 6-1

.

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-2 White tone default settings 32" & 42" Frame sets

(7000 series)

White Tone 32" 42" Black level

Colour Temp R G B R G B R G

Normal 127 93 100 127 116 112 8 8

Cool 127 98 122 125 114 124 8 8

Warm 12783 6112710873 8 8

Table 6-3 White tone default settings 47" & 52" Frame sets

(7000 series)

White Tone 47" 52" Black level

Colour Temp R G B R G B R G

Normal 127 120 105 tbd tbd tbd 8 8

Cool 126 125 125 tbd tbd tbd 8 8

Warm 127 110 68 tbd tbd tbd 8 8

Table 6-4 White tone default settings 32" & 37" Roadrunner

sets (8000 series)

White Tone 32" 37" Black level

Colour Temp R G B R G B R G

Normal 127 93 97 125 127 102 8 8

Cool 127 100 120 122 127 117 8 8

Warm 12783 5912711862 8 8

Table 6-5 White tone default settings 42" & 47" Roadrunner

sets (8000 series)

White Tone 42" 47" Black level

Colour Temp R G B R G B R G

Normal 127 103 99 127 119 107 8 8

Cool 127 109 118 127 124 125 8 8

Warm 12794 6112711168 8 8

Note: The tint settings of the Frame sets (7000 series) 52" were not available at time of publishing.

6.3.3 LCD Panel Flicker Alignment

Note: This is only necessary for Forward Integration models

(sets that have the LCD Timing Controller (TCON) located on the SSB) - not applicable to sets in this chassis.

See ComPair for further instructions.

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX5120 ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.

Notes:

offset

• After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

For dealer options, in SAM select “Dealer options”. See Table 6-8

.

6.4.3 (Service) Options

Select the sub menu's to set the initialisation codes (options) of the model number via text menus. See Table 6-8

.

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-6

. Example: The options sticker gives the following option numbers:

• 08192 00133 01387 45160

• 12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. See Table 6-6

for the options.

Diversity

Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM An alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 3. Precautions, Notes, and Abbreviation List.

6.4.5 Option Code Overview

Table 6-6 Option and display code overview

CTN (Alt. BOM#)

32PFL7404H/xx 08193 00649 01391 45288 10165 28832 00162 00000 181

32PFL7674H/xx 08209 00656 02031 45288 10165 28832 00160 00000 181

32PFL7684H/xx 08209 00656 02031 45288 10165 28832 00160 00000 181

32PFL7694H/xx 08193 00650 01391 45288 10165 28832 00162 00000 181

32PFL7864H/xx 08193 00650 01391 45288 10165 28832 00162 00000 181

2

C

32PFL8404H/xx 08209 00656 02031 45288 26549 28834 00162 00000 181

37PFL8404H/xx 08209 00656 02031 45288 26549 28834 00170 00000 161

37PFL8684H/xx 08209 00658 02031 45288 26529 28834 00168 00000 161

37PFL8694H/xx 08209 00658 02031 45288 26529 28834 00168 00000 161

42PFL7404H/xx 08193 00651 01391 45288 10167 28832 00178 00000 183

42PFL7674H/xx 08193 00652 01391 45288 10167 28832 00176 00000 183

42PFL7864H/xx 08193 00652 01391 45288 10167 28832 00177 00000 183

42PFL8404H/xx 08209 00657 02031 45288 26551 28834 00178 00000 183

42PFL8654H/xx 08209 00659 02031 45288 26551 28834 00176 00000 183

42PFL8684H/xx 08209 00659 02031 45288 26551 28834 00176 00000 183

42PFL8694H/xx 08209 00659 02031 45288 26551 28834 00176 00000 183

Options Group 1 Options Group 2 Disp.

code

2009-Aug-07

Alignments

EN 35Q548.1E LA 6.

CTN (Alt. BOM#)

47PFL7404H/xx

47PFL7864H/xx 08193 00652 01391 45288 10170 28832 00161 00000 186

47PFL8404H/xx 08209 00657 02031 45288 26554 28834 00162 00000 186

52PFL7404H/xx 08193 00651 01391 45288 10192 28832 00186 00000 208

Options Group 1 Options Group 2 Disp.

08193 00651 01391 45288

10170 28832 00162 00000 186

Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

BBE & WMA Functionality

Some sets have the possibility to swith “on” the “BBE” and/or “WMA” functionality for an enhanced audio experience. This has to be executed via ComPair via “option 9”.

Table 6-7 “Option 9” overview

CTN (Alt. BOM#)

32PFL7674H/xx 00010

42PFL7674H/xx 00010

32PFL7684H/xx 00010

32PFL7694H/xx 00010

32PFL7864H/xx 00010

42PFL7864H/xx 00010

47PFL7864H/xx 00010

42PFL8654H/xx 00014

37PFL8684H/xx 00014

42PFL8684H/xx 00014

37PFL8694H/xx 00014

42PFL8694H/xx 00014

Option 9

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool. In case of a display replacement, reset the “Operation hours” to “0”, or to the operation hours of the replacement display.

6.5.1 SSB identification

Whenever ordering a new SSB, it should ne noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

code

6.6 Service SSB delivered without main software loaded

Due to a changed manufacturing process, new Service SSB’s can be delivered to the warehouse without main TV software loaded. Below you find the steps to follow when such

an SSB is received.

6.6.1 When a picture is available

1. Mount the Service SSB into the TV set. After start-up,

normally the download application will appear on the screen.

2. Download the latest main software (FUS) from the

www.p4c.philips.com

3. Create a folder "upgrades" in the root of a USB stick (size

> 50 MB) and save the "autorun.upg" file in this "upgrades" folder. Note: it is possible to rename this file, e.g. "Q549_SW_version.upg", this in case there are more than one "autorun.upg" files on your USB stick

4. Plug the prepared USB stick into the TV set, and select the

"autorun" file in the displayed browser on the screen

5. Now the main TV software will be loaded automatically,

supported by a progress bar

6. Set the correct "display code" via "062598-HOME-xxx",

where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.2 When no picture is available

Due to a possible wrong display option code in the received Service SSB (NVM), no picture can be available at start-up and thus no download application will be visible. Here you can proceed and finalize step by step to load the main TV software via the UART logging on the PC (for visual feedback).

1. Start-up the TV set, equipped with the Service SSB, and

enable the UART logging on the PC (see for settings 5.8

Fault Finding and Repair Tips 5.8.6 UART Logging)

2. The TV set will start-up automatically in the download

application if main TV software is not loaded

3. Plug the prepared USB stick into the TV set, press cursor

"Right" to enter the list, and navigate to the "autorun" file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press "OK"

4. Press cursor "Down" and "OK" to start the flashing of the

main TV software. Printouts like: "L: 1-100% , V: 1-100% and P: 1-100%" should be visible now in the UART logging

5. Wait until the message "Operation successful!” is

displayed and remove all inserted media. Restart the TV set

6. Set the correct "display code" via "062598-HOME-xxx",

where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

website.

Figure 6-1 SSB identification

18310_221_090318.eps

090319

6.6.3 Use of repaired SSBs instead of new

Repaired SSBs on stock will obviously already contain main TV software. This implies that only a main software upgrade is required if you use a “repaired” SSB for board swap instead of a “new” SSB.

2009-Aug-07

EN 36 Q548.1E LA6.

6.7 Total Overview SAM modes

Table 6-8 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Hardware Information A. SW version e.g. “Q5431_0.26.10.0” Display TV & Stand-by SW version and CTN serial

B. Stand-by processor version e.g. “STDBY_84.69.0.0”

C. Production code e.g. “See type plate”

Operation hours Displays the accumulated total of operation hours.TV

Error Displayed the most recent error.

Reset error buffer Clears all content in the error buffer.

Alignment Tuner AGC RF-AGC Take over point adjustment (AGC default

White point Colour temperature Normal 3 difference modes of colour temperature can be se-

Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / not

Virgin mode Off/On

E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)

Auto store mode None Autostore mode disabled (not in installation menu)

Options Digital broadcast DVB Off/On Select DVB On/Off

Digital features USB Off/On Select USB On/Off

Display Screen 201 / LCD LGD WUE SBA1 37" Displayed the panel code & type model.

Video reproduction Picture processing None/PNX5120 Select Picture processing None/PNX5120 (Q543.xE

Alignments

number.

switched “on/off” & every 0.5 hours is increase one

value is 64)

Warn

Cool

White point red LCD White Point Alignment. For values,

White point green

White point blue

Red black level offset

Green black level offset

PDC/VPS Autostore mode via ATS (PDC/VPS) enabled

TXT page Autostore mode via ACI enabled

PDC/VPS/TXT Autostore mode via ACI or ATS enabled

DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country

DVB - T light Off/On Select DVB T light On/Off

DVB - C Off/On Select DVB C On/Off

DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country

Over the air download Off/On or Country dependent Select Over the air download On/Off or by country

8 days EPG Off/On Select 8 day EPG On/Off

Ethernet Off/On Select Ethernet On/Off

Wi-Fi Off/On Select Wi-Fi On/Off

DLNA Off/On Select DLNA On/Off

On-line service Off On-line service is Off

PTP (Picture Transfer Protocol) Off/On Select PTP On/Off

Update assistant Off/On Select Update assistant On/Off

Internet software update Off Internet software update is Off

LightGuide Off/On Select LightGuide On/Off

Display fans Not present/Present Select Display fans Present/Not present.

Temperature sensor No sensor N.A

Temperature LUT 0 N.A

E-box & monitor Off/On Select E-box & monitor On/Off

MOP local contrast Off/On Select MOP local contrast On/Off

Light sensor Off/On Select Light sensor On/Off

Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference

Pixel Plus type Pixel Plus HD Select type of picture improvement.

Perfect Pixel HD

Pixel Precise HD

Pixel Plus HD (used in Q543.xE)

Pixel Precise HD (used in Q548.1E)

Ambilight None, Select type of Ambilight modules use.

2 sided 2/2

2 sided 4/4

3 sided 2/3/2

3 sided 4/3/4

3 sided 4/5/4

4 sided 4/3/4/3

Ambilight technology LED/Future use Ambilight technology LED is in use.

MOP ambilight Off/On Select MOP ambilight On/Off

lected

see Table 6-1.

muted in case no input signal is detected at input connectors.

Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)

chassis).

styling).

For 8400 series only

2009-Aug-07

Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-

Source selection EXT1/AV1 type SCART CBVS RGB LR Select input source when connected with external

CVBS Y/C YPbPr LR

CVBS Y/C YPbPr HV LR

(CVBS) YPbPr LR

EXT2/AV2 type SCART CBVS RGB LR Select input source when connected with external

CVBS Y/C LR

(CVBS) YPbPr LR

CVBS Y/C LR

EXT3/AV3 type None Select input source when connected with external

CVBS

CVBS LR

YPbPr

YPbPr LR

YPbPr HV LR

VGA Off/On Select VGA On/Off

SIDE I/O Off/On Select SIDE I/O On/Off

HDMI 1 Off/On Select HDMI 1 On/Off

HDMI 2 Off/On Select HDMI 2 On/Off

HDMI 3 Off/On Select HDMI 3 On/Off

HDMI 4 Off/On Select HDMI 4 On/Off

HDMI side Off/On Select HDMI side On/Off

HDMI CEC Off/On Select HDMI CEC On/Off

HDMI CEC RC pass through Off/On Select HDMI CEC RC pass through On/Off

HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off

Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.

Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1

Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options

Store Store after changing.

Initialise NVM N.A

Store

Software maintenance Software events Display Display information is for development purposes.

Hardware events Display Display information is for development purposes.

Operation hours display 0003 In case the display must be swapped for repair, you

Test setting Digital information QAM modulation: 64-QAM Display information is for development purposes.

Install start frequency 000 Install start frequency from 0 MHz

Install end frequency 999 Install end frequency as 999 MHz

Default install frequency

Installation Digital only Select Digital only or Digital + Analogue before instal-

Tuner type HD1816-MK1/TD1716-MK4/

System RC support Off/On Select System RC support On/Off.

Embedded user manual Off/On Select Embedded user manual On/Off.

Start-up screen Off/On Select Start-up screen On/Off.

Wallpaper Off/On Select Wallpaper On/Off.

Hotel mode Off Hotel mode is Off.

Clear

Test reboot

Test reboot is to restart the TV.

Clear

Symbol rate: 23:29

Original network ID: 12817

Network ID:12817

Transport stream ID: 2

Service ID: 3

Hierarchical modulation: 0

Selected video PID: 35

Selected main audio PID: 99

Selected 2nd audio PID: -1

Digital + Analogue

TD1716-MK3/HD1816-MK2

rameters.

equipment.

Select type of Tuner used.

to 4.

5 to 8.

Select Store in the SAM root menu after making any changes.

can reset the “Display operation hours” to “0”. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour).

lation.

EN 37Q548.1E LA 6.

2009-Aug-07

EN 38 Q548.1E LA6.

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Development file versions

Upload to USB Channel list To upload several settings from the TV to an USB

Download from USB Channel list To download several settings from the USB stick to

Development 1 file version Display parameters DISPT 4.0.8.11 Display information is for development purposes.

Development 2 file version 12NC one zip software Display information is for development purposes.

Personal settings

Option codes

Display-related alignment

History list

Personal settings

Option codes

Display-related alignment

Alignments

Acoustics parameters ACSTS 3.0.6.1

PQF - Fixed settings 1 “4.54.34.32.34”

PQS - Profile set 1 “4.57.34.32.34”

PQU - User styles 1 “4.56.34.32.34”

Initial main software

NVM version Q5431_0.4.3.0

Flash units SW Q5431_0.16.48.24

stick

the TV.

2009-Aug-07

7. Circuit Descriptions

Circuit Descriptions

EN 39Q548.1E LA 7.

Index of this chapter:

7.1 Introduction

7.2 Power Supply

7.3 DC-DC Converter

7.4 Front-End

7.5 HDMI

7.6 Video and Audio Processing - PNX8543

7.7 Common Interface CI+

Notes:

•Only new circuits (circuits that are not published recently) are described.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter 9.

Block Diagrams) and circuit diagrams (see chapter

10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

The Q548.1E LA chassis (platform name TV543/82) is a derivative from the Q543.1E LA chassis.

Main difference with the previous chassis is the addition of the PNX5120 Video Back-End Processor.

Roadrunner sets (8000 series) are equipped with AmbiLight.

7.1.1 Implementation

Key components of this chassis are:

• PNX8543 Digital Colour Decoder

• HD1816AF Hybrid Tuner

• DRX3926K Demodulator

• TDA9996 HDMI Switch

• TPA3123D2PWP Class D Power Amplifier

• PNX5120 Video Back-End Processor.

7.1.2 TV543 Architecture Overview

• For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1

.

Optional for

Q548 chassis

Figure 7-1 Architecture of TV543/82 platform

18540_200_090327.eps

090402

2009-Aug-07

EN 40 Q548.1E LA7.

7.1.3 SSB Cell Layout

Circuit Descriptions

2009-Aug-07

Figure 7-2 SSB layout cells (top view)

18540_201_090327.eps

090327

7.2 Power Supply

All power supplies described below are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Service Spare Parts website for the order codes of the boards.

7.2.1 Specifications

Most sets in the TV543 platform use the Integrated Power Board (IPB) - incl. inverter. The 52" sets in this chassis have a conventional PSU - with separate inverter.

Circuit Descriptions

+3V3-STANDBY

+12V, +Vsnd, +24V

Max 1.0sec Max 0.5 sec

Vin AC

STANDBY

Figure 7-4 PSU Timing Diagram

EN 41Q548.1E LA 7.

Min 20 msec

Max 5.0 sec

8440_209_090226.eps

1

090227

In this Service Manual, no detailed information is available for design protection reasons.

7.2.2 Diversity

Below find an overview of the different PSUs that are used:

Table 7-1 Supply diversity

Supplier PSU Model Input Voltage Range

LGIT PLHL-T826B 32" High Mains (198 to 265 VAC)

Delta DPS-298CP A 37" High Mains (198 to 265 VAC)

Delta DPS-298CP-4 A 42" High Mains (198 to 265 V

Delta DPS-298CP-2 A 47" High Mains (198 to 265 V

Delta DPS-411AP-3A 52" High Mains (198 to 265 VAC)

7.2.3 Application

An application diagram can be found below:

Inverter

AC Input

RELAY

PFC

Vo=400V

Non- Isolated/Hot

Flyback

Isolated/Cold

18440_208_090226.eps

Figure 7-3 Application Integrated Power Board

7.2.4 Power Supply Timing

The STANDBY signal controls the on-mode voltages +12V, +V

and +24V. During chassis cold start from AC mains,

snd

+12V can be expected to be stable within 1.0 seconds, while for a warm start, i.e. wake up from stand-by power state, this timing becomes 0.5 seconds maximum. During AC switch off, stand-by power +3V3-STANDBY decay is at least 20 ms but not more than 5.0 seconds compared to +12V. Refer to

Figure 7-4

:

AC

To Lamps

+12V

Audio Supply (+12V)

+24V

STANDBY (HIIGH=OFF, LOW=ON)

+3V3_STANDBY

)

090327

7.2.5 Power Supply Protection

Power supply protection is implemented via the stand-by controller of the PNX8543 via the following signals:

• POWER-OK: signal from PSU to indicate if the supply output from the IPB is normal

• DETECT1: signal to indicate if the +5V, +3V3 and +1V2 voltages on the chassis are present

• DETECT2: signal to indicate if the +12V voltage on the chassis is present.

7.3 DC-DC Converter

Input power is obtained from the IPB module via the following voltages:

• +3V3-STANDBY (stand-by-mode only)

• +12V (on-mode)

•+V

• +24V (bolt-on power) (on-mode).

Control is achieved by the PNX8543 controller via the STANDBY signal.

Audio power is specifically for audio supply usage only and does not go through any DC conversion.

Below find a block diagram of the on-board DC-DC converters.

+

(audio power) (on-mode)

snd

+12V

3V3-STANDBY

Figure 7-5 DC-DC converters

NCP5422 + 2x

Si4936

(Sync Dual

Controller

+ Dual FETs)

ST1S10

(Sync Power IC)

ST1S10

(Sync Power IC)

LD3985M

(Linear Regulator)

LD1117

(Linear Regulator)

LD1117

(Linear Regulator)

18440_210_090227.eps

+1V2-PNX8543

+3V3

+1V8-PNX8543

+1V8-PNX5100

ENABLE-3V3

+5V_+5V5-TUN

+1V2-PNX5100

+1V2-STANDBY

090227

2009-Aug-07

EN 42 Q548.1E LA7.

7.4 Front-End

The Front-End consist of the following key components:

Circuit Descriptions

Platform with embedded EDID

• Tuner HD1816AF

• IF demodulator DRX3926K

• AGC amplifier UPC3221GV

• SAW filter 36M125.

Below find a block diagram of the front-end application.

NXP Hybrid

Tuner

SAW

IF Amplifier DRX3926K PNX8543

Filter

I2C-TUNER

IF-AGC

18440_211_090227.eps

Figure 7-6 Front-End block diagram

The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.

7.5 HDMI

In this platform, the TDA9996 HDMI multiplexer is implemented. The EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical sub address: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.

I2C-SSB

CVBS

2nd SIF

TS

090227

EDID : 25 3B

IIC

CPU

TDA9996

3B 3B 3B 3B

253 common Bytes

+ 1B sub addres of

S o u rc e Physica l Add ress

+3B for input A

4 × HDMI

inpu ts

Figure 7-8 EDID control (embedded EDID)

Some delta’s w.r.t. TDA9996 compared to earlier chassis/ platforms are:

• +5V detection mechanism

• stable clock detection mechanism

• integrated EDID

•RT control

• HPD control

• TMDS output control

• CEC control

• new hot-plug control for PNX8543 for 5th HDMI input

• new EDID structure: EDID stored in TDA9996, therefore there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms.

Some delta’s with respect to PNX8543 compared to earlier chassis/platforms are:

• 2 HDMI inputs (A & B)

• HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.

After replacement of the TDA9996 HDMI multiplexer, the

2

default I and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.

C address should be reprogrammed from C0 to CE,

+3B for input B +3B for inpu t C +3B for inpu t D

18440_214_090227.eps

090720

PNX8543

Edid

1M96

HDMI 4 (optional)

A B

HDMIA-RX

1P06

ARX

1P04

HDMI 3

(opt iona l)

HDMIB-RX

Out

A

TDA9996

B

BRX

1P03

HDMI 2

Figure 7-7 HDMI input configuration

D

DRX

C

CRX

1P02

HDMI 1

18440_213_090227.eps

1P0 5

HDMI Side

(optional)

090720

2009-Aug-07

Circuit Descriptions

EN 43Q548.1E LA 7.

7.6 Video and Audio Processing - PNX8543

The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.

PNX8543x

TS in from

channel decoder

TS out/in for

PCMCIA

DV-ITU-656

CVBS, Y/C,

RGB

Low-IF

SSIF, LR

Dual SPDIF

I2S

Dual HDMI

CI/CA

VIDEO

DECODER

DIGITAL IF

AUDIO DEMOD

AND DECODE

AUDIO IN

HDMI

RECEIVER

SYSTEM

CONTROLLER

(8051)

SYSTEM

PROCESSOR

DV INPUT

3D COMB

MPEG/H.264

DECODER

300 MHz

MIPS32 4KEc

MPEG

VIDEO

CPU

MEMORY

CONTROLLER

The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling.

• For a functional diagram of the PNX8543, refer to Figure 7-9

PRIMARY

VIDEO

OUTPUT

AV-PIP

SUB-PICTURE

SECONDARY

VIDEO

OUTPUT

SCALER,

DE-INTERLACE

AND NOISE

REDUCTION

AUDIO DSP

300 MHz

AV-D SP

DRAWING

ENGINE

DMA BLOCK

.

LV DS

VIDEO

ENCODER

AUDIO DACS

AUDIO OUT

LV DS for flat panel display (single or dual channel)

analog CVBS

analog audio

2

S

I

SPDIF

I2C

PWM

GPIO IR ADC UART I2C GPIO Flash

SPI

Figure 7-9 PNX8543 functional diagram

01 x22 x

USB 2.0 CA

PCI 2.2

18440_202_090226.eps

090226

2009-Aug-07

EN 44 Q548.1E LA7.

7.6.1 Video Subsystem

Circuit Descriptions

Refer to Figure 7-10

for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.

PNX8543x

A

LOW IF

CVBS

RGB

YPbPr

VGA

Dual HDMI

AFE

(ADC)

HDMI_

RX

VCP/PC

VCP_RX

PC_RX

HDMI

HDMI_UIP

VCP_

VCP_ WIFD

PC_

UIP

DDR2-SDRAM

MCU-DDR

DMA BUS

GFX1

GFX2

PIP

main

2D_DE

CPIPE_

MBVP_ L2QTV

MBVP_ L2VO1

L2QTV

LV DS_BUF

LV DS_TX

LCD panel FPD-LVDS1

LCD panel FPD-LVDS2

DV (including

ITU-656)

TS

PCMCIA TSDO

TSDI CMD

VIP

(ITU-656)

CAI

TSI

VMSP

Figure 7-10 PNX8543 video flow diagram

The Video Subsystem consist of the following blocks:

• Analogue Front-End (AFE) block

• Video and PC Capture (VPC/PC) pipe

• HDMI Receiver interface

• Memory-Based Video Processor MBVP)

• Video Composition Pipe (CPIPE)

• Memory Based Video Processor (MBVP) VO-1

• Memory Based Video Processor (MBVP) VO-2

• Video Composition Pipe (CPIPE)

• Dual Flat Panel Display-LVDS (FPD-LVDS)

• Digital Encoder (DENC)

• Digital Video VIP

• 2D graphics block.

MBVP_

L2VO2

CPIPE_

L2VO

MSVD

DENC

A

CVBS/Y

MUX

DAC

C

DAC

monitor CVBS1/Y

monitor

CVBS2/C

18440_203_090226.eps

090226

2009-Aug-07

7.6.2 Audio Subsystem

Circuit Descriptions

EN 45Q548.1E LA 7.

Refer to Figure 7-11

for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.

DDR2-SDRAM

PNX8543x

TS-IN

SPDIF-IN1 SPDIF-IN2

I2S-IN-SD1 I2S-IN-SD2 I2S-IN-SD3 I2S-IN-SD4

I2S-IN-WS I2S-IN-SCK I2S-IN-OSC

HDMI

IF

SSIF

CAI

XB1

SPDIF

HDMI_RX

from XB4

2

I

S

ADC

DigIF

SPDIF

VMSP

SPDIF-IN

fast SPDIF

XB2

4

ASDEC

(DEMODULATION

AND DECODING)

AI

4 × I2S

MCU

4 × I2S

TM2270

(MPEG, AC-3, MP3

DECODER)

SPDIF-OUT

DMA BUS

AO

XB3

APP - AUDIO DSP

(POST PROCESSING)

4 × I2S

XB4

SPDIF-Out

4

I2S-OUT-SD1 I2S-OUT-SD2 I2S-OUT-SD3 I2S-OUT-SD4

I2S-OUT-WS I2S-OUT-SCK I2S-OUT-OSC

L, R

ADC

Figure 7-11 PNX8543 audio flow diagram

The Audio Subsystem consist of the following blocks:

• Analogue Audio Front End (AAFE) used to capture Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input

• HDMI Receiver interface block

• SPDIF input block

• Audio Input (AI) block

• Audio Output (AO) block

• Demodulation & Decoding (ASDEC) DSP for decoding all analogue terrestrial TV sound standards

• Audio Post-Processing (APP) block

• Digital Audio decoder.

2

DAC

2

DAC

2

DAC

2

DAC

Main L, R

HP L, R

SCART2 L, R

SCART1 L, R

18440_204_090226.eps

090226

2009-Aug-07

EN 46 Q548.1E LA7.

7.6.3 Connectivity and Compute Subsystem

Circuit Descriptions

Refer to Figure 7-12 subsystem.

I2C-1

I2C-2

I2C-3

for the connectivity and compute

PNX8543x

IIC4_DMA

IIC2_DMA

IIC3_DMA

DDR2-SDRAM

MCU_DDR

MIPS 4KEc

EJTAG

AVD SP

UART-1

UART-2

UART1

UART2

USB2.0USB

EJTAG

The Connectivity Subsystem consists of:

• PCI/XIO interface

• USB2.0 interface

• Three 2-wire UARTs

• Four Master/Slave I

• Common Interface/Conditional Access Interface.

The Computing Subsystem consists of:

• 32-bit MIPS RISC core

• Enhanced JTAG (EJTAG) block inside the MIPS

• JTAG_MMIO blocks

• TV controller

• Audio/Video DSP (AV_DSP)

• Memory Control Unit (MCU).

JTAG_MMIO

2

C interfaces

Figure 7-12 PNX8543 connectivity and compute subsystem

DCS-NETWORK

DMA BUS

PCI_XIO

PCI/XIO

CAI

CI/CA

I2C-MC

SYSTEM

CONTROLLER

80C51

UART-3

PWMs

GPIOs

18440_205_090226.eps

7.6.4 Service Notice - FLASH RAM / PNX8543 exchange

The FLASH RAM (item 7M00) and/or PNX8543 (item 7600) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+) keys in the components, unauthorised exchange of these components will always result in a defective board.

090226

7.7 Common Interface CI+

Together with this platform, an extension to the Common Interface (CI) Conditional Access system is added, called CI+.

CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB.

2009-Aug-07

The weakness of the conventional CI module used in a Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual.

The CI+ standard is downwards compatible with the existing CI standard.

The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.

7.8 Ambi Light

Circuit Descriptions

tuner

Transport stream

Figure 7-13 CI+ Conditional Access implementation

channel decoder

inte rface

TS-INP UT

CA-MDI

(SC )

EN 47Q548.1E LA 7.

DES/AES

descrambler

MHEG CI+

decoder

demux

PNX8543

PCI/XIO

MHEG MMI

application

Command

CA-CTRL

inte rface

CA-MDO

CA clien t

DES/AES

scrambler

CAM

Matrix

Transport Streams

CA-Control

Proprietary CA scrambling

CI + StandardisedCCS scrambling

18440_221_090227.eps

090227

The Ambi Light architecture in this platform has been entirely renewed. The characteristics are:

• Additional DC/DC board generating 12/16/24 V (optional)

• ARM processor (on DC/DC panel or AL board)

• Low-power LEDs

• SPI interface from ARM to LED drivers

2

•I

C upgradeable via USB

• Each AL module has a temperature sensor.

Figure 7-14 Interface between Ambi Light and SSB

7.8.1 ARM controller

The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards.

Refer to Figure 7-14

for the Ambi Light architecture.

18310_203_090317.eps

090317

Refer to Figure 7-15

below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102).

SDA

SCL

SEL1

SEL2

TxD

RxD

Sd a1

Scl1

tb d

ARM

Txd 0

Rxd0

SPI C LOCK

Sck

SPI LATCH

P0.7

SPI LA TCH 2 (only on dc/dc for aurea )

P0.8

SPI D ATA OUT

MOSI

PWM CLOCK

MAT0.0

SPI DATA RETURN

MISO

BLANK

MAT1.0

PROG

tb d

C S EEPROM

tb d

TEM P

P0.10

18310_204_090318.eps

090318

Figure 7-15 ARM controller interface

Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface.

2009-Aug-07

EN 48 Q548.1E LA7.

Circuit Descriptions

The SPI bus is a synchronous serial data link standard that operates in full duplex mode.

For debugging purposes, the working principle is given below:

• At startup the controller will read-out matrix data from the EEPROM devices (via SPI DATA RETURN)

• Before operation, the driver current is set via SPI, with driver in DC mode

• During normal operation the controller receives RGB-, configuration-, operation mode- and topology data via I

• The controller converts the I

2

C RGB data via the matrixes

2

C

to SPI LED data

• Via data return the controller receives error data (if applicable).

Amb ilig ht m odu le 1 Am b iligh t mo du le 2 Amb ilight modu le N

S o ut S in So ut S o utS in

o ut16

LED

DRIVER

LED

DRIVER

1

SPI data in

ARM

SPI d ata retu rn

SPI clo ck (S CLK) SPI la tch (XL AT)

PRO G (VPRG ) BLANK PW M CLOC K ( GSCLK)

Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I USB). The controller can receive matrix values via I

2

C (via

2

C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness.

7.8.2 LED driver communication (via SPI bus)

Refer to Figure 7-16

below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.

o ut16

LED

o ut16

DRIVER

2

N

Figure 7-16 SPI communication between ARM controller and LED drivers

The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below:

• Data from the ARM controller is linked through the drivers, which are connected in cascade

• SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK are going directly from the controller to each driver

• SPI DATA RETURN is linked from the last driver to the controller: controller decides which driver returns data.

7.8.3 Temperature Control

Refer to Figure 7-17

for signal interfacing between the ARM

controller and the temperature sensor on the AL boards.

Amb iligh t mod ule 1 Am bilig ht mo dule 2

TEMP

SENS OR

Vcc

Pull-upPull-upPull-up

TEMP

SENS OR

Vcc

Amb iligh t mod ule N

SENS OR

TEMP

Vcc

18310_205_090318.eps

090318

Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.

ARM

18310_206_090318.eps

Figure 7-17 Communication between ARM controller and

temperature sensor

2009-Aug-07

090318

8. IC Data Sheets

IC Data Sheets

EN 49Q548.1E LA 8.

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the

electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 Diagram SSB: DC/DC +3V3 +1V2 B01A, NCP5422AD (IC 7103)

Block Diagram

+

V

CC

−

+

−

+

−

+

0.25 V

−

A

5.0

IS+1

IS−1

IS+2

IS−2

8.6 V

7.8 V

70 mV

+

−

S

Set

Dominant

R

1.0 V

−

Q

+

V

CC

BIAS

FAULT

E/A OFF

R

+

−

E/A1

OSC

CURRENT

SOURCE

OSC

PWM Comparator 1

0.425 V

PWM Comparator 2

GEN

CLK1

CLK2

RAMP1

0.425 V

− +

−

1.0 V

FAULT

RAMP2

E/A OFF

+

−

+

E/A2

1.2 mA

RAMP1

S

Reset Dominant

R

FAULT

S

Reset Dominant

R

FAULT

non−overlap

FAULT

RAMP2

V

BST

CC

BST

CC

BST

GATE(H)1

GATE(L)1

GATE(H)

GATE(L)2

GND

2

Pin Configuration

GATE(H)1

GATE(L)1

Figure 8-1 Internal block diagram and pin configuration

V

COMP1

FB1

V

FB2

SO−16

16

N

A

C

W

45P 2 2

WWYL

A

GND

BST

IS+1 IS−1 V

FB1

1

COMP1

A= Assembly Location WL = Wafer Lot Y= Year WW = Work Week

GATE(H)2 GATE(L)2 V

CC

R

OSC

IS+2

IS−2

V

FB2

COMP2

F_15400_129.eps

240505

2009-Aug-07

EN 50 Q548.1E LA8.

IC Data Sheets

8.2 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, ST1S10PH (IC 7202/7222)

Block Diagram

Pin Configuration

2009-Aug-07

DFN8 (4x4)

Figure 8-2 Internal block diagram and pin configuration

PowerSO-8

I_18010_083.eps

130608

IC Data Sheets

8.3 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, LD3985M (IC 7201)

Block Diagram

EN 51Q548.1E LA 8.

Pin Configuration

TSOT23-5L/SOT23-5L Flip-Chip

Figure 8-3 Internal block diagram and pin configuration

G_16290_084.eps

020206

2009-Aug-07

EN 52 Q548.1E LA8.

IC Data Sheets

8.4 Diagram SSB: Front End B02A, DRX3926K (IC 7303)

Block Diagram

RF AGC

Main

Tuner

2

C

I

Pin Configuration

VSSAL_AFE2

VDDAL_AFE2

PDP

PDN

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

49XI

50XO

51VSSAH_OSC

52VDDAH_OSC

53VDDH

54VSSH

55VSSL

56VDDL

57TDO

58TMS

59TCK

60TDI

61I2C_SDA2

62I2C_SCL2

63I2S_CL

64I2S_DA

123 45678 910111213 14 15 16

I2S_WS

VDDL

VSSL

SAW

Integrated Tuner

VDDAH_CVBS

SIF

GPIO1

MSTRT

MERR

VSSAH_CVBS

CVBS

VSSH

VDDH

IF AGC

DRXK

INP

MCLK

INN

VSSAH_AFE1

MD0

MVAL

ADCIF AMP

Presaw

Sense

VDDAH_AFE1

VDDAL_AFE1

MD2

MD1

VSSAL_AFE1

IF_AGC

RF_AGC

19

VDDL

VSSL

MD3

RSTN32

SAW_SW31

GPIO230

VSYNC29

VSSL28

VDDL27

VDDH26

VSSH25

I2C_SDA124

I2C_SCL123

MD722

MD621

MD520

MD4

VDDH18

VSSH17

DVB-T/QAM/ATV

Demodulator

Stereo Decoder

System Controller

DVB-T/QAM

FEC

DAC

MPEG-2 TS

CVBS

SIF

2

S Audio

I

2

C

I

GPIO

18440_300_090303.eps

090303

2009-Aug-07

Figure 8-4 Pin configuration

IC Data Sheets

8.5 Diagram SSB: PNX8543 - Power B03A-B03H, PNX8543 (IC7600)

Block Diagram

TS in from

channel decoder

TS out/in for

PCMCIA

DV-ITU-656

CVBS, Y/C,

RGB

Low-IF

SSIF, LR

Dual SPDIF

I2S

Dual HDMI

PNX8543x

CI/CA

VIDEO

DECODER

DIGITAL IF

AUDIO DEMOD

AND DECODE

AUDIO IN

HDMI

RECEIVER

SYSTEM

CONTROLLER

(8051)

MPEG

SYSTEM

PROCESSOR

DV INPUT

3D COMB

MPEG/H.264

VIDEO

DECODER

300 MHz

MIPS32 4KEc

CPU

MEMORY

CONTROLLER

PRIMARY

VIDEO

OUTPUT

AV-PIP

SUB-PICTURE

SECONDARY

VIDEO

OUTPUT

SCALER,

DE-INTERLACE

AND NOISE

REDUCTION

AUDIO DSP

300 MHz

AV-D SP

DRAWING

ENGINE

DMA BLOCK

LVD S

VIDEO

ENCODER

AUDIO DACS

AUDIO OUT

LVD S for flat panel display (single or dual channel)

analog CVBS

analog audio

2

S

I

SPDIF

EN 53Q548.1E LA 8.

PWM

I2C

Pin Configuration

ball A1 index area

A

B

C

D

E

F

G

H

J

K

L

M

N

P

R

T

U

V

W

Y

AA

AB

AC

AD

AE

AF

AG

AH

AJ

AK

AL

AM

AN

AP

GPIO IR ADC UART I2C GPIO Flash

SPI

USB 2.0 CA

01 x22 x

426121018 26412 22308 20 28614

1917253 11 19 2771523513 21 29

PNX8543xEH

Transparent top view

PCI 2.2

32

34

33

31

18440_301_090303.eps

090303

Figure 8-5 Internal block diagram and pin configuration

2009-Aug-07

EN 54 Q548.1E LA8.

IC Data Sheets

8.6 Diagram SSB: Ethernet (Pt. no. 1) B05B, DP83816 (IC7N04)

Block Diagram

TPRDP/M

25 MHz Clk

SRAM

RX-2 KB

SRAM

RXFilter

SRAM

TX-2 KB

PCI CLK

PCI CNTL

PCI AD

3V DSP Physical Layer

RAM

.5 KB

a t a d

d r x T

BIST

Logic

a t a d

a

r d d A

t a

r d d A x T

d

d r x R

r w

x

R

T

MAC/BIU

Pin Configuration

TPTDP/M

t g M

X R I I M

I

I M

Interface

Logic

a t a d r w x R

t g

X R I I M M I

I M

t u o a t a d t s e T

n i a

X T I I M

t a d

t s e T

MII RX MII TX MII Mgt

BIOS ROM Cntl BIOS ROM Data EEPROM/LEDs

E E / M O R

X T I

I M

B

RESERVED

PMEN/CLKRUNN

DP83816

Figure 8-6 Internal block diagram and pin configuration

VSS

IAUXVDD

VREF

VSS

TPRDM

TPRDP

IAUXVDD

REGEN

VSS

VSS TPTDM TPTDP

VSS

AUXVDD

VSS

AUXVDD

PCICLK

INTAN RSTN GNTN REQN

VSS

AD31 AD30 AD29

PCIVDD

AD28 AD27 AD26

37

NC

38 39 40 41 42

NC

43

NC

44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

S S V S S V

C N

6 3 5

3

3 7

5 2 D A

4 1 A M / 2

5 1 A M / 3 D X T

3 1 A M / 1 D X T

6 1

D D V X U A

A M / L O C

K L C X T

N E X T

S R C

S S V C N

4

2 3

3 3

3

D X T

3 2

4 2

8 2

5

9 2

6 2

7

0 3

1

2

3

2

DP83816

1 8

8 7

7 7

6 7

5 7

4 7

3

4 2 D A

L

S S V

E

N

S D I

E B C

5 8

4 8

3 8

2 8

0 8

9 7

2 2 D A 3 2 D A

6 8

8 1 D A

9 1 D A

1 2 D A

0 2

D D V

C N

D

I

A C P

0

1

2 1 A M /

1

7 A M / 1 D X R

9 A

8

A

A M /

8 1

1 9 0

N E M A R F

S S 1 X

V

7 1

6 1

N Y D R I

M /

V

R E X R

D X R

4 1 5 1

Identification

4 9

3 9 2 9

5 9

N L

N Y D R

D D V I C P

E S V

T

E D

E O X

R

3 1

Pin1

6 9

N P O T S

A M / 2 D X

D D V

M / 3 D

X

X R

U A

R

2 1

0 1

1 1

9 9

8 9

7 9

R A P

N R R E S

N R R

E P

D D V X U A

0

S

D X T

1 C

2

S

X

V

9 1

0 2

1 2

2 2

9 8

8 8

7 8

9

S S V

2 N

7

6

1 D A

E B C

K L C

6 A M / 0 D

I D E E / 3

E

K L C

E / 4

O

C D M

I D

5

S S V

A

X

M

R

5

1

2

6 7 8

9

3

4

3 0 1

2 0 1

1 0 1

0 0 1

4 0 1

5 0 1

1 N E B C

2 1 D A

3

5 1 D A

4 1 D A

S

1 D A

S V

144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

7

6

0 1 8 0 1

0 1

1 1 D A

0 1 D A

D D V

I C P

MA2/LED100N MA1/LED10N MA0/LEDACTN MD7 MD6 MD5 MD4/EEDO AUXVDD VSS MD3 MD2 MD1/CFGDISN MD0 MWRN MRDN MCSN EESEL RESERVED NC NC NC PWRGOOD 3VAUX AD0 AD1 AD2 AD3 PCIVDD AD4 AD5 VSS AD6 AD7 CBEN0 AD8 AD9

F_15710_167.eps

230905

2009-Aug-07

IC Data Sheets

8.7 Diagram SSB: Ethernet (Pt. no. 3) B05B, LAN9420 (IC7N04)

Block Diagram

PCI Host

LAN9420/LAN9420i

EEPROM (optional)

Magnetics

EN 55Q548.1E LA 8.

To Ethernet

PCI Bus

PCI Device

Pin Configuration

External

25MHz Crystal

GPIOs/LEDs

(optional)

Figure 8-7 Internal block diagram and pin configuration

18561_300_090717.eps

090717

2009-Aug-07

EN 56 Q548.1E LA8.

IC Data Sheets

8.8 Diagram SSB: Class-D B06A, TPA3123D (IC 7L10)

Block Diagram

1F

LIN

1F

RIN

BYPASS

AGND

BSR

ROUT

PGNDR

PGNDL

LOUT

BSL

0.22 F

0.68 F

22 H

470 F

PVCCL

PVCCR

VCLAMP

GAIN0

GAIN1

1F

}

Control

Shutdown

Control

AVC C

SD

MUTE

Pin Configuration

PVCCL

SD

PVCCL

MUTE

LIN

RIN

BYPASS

AGND AGND

PVCCR

VCLAMP

PVCCR

TERMINAL

NAME

SD

RIN 6 I Audio input for right channel

LIN 5 I Audio input for left channel

GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC

GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC

MUTE 4 I

BSL 21 I/O Bootstrap I/O for left channel

PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC

LOUT 22 O Class-D 1/2-H-bridge positive output for left channel

PGNDL 23, 24 P Power ground for left-channel H-bridge

VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors

BSR 16 I/O Bootstrap I/O for right channel

ROUT 15 O Class-D 1/2-H-bridge negative output for right channel

PGNDR 13, 14 P Power ground for right-channel H-bridge.

PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC

AGND 9 P Analog ground for digital/analog cells in core

AGND 8 P Analog ground for analog cells in core

BYPASS 7 O

AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL

Thermal pad Die pad P

24-PIN (PWP)

I/O/P DESCRIPTION

2I

Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to AVCC

Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low = outputs enabled). TTL logic levels with compliance to AVCC

Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via external capacitor sizing.

Connect to ground. Thermal pad should be soldered down on all applications to properly secure device to printed wiring board.

1 2 3

4 5 6 7 8 9

10 11 12

24 23 22

21 20 19 18 17 16

15 14 13

PGNDL PGNDL LOUT BSL AVC C AVC C GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

18440_302_090303.eps

090303

2009-Aug-07

Figure 8-8 Internal block diagram and pin configuration

IC Data Sheets

8.9 Diagram SSB: Ethernet (Pt. no. 1) B08D, PNX51xx (IC7C00)

Block Diagram

EN 57Q548.1E LA 8.

PNX51xx

LV DS RX 1

LV DS RX 2

PCI/XIO

I2C

UART

AUDIO IN

UIP L3K7

I2C-DMA

MEMORY

CONTROLLER

Video

GFX

GIC 1

GIC 2

GIC 3

CPIPE L3K7

UART

16 X GPIO

EJTAG

CLOCK

TM327x 1

TM327x 2

TM327x 3

LV DS TX 1

LV DS TX 2

LV DS TX 3

LV DS TX 4

CAB

AUDIO OUT

Pin Configuration

ball A1 index area

Figure 8-9 Internal block diagram and pin configuration

AB

AD

AF

A

B

C

D

E

F

G

H

J

K

L

M

N

P

R

T

U

V

W

Y

AA

AC

AE

1 3 57911

2468 10 121314

PNX51xx

Transparent top view

18 20

15 171619

22 242526

21 23

18560_300_090403.eps

090403

2009-Aug-07

EN 58 Q548.1E LA8.

IC Data Sheets

2009-Aug-07

9. Block Diagrams

Wiring Diagram 32" (Frame)

WIRING DIAGRAM 32"

1M83

(AL1)

1. SCL

2. SPI-DATA-IN

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. BLANK

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

TO

BACKLIGHT

KEYBOARD CONTROL

(1114)

(FRAME / ROADRUNNER)

+ -

SUBWOOFER

8316

(5214)

Block Diagrams

DANGEROUS

HIGH VOLTAGE

CN2

1. HV1

2. N.C.

3. HV1

8319

DANGEROUS

HIGH VOLTAGE

CN3

1. HV2

2. N.C.

3. HV2

MAIN POWER SUPPLY IPB PLHL-T826B

(1005)

CN7

CN1

6. GND

1. N

5. +24V

2. L

4. GND

3. +24V

T3.15A

2. GND

1. +24V

EN 59Q548.1E LA 9.

*8M83

CN4

11. FAN_PWM

10. GND_SND

9. +VSND

8. +12V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

CN5

12. GND1

11. I2C_DATA

10. I2C_SCL

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

LCD DISPLAY

(1004)

8G51

8M20

8M95

8M99

*8M85

8G50

1G50

(B07B)

1. N.C

2. N.C ... ... ...

39. N.C

40. N.C

41. N.C

1G51

(B07B)

1. +VDISP-OUT

2. +VDISP-OUT

3. +VDISP-OUT

4. +VDISP-OUT ... ... ...

51. GND

1M20

(B03G)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

1M95

(B01B)

11. N.C

10. GNDSND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

1M99

(B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. GND

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735

(B06A)

4. RIGHT-SPEAKER

3. GNDSND

2. GNDSND

1. LEFT-SPEAKER

1736

(B06A)

3. RIGHT-SPEAKER

2. GNDSND

1. LEFT-SPEAKER

1M59

(B08E)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

B

SSB

(1150)

*8M83

TO

BACKLIGHT

1M85

(AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

(1175)

*AMBI-LIGHT MODULE

10 LED

AL

(1176)

*AMBI-LIGHT MODULE

10 LED

AL

RIGHT SPEAKER

(5213)

Board Level Repair

Component Level Repair Only For Authorized Workshop

* Only For 32PFL8404H/xx

8308

INLET

IR LED PANEL

(1112)

2009-Aug-07

1M83

(AL1)

8763

P2

3P

P1

8P

LEFT SPEAKER

(5213)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

18560_400_090326.eps

090714

Wiring Diagram 37" (Roadrunner)

WIRING DIAGRAM 37" (ROADRUNNER)

1M83 (AL1)

1. SCL

2. SPI-DATA-IN

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. BLANK

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

Block Diagrams

8319

8M85

EN 60Q548.1E LA 9.

1M85 (AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

LCD DISPLAY (1004)

TO

BACKLIGHT

8M83

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

BACKLIGHT

KEYBOARD CONTROL

(1114)

TO

8316

CN2

1. HV1

1G50 (B07B)

1. N.C

2. N.C ...

8G50

8G51

8M83

8M20

2. N.C.

3. HV1

CN3

1. HV2

2. N.C.

3. HV2

MAIN POWER SUPPLY IPB DPS-298CPA B

(1005)

CN7

6. GND

5. +24V

4. GND

3. +24 V

2. GND

1. +24V

CN4

11. FAN_PWM

10. GND_SND

9. +VSND

8. +12V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

CN5

12. GND1

11. I2C_DATA

10. I2C_SCL

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

8M95

8M99

FUSE

CN1

1. N

2. L

... ...

39. N.C

40. N.C

41. N.C

1G51 (B07B)

1. +VDISP-OUT

2. +VDISP-OUT

3. +VDISP-OUT

4. +VDISP-OUT ... ... ...

51. GND

1M20 (B03G)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

1M95 (B01B)

11. N.C

10. GNDSND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

1M99 (B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. GND

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735 (B06A)

4. RIGHT-SPEAKER

3. GNDSND

2. GNDSND

1. LEFT-SPEAKER

1736 (B06A)

3. RIGHT-SPEAKER

2. GNDSND

1. LEFT-SPEAKER

1M59 (B08E)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

B

SSB

(1150)

(1175)

AMBI-LIGHT MODULE

10 LED

AL

(1176)

AMBI-LIGHT MODULE

10 LED

AL

RIGHT SPEAKER

(5213)

Board Level Repair

Component Level Repair Only For Authorized Workshop

8308

INLET

2009-Aug-07

IR LED PANEL

(1112)

1M83 (AL1)

14. GND

13. VLED2

12. GND

11. VLED1

8736

P2

3P

P1

8P

+ -

SUBWOOFER

(5214)

LEFT SPEAKER

(5213)

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

18560_410_090331.eps

090714

Wiring Diagram 42" (Frame/Roadrunner)

WIRING DIAGRAM 42"

1M83

(AL1)

1. SCL

2. SPI-DATA-IN

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. BLANK

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

KEYBOARD CONTROL

(1114)

TO

BACKLIGHT

(FRAME / ROADRUNNER)

8316

CN2

1. HV1

2. N.C.

3. HV1

CN3

Block Diagrams

1. HV2

2. N.C.

3. HV2

MAIN POWER SUPPLY IPB DPS-298CP-4A

(1005)

CN7

6. GND

5. +24V

CN1

4. GND

1. N

EN 61Q548.1E LA 9.

*8M85

1M85

8319

LCD DISPLAY

(1004)

TO

BACKLIGHT

*8M83

1G50

(B07B)

1. N.C

2. N.C ...

8735

... ...

39. N.C

40. N.C

41. N.C

1G51

(B07B)

1. +VDISP-OUT

2. +VDISP-OUT

3. +VDISP-OUT

4. +VDISP-OUT ... ... ...

51. GND

1M20

(B03G)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

1M95

(B01B)

11. N.C

10. GNDSND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

1M99

(B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. GND

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735

(B06A)

4. RIGHT-SPEAKER

3. GNDSND

2. GNDSND

1. LEFT-SPEAKER

1736

(B06A)

3. RIGHT-SPEAKER

2. GNDSND

1. LEFT-SPEAKER

8G50

8G51

*8M83

CN4

11. FAN_PWM

10. GND_SND

9. +VSND

8. +12V

1. +24V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

CN5

12. GND1

11. I2C_DATA

10. I2C_SCL

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

3. +24 V

2. GND

8M20

8M95

8M99

FUSE

2. L

8308

INLET

1M59

(B08E)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

B

SSB

(1150)

(AL4)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

(1175)

*AMBI-LIGHT MODULE

12 LED

AL

(1176)

*AMBI-LIGHT MODULE

12 LED

AL

Board Level Repair

Component Level Repair

+ -

SPEAKER RIGHT (5212) SPEAKER LEFT (5211)

Only For Authorized Workshop

* Only For AmbiLight-sets

IR LED PANEL

(1112)

2009-Aug-07

P2

3P

P1

8P

+ -

1M83

(AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. GND

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. GND

1. SCL

18560_412_090331.eps

090714

Wiring Diagram 47" (Frame / Roadrunner)

WIRING DIAGRAM 47" (FRAME / ROADRUNNER)

Block Diagrams

EN 62Q548.1E LA 9.

1M83 (AL1)

1. SCL

2. SPI-DATA-IN

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. BLANK

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

*AMBI-LIGHT MODULE

1M85 (AL4)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. SPI-LATCH

5. PWM-CLOCK-BUF

6. +3V3

7. BLANK-BU

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

KEYBOARD CONTROL

(1114)

1M83 (AL1)

1. SCL

2. SPI-DATA-IN

3. SDA

4. CONTROL-1

5. CONTROL-2

6. +3V3

7. BLANK

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

*AMBI-LIGHT MODULE

(1178)

8 LED

AL

(1177)

6 LED

AL

TO

BACKLIGHT

*8M82

8316

CN2

1. HV1

1M85 (AL4)

14. GND

*8M85

8319

LCD DISPLAY (1004)

TO

BACKLIGHT

*8M59

1G50 (B07B)

1. N.C

2. N.C ...

8G50

8G51

*8M90

CN4

11. FAN_PWM

4. GND

3. +24V

FUSE

2. GND

1. +24V

10. GND_SND

9. +VSND

8. +12V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

CN5

12. GND1

11. I2C_DATA

10. I2C_SCL

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

8308

8M95

8M99

INLET

6. GND

5. +24V

4. GND

3. +24V

2. GND

1M90 (AB1)

*DC-DC

AB

INTERFACE

1M84 (AB1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH1CONN

3. SPI-DATA-RETURN

2. SPI-CLOCK-BUF

1. SPI-LATCH2CONN

1. +24V

1M59 (AB1)

7. GND

6. +3V3

5. CONTROL2

4. CONTROL1

3. SDA

2. GND

1. SCL

(1179)

CN7

6. GND

CN3

1. HV2

2. N.C.

3. HV1

3. HV2

5. +24V

MAIN POWER SUPPLY IPB DPS-298CP-2A

(1005)

CN1

1. N

2. L

... ...

39. N.C

40. N.C

41. N.C

1G51 (B07B)

1. +VDISP-OUT

2. +VDISP-OUT

3. +VDISP-OUT

4. +VDISP-OUT ... ... ...

51. GND

1M20 (B03G)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

1M95 (B01B)

11. N.C

10. GNDSND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

1M99 (B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. GND

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735 (B06A)

4. RIGHT-SPEAKER

3. GNDSND

2. GNDSND

1. LEFT-SPEAKER

1736 (B06A)

3. RIGHT-SPEAKER

2. GNDSND

1. LEFT-SPEAKER

8735

1M59 (B08E)

1. SCL-AMBI-3V3

2. GND

3. SDA-AMBI-3V3

4. GND

5. GND

6. +3V3

7. GND

SSB

B

(1150)

*8M84

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

(1178)

*AMBI-LIGHT MODULE

8 LED

AL

1M83 (AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. SPI-DATA-IN

1. SCL

*8M81

1M84 (AL1)

14. GND

13. VLED2

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK-BUF

6. +3V3

5. PWM-CLOCK-BUF

4. SPI-LATCH

3. SPI-DATA-RETURN

2. SPI-DATA-OUT

1. SPI-CLOCK-BUF

(1177)

*AMBI-LIGHT MODULE

6 LED

AL

1M84 (AL1)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. SPI-LATCH

5. PWM-CLOCK-BUF

6. +3V3

7. BLANK-BUF

8. EEPROM-CS

9. TEMP-SENSOR

10. PROG

11. VLED1

12. GND

13. VLED2

14. GND

SPEAKER RIGHT

(5212)

+ -

Component Level Repair Only For Authorized Workshop

* Only For 47PFL8404H/12

IR LED PANEL

(1112)

2009-Aug-07

1M83 (AL1)

14. GND

13. VLED2

8M20

P2

3P

P1

8P

+ -

SPEAKER LEFT

(5211)

12. GND

11. VLED1

10. PROG

9. TEMP-SENSOR

8. EEPROM-CS

7. BLANK

6. +3V3

5. CONTROL-2

4. CONTROL-1

3. SDA

2. SPI-DATA-IN

1. SCL

18560_411_090331.eps

090714

Wiring Diagram 52" (Frame)

WIRING DIAGRAM 52"

Board Level Repair

(FRAME)

Block Diagrams

EN 63Q548.1E LA 9.

Component Level Repair Only For Authorized Workshop

INVERTER

KEYBOARD CONTROL

(1114)

INVERTER

CONNECTOR

8316

8319

CN2/1319

14. PDIM_Select

13. PWM

12. On/Off

11. Vbri

10. GND3

9. GND3

8. GND3

7. GND3

6. GND3

5. 24Vinv

4. 24Vinv

3. 24Vinv

2. 24Vinv

1. 24Vinv

CN3/1316

12. N.C.

11. N.C.

10. GND3

9. GND3

8. GND3

7. GND3

6. GND3

5. 24Vinv

4. 24Vinv

3. 24Vinv

2. 24Vinv

1. 24Vinv

MAIN POWER SUPPLY PSU DPS-411AP3A B

(1005)

CN1/1308

1. N

CN6/1M95

11. FAN_PWM

10. GND_SND

9. +VSND

8. +12 V

7. +12V

6. +12V

5. GND1

4. GND1

3. GND1

2. STANDBY

1. 3V3_ST

CN7/1M99

12. GND1

11. I2C_DATA

10. I2C_SCL

9. INV_OK

8. A/P_DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12V

1. +12V

FUSE

2. L

LCD DISPLAY

8308

INLET

(1004)

8G50

8G51

8M20

8M95

8M99

1G50

(B07B)

1. N.C

2. N.C ... ... ...

39. N.C

40. N.C

41. N.C

1G51

(B07B)

1. +VDISP-OUT

2. +VDISP-OUT

3. +VDISP-OUT

4. +VDISP-OUT ... ... ...

51. GND

1M20

(B03G)

8. +5V

7. KEYBOARD

6. LED1

5. +3V3-STANDBY

4. LED2

3. RC

2. GND

1. LIGHT-SENSOR

1M95

(B01B)

11. N.C

10. GNDSND

9. +AUDIO-POWER

8. +12V

7. +12V

6. +12V

5. GND

4. GND

3. GND

2. STANDBY

1. +3V3-STANDBY

1M99

(B01B)

12. GND

11. SDA-SET

10. SCL-SET

9. POWER-OK

8. GND

7. BACKLIGHT-BOOST

6. BACKLIGHT-OUT

5. LAMP-ON-OUT

4. GND

3. GND

2. +12VD

1. +12VD

1735

(B06A)

4. RIGHT-SPEAKER

3. GNDSND

2. GNDSND

1. LEFT-SPEAKER

1736

(B06A)

3. RIGHT-SPEAKER

2. GNDSND

1. LEFT-SPEAKER

B

SSB

(1150)

+ -

IR LED PANEL

SPEAKER RIGHT (5212) SPEAKER LEFT (5211)

(1112)

P2

3P

P1

8P

2009-Aug-07

+ -

18560_402_090326.eps

090714

Block Diagram Video

VIDEO

FRONT END

B02A

1301

B05A

HD1816AF/BHXP

MAIN HYBRID

TUNER

HDMI

1

19

HDMI SIDE

CONNECTOR

1

19

HDMI 1

CONNECTOR

1

19

HDMI 2

CONNECTOR

1

19

HDMI 3

CONNECTOR

18 2

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

IF-OUT1

IF-OUT2

RF-AGC

1H03

1H01

1H00

1H02

1

3

4

6

7

9 10

12

1

3

4

6

7

9 10

12

1

3

4

6

7

9 10

12

1

3

4

6

7

9 10

12

72

71

69

68

66

65

63

62

42

41

39

36

35

33

32

23

22

20

19

17

16

14

13

10

11

3

7H11 TDA9996

SWITCH

RXB

RXA

HDMI

4302

4303

+5V-TUNER

VDDx_1V8

VDDO_3V3

VDDx_3V3

VDDH_3V3

RXDRXC

D0_+

D0_-

D1_+

D1_-

D2_+

D2_-

3301

C_+

C_-

1303

1

2

SAW 36M125

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

90

89

87

86

84

83

81

80

8,45,91,24, 75,95 4

46,55

15,21,34,40, 64,70,85,88

2 3

99

100 96

97

93

94

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

2364

2367

2306

5

2307

4

VDD_1V8 VDDO_3V3

VDDS_3V3

VDDH_3V3

33AA3306

33AC

5311

+5V-TUNER

2365

2368

7302 UPC3221GV

AGC AMPLIFIER

1

VCC

2

3

IN

4

AGC CONTROL

+3V3A

IF-AGC

RF-AGC

ANALOG IO - SCART 1&2

B04B

1

EXT 1

EXT 2

B04C

EXT 3

7

11

15

16

20

21

SCART1

1

7

11

15

16

20

21

SCART2

YPBR / SIDE IO / S-VIDEO

10

15

5

1

6

11

VGA

CONNECTOR

1G22

PR

Y

PB

CVBS

SIDE

I/O

5

SVHS IN

Block Diagrams

B05C

3303

7

3304

6

OUT

3305

7F02 74HC4053PW

1F01

1F02

1G30

1G20

1G37

1

2

14

7F03

19

8

16

15

7

11

20

19

7

15

11

20

16

8

1

2

3

13

14

3

4

7F06

7F04

7F05

7

12

9

2

PCMCIA

CONDITIONAL

PDP

PDN

IF-N

IF-P

1304

27M

MDX

9,10,11

PCMCIA

ACCESS

7303 DRX3926K

47

PD_P

48

PD_N

39

40

49

XI

50

XO

34

IF_AGC

33

RF_AGC

16

5

1

7F01

AV2-PB_SC2-B

AV2-PR_SC2-R

AV2-BLK_LCD-SDA

FRONT-Y_CVBS

1K00

17

18

33 51

52

DEMODULATOR

+5V

CVBS-TER-OUT

Y_CVBS-MON-OUT-SC

AV1_STATUS

AV2-Y_SC2-G

H-SYNC-VGA

V-SYNC-VGA

SIF

CVBS

VDDL

VDDAL_AFE

REGIMBEAU_CVBS-SWITCH

AV1_ BLK

SC1-R

SC1-B

SC1-G

CVBS1

CVBS2

AV2-STATUS

R-VGA

G-VGA

B-VGA

AV3- PR

AV3-Y

AV3-PB

FRONT-C

RXC+

RXC-

RX0+

RX0-

RX1+

RX1-

RX2+

RX2-

68P

44

43

8,18,26,53

2,16,27,56 37

42

52

36,46

MDO(0-7)

3311

3348

7K04-7K05 74LVC245APW

BUFFER

CA-MDI(0-7)

PCMCIA-VCC-VPP

FE-DATA(0-7)

7345

4314

4315

+3V3BVDDH

+1V2 +3V3AVDDAH_AFE1

+3V3EVDDAH_CVBS

+3V3DVDDAH_OSC

+1V2A

7F07-7F08

B03H

CONTROL

B03H

CONTROL

B03H

CONTROL

B03H

CONTROL

20

CA-MDO(0-7)

CVBS

CVBS-TER-OUT

Y-CVBS-MON-OUT

RREF-PNX85XX

EN 64Q548.1E LA 9.

PNX8543

B03

+3V3

SIF

7600 PNX85433EH/M2A

B03B

CA_MD0

CA_MDI

TNR_TSDI

B03E

F2

AI51

H3

AI44

TUN_CA

ANALOG VIDEO

B03B

LVD S

LOUT2_A_P LOUT2_A_N LOUT2_B_P LOUT2_B_N LOUT2_C_P

LOUT2_C_N

LOUT2_D_P

LOUT2_D_N

LOUT2_E_P

LOUT2_E_N LOUT2_CLK_P LOUT2_CLK_N

IREF_LVDS

A_P A_N B_P B_N C_P C_N D_P D_N E_P

E_N CLK_P CLK_N

AP18 AN18 AL18 AK18 AP19 AN19 AP20 AN20 AM20 AL20 AM19 AL19

AP22 AN22 AL22 AK22 AP23 AN23 AP24 AN24 AM24 AL24 AM23 AL23

AK19

RX51001A+

RX51001A-

RX51001B+

RX51001B-

RX51001C+

RX51001C-

RX51001D+

RX51001D-

RX51001E+

RX51001E-

RX51001CLK+

RX51001CLK-

RX51002A+

RX51002A-

RX51002B+

RX51002B-

RX51002C+

RX5100C-

RX51002D+

RX51002D-

RX51002E+

RX51002E-

RX51002CLK+

RX51002CLK-

VDDA-LVDS

PNX8543

H264

A3

3H64

CVBS1Y_P

J2

AI32

L2

AI22

N2

AI12

G4

AI41

L3

AI23

J3

AI33

N3

AI13

H1

AI42

K4

PC3_AI3

P4

PC1_AI3

M4

PC2_AI3

T1

HSYNCIN

T2

VSYNCIN

K1

PC3_AI1

P1

PC1_AI1

M1

PC2_AI1

H2

AI43

G1

AI54

B05A

A14

HDMI_RXC_B_N

A15

HDMI_RXC_B_P

B13

HDMI_RX0_B_N

B14

HDMI_RX0_B_P

A12

HDMI_RX1_B_N

A13

HDMI_RX1_B_P

B11

HDMI_RX2_B_N

B12

HDMI_RX2_B_P

C16

HDMI_RREF

HDMI_DV

USB 2.0

VDD

B03A

VDDA_3V3_AADC

VDDA_3V3_ADAC

VDD_3V3_LVDS

VDDA_HDMI_3V3_BIAS

VDD_3V3_SBPER

VDD_1V2_CORE

VDD_1V2_SBCORE

VDD_3V3_PER

VDD_1V8_DDR

CONROL

B03G

USB_FAULT

USB_DM USB_DP

USB_RPU

USB_VBUS

PCI

B03G

MEMORY

B03F

M_IREF

M_VREF

M_DQ

PCI

M_A

AJ6

AK12

AK20

F16

AC6

AJ12

AF5

AJ21

AG30

B03G

AL16

AN16

AP16

3M21

AM17

3M23

AN17

PCI-AD<->NAND-AD

B03F

3B03

AA31 AB32

DDR2-D(0-15)

DDR2-A(0-12)

VDDA-DAC

VDDA-ADC

VDDA-LVDS

RREF-PNX85XX

+3V3-STANDBY

+1V2-PNX85XX

1V2-STANDBY

+3V3-PER

1V8-PMNX85XX

PNX8543 - CONTROL MIPS/FLASH/PCI

+5V

USB-OC

3M31

+3V3-PER

PNX8543 - SDRAM

+1V8-PNX85XX DDR2-VREF-CTRL

(0-12)

(16-31)

PNX5100 - LVDS IN/OUT

B08D

7C00 PNX5100EH/M2

B08D

AE20

AF20 AC20 AD20 AC19 AD19 AE19

AF19 AE18

PNX5100

AF18 AC18 AD18

AE17

AF17

FHD 100Hz

AC17 AD17 AC16 AD16 AE16

AF16 AE15

AF15 AC15 AD15

+T

7M00 NAND01GW3B2BN6F

NAND

FLASH

1G

12,37

VCC

7B01 EDE1116AEBG

SDRAM

J1

VDDL

J2

7B00 EDE1116AEBG

SDRAM

J1

VDDL

J2

VREF

LVD S RX

HD-NM

USB20-DM

USB20-DP

+3V3-NAND

+1V8-PNX85XX DDR2-VREF-DDRVREF

+1V8-PNX85XX DDR2-VREF-DDR

B08D

B08A

SUPPLY

B08B

LVD S TX

DDR2

VREF

1M09

D

A

1

2 3

4

B07B

E17

+3V3

E14

+3V3

AB20

+3V3

AA5

+1V2-PNX5100

L16

+1V8-PNX5100

P22

+1V2-PNX5100-DDR-PLL1

AB18

+3V3-PNX5100-LVDS-IN

J5

+1V2-PNX-TRI-PLL1

L5

+1V2-PNX-TRI-PLL2

T5

+1V2-PNX-TRI-PLL3

M22

+1V2-PNX5100-DLL

AE25

+3V3-PNX5100-DDR-PLL0

E15

+1V2-PNX5100-LVDS-PLL

B15

+3V3-PNX5100-LVDS-PLL

AE14

+1V2-PNX5100-CLOCK

AD14

+3V3-PNX5100-CLOCK

B08B

P24

PNX5100-DDR2-VREF-CTRL

PNX5100-DDR2-D(0-15)

PNX5100-DDR2-A(0-12)

CONNECTOR SIDE

SW UPLOAD

4321

DISPLAY INTERFACE

TX1

TX2

QUAD LVDS

1920x1080 100/120HZ

TX3

TX4

+VDISP-OUT

I2C

N.C.

I2C

PNX5100 - SDRAM

7C01 EDE5116AJBG

(0-12)

(16-31)

USB 2.0

JPEG

MP3

DDR2

SDRAM

VDDL VREF

7C02 EDE5116AJBG

DDR2

SDRAM

VDDL VREF

1G50

1

2

3

TO DISPLAY

1080p 50/60Hz

37

38

39

40

41

1G51

51

50

49

40

TO DISPLAY

11

1080p 100/120Hz

5

4

3

2

1

J1

+1V8-PNX5100

J2

PNX5100-DDR2-VREF-DDR

J1

+1V8-PNX5100

J2

PNX5100-DDR2-VREF-DDR

18560_403_090326.eps

090326

2009-Aug-07

Block Diagram Audio

AUDIO

FRONT END

B02A

1301

B05A

HD1816AF/BHXP

MAIN HYBRID

TUNER

HDMI

1

19

HDMI SIDE

CONNECTOR

1

19

HDMI 1

CONNECTOR

1

19

HDMI 2

CONNECTOR

1

19

HDMI 3

CONNECTOR

18 2

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

IF-OUT1

IF-OUT2

RF-AGC

1H03

1

3

4

6

7

9 10

12

1H01

1

3

4

6

7

9 10

12

1H00

1

3

4

6

7

9 10

12

1H02

1

3

4

6

7

9 10

12

RES FOR /32

72

71

69

68

66

65

63

62

42

41

39

36

35

33

32

23

22

20

19

17

16

14

13

10

11

3

7H11 TDA9996

SWITCH

RXB

RXA

HDMI

4302

4303

+3V3A

RXDRXC

VDDx_1V8

VDDO_3V3

VDDx_3V3

VDDH_3V3

D0_+

D0_-

D1_+

D1_-

D2_+

D2_-

3305

C_+

C_-

1303

1

2

SAW 36M125

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

90

89

87

86

84

83

81

80

8,45,91,24, 75,95 4

46,55

15,21,34,40, 64,70,85,88

2 3

99

100 96

97

93

94

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

2364

2367

2306

5

2307

4

VDD_1V8 VDDO_3V3

VDDS_3V3

VDDH_3V3

5311

2365

33AA3306

2368

33AC

7302 UPC3221GV

+5V-TUN

AGC AMPLIFIER

1

VCC

2

3

IN

4

AGC CONTROL

IF-AGC

RF-AGC

ANALOG - SCART 1&2

B04B

EXT 1

EXT 2

YPBR / SIDE IO / S-VIDEO

B04C

DIGITAL

AUDIO

AUDIO OUT

AUDIO IN

EXT 3

AUDIO IN

SIDE

I/O

AUDIO IN

DVI -> HDMI

16

20

SCART1

16

20

SCART2

OUT

L+R

Block Diagrams

PCMCIA

B05C

PCMCIA

CONDITIONAL

ACCESS

7303 DRX3926K

47

PDP

PDN

3303

7

6

OUT

+3V3A

3305

1F01

3

1

7

11

6

15

2

21

1F02

1

3

7

1

11

6

15

2

21

1G25

1G22

1G20

1G18

3304

2

4

6

5

3

5

8

2

3

1

IF-N

IF-P

1304

27M

AP-SCART-OUT-L

AP-SCART-OUT-R

AP-SCART-OUT-L

AP-SCART-OUT-R

AUDIO-IN2-L

AUDIO-IN2-R

AUDIO-OUT-L

AUDIO-OUT-R

AUDIO-IN3-L

AUDIO-IN3-R

AUDIO-IN5-L

AUDIO-IN5-R

HDMIB-RXC+

HDMIB-RXC-

HDMIB-RX0+

HDMIB-RX0-

HDMIB-RX1+

HDMIB-RX1-

HDMIB-RX2+

HDMIB-RX2-

48

39

40

49

50

34

33

PD_P

PD_N

XI

XO

IF_AGC

RF_AGC

1K00

DEMODULATOR

CVBS

3F00

3F02

7F00

A-PLOP

7G01

EF

7G00

A-PLOP

17

18

33 51

52

SIF

68P

MDO(0-7)

3311

44

3348

43

8,18,26,53

2,16,27,56 37

42

52

36,46

AUDIO-CL-L

AUDIO-CL-R

A-PLOP

7K04-7K05 74LVC245APW

BUFFER

CA-MDI(0-7)

PCMCIA-VCC-VPP

FE-DATA(0-7)

7345

4314

+3V3BVDDH

+1V2VDDL +3V3AVDDAH_AFE1

+3V3EVDDAH_CVBS

+3V3DVDDAH_OSC

+1V2AVDDAL_AFE

B03C

7803-1/2

173

AUDIO-IN1-L

AUDIO-IN1-R

B03C

7803-3/4

8

14

B03C

AUDIO-IN4-L

AUDIO-IN4-R

20

+3V3

CA-MDO(0-7)

SIF

CVBS

PNX8543 - AUDIO AMPLIFIER

ADAC(7)

ADAC(8)

5

SPDIF-OUT-1

ADAC(5)

10

ADAC(6)

12

RREF-PNX85XX

3H64

B03

7H00 PNX85439EH/M2

B03B

B03E

F2

H3

B03D

AL9

AL8

AN7

AP7

AK6

AL6

V1

AN11

AP10

AM6

AN6

AN5

AP5

AP6

AM5

B04H

A14

A15 B13

B14 A12

A13

B11

B12

C16

EN 65Q548.1E LA 9.

PNX8543

TUNER_CA

CA_MD0

CA_MDI

TNR_TSDI

ANALOG VIDEO

AI51

AI44

AUDIO

ADAC7

ADAC8

AIN_1_L

AIN_1_R

AIN_2_L

AIN_2_R

SPDIF_OUT

ADAC5

ADAC6

AIN_3_L

AIN_3_R

AIN_5_L

AIN_5_R

AIN_4_L

AIN_4_R

DIGITAL VIDEO IN

HDMI_RXC_B_N

HDMI_RXC_B_P HDMI_RX0_B_N

HDMI_RX0_B_P HDMI_RX1_B_N

HDMI_RX1_B_P

HDMI_RX2_B_N

HDMI_RX2_B_P

HDMI_RREF

PNX8543

H264

USB 2.0

B03D

B03G

B03F

AUDIO

VREF_POS

VDDA_3V3_DAC

STANDBY

B03H

CONROL

USB_FAULT

USB_DM

USB_DP

USB_RPU

USB_VBUS

PCI

MEMORY

M_IREF

M_VREF

AADC

ADAC1

ADAC2

PO_7

PO_6

ADAC3

ADAC4

PCI

M_DQ

M_A

5902

AN8

5900

AM9

AK9

AN14

AP13

AC5

AD1

AM12

AM11

AL16

AN16

AP16

3M21

AM17

3M23

AN17

PCI-AD24<->NAND-AD

3B03

AA31 AB32

DDR2-D(0-15)

DDR2-A(0-12)

CLASS-D

B06A

VDDA-AUDIO

VDDA-DAC

ADAC(1)

ADAC(2)

AUDIO-MUTE

PNX8543 - AUDIO AMPLIFIER

B03C

AUDIO-RESET

ADAC(3)

ADAC(4)

PNX8543 - CONTROL MIPS/FLASH/PCI

B03G

+5V

3M31

USB-OC

+3V3-PER

B03F

+1V8-PNX85XX DDR2-VREF-CTRL

(0-12)

+T

7M00 NAND01GW3B2BN6F

NAND

FLASH

1G

12,37

PNX8543 - SDRAM

7B01 EDE1116AEBG

SDRAM

J1 J2

7B00 EDE1116AEBG

USB20-DM

USB20-DP

SDRAM

(16-31)

J1 J2

A-STBY

3L17

7807-1 7807-2

+3V3-NAND

+1V8-PNX85XX DDR2-VREF-DDR

MUTE

A-STBY

AUDIO-RESET

1M09

1

2 3

4

5

6

2

4

5

2

6

CONNECTOR SIDE

4321

7L10 TPA3123D2PWP

PVCC_L

PVCC_R

OUT-L

IN-L

CLASS D

POWER

AMPLIFIER

IN-R

OUT-R

SD

MUTE

A-PLOP

7830 TPA6111A2DGN

HEADPHONE

AMPLIFIER

SHUTDOWN

IN-1

IN-2

USB 2.0

SW UPLOAD

JPEG

MP3

VO_1

VO_2

VDD

B04B

B04C

1,3

10,12

22

15

1

7

8

5L07

5L08

7L03

STANDBY &

PROTECTION

+3V3

+AUDIO-POWER

LEFT-SPEAKER

RIGHT-SPEAKER

YPBR / SIDE IO / S-VIDEO

B04C

HP_LOUT

HP_ROUT

1G21

2

3

1

5L09

5L10

1735

1

2

SPEAKER L

3

4

SPEAKER R

1736

1

2

3

SUBWOOFER

(OPTIONAL)

HEADPHONE

OUT 3.5mm

18540_404_090311.eps

090326

2009-Aug-07

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

B05B

ETHERNET

CONNECTOR

PCI-CLK-ETHERNET

B03G

RESET-ETHERNET

B03H

ETHERNET

CONNECTOR

PCI-CLK-ETHERNET

B03G

RESET-ETHERNET

B03H

OPTIONAL

B08

PNX5100

7C00 PNX5100EH/M2

CONTROL

B08C

PNX5100

PCI_XIO

B08C

DDR2

B08B

GPIO

B08C

B07B

DISPLAY INTERFACE

3P24

1N00

BACKLIGHT-IN BACKLIGHT-OUT

7N04 DP83816AVNGNOPB

ETHERNET

CONTROLLER

60

62

7N04 LAN9420

ETHERNET

CONTROLLER

16

15

AF24

AE13

27M

1CD0

AF13

L3

B08B

PNX5100-DDR2-D(0-31)

DDR2-A(0-12)

PNX5100-DDR2-CLK_P

P26

PNX5100-DDR2-CLK_N

P25

B23

B07A

DISPLAY INTERFACE (COMMON)

CONTROL

17

25M

1N02

18

61

IRQ-PCI

SSB_31391236443.1

120

25M

1N02

119

14

IRQ-PCI

SSB_31391236443.3

RESET-PNX5100

PCI-CLK-PNX5100

PNX5100 - SDRAM

J8

K8

PNX5100-BL-CTRL

PCI-AD(0-31)

B03H

B03G

7C01 EDE5116AJBG

7C02

EDE5116AJBG

SDRAM

B01B

Block Diagrams

B02A

FRONT END

B03G

B05C

PCMCIA

CONDITIONAL

ACCESS

B03G

PNX8543 - CONTROL MIPS/FLASH/PCI

WP-NANDFLASH

B03H

PNX8543 - STANDBY-CONTROL / DEBUG

B05A

HDMI

1K00

1

COMMON INTERFACE

68

7M00 NAND01GW3B2BN6F

19

USB 2.0

CONNECTOR

SIDE

TO IR/LED PANEL

AND KEYBOARD CONTROL

1

2

18

19

4x HDMI

CONNECTOR

FLASH

4 3 21

TO PIN:

1H02-13 1H00-13 1H01-13 1H03-13

1H02-15 1H00-15

1H01-15 1H03-15

RESET-SYSTEM

CA-MDI(0-7)

PCMCIA-D(0-7)

PCMCIA-A(0-14)

NAND

(1G)

1M09

1

2

3

4

1M20

1

2

3

4

5

6

7

8

ARX-DDC-CLK BRX-DDC-CLK

CRX-DDC-CLK

DRX-DDC-CLK

7303 DRX3926K-XK-A3

49

DEMODULATOR

27M

1304

50

32

MOCLKA

MDO(0-7) CA-MDO(0-7)

IRQ-CA

IRQ-PCI

NAND-AD(0-7) <-- PCI-AD(24-31)

7

9

7K04-7K05

7K03

PCI-AD(24-31)

7K00 7K01

9 10 5

CA-MICLK

CA-DATADIR CA-DATAEN

CA-ADDEN

PCI-AD(0-14)

B03H

RC

LED2

+3V3-STAN D B Y

+5V

CEC

7M81

DETECT-12V

B01B

B01A

B03G

B04B

+3V3-STAN D B Y

7D05 NCP303LSN30G

2

INP

3

GND

7H09

CONTROL

7H11 TDA9996

57

SWITCH

12 31

61

79

OUTP

HDMI

LED1

1

EN 66Q548.1E LA 9.

FE-DATA(0-7)

FE-CLK

FE-VALID

FE-SOP

CA-MOCLK_VS2

PCI-AD(0-31)PCI-AD(0-31) PCI-AD(0-31)

XIO-ACK

XIO-SEL-NAND

IRQ-CA

IRQ-PC1

USB-OC

USB20-DM

USB20-DP

LIGHT-SENSOR

4D00

RC_uP

KEYBOARD

4D09

DETECT2

DETECT1

RESET-SYSTEM

AV1- BLK

AV2-BLK_LCD-SDA

AV1- STATU S

AV2- STATU S

RESET-STBY

CEC-HDMI

B03

PNX8543

7600 PNX85433EH/M2A/

TUN_CA

B03B

TNR_TSDI

B10

TNR_MICLK

C10

TNR_MIVAL

B9

TNR_MISTRT

H32

CA_MICLK

CA_MDI

A34

CA_VSN_0

H31

CA_MOCLK

CA_MDO

D31

CA_DATA_DIR

A31

CA_DATA_EN

B31

CA_ADD_EN

J34

CA_RDY

B03G

PCI_AD

A20

XIO_ACK

B20

XIO_SEL_0

B03G

L34

GPIO_3

U4

GPIO_2

AL16

USB_FAULT

AN16

USB_DM

AP16

USB_DP

B03H

AD2

P0_5

AN2

CADC_1

AF2

P1_0

AJ2

PWM_1

AJ3

PWM_0

AN3

CADC_0

AD3

P2_5

AD4

P2_4

AH3

P3_3

AH1

P3_5

AH2

P

3_4

AP2

CADC_2

AP1

CADC_3

AF3

RESET_IN

AG4

P1_2

B05A

RX

HDMI_RX

PNX8543

PCI

CONTROL

STANDBY

HDMI_DV

LOUT2_CLK_N

LOUT2_CLK_P

CLK_N

CLK_P

MEMORY

B03F

M_DQ

M_CLK_P

M_CLK_N

PLL_OUT

TRDY_CLK

RESET_SYS

GPIO_2

GPIO_6

GPIO_4

GPIO_5

UA_RX_0

UA_TX_1

XTAL_I

XTAL_O

SPI_CLK

SPI_CSB SPI_SDO

SPI_SDI

M_A

P1_7

P6_4

P0_1

P6_5

P2_2

P2_7

P1_1

P2_6

P0_6

P0_7

P2_3

AL23

AM23

AL19

AM19

AB34

AB33

AP28

A30

AN28

U3

V2

L32

L31

AG1

AH5

AG2

AK2

AC1

W1

W2

AJ1

AK4

AK3 AJ4

AK1

AE1

AE4

AF1

AE5

AD1

AC5

AD5

B8D

PNX5100 - LVDS IN/OUT

7C00 PNX5100EH/M2

DDR2

B08B

PNX5100

RX51002CLK-

RX51002CLK+

RX51001CLK-

RX51001CLK+

B03F

PNX8543 - SDRAM

DDR2-D(0-31)(0-15)

DDR2-A(0-12)

DDR2-CLK_P

DDR2-CLK_N

B03G

PNX8543 - CONTROL MIPS/FLASH/PCI

PCI-CLK-OUT

PCI-CLK-PNX8543

WC-EEPROM-PNX5100_SPI-DI

PNX8543-LCD-PWR-ON_SPI-DI

B03H

PNX8543 - STANDBY-CONTROL / DEBUG

SDM

SPI-PROG

27M

1D00

SPI-SDI

REGIMBEAU_CVBS-SWITCH

AE16

AD16

AD19

AC19

7B00 EDE1116AEBG

7B01

EDE1116AEBG

J8

K8

3M30

PCI-CLK-PNX5100

3M46

RESET-SYSTEM

RXD-MIPS

TXD-MIPS

RXD-UP

TXD-UP

RESET-NVM

SPI-CLK

SPI-WP

SPI-CSB SPI-SDO

LAMP-ON-OUT

ENABLE-3V3

POWER-OK

AUDIO-RESET

AUDIO-MUTE

STANDBY

SDRAM

7D07

B02A

B04C

B07B

B01A

B04B

B03C

B06A

E18

E19

E20

E21

E10

E11

E12

E13

B08C

B03H

SPI-PROG

7D06 M24C64-WDW6P

8

7D09 M25P05-AVMN6P

6

3

1 5

2

B01B

2D08

SDM

2D07

EEPROM

(8Kx8)

512K

FLASH

B07B

DISPLAY INTERFACE

1G50

1M04

2

3

1

25

24

1G51

33

32

17

16

1M01

RES

1M99

1M95

TX1CLK-

TX1CLK+

TX2CLK-

TX2CLK+

TX3CLK-

TX3CLK+

TX4CLK-

TX4CLK+

B01B

DC / DC +3V3-STANDBY_+1V2-STANDBY

BACKLIGHT-OUT

B07A

BACKLIGHT-BOOST

N.C.

9

DISPLAY

8

DISPLAY

UART

SERVICE

CONNECTOR

3

1

FOR

FACTORY USE

2

ONLY

4

5

TO

6

POWER SUPPLY

7

9

TO

2

POWER SUPPLY

18560_405_090326.eps

TO

090728

2009-Aug-07

Block Diagram I2C

I²C

PNX8543 - CONTROL MIPS/FLASH/PCI

B03G

7600 PNX85433EH/M2A

G32

SDA 3

D33

SCL 3

PNX8543

B03F

MEMORY

M_DQ

M_A

B05A

HDMI_DV

DDC_SDA_B

DDC_SCL_B

B03G

D15

C15

PCI

PCI_AD

SDA3

SCL3

ERR

13

DDR2-D

DDR2-A

PCI-AD

SSB BUS

400 kHz

PNX8543 - SDRAM

B03F

7B01 EDE1116AEBG

7B00 EDE1116AEBG

PNX8543 - CONTROL

B03G

MIPS/FLASH/PCI

7M00 NAND01GW3B2

3M19

3M18

SDRAM

FLASH

1G

+3V3-PER

3M27

DDC-SDA

DDC-SCL

3M26

B05A

3H01

+5V

Block Diagrams

HDMI

3H66

49 50

TDA9996

3H02

6

5

7H11

HDMI

MUX

ERR

23

3H65

EN 67Q548.1E LA 9.

FRONT END

B02A

SDA-SSB

SCL-SSB

ARX-5V

3H08

3H07

3H09

3H13

3H11

ARX-DDC-DAT

ARX-DDC-CLK

BRX-DDC-DAT

BRX-DDC-CLK

CRX-DDC-DAT

CRX-DDC-CLK

DRX-DDC-DAT

DRX-DDC-CLK

11

12

BRX-5V

3H10

30

31

CRX-5V

3H14

60

61

DRX-5V

3H12

78

79

1H02

16

15

CONNECTOR 3

1H00

16

15

CONNECTOR 2

1H01

16

15

CONNECTOR 1

1H03

16

15

HDMI

CONNECTOR

SIDE

3399

3398

24 23

7303

DRX3926K-XK

DEMODULATOR

MICRONAS

ERR

27

+3V3B

3388

61

62

3365

TUNER BUS

400 kHz

SDA-TUNER

SCL-TUNER

3317

3316

76

1301

HD1816AF

MAIN

TUNER

ERR

34

PNX5100 - CONTROL / PCI / DEBUG

B08C

3CDD

3CDC

56

7CD0

M24C08

EEPROM

ERR

25

3CD8

3CD9

K1 K2

7C00

PNX5100EH

PNX5100

ERR15ERR

21

B08E

3CDA

L1

L2

3388

3CD9

B08B

PNX5100-DDR2-D(0-31)

PNX5100-DDR2-A(0-12)

PNX5100 - AMBILIGHT

+3V3

AMBILIGHT BUS

3365

SDA-AMBI-3V3

SCL-AMBI-3V3

5CE5

+3V3

PNX5100 - SDRAM

7C01 EDE5116AJBG

7C02 EDE5116AJBG

SDRAM

30 kHz

1CE2

T1.0A

1M59

3

1

2

4

5

7

6

TO AMBILIGHT

(OPTIONAL)

B03H

STANDBY

ERR

SDA 2

SCL 2

SDA 1

SCL 1

MC_SDA

MC_SCL

PO_1

53

B33

D32

H33

F33

AK5

AL5

AC1

SDA2

SCL2

ERR

14

SDA1

SCL1

RESET-NVM

SET BUS

100 kHz

3M91

SDA-SET

3M90

SCL-SET

STANDBY BUS

400 kHz

3M15

SDA-UP-MIPS

3M14

SCL-UP-MIPS

PNX8543 - STANDBY - CONTROL / DEBUG

B03H

3D46

SDA-UP-MIPS

3D45

SCL-UP-MIPS

+3V3-PER

3D56-1

7D09 M25P05

512K

FLASH

3D56-2

7D07

56

8

M24C64

EEPROM

(NVM)

7D06

+3V3-PER

3M93

3M92

+3V3-PER

3M25

3M24

+3V3-STANDBY

3D39

3D38

RES

+3V3-STANDBY

DC / DC +3V3-STANDBY_+1V2-STANDBY

B01B

1M99

4202

4201

PNX8543 - CONTROL MIPS/FLASH/PCI

B03G

11

10

RES

TO

POWER

SUPPLY

YPBR / SIDE IO / S-VIDEO

B04C

10

15

5

1

6

11

VGA

CONNECTOR

1G30

12

15

WC-EEPROM-PNX5100_SPI-DI

B03G

3G60

+5V

3G56

DATA-SDA

CLK-SCL

7G32

3G63

+3V3

3G61

56

M24C02

7

EEPROM

3G58

7G31

256x8

UA_RX_0

UA_TX_1

GPIO_4

GPIO_5

AG1

AH5

L32

L31

RXD-UP

TXD-UP

RXD-MIPS

TXD-MIPS

3D21

3D22

+3V3-PER

3M09

3M10

B04A

4E18

4E19

BOLT-ON

RXD

TXD

3M74

3M73

3M76

3M75

1M04

3

2

1

1M01

RES

3

1

FACTORY USE

2

4

SERVICE

CONNECTOR

2009-Aug-07

FOR

ONLY

UART

18560_406_090326.eps

090331

Supply Lines Overview

SUPPLY LINES OVERVIEW

+12V

GND1

BL-ON_OFF

DIM

BOOST

A/P_DIM

MAIN

POWER SUPPLY

CN2

1

HV1

2

N.C.

3

HV1

CN3

1

HV2

2

N.C.

3

HV2

INV_OK

3V3_ST

STANDBY

GND1

+12V

+VSND

GND_SND

TO DISPLAY

DC / DC +3V3-STANDBY_+1V2-STANDBY

B01B

CN5

11

22

33

44

55

66

77

88

99

CN4

11

22

33

44

55

66

77

88

99

10 10

11 11

B08a

B03a

B01b

1M99

1M95

5221

N.C.N.C.

SENCE+1V2-PNX5100

DC / DC +3V3_+1V2

B01A

SENSE+1V2-PNX85XX

+12V

5104

7103 NCP5422ADG

Dual

Synchronous

Step-Down

Controller

LAMP-ON-OUT

BACKLIGHT-OUT

BACKLIGHT-BOOST

POWER-OK

7201

IN OUT

COM

STANDBY

7202

52045203

VOLT. REG.

7222

VOLT. REG.

3108

14

7101-1

1

5101

7U01-2

2

7102-1

16

5103

7102-2

15

Block Diagrams

+12VD

B03H

CONTROL

B07A

CONTROL

N.C.

B03H

CONTROL

+3V3-STANDBY

+1V2-STANDBY

B03H

CONTROL

+12V

6217

+5V

+5V5-TUN

+1V2-PNX5100

+AUDIO-POWER

SENCE+1V2-PNX5100

SENSE+1V2-PNX85XX

+12V

+12VF

12V/3V3

COVERSION

+3V3

+3V3F

5105

12V/1V2

COVERSION

+1V2-PNX85XX

B07a

B03a,g,h, B04a,B05a,

B03a

B01a,B02a, B04a,b

B02a, B03d,g,h, B04a,b,c, B05a,c, B07a

B02a

B03h,B08a

B03c,B06a

B01a

B01b

B01a

B01b

B01a

B01b

B01a

B03d

B03a

B01b

B03a

B01a

B01b

B03a

B02a, B03a,c,d,g,h, B04b,c,B05a,b,c, B07a,b, B08a,c,d,e

B03a,B08a

B03a,h

FRONT END

B02A

7308

IN OUT

COM

7309

IN OUT

COM

7307

IN OUT

COM

PNX8543 - POWER

B03A

+1V2-PNX85XX

+1V2-STANDBY

+3V3F

+3V3

PNX8543 - VIDEO STREAMS/LVDS OUTPUT

B03B

+3V3-PER

PNX8543 - AUDIO AMPLIFIER

B03C

+AUDIO-POWER

4801

3819

7802

+3V3

PNX8543 - AUDIO

B03D

+5V

PNX8543 - SDRAM

B03F

+1V8-PNX85XX

CONTROL

5304

5307

5306

5305

7315

7601

IN OUT

COM

5612

5600

5615

5621

5622

7801

7900

IN OUT

COM

3B47

3B48

3389

EN 68Q548.1E LA 9.

+3V3+3V3

+1V2

+1V2A

+5V+5V

3V3B

3V3A

3V3D

3V3E

+5V5-TUN+5V5-TUN

+5V-TUNER

ANTENNA-SUPPLY

+12V+12V

+1V2-PNX85XX

SENSE+1V2-PNX85XX

+1V2-STANDBY

+3V3F

+1V8-PNX85XX

+3V3-STANDBY+3V3-STANDBY

+3V3

+3V3-PER

RREF-PNX85xx

VDDA-LVDS

VDDA-AUDIOVDDA-AUDIO

VDDA-DAC

VDDA-ADC

VDDA-LVDSVDDA-LVDS

+3V3-PER

+AUDIO-POWER

RES

AUDIO-VDD

+3V3

+3V3+3V3

+5V

VDDA-AUDIO

VDDA-DACVDDA-DAC

+1V8-PNX85XX

DDR2-VREF-CTRL

DDR2-VREF-DDR

RES

B01a

B03a

B01b

B01a

B01b

B01a

B03a B01b

B01b

B01a

B01b

B01a

B01b

B01a

B03a

B01b

B03a

B01a

B01b

B01A

B03f,B05a

B03b,g,h

B05a

B03b

B03d

B03a

PNX8543 - CONTROL MIPS/FLASH/PCI

B03G

5M00

+3V3-PER

+3V3-STANDBY

+5V

5M84

5M88

PNX8543 - STANDBY-CONTROL/DEBUG

B03H

+1V2-PNX85XX

+1V2-PNX5100

+3V3-STANDBY

+3V3

+3V3-PER

+5V

BOLT-ON

B04A

+3V3-STANDBY

+5V

+12V

ANALOG IO - SCART 1&2

B04B

+5V

+3V3

+12V

YPBR / SIDE IO / S-VIDEO

B04C

+3V3

+5V

HDMI

B05A

+3V3

5H01

5H06

5H03

+1V8-PNX85XX

5H00

+3V3-STANDBY

+5V

1H02

HDMI 3

HDMI 2

HDMI 1

18

1H00

18

1H03

18

1H01

18

ETHERNET

PCMCIA

5N06

5N07

5K00

3K00

+T

CONNECTOR

HDMI SIDE

CONNECTOR

B05B

+3V3

B05C

+3V3

+5V

+3V3+3V3

+3V3-NAND

+3V3-PER

+3V3-STANDBY

+5V

1M20

+1V2-PNX8541

+1V2-PNX5100

+3V3-STANDBY

+3V3

+3V3-PER

+5V

+3V3-STANDBY

+5V

+12V

RES

+5V

+3V3

+12V

3V3

+

+5V

+3V3

VDDO_3V3

VDDS_3V3

VDDH_3V3

+1V8-PNX85XX

VDD_1V8

+3V3-STANDBY

+5V

RREF-PMX85XXRREF-PMX85XX

ARX-5V

BRX-5V

DRX-5V

CRX-5V

+3V3

+3V3-ET-DIG

+3V3-ET-ANA

+3V3

+3V3_BUF

+5V

PCMCIA-VCC-VPP

CLASS-D

B06A

B01b

5

8

B01a

B01b

B01a

B07a

B01b

B01a

B08a

B01a

TO IR/LED PANEL

DISPLAY INTERFACING (COMMOM)

B07A

4P26

+12VD

DISPLAY SUPPLY

B07B

7P02

7P03 PNX8543-LCD-PWR-ON_SPI-DI

PNX5100 - POWER

B08A

+1V2-PNX5100

+3V3

+3V3F

PNX5100 - SDRAM

B08B

PNX5100 - CONTROL / PCI / DEBUG

B08C

PNX5100 - LVDS IN / OUT

B08D

+3V3

PNX5100 - AMBILIGHT

B08E

+3V3

4P29

CC60

7C60

IN OUT

5C60

5C61

5C62

5C63

5C64

5C65

5C66

5C67

5C68

5C69

5C70

COM

3C20

3C22

+AUDIO-POWER+AUDIO-POWER

+3V3+3V3

+5V+5V

4P28

4P39

+VDISP-IN

RES

4P30

4P31

+12VD

+3V3+3V3

+VDISP-IN+VDISP-IN

+VDISP-OUT

+1V2-PNX5100

+1V2-PNX5100-CLOCK

+1V2-PNX5100-TRI-PLL1

+1V2-PNX5100-TRI-PLL2

+1V2-PNX5100-TRI-PLL3

+1V2-PNX5100-DDR-PLL1

+1V2-PNX5100-LVDS-PLL

+1V2-PNX5100-DLL

SENSE+1V2-PNX5100

+3V3

+3V3-PNX5100-LVDS-IN

+3V3-PNX5100-CLOCK

+3V3-PNX5100-DDR-PLL0

+3V3-PNX5100-LVDS-PLL

+3V3F

+1V8-PNX5100

+1V8-PNX5100+1V8-PNX5100

PNX5100-DDR2-VREF-CTRL

PNX5100-DDR2-VREF-DDR

+3V3+3V3

+3V3

1M59

6

TO AMBI-LIGHT

(OPTIONAL)

18560_407_090326.eps

B07b

B01b

B08b

090715

2009-Aug-07

Circuit Diagrams and PWB Layouts

10. Circuit Diagrams and PWB Layouts

Interface Ambilight + Single DC-DC

EN 69Q548.1E LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

G

H

A

B

C

D

2 9

431

5

7

8

10

123 45678 9

INTERFACE + SINGLE DC-DC

F126

*

1M85

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16

502382-1470

1M59

1

2

3

4

5

6

7

1735446-7

1M90

1

2

3

4

5

6

1735446-6

F115

F116 F117 F118 F119 F120

F121 F122 F123 F124

1M84

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16

502382-1470

3109 100R

+24V

RES

3110 100R

F101 F102 F103 F104 F105 F106 F108

F109 F110 F111 F112

F113

F125

2108

2109

+3V3

VLED1

VLED2

9101 9102

9103 9104

RES

100p

RES

(RES)

+3V3

+24V

SPI-LATCH2CONN

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH1CONN

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-LATCH1

SPI-LATCH1CONN

SPI-LATCH2CONN

SPI-LATCH2

SCL

SDA

CONTROL1 CONTROL2

+16V

RES

+24V

3100

0R1

10n

3112

100n

3101

47R

2101

I101

I102

100R

2102

2n2

3104

330R

F114

2104

I105

1%

33K

1M0

3105

12K

3106

3107

5107 RES

30R

5108 RES

30R

I100

220p

5102

2100

220n

7100

5

6 7

8

9

14

17 16

1

2

15K

3102

I106

1100

3.0A 32VT10u

NCP3163BMNR2G

I103

I108

2103

3

VCC

LPK_SENSE

DRV_COL

SWI_COL

BOOT_IN

1

VFB

2

TIM_CAP

NC

GND GND_HS

18

F107

Φ

SWI_EMIT

+24VF

LVI_OUT

19

1101

VIA

+16V

RES

30R

5101

5100

I109

*

63V

T2.0A

514

10 11 12 13

20 21 22 23 24 25 26 27 28 29

30 31

*

30R

5103

*

5105

30R

5104

+12V

*

30R

5106

+16V

6100

3111

E

+12V

+16V

c001

c002

VLED1

VLED2

SS24

100K

2105

1%

3108

116

100n

3K3

3103

2106

2107

I104

3K3

100n

VSW

12

A

B

C

D

E

1100 A6 1101 A7 1M59 C2 1M84 A2 1M85 A2 1M90 D2 2100 A6 2101 B5 2102 C6 2103 D6 2104 D5 2105 D9 2106 D9 2107 E9 2108 D3 2109 E3

3100 B5 3101 C5 3102 D6 3103 D9 3104 D6 3105 D5 3106 D5 3107 D5 3108 E9 3109 D2 3110 D3 3111 E8 3112 B6

5100 A8 5101 A8 5102 A7 5103 B8 5104 B8 5105 B8 5106 B8 5107 A6 5108 A6 6100 C8 7100 B7 9101 C3 9102 C3 9103 C3 9104 C3 F101 B3 F102 B3 F103 B3 F104 B3 F105 B3 F106 B3 F107 A7 F108 B3 F109 B3 F110 B3 F111 B3 F112 B3 F113 B3 F114 B5 F115 C2 F116 D2 F117 D2 F118 D2 F119 D2 F120 D2 F121 E2 F122 E2

13

F123 E2 F124 E2 F125 B3 F126 A2 I100 A6 I101 C6 I102 C6 I103 C6 I104 D9 I105 D5 I106 D7 I108 D6 I109 A8 c001 E2 c002 E2

A

B

C

D

E

F

G

H

12

I

J

1

STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9

DC/DC INTERFACE

3104 328 58341

3104 328 58351

3104 328 58361

3104 328 58371

2

1101

in

out

out out

3

1M85

in

out

out out

3 4

5103/5104

out out

out

5105/5106

in

4

out

in in

out

VLED1

24V

12V

16V

12V

VLED2

16V

12V

16V

567

See the stuffing diversities table in the case of components marked with one star (*)

SETNAMECHN

CLASS_NO

DC-DC INTERFACE

08-06-19

08-08-06

08-10-23

NAME

CT

6

7

1

2

3

Peter Van Hove

85

AMBI 2K9

SUPERS.

DATEMGr CHECK

08-06-06********

9

10

8

9

I

1

08-06-19

08-08-06

2

08-09-18

3104 313 6325

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

12

3

08-10-23

4

08-12-06

5

13

***031**

13

18310_600_090305.eps

J

A3

090305

2009-Aug-07

Circuit Diagrams and PWB Layouts

Interface Ambilight Dual DC-DC

EN 70Q548.1E LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

E

F

G

H

1

2

3

4

5

6

7

8

109

11

12

13

A

B

C

D

E

1

2 3

4567

DUAL DC-DC

2200

F204

I217

**

9202

F207

3K3

I214

22n

(VLED2)

+16V

RES

I200

3204

2211

2214

I208

I211

**

10R

1n0

I212

3210

I215

3200

6R8

3202

6R8

3K9

**

3211

F202

2204

**

47n

3206

RES

33K

2221

RES

**

1%

VSW

**

F200

**

2206

5200

10u

**

35V

4u7

2207

100u

I204

**

6200

SS24

**

RES

2216 2217

22n

3207

**

RES

4u7

2218

2219

68K

1%

4u7

7200 : TPS54383 in case of 16V or dual dc-dc converter

The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371).

The components marked with two stars (**) belong to the 16V versions

(3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371).

2201

100u35V

7200

TPS54283PWP

9 10 11

4u7

2212

220n

1

PVDD1 PVDD2

BOOT1 SW1 EN1 FB1

ILIM2 SEQ BP

GND GND_HS

4

8

+24VF

A

2202

14

Φ

BOOT2

SW2

EN2 FB2

16 17 18 19 20 21 22

VIA2

23 24 25 26

15

35V

220n

2203

100u

2205

F203

312 213 65 87

I216

I213

47n

I206

*

9201

RES

3K3

3209

*

22n

2222 RES

RES

I201

3201

6R8

3203

*

3212

I205

*

6R8

*

10R

3205

I209

*

1n0

2213

I210

*

1n0

2215

*

33K

3K3

3213

1%

5201

*

10u

*

6201

SS24

RES

22n

3208

*

47K

1%

RES

*

22u

2208

2209

F201

*

10u

2220

*

2210

2223

220u 25V

10u

*

(VLED1)

2224

+12V

10u

B

C

+12V

D

VLED1

E

2200 A4 2201 A4 2202 A5 2203 A5 2204 B3 2205 B6 2206 B1 2207 B2 2208 B7 2209 B7 2210 B8 2211 C3 2212 C4 2213 C6 2214 C3 2215 C6 2216 C2 2217 C7 2218 D1 2219 D2 2220 D7 2221 D3 2222 D5 2223 D8 2224 D8

3200 A3 3201 A6 3202 B3 3203 B6 3204 B3 3205 B6 3206 D3 3207 D2 3208 D7 3209 D5 3210 D3 3211 D3 3212 D6 3213 D6

5200 B2 5201 B7 6200 B2 6201 B7 7200 B4 9201 B5 9202 C4 F200 B2 F201 C7 F202 D3 F203 B5 F204 B4 F207 C4 I200 A3 I201 A6 I204 B2 I205 B6 I206 B6 I208 B3 I209 B6 I210 C6 I211 C3 I212 C3

I213 D5 I214 D4 I215 D3 I216 B5 I217 B4

B

C

D

E

F

G

H

1

2

I

J

1

2 13

3

4

3 45

CLASS_NO

08-06-19

08-08-06

08-10-23

NAME

5

6

7

1

2

3

Peter Van Hove

CHECK

8

678

EMANTESNHC

DC-DC INTERFACE

AMBI 2K9

SUPERS.

DATE

9

08-06-09

10

3 2

3104 313 6325

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

130

12

1

08-06-19

2

08-08-06

3

08-09-18

4

08-10-23

5

08-12-06

A3

18310_601_090305.eps

I

J

090305

2009-Aug-07

Circuit Diagrams and PWB Layouts

Interface Ambilight Microcontrollerblock

EN 71Q548.1E LA 10.

A

B

C

D

E

G

H

K

is prohibited without the written consent of the copyright

owner.

M

N

1

2

3

4

5

6

7

98

10

11 15

12

13

14

16

17

18

19

20

A

123

MICROCONTROLLER

A

+3V3

2300

B

C

F

D

7302

LPC2103FBD48

11

X1

12

E

I

+3V3

F

J

G

1K0

3339

F317

2

3

I308

5

9305 RES

2318

100n

1300

7303

NCP303LSN10T1

IN

RST

GND

CD

NC

+3V3

16M9

RES 9300

3332

10K RES

9301

RES

9302 9303RES

F308

+3V3

10K

3333

1

4

X2

20

RTXC1

25

RTXC2

26

RTCK

4

VBAT

F307

27

DBGSEL

6

RST

L

+1V8

H

45678

7301

LD2985BM18R

1

3

INH BP

1u0

1 2

3

B3B-PH-SM4-TBT(LF)

71943

VSS

MICRO-

CTRL

P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4

P0.12|DSR1|MAT1.0|AD0.5

P0.14|DCD1|SCK1|EINT1

VDD_1V8

5

+3V3

2322

100n

2321

OUTIN

COM

2

RES

1302

45

Φ

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2

P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1

P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2

P0.13|DTR1|MAT1.1

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

VDD_3V3

17

40

9307

100n

2323

5

4

VSSA

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.31|TDO

VDDA

100n

F300

I303

2301

100n

10n

2303

+3V3

F304

F305

F306

2308

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38 39

8

9 10 15 16

42

F315

100n

2324

+1V8

4u7

2302

+3V3

10K

3320

3321

10K3304-2

6

5

8

10K

10K3303-2

10K3302-2

10K3302-4

27

45

10K3300-2

3323

3322

100R

27

10K

100p

I310

2309

100p

27

3 6

3301-3 10K

3328

3301-2

3329

10K

I319

UD-MD

I322

3334

22R

F314

3335

I309

100R

2

1

100n

2320

1301

RES

SKHUBHE010

3

4

1

10K

RES3325

10K

RES

3 6

1 8

3 6

3326

3302-3 10K

3303-3 10K

3303-1 10K

I321

I307

F310

10K

2319

100p

3336

3337

6

10K

1 8

3

4

3301-1 10K

10K

3327

I317

2310

F309

10K

27

3301-4

3304-1

3300-3 10K

3324

6

10K3300-4

45

3

1 8

3302-1 10K

I305

I313

I314

I318

100p

2312

100p

100n

2311

711

+3V3

10K3304-4

45

10K

1 8

3304-3 10K

3305-1

I311

I312

I315

RES

100p

2313

2314

91011

1K5 1%

1%1K5

7300-2 LM393PT

5

6

I304

TEMP-SENSOR

100K

3310

RES

+3V3

8

7

4

F303

2305

10n

RES

3315

47K

RES

3318

10K

RES

+3V3

RES

1%

3311

1K5

F301

RES

10K

10n

2304

-T

C300

3306-3

RES

3330

3331 3306-2 2 3306-1 3306-4 3307-1 3338 3307-4 4 5 3307-2 2 7 3308-4 3308-2

3308-1

3309-4 3309-1

45

27

10K

3314

10K

+3V3

1%

RES

3317

1K5

F316

1%1K8

3319

RES

3 6

100R 100R 100R

7

100R

8

1

100R

45

100R

1 8

100R 100R 100R 100R

45

100R

27

100R

1 8

100R 54 8 1

100R

3 6

7300-1 LM393PT

3

2

10K3305-3

+3V3

8

4

I300

F320

I302

9103 45

3313

I306

I316

I320

100p

2316

100p

2315

F311 F312

3305-4 10K

F313

3305-2

812

2306

100n

1

PWM-CLOCK-BUF

SPI-DATA-RETURN

PWM-CLOCK-BUF

+3V3

3312

10n

2307

3316

CONTROL1

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-LATCH1 SPI-LATCH2

TEMP-SENSOR

EEPROM-CS

BLANK-BUF

PROG

CONTROL2

F302

SCL SDA

1300 E2 1301 H5 1302 C4 2300 A3 2301 A4 2302 A5 2303 A4 2304 B8 2305 B10 2306 B9

A

2307 B10 2308 D4 2309 D5 2310 F6 2311 F7 2312 F7 2313 F7 2314 F7 2315 F7 2316 F8 2318 G2 2319 G6

B

2320 H5 2321 H4 2322 H4 2323 H4 2324 H4

3300-2 D5 3300-3 D7 3300-4 D7 3301-1 D6 3301-2 E5 3301-3 E6 3301-4 D7

C

3302-1 D7 3302-2 D6 3302-3 E6 3302-4 D6 3303-1 E6 3303-2 D6 3303-3 E6 3304-1 D6 3304-2 D7 3304-3 D7 3304-4 D7

D

3305-1 E7 3305-2 G8 3305-3 G9 3305-4 G8 3306-1 E8 3306-2 E8 3306-3 E8 3306-4 E8 3307-1 E8 3307-2 F8 3307-4 F8 3308-1 F8

E

3308-2 F8 3308-4 F8 3309-1 F8 3309-4 F8 3310 A10 3311 A8 3312 A10 3313 B8 3314 B8 3315 B10 3316 B10 3317 B8

F

3318 C10 3319 C8 3320 C5 3321 C5 3322 D5 3323 D5 3324 D7 3325 D6 3326 D6 3327 D6 3328 E5

G

3329 E5 3330 E8 3331 E8 3332 E3 3333 F2 3334 G5 3335 G5 3336 G6 3337 G6 3338 E8 3339 F1

7300-1 B9

H

7300-2 A10 7301 A4 7302 E3 7303 F2 9300 E3 9301 F3 9302 F3

9303 F3 9305 G1 9307 H4 C300 B8 F300 A5 F301 A8 F302 A10 F303 B11 F304 C4 F305 C4 F306 D4 F307 F3 F308 F3 F309 G6 F310 G6 F311 G8 F312 G8 F313 G8 F314 G5 F315 H4 F316 C9 F317 F1 F320 E9 I300 E9 I302 F9 I303 A4 I304 C10 I305 E6 I306 E7 I307 G6 I308 G2 I309 G5 I310 D5 I311 E7 I312 E7 I313 E7 I314 F7 I315 F7 I316 F8 I317 F6 I318 F7 I319 F5 I320 F8 I321 F6 I322 G5

B

C

D

E

F

G

H

I

J

K

L

M

N

08-06-19

08-08-06

08-09-18

08-10-23

08-12-06

O

P

A2

090410

O

CLASS_NO

08-06-19

P

NAME

1

2

3

4

7

98

10

11

1256

13

14

08-08-06

08-10-23

Peter Van Hove

1

2

3

15

SETNAMECHN

DC-DC INTERFACE

AMBI 2K9

SUPERS.

08-06-09

DATECHECK

16

17

3104 313 6325

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

2

3

4

33

5

20

18310_602_090305.eps

2009-Aug-07

Circuit Diagrams and PWB Layouts

P

EN 72Q548.1E LA 10.

Layout DC/DC Interface Ambilight

1302

5201

1M59

6201

2203

2200

1100

1M90

2201 2202

1101

5102

7200

9201

9202

6200

5200

2208

2209

2220

2210

2218

2206

2219

2207

ersonal Notes:

1M85

3338

2300

2322

2301

7301

2302

2303

2321

3308

2316

3309

3326

2312

2223

2224

2323

2315

3306

9104 9103

3331

2310

9102

9101

3307

2311

2319

3324

1301

1M84

F102

F101

F307

9302

9303

3300

F320

F125

3104 313 6325.5

F108

F103

F106

F105

F126

9300

3332

I313

I310

3330

I311

3304

I305

I312

I317

7302

I314

I315

I322

I307

3302

2314

3301

C300

2304

3313

F302

3312

2307

3316

2305

3315

F104

F109

F110 F111

F112

F312

3305

3334

F313

I306

I318

F315

2324

9307

F301

3311

3314

7300

F316

3317

2306

3319

F306

3322 3323

2308 2309

F305

F311

F310

F300

I321

I320

F115

F119

2108

2104

3105 3106 3107

c001

5106

2215

2212

I213

3209

I102

2106 2105

2102

2222

3213

3212

I206

3208

2217

3207

F200

2216

3210

3211

I104

3206

2221

3103

3104

I214

F201

I103

I106

I101

3101

5103

51045105

I210

2213

I209

3205

F207

F203

I217

I216

I212

F202

I211

2211

2214

5100

5101

F114

3100

2205

F204

I201

3203

3201

3200 3202

2204

I208

I109

I205

6100

3204

I204

F107

I200

F113

F122

F304

3320

3321

3337

F309

3336

9301

3303

2313 3325

I319

3329 3327

I316

3328

2320

I309

3335

F303

3318

3310

I304

I215

1300

I303

F314

2318

7303

F308

3333

3339

c002

F317

9305

I308

I105

2107

3108

7100

I108

3102

3111

2103

3112

2101

I302

F116

3109

I300

F117

3110

F118

F120

F123

5107

5108

2100

2109

F124

I100

F121

18310_550_090309.eps

090729

10000_012_090121.eps

090121

2009-Aug-07

Circuit Diagrams and PWB Layouts

6 LED Ambilight Microcontroller

EN 73Q548.1E LA 10.

1

A

2

1

MICROCONTROLLER BLOCK LITEON

B

A

C

B

D

E

C

F

IN

1M83

F120

1

F121

2

F122

3

F123

4

F124

5

F125

6

F126

7

F127

8

F128

9

F129

10

F130

11

F131

12

F132

13 14

15 16

1M1A

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15

16

D

G

H

E

I

F

J

G

K

owner.

is prohibited without the written consent of the copyright

L

H

OUT

1

2

3

4

5

6

7

8

9 10 11 12 13 14

1

2

3

4

5

6

7

8

9 10 11 12 13 14

1M84

15 16

1M2A

15 16

F133 F135 F136 F139 F137

F138 F134

M

2127

VLED1

VLED2

+3V3

VLED1

VLED2

3

35V10u

1u0

2128

2129

10u35V

+3V3

VLED1

VLED2

1u0

2130

+3V3

2

+3V3

VLED1

VLED2

4

9111 RES

9113 RES

9112

9114

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

VLED1

RST

7

5

9107 9108

9109 9110

1105

T1.5A

16M9

1101

+3V3

NC

10K

RES 9103

F104

+3V3

10K

3120

1

4

SPI-CLOCK

SPI-LATCH

PWM-CLOCK

LPC2103FBD48

9101

3118

RES

9102

9104 RES

SDA

F102

8 9

6

VLED1-F

7102

71943

VSS

11

X1

MICRO-

12

CTRL

X2

20

RTXC1

25

RTXC2

26

RTCK

4

P0.10|RTS1|CAP1.0|AD0.3

VBAT

P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5

27

DBGSEL

6

RST

VDD_1V8

5

+3V3

+1V8

100n

2119

2120

+3V3

2101

31

VSSA

Φ

P0.0|TXD0|MAT3.1

P0.1|RXD0|MAT3.2

P0.2|SCL0|CAP0.0

P0.3|SDA0|MAT0.0

P0.8|TXD1|MAT2.1

P0.9|RXD1|MAT2.2

P0.13|DTR1|MAT1.1

P0.14|DCD1|SCK1|EINT1

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1

P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1

P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

P0.31|TDO

VDD_3V3

VDDA

42

17

40

9119

F103

2121

100n

1u0

F107

F108

2113

LD2985BM18R

1

3

F105

2109

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38 39

8

9 10 15 16

100n

7101

IN

INH BP

COM

2

+3V3

3108

3109

100p

UD-MD

10

7

5

OUT

4

2102

10n

2104

+3V3

10K

3107

72

3110

100R

100p

2110

3117

10K

22R

3131

100R

2112

100n

5

3

SCL

SPI-DATA-IN

SDA

CONTROL-1 CONTROL-2

BLANK

EEPROM-CS

TEMP-SENSOR

PROG

33p

2125

SCL

SDA

CONTROL-1 CONTROL-2

EEPROM-CS

TEMP-SENSOR

PROG

F109

SCL SPI-DATA-RETURN

CONTROL-1 CONTROL-2

+3V3

10K

3119

RES9121

2111

6

4

NCP303LSN10T1

2

3

5

100n

7110

IN

GND

CD

11

12

8 9 10111213

F101

+1V8

4u7

100n

2103

10K

7

2

10K

3105-2

3101-2

10K

27

3 6

3116

3104-3

3104-2

3130

F112

9106

RES

10K

2

45

3106-2

3105-4

10K

3 6

3106-1 1 8

3106-3

3105-33 6

I110

RES

100p

2118

3133

RES

3113

10K

1 83102-1

1 8

45

10K

3104-1

10K

RES

3114

3115

I111

10K

3132

3 6

3101-3

3112

3104-4

10K

1 8

45

3101-4

3105-1

RES2114

100p

2116

100p

2115

+3V3

7

10K

45

3102-2 2

3102-4

10K

3 63102-3

100p

2117

13

10K

8

1

3103-1

RES

2124

100p

2122

100p

2123

100p

I113 I114 I115

100p

3103-4

3103-2

14

+3V3

3135

F116

10K

10n

2105

C140

100p

4

2

-T

2131

3137

+3V3

3140

3123

3124-4 3128 3129 3124-1 3124-2 2 7 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4 4 5

3126-1

3127-1 3127-4 4 5

100p

5

10K

7

10K

3111

2126

1%

1K5

RES

10K

1%1K5

RES

F118

RES

1K8 1%

45

1 8

3 6 1 8

27 45 27

1 8

3103-3

3

7116-1 LM393PT

3

2

100R 100R 100R 100R 100R 100R

100R

100R 100R

100R

100R 100R

6

15

+3V3

84

I124

I125

I126

10K

100n

2107

1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

TEMP-SENSOR

+3V3

16

10n

2108

CONTROL-1

SPI-DATA-IN

SPI-LATCH

SPI-LATCH-2

EEPROM-CS

BLANK-BUF

PROG

CONTROL-2

+3V3

3136

3139

SCL SDA

1%1K5

F106

1K5 1%

100K

7116-2 LM393PT

5

6

10n

47K

10K

TEMP-SENSOR

+3V3

3138

17

3134

RES

84

7

F117

2106

RES

3141

RES

18

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

20

A

B

C

D

E

F

G

H

I

J

K

L

M

19

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

A

2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6

B

2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

C

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10

D

3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7

E

3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4

F

3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11

G

3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12

H

3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11

7101 A7 7102 E6 7110 F4 7116-1 B11

123 45678 9 10111213

N

1X03

REF EMC HOLE

O

345

1

2

P

1

2

4

5

6

7

8

103

119

12

13

14

CLASS_NO

2008-08-08

2008-10-27

NAME

Peter Van Hove

2

3

15

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

1

2

8204 000 8857

3

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

3

20

18310_610_090305.eps

2008-06-10

2008-08-08

2008-10-27

O

P

A2

090730

2009-Aug-07

Circuit Diagrams and PWB Layouts

6 LED Ambilight Microcontroller

EN 74Q548.1E LA 10.

74HCT125PW

F205

3207

RES

9209

74HCT125PW

F206

3209

RES

9211

74HCT125PW

F207

3211

RES

9213

PWM-R1

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL

13

INPUT BUFFER

9208 RES

+3V3

7201-1

14

2

1

EN

7

9210 RES

7201-4

+3V3

14

12

13

EN

7

9212

RES

+3V3

7201-2

14

5

4

EN

7

9214 RES

+3V3

7201-3 74HCT125PW

14

8

EN

7

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

14

3

11

6

9

F208

10

15

3219

100R

3220

3223

100R

27R

3212

100R

169

PWM-CLOCK-BUF

100p

22172218

SPI-CLOCK-BUF

100p

BLANK-BUF

100p

2219

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

17

18

19

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

A

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3

B

3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8

C

3223 C11 3224 H11

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7

D

9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10

E

F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

20

A

B

C

D

E

F

G

H

F

I

G

+3V3

3K3

3221

3224

F209

H

J

K

L

1

A

123 45678

32 8

4

5

6

7

10

11

12

910111213

MICROCONTROLLER BLOCK LITEON

A

B

C

B

EEPROM-CS

PDTC144EU

1

33p

2209

D

PDTC144EU

C

EEPROM-CS-LOCAL

1

+3V3

3213

7209

3

2

7210

3

2

10K

F202

7212

PDTC144EU

+3V3

10K

3210

SPI-CS

+3V3

10K

3203

F203

RES

3205

10K

5

6

1

3

E

D

F

G

7214

D

C

S

W

M95010-WDW6

8

VCC

Φ

(64K)

GND

4

HOLD

+3V3

Q

2214

100n

2

3204

7

10K

SPI-DATA-RETURN

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN

PWM-CLOCK

SPI-CLOCK

BLANK

SPI-DATA-RETURN

+3V3

33p

2201

33p

2202

33p

2203

1K0

+3V3

1K0

+3V3

1K0

3121

100R

RES

2220

100p

E

H

F

I

J

G

PWM-CLOCK-BUF BLANK-BUF

K

owner.

is prohibited without the written consent of the copyright

H

L

PROG

SPI-LATCH

SPI-CLOCK-BUF

SPI-DATA-IN SPI-DATA-OUT

SPI-DATA-OUT-FIL

+3V3

2210

33p

3217

100R

RES

3218 3215

1K2

3216

100R

3214

10K

2211

2216

7215

TLC5946PWP

25

2

6

F204

27

3

4 5 24

26

33p

+3V3

1u0

VCC

LED DRIVER

PWM CONTROL

GSCLK

BLANK

MODE

IREF

XLAT

SCLK SIN SOUT

XHALF

GND GND_HS

1

2215

100n

28

Φ

7

0

8

1

9

2

10

3

11

4

12

5

13

6

14

7

15

OUT

8

16

9

17

10

18

11

19

12

20

13

21

14

22

15

23

XERR

VIA

303132

33

29

3222

470R

F210

F211

F212

F213

F214

F215

DATA-RETURN-SWITCH

I

M

N

123 456

7 8 9 10111213

O

P

12

3

5

6 15

7 8

9

10

6216

SML-310

+3V3

I

M

N

2008-06-10

2008-08-08

2008-10-27

O

P

A2

090730

11

12

13

14

CLASS_NO

2008-08-08

2008-10-27

NAME

Peter Van Hove

SETNAMECHN

DRIVER 6LED LITEON

2

3

CHECK

SUPERS.

DATE

16

2K9

2008-06-02

C

17 18

8204 000 8857

23

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

194

1

2

3

20

18310_610_090305.eps

2009-Aug-07

6 LED Ambilight LEDs

Circuit Diagrams and PWB Layouts

EN 75Q548.1E LA 10.

1

A

123

3

4

5

6

456

8

914

10

7

LED LITEON

B

A

VLED1-F

VLED2

9308

9307

C

B

VLED2

D

E

VLED1-F

9309-4

9309-11 8

9309-227

9301

9302

C

F341F340

F342

LTW-E500T-PH1

4

GREEN

RED

6

BLUE

F343

7000

GND_HS

3

25

1

7

LTW-E500T-PH1

4

GREEN

RED

6

BLUE

7001

GND_HS

7

3

25

1

LTW-E500T-PH1

4

GREEN

RED

5

6

BLUE

7002

GND_HS

3

2

1

7

9305-22

9305-445

1 8

9305-1

7

45

7003

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

GND_HS

7

3

2

16

9318-1

9318-4

5

9318-3

6

F

D

G

E

H

I

F

J

G

3338

560R

3340

560R

3343

560R

3346

560R

3349

560R

3352

560R

3355

560R

3369

560R

3370

560R

3371

560R

3372

560R

3373

560R

3374

560R

3341

1K5 3344

1K5 3347

1K5 3350

1K5 3353

1K5 3356

1K5 3384

1K5 3385

1K5 3386

1K5 3387

1K5

3388

1K5 3389

1K5 3390

1K5 3391

1K5

K

owner.

is prohibited without the written consent of the copyright

H

L

M

I

3336

390R 3337

390R 3339

390R 3342

390R

PWM-B1

PWM-R1

PWM-G1

VLED1-F

3331

3332

10K

VLED1-F

3325

3326

10K

VLED1-F

3327

3330

36

18 9306-1

9320-2 72

9320-1 81

9306-3

9306-4 45

RED6

BLUE6

F307

7307 BC847BW

F308

3334

1K0

F303

3328

1K0

10K

3333

1K0

10K

7305 BC847BW

7306 BC847BW

F305

9317

F302

Place jumper 9314, 9316, 9317

if VLED < 17V

9314

F304

9316

9320-4 5

4

N

9310-2

9310-4

27

45

3

18

4

PWM-B2

PWM-R2

PWM-G2

11

8

9310-1

1 8

4

6

7004

LTW-E500T-PH1

GREEN

RED

BLUE

GND_HS

7

VLED1-F

3301

3303

12 132

GREEN6GREEN6

10K

VLED1-F

BLUE6

3304

3306

3

RED6

10K

VLED1-F

15

9

3 6

25

1 8

1

5

9319-11 8

9319-3

9319-44

3 6

7317 BC847BW

F326

3302

1K0

7315 BC847BW

F328

3305

1K0

10K

3307

3308

1K0

10K

3309

10 11

9312-33 6

9312-445

9303-3

5

9303-44

9303-1

9304-227

9304-1

1 8

9304-44

5

F325

9325

F327

F329

7316 BC847BW

F330

9312-11 8

9326

9327

LTW- E 50 0 T-P H1

4

GREEN

RED

5

6

BLUE

BLUE-2

RED-2

GREEN-2

7005

3

2

GND_HS

1

7

Place jumper 9325, 9326, 9327

if VLED < 17V

G

R

16

12

B

9315-227

9315-4

45

9315-1

1 8

B

3335

390R

3345

390R

3348

390R

3351

390R

9313-2

9313-1

27

1 8

F344

F347

17

9313-4

45

G

R

F345

RG

3310

1K5

3311

1K5

3312

1K5

3313

1K5

3314

1K5

3315

1K5

3316

1K5

3317

1K5

3318

1K5

3319

1K5

3320

1K5

3321

1K5

3322

1K5

3323

1K5

F348

9311-11 8

9311-3

9311-445

3 6

18

13

F346

RED-1

GREEN-1

3354

560R

3357

560R

3358

560R

3359

560R

3360

560R

3361

560R

3362

560R

3363

560R

3364

560R

3365

560R

3366

560R

3367

560R

3368

560R

BLUE-1

F349

GREEN-2

RED-2

BLUE-2

197

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12

A

3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12

B

3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2

C

3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12

D

3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13

E

3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1

F

3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1

7000 C2

G

7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1

H

9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5

I

9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20

A

B

C

D

E

F

G

H

I

J

K

L

M

N

1

2

3

O

P

1

2

4

5

456

63

7

8

9

7 8 9

10

CLASS_NO

11

12

SETNAMECHN

13

DRIVER 6LED LITEON

2008-08-08

2

3

2008-10-27

NAME

Peter Van Hove

10 18

11

12

13 20

1514

SUPERS.

DATECHECK

16

2K9

2008-06-02

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

19

1

2

3

33

18310_612_090305.eps

2008-06-10

2008-08-08

2008-10-27

O

P

A2

090730

2009-Aug-07

Layout 6 LED Ambilight

Circuit Diagrams and PWB Layouts

EN 76Q548.1E LA 10.

F347F348 F349

3342 3339

3338 3340 3343 3346 3349 3352 3355

7000

3337 3336

F135

F346

F345

F344

2109

3108

3109

9111

2125

9109

9112

1M83 1M84

2130

9110

9114

9107

2202

9302

3389

3374

3385

3390

3384

3369 3373

3356

3372

3350 3347

3371 3370

3344 3341

3121

3391 3386

3212

9214

3387 3388

2218

3220

9210

7201

3353

3209

9301

9211

2203

9212

9208

2217

3223

2201

9108

2220

9113

3224

3221

2211

3216

6216

3222

F116

3218

2216 2215

3215

7215

3217

F106

1105

3211

3219

3207

9213

9209

2219

F214

F213

7001

3214

F215

21282129

3330

2210

3325

3326

3328

9316

7306

9314

7305

2101

2102

2103

7101

2104

3331

3332

3334

9308 9307

9317

3327

3333

7307

9309

9305

9306

F209

7002

3128

3129

I113

1101

3103

I114

I115

3124

3130

2120

2123

3102

2131

3142

3101

2114

9101

9103

3118

9104

F109

I126

3107

2110

3110

3132 3133

I110

2119

I111

7102

F107 F108

3106

9102

F104

3120 3119

9121

3127

3114

3117

3113

7110

2117 2116 3115 2126

2113

2124 2121

2115

3112

F105

2111

3131

3126

9106

2112 3116 9119

3104

2122

3105

3125

2118

I124

7003

F137

3210

7214

3203

3205

F130

F101

7210

7212

2209

7209

3213

2214

3204

F132

F212

3136

3138

C140

3139

2106

3134 3141

9320

2108

2107

9318

3111

3137

2105

3135

3140

3123

7116

9310

F127

3306

9326

7004

F123

F139

F126

2127

3304

3305

3301

3302

3303

3307

3308

3309

9325

9327

7315

7316

7317

9303

9312

1M1A1M2A

F131

F129

9313

9315

3314

9304

9319

F120

F122

F128

F121

F124

3364

3365

3316

3317

3319

3320

3363

3366

3367

3368

3315

3311

3312

3313

3318

3321

3322

3323

7005

3354

3357

3358

3359

3360

3361

3362

3335

3345

3348

3310

3351

9311

3104 313 6313.3

F326

F330

F328

F325

F329

F327

F118

F133

F202 F203

F136

F134

I125

F112

F117

F103

F102

F308

F305

F211

F307

F304

F210

F303

F302

F204

F138

F207

F205

F206

F208

F125

F340

F342

F343

F341

18310_551_090309

090309

2009-Aug-07

Circuit Diagrams and PWB Layouts

8 LED Ambilight Microcontroller

EN 77Q548.1E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

N

2107

100n

1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

TEMP-SENSOR

+3V3

16

+3V3

3136

10n

2108

3139

CONTROL-1

SPI-DATA-IN

SPI-LATCH

SPI-LATCH-2

EEPROM-CS

BLANK-BUF

PROG

CONTROL-2

SCL SDA

1%1K5

F106

1K5 1%

7116-2 LM393PT

5

6

TEMP-SENSOR

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

20

A

B

C

D

E

F

G

H

I

J

K

L

M

17

3134

100K

RES

+3V3

8

7

4

F117

2106

RES

10n

3138

47K

RES

3141

10K

RES

18

19

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

A

2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6

B

2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

C

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10

D

3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7

E

3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4

F

3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11

G

3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12

H

3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11

7101 A7 7102 E6 7110 F4 7116-1 B11

1

2

3

1

4

2

5

3

6

7

4

8 9

6

10

11

8

12

13

975

14

10 11 12 13

15

MICROCONTROLLER LITEON

C140

100p

2

10K

-T

2131

+3V3

3135

F116

10n

3137

2105

+3V3

3140

3123

3124-4

3128 3129

3124-2 2 7 3124-3 3125-1 1 8

3142 3125-2 3125-4 3126-2 3126-4

3126-1

3127-1 3127-4 4 5

100p

10K

7

10K

1%

1K5

RES

10K

1%1K5

RES

F118

RES

1K8 1%

45

1 83124-1

3 6

27 4 27 45

1 8

3103-336

7116-1 LM393PT

3

2

100R 100R 100R 100R 100R 100R 100R 100R

5

100R 100R

100R

100R 100R

+3V3

84

I124

I125

I126

10K

A

B

C

IN

1M83

F120

1

F121

2

F122

3

F123

4

F124

5

F125

6

F126

7

F127

8

F128

9

F129

10

F130

11

F131

12

F132

13 14

15 16

1M1A

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15 16

1u0

2127

2128

+3V3

VLED1

VLED2

35V

35V10u

2129

10u

+3V3

VLED1

VLED2

9111

RES

9113

RES

9112

9114

TEMP-SENSOR

33p

2125

TEMP-SENSOR

SPI-DATA-IN

CONTROL-1 CONTROL-2

BLANK

EEPROM-CS

PROG

CONTROL-1 CONTROL-2

EEPROM-CS

PROG

SCL

SDA

SCL

SDA

SCL SPI-DATA-RETURN

CONTROL-1 CONTROL-2

VLED1

9107 9108

9109 9110

1105

T1.5A

SPI-CLOCK

SDA

SPI-LATCH

PWM-CLOCK

+3V3

VLED1-F

D

7102

LPC2103FBD48

E

OUT

1M84

F133

1

F135

2

F136

3

F139

4

F137

I

F

G

H

5

6

F138

7

F134

8

9 10 11 12 13 14

15 16

1M2A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

VLED1

VLED2

+3V3

VLED1

VLED2

+3V3

1u0

2130

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

+3V3

10K

3119

F109

2

3

RES

5

9121

100n

2111

1101

7110

NCP303LSN10T1

IN

RST

GND

NC

CD

+3V3

16M9

1

4

+3V3

9101

3118

RES

10K

9102

F102

RES 9103

9104 RES

F104

10K

3120

+1V8

11

12

20 25

26

4

27

6

X1

X2

RTXC1 RTXC2

RTCK

VBAT

DBGSEL

RST

VDD_1V8

2119

7

VSS

MICRO-

5

+3V3

100n

43

19

Φ

P0.0|TXD0|MAT3.1

P0.1|RXD0|MAT3.2

CTRL

P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0

P0.8|TXD1|MAT2.1

P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5

P0.13|DTR1|MAT1.1

P0.14|DCD1|

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

VDD_3V3

17

40

9119

100n

2121

100n

2120

VSSA

SCK1|EINT1

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.31|TDO

VDDA

7101

LD2985BM18R

1

OUTIN

3

INH BP

1u0

2101

COM

2

+3V3

10K

3107

3108

F107

F105

F108

3109

3110

100R

2109

100p

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38

UD-MD

39

8

9 10 15 16

42

F103

100n

2113

10K

100R

2110

2112

5

4

2104

2102

10n

72

10K

3101-2

100p

27

3104-2

3117

10K

22R

3131

100R

100n

F101

100n

10K

3116

3130

F112

9106

4u7

2103

10K

45

27

3105-2

3105-4

10K

1 8

3 6

3104-3

3106-1

3105-3

I110

RES

2118

RES

+1V8

10K

27

1 8

10K

RES

3106-2

3104-1

3113

10K

RES

3114

3106-33 6

10K

100p

3132

3133

3111

+3V3

10K

1 8

3112

3104-4 4 5

3102-1

10K

1 8

3115

3105-1

RES

2114

100p

2115

I111

10K

27

3 6

3101-3

3102-2

10K

45

3101-4

2116

100p

10K

3102-4 4 5

10K

8

10K

1

3 63102-3

3103-1

RES

100p

2117

2124

100p

2122

2123

100p

2126

100p

I113

3103-445 I114 I115

3103-2

123 45678 910111213

N

1X03

REF EMC HOLE

O

345

1

2

P

1

2

4

5

6

7

8

103

119

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

2

3

15

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

2

3

13

20

18560_500_090403.eps

2008-06-10

2008-08-08

??

O

P

A2

090410

2009-Aug-07

Circuit Diagrams and PWB Layouts

8 LED Ambilight Microcontroller

EN 78Q548.1E LA 10.

1

A

123 45678

32 8

4

5

6

7

10

11

12

13 19

910111213

MICROCONTROLLER LITEON

3207

9209

3209

9211

3211

9213

74HCT125PW

F205

RES

74HCT125PW

F206

RES

74HCT125PW

F207

RES

2

1

7201-4

12

13

5

4

7201-3 74HCT125PW

8

INPUT BUFFER

9208 RES

7201-1

EN

9210 RES

EN

9212

7201-2

EN

9214

A

B

C

B

EEPROM-CS

PDTC144EU

33p

2209

D

PDTC144EU

C

EEPROM-CS-LOCAL

+3V3

3213

7209

3

1

2

7210

3

1

2

10K

F202

7212

PDTC144EU

+3V3

10K

3210

SPI-CS

+3V3

10K

3203

F203

RES

3205

10K

5

6

1

3 11

E E

D

F

G

7214

D

(64K)

C

S

W

M95010-WDW6

+3V3

2214

100n

8

VCC

GND

2

Φ

Q

3204

7

HOLD

4

10K

SPI-DATA-RETURN

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN

PWM-CLOCK

SPI-CLOCK

BLANK

SPI-DATA-RETURN

+3V3

33p

2201

33p

2202

33p

2203

1K0

+3V3

1K0

+3V3

1K0

3121

100R

RES

2220

100p

E

H

F

J

K

owner.

is prohibited without the written consent of the copyright

L

I

TLC5946PWP

G

PWM-CLOCK-BUF BLANK-BUF

PROG

SPI-LATCH

H

SPI-CLOCK-BUF

SPI-DATA-IN SPI-DATA-OUT

SPI-DATA-OUT-FIL

+3V3

2210

33p

3217

100R

RES

3218 3215

1K2

3216

100R

3214

10K

2211

F204

2216

1u0

7215

25

2

6

27

3

4 5 24

33p

+3V3

28

VCC

Φ

LED DRIVER

PWM CONTROL

GSCLK

BLANK

MODE

IREF

XLAT

SCLK SIN SOUT

XHALF

GND GND_HS

1

29

2215

100n

7

0

8

1

9

2

10

3

11

4

12

5

13

6

14

7

15

8

OUT

16

9

17

10

18

11

19

12

20

13

21

14

22

15

2326

XERR

VIA

32

30

31

33

3222

470R

F210

F211

F212

F213

F214

F215

EEPROM-CS-LOCAL

DATA-RETURN-SWITCH

PWM-R1

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

14

+3V3

14

3

7

+3V3

14

7

RES

+3V3

14

6

7

RES

+3V3

14

9

F208

10

EN

7

15

3219

100R

3220

3223

100R

169

PWM-CLOCK-BUF

100p

22172218

27R

3212

100R

SPI-CLOCK-BUF

100p

BLANK-BUF

100p

2219

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

17

18

20

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

A

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3

B

3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8

C

3223 C11 3224 H11

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7

D

9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10

E

F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F

G

+3V3

3K3

3221

3224

F209

H

A

B

C

D

F

G

H

I

J

K

L

I

M

N

123 456

7 8 9 10111213

O

6216

SML-310

+3V3

CLASS_NO

SETNAMECHN

DRIVER 6LED LITEON

P

NAME

12

3

5

6 15

7 8

9

10

11

12

13

14

2008-08-08

Peter Van Hove

2

3

SUPERS.

DATECHECK

16

2K9

2008-06-02

C

17 18

I

8204 000 8857

23

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

194

M

N

O

2008-06-10

1

2008-08-08

2

??

3

P

A2

20

18560_501_090403.eps

090410

2009-Aug-07

8 LED Ambilight LEDs

Circuit Diagrams and PWB Layouts

EN 79Q548.1E LA 10.

1

A

123

3

4

5

6

8

914

456

10

7

LED LITEON

B

A

VLED1-F

9307

VLED2

9308

C

B

VLED2

D

E

VLED1-F

9309-2

9309-11 8

9309-4

45

25

16

LTW-E500T-PH1

4

GREEN

RED

BLUE

7002

GND_HS

3

25

16

7

9301

9302

C

F341F340

F342

LTW-E500T-PH1

4

GREEN

RED

BLUE

F343

7000

GND_HS

3

25

16

7

LTW-E500T-PH1

4

GREEN

RED

BLUE

7001

GND_HS

3

7

9305-227

9305-445

1 89305-1

27

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7003

GND_HS

3

2

16

7

F F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

D

3338

560R

3340

560R

3343

560R

3346

560R

3349

E

560R

3352

560R

3355

560R

3369

560R

3370

I

560R

3371

3372

3373

3374

F

G

3341

1K5 3344

1K5 3347

1K5 3350

1K5 3353

1K5 3356

1K5 3384

1K5 3385

1K5 3386

1K5 3387

1K5

3388

1K5 3389

1K5 3390

1K5 3391

1K5

H

I

3336

390R 3337

390R 3339

390R 3342

390R

PWM-B1

PWM-R1

PWM-G1

VLED1-F

3331

3332

10K

VLED1-F

3325

3326

10K

VLED1-F

3327

3330

54

9320-2 72

9320-1 81

9306-1 18

9306-4 45

9306-336

F307

7307 BC847BW

F308

3334

1K0

F303

3328

1K0

10K

3333

1K0

10K

7305 BC847BW

F305

7306 BC847BW

9317

F302

9314

F304

Place jumper 9314, 9316, 9317

if VLED < 17V

9316

9320-4

N

1

2

3

456

7 8 9

9318-3

9318-1

9318-4

36

18

45

PWM-B2

PWM-R2

PWM-G2

11

8

9310-227

9310-1

9310-4

1 8

45

LTW-E500T-PH1

4 9315-227

GREEN

RED

BLUE

7004

GND_HS

7

VLED1-F

3301

3303

12 132

GREEN6GREEN6

10K

VLED1-F

BLUE6BLUE6

3304

3306

3

25

16

RED6RED6

10K

VLED1-F

3307

3309

9

9319-3

9319-445

9319-1

3 6

1 8

7317 BC847BW

F326

3302

1K0

F328

3305

1K0

10K

3308

1K0

10K

3 6

9303-3

9303-445

9303-11 8

9304-22

9304-11 8

45

9304-4

F325

7315 BC847BW

7316 BC847BW

F330

10 11

9312-11 8

9312-3

9312-445

3 6

7

9325

F327

F329

9326

9327

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

BLUE-2

RED-2

GREEN-2

7005

GND_HS

10

15

3

2

16

7

Place jumper 9325, 9326, 9327

G

if VLED < 17V

R

11

1 8

B

9315-44

9315-1

3335

390R 3345

390R 3348

390R 3351

390R

16

12

5

12

9313-4

9313-2

9313-1

45

27

1 8

G

B

F344

B

F347

17

13

R

F345

F346

RG

3310

1K5

3311

1K5

3312

1K5

3313

1K5

3314

1K5

3315

1K5

3316

1K5

3317

1K5

3318

1K5

3319

1K5

3320

1K5

3321

1K5

3322

1K5

3323

1K5

3354

560R

3357

560R

3358

560R

3359

560R

3360

560R

3361

560R

3362

560R

3363

560R

3364

560R

3365

560R

3366

560R

3367

560R

3368

560R

F348

9311-445

9311-3

9311-11 8

3 6

13

F349

GREEN-2

RED-2

BLUE-2

RED-1

GREEN-1

BLUE-1

18

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20

197

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12

A

3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12

B

3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2

C

3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12

D

3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13

E

3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1

F

3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1

7000 C2

G

7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1

H

9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5

I

9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

A

B

C

D

E

G

H

I

J

K

L

M

N

2008-06-10

2008-08-08

??

O

P

A2

090403

O

CLASS_NO

P

NAME

1

2

4

5

63

7

8

9

10 18

11

12

13

2008-08-08

Peter Van Hove

2

3

1514

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

19

1

2

3

33

20

18560_502_090403.eps

2009-Aug-07

Circuit Diagrams and PWB Layouts

8 LED Ambilight LED Drive

EN 80Q548.1E LA 10.

A

B

C

D

E

F

G

H

J

K

is prohibited without the written consent of the copyright

owner.

L

12

I

76

8 201954

9103

11

13

4121

15 16

17

18

A

12

3 4

567

8 910

LED DRIVE

A

7006

GREEN

RED

BLUE

GND_HS

2

3

16

7

2

LTW-E500T-PH1

GREEN-1

RED-1

B

BLUE-1

4

5

7007

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

GND_HS

7

3

16

C

1M85

1 2

3

4 5 6

D

E

F

7

8

9 10 11 12 13 14

15 16

1M3A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

+3V3

VLED1

VLED2

+3V3

VLED1

VLED2

G

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

3538

560R

3540

560R

3543

560R

3546

560R

3549

560R

3552

560R

3555

560R

3569

560R

3570

560R

3571

560R

3572

560R

3573

560R

3574

560R

GREEN-2

RED-2

BLUE-2

3541

1K5 3544

1K5 3547

1K5 3550

1K5 3553

1K5 3556

1K5 3584

1K5 3585

1K5 3586

1K5 3587

1K5 3588

1K5 3589

1K5 3590

1K5 3591

1K5

3536

390R

390R 3539

390R 3542

390R

3537

1M3A E2 1M85 D2

3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7

A

3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8

B

3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8

7006 A5 7007 A7

C

B

C

D

E

F

G

D

H

E

I

F

J

K

G

L

2008-05-23

2008-08-08

0

M

NN

O

P

A2

090403

M

123

1X04

REF EMC HOLE

4

5

67

8

O

P

1

2

3

4 20

6

75

98

10

11 12

9

10

CLASS_NO

2008-05-23

1

2

2008-08-08

3

2008-10-31

Peter Van Hove

NAME

1413

15

SETNAMECHN

2LED + CONNECTOR

2K9

SUPERS.

2008-04-20

DATECHECK

16

17

8204 000 8874

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18 19

1

2

3

11

130

18560_503_090403.eps

2009-Aug-07

Layout 8 LED Ambilight

1M83 1M841M85

3342

9107

9302

3339

3389

3374

3385

1X03

3338

3369

3340

3384 3356

3343

3373

3350

3346

3372

3349

3347

3371 3370

3352

3344

3355

3341

3337

7000

3336

3390 3391 3386 3387 3388 3353

9301

2202

3212

3220

2218

9211

2130

9114

9110

3121

9214

9210

7201

3209

Circuit Diagrams and PWB Layouts

3109

3107

3108

21092110

9113

9109

9111

9112

2125

3221

3224

3216

2211

6216

3222

2203

1105

9212

3211

3219

9208

3207

2217

9213

9209

3223

2219

9108

2201

2220

2216

3214

2215

7001

3218

3215

21282129

7215

2210

3325

3328

3326

3217

9316

9314

7305

2101

2102

2103

7101

2104

3331

3332

3334

9308 9307

9317

3333

3327

3330

7307

7306

9309

9305

9306

3128 3129

I113

3103

I115

3124

3130

2120

2123

3102

2131

3142

7002

9103

3118

9101

3101

9104

3132 3133

I110

2119

1101

I111

I114

7102

2114

3110

9102

3120 3119

9121

3127

3106

3113

3114

3117

7110

2111

2117 2116

3115

3131

3126

2126

9106

2112 3116 9119

2113

2124 2121

3104

2122

3125

3105

2118

3112

2115

7003

EN 81Q548.1E LA 10.

3210

7214

3203

3205

7210

7212

9313

3363

3364

3365

3366

3368

3354

3359

3360

3361

3367

3357

3358

3312

3351

3310

3311

3335

3345

3348

3321

3322

7005

9311

3362

1X04

3555

3569

3570

3571

3572

3573

3574

3591

3553

3590

3589

3588

3587

3586

3546

3543

3540

3549

3552

7006

3538

3547

3585

3550

3544

3556

3541

3584

3542

3536

3537

3539

7007

9315

3315

3316

3317

3313

3314

3318

3319

3320

3136

3138

C140

3139

2209

7209

3213

2214

3204

2106

3111

2108

2105

3137

2107

3135

3140

3134

3123

3141

7116

9320

9310

9318

3305

3306

3304

9326

7315

7004

2127

3302

3301

3307

3308

3309

3303

9327

9325

7316

7317

9304

9303

9312

9319

3323

3104 313 6314.3

F347F348 F349

F135

F346

F345

F344

F326

F328

F330

F325

F327

F329

F215

F214

F213

F106

F116

F118

F133

F202 F203

F136

F209

F109

I126

F112

F117

F107 F108

F105

F104

F134

I125

F103

I124

F137

F102

F132

F130

F101

F212

F308

F305

F307

F210

F211

F303

F304

F302

F127

F204

F123

F139

F126

1M1A1M2A1M3A

F131

F207

F129

F138

F206

F208

F125

F205

F120

F122

F128

F121

F124

F343

F340

F342

F341

18490_550_090326.eps

090729

2009-Aug-07

Circuit Diagrams and PWB Layouts

10 LED Ambilight Microcontroller

EN 82Q548.1E LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

L

M

N

100n

2107

2108

1

CONTROL-1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-IN

SPI-LATCH-2

TEMP-SENSOR

EEPROM-CS

BLANK-BUF

CONTROL-2

+3V3

16

+3V3

10n

SPI-LATCH

PROG

3136

3139

SCL

SDA

1%1K5

F106

1K5 1%

100K

7116-2 LM393PT

5

6

10K

TEMP-SENSOR

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

20

A

B

C

D

E

F

G

H

I

J

K

L

M

17

3134

RES

+3V3

8

7

4

F117

2106

RES

10n

3138

47K

RES

3141

RES

18

19

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

A

2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6

B

2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

C

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10

D

3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7

E

3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4

F

3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11

G

3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12

H

3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11

7101 A7 7102 E6 7110 F4 7116-1 B11

1

2

3

1

4

2

5

3

6

7

4

8 9

6

10

11

8

12

13

975

14

10 11 12 13

15

MICROCONTROLLER BLOCK LITEON

A

B

C

IN

1M83

F120

1

F121

2

F122

3

F123

4

F124

5

F125

6

F126

7

F127

8

F128

9

F129

10

F130

11

F131

12

F132

13 14

15 16

1M1A

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15 16

1u0

2128

2127

+3V3

VLED1

VLED2

35V

35V10u

2129

10u

+3V3

VLED1

VLED2

9111 RES

9113

RES

33p

2125

9112

9114

SPI-DATA-IN

CONTROL-1 CONTROL-2

BLANK

EEPROM-CS

TEMP-SENSOR

PROG

CONTROL-1 CONTROL-2

EEPROM-CS

TEMP-SENSOR

PROG

SCL

SDA

SCL

SDA

SCL SPI-DATA-RETURN

CONTROL-1 CONTROL-2

VLED1

9107 9108

9109

9110

1105

T1.5A

SPI-CLOCK

SPI-LATCH

PWM-CLOCK

SDA

VLED1-F

+3V3

D

7102

X1

X2

RTXC1 RTXC2

RTCK

VBAT

DBGSEL

RST

VDD_1V8

2119

7

VSS

MICRO-

CTRL

5

+3V3

100n

43

19

VSSA

Φ

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2

P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1

P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2

P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4

P0.12|DSR1|MAT1.0|AD0.5

P0.13|DTR1|MAT1.1

P0.14|DCD1|

SCK1|EINT1

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1

P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

P0.31|TDO

VDD_3V3

VDDA

17

40

9119

100n

2121

100n

2120

LPC2103FBD48

F104

11

12

20 25

9101

3118

26

RES

10K

9102

4

F102

9104

27

RES

6

+1V8

E

OUT

1M84

F133

1

F135

2

F136

3

F139

4

F137

I

F

J

G

H

5 6

F138

7

F134

8

9 10 11 12 13 14

15 16

1M2A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

VLED1

VLED2

+3V3

VLED1

VLED2

+3V3

1u0

2130

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

F109

+3V3

10K

3119

2

3

RES

5

9121

100n

2111

1101

7110

NCP303LSN10T1

IN

RST

GND

NC

CD

+3V3

16M9

1

4

+3V3

RES 9103

10K

3120

7101

LD2985BM18R

1

OUTIN

3

INH BP

1u0

2101

COM

2

+3V3

10K

3107

3108

F107

F105

F108

3110

3109

100R

2109

100p

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38 39

UD-MD

8

9 10 15 16

42

F103

100n

2113

10K

100R

2110

2112

5

4

2104

2102

10n

72

10K

3101-2

100p

27

3104-2

3117

10K

22R

3131

100R

100n

F101

100n

10K

3116

3130

F112

9106

4u7

2103

10K

45

27

3105-2

3105-4

10K

1 8

3 6

3104-3

3105-3

3106-1

I110

RES

2118

RES

+1V8

10K

27

1 8

10K

RES

3106-2

3104-1

3113

10K

RES

3114

3106-33 6

10K

100p

3132

3133

+3V3

10K

1 8

3112

3104-4 4 5

3102-1

10K

1 8

3115

3105-1

RES2114

2115

100p

I111

10K

3 6

27

3101-3

3102-2

10K

45

3101-4

100p

2116

10K

3102-4 4 5

10K

8

10K

1

3 63102-3

3103-1

RES

100p

2122

100p

2117

2126

2124

2123

100p

I113

3103-445 I114 I115

3103-2

+3V3

1%

3135

1K5

F116

RES

10K

10n

3137

2105

3111

-T

C140

100p

2

2131

+3V3

3140

3123

3124-4

3128 3129

3124-2 2 7 3124-3 3125-1 1 8

3142 3125-2 3125-4 3126-2 3126-4

3126-1

3127-1 3127-4 4 5

100p

10K

3103-336

7

10K

1%1K5

1K8 1%

45

1 83124-1

3 6

27 4 27 45

1 8

RES

F118

RES

7116-1 LM393PT

3

2

100R 100R 100R 100R 100R 100R 100R 100R

5

100R 100R

100R

100R 100R

+3V3

8

4

I124

I125

I126

10K

123 45678 9 10111213

N

1X03

REF EMC HOLE

2008-06-10

2008-08-08

??

O

P

A2

O

2

345

1

P

1

2

4

5

6

7

8

103

119

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

2

3

15

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

2

3

13

20

2009-Aug-07

Circuit Diagrams and PWB Layouts

10 LED Ambilight Microcontroller

EN 83Q548.1E LA 10.

SPI-CS

+3V3

3203

F203

3205

PWM-CLOCK-BUF BLANK-BUF

PROG

SPI-LATCH

SPI-CLOCK-BUF

SPI-DATA-IN SPI-DATA-OUT

SPI-DATA-OUT-FIL

7

10

11

12

13 19

14

15

910111213

INPUT BUFFER

+3V3

2214

100n

7214

8

VCC

5

D

(64K)

6

10K

RES

10K

C

1

S

3 11

W

M95010-WDW6

GND

2

Φ

Q

3204

7

HOLD

4

10K

SPI-DATA-RETURN

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN

PWM-CLOCK

SPI-CLOCK

BLANK

SPI-DATA-RETURN

3207

+3V3

33p

2201

+3V3

33p

2202

+3V3

33p

2203

RES

2220

100p

3121

100R

RES

1K0

9209

3209

RES

1K0

9211

3211

RES

1K0

9213

7201-1

74HCT125PW

2

F205

1

7201-4

74HCT125PW

12

F206

13

7201-2

74HCT125PW

5

F207

4

7201-3 74HCT125PW

8

9208 RES

EN

9210 RES

EN

9212

EN

9214

+3V3

14

3

7

+3V3

14

7

RES

+3V3

14

6

7

RES

+3V3

14

9

F208

10

EN

7

3219

100R

3220

3223

100R

27R

3212

100R

169

PWM-CLOCK-BUF

100p

22172218

SPI-CLOCK-BUF

100p

BLANK-BUF

2219

100p

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

17

18

20

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

A

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3

B

3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8

C

3223 C11 3224 H11

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7

D

9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10

E

F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F

+3V3

28

VCC

Φ

LED DRIVER

PWM CONTROL

GSCLK

BLANK

MODE

IREF

XLAT

SCLK SIN SOUT

XHALF

GND GND_HS

1

29

2215

100n

7

0

8

1

9

2

10

3

11

4

12

5

13

6

14

7

15

OUT

8

16

9

17

10

18

11

19

12

20

13

21

14

22

15

2326

XERR

VIA

32

33

30

31

3222

470R

F210

F211

F212

F213

F214

F215

EEPROM-CS-LOCAL

DATA-RETURN-SWITCH

PWM-R1

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

+3V3

3K3

3224

F209

3221

G

H

+3V3

2216

1u0

7215

TLC5946PWP

25

2210

33p

3217

100R

RES

3218 3215

1K2

3216

100R

3214

10K

2

6

F204

27

3

4 5 24

33p

2211

1

A

123 45678

32 8

4

5

6

MICROCONTROLLER BLOCK LITEON

A

B

C

B

EEPROM-CS

PDTC144EU

1

33p

2209

D

PDTC144EU

C

EEPROM-CS-LOCAL

1

+3V3

3213

7209

3

2

7210

3

2

10K

F202

7212

PDTC144EU

+3V3

10K

3210

SPI-CS

E E

D

F

G

E

H

F

I

J

G

K

owner.

is prohibited without the written consent of the copyright

H

L

A

B

C

D

F

G

H

I

J

K

L

I

M

N

123 456

7 8 9 10111213

O

P

12

3

5

6 15

7 8

9

10

6216

SML-310

+3V3

I

M

N

2008-06-10

2008-08-08

??

O

P

A2

090306

11

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

SETNAMECHN

DRIVER 6LED LITEON

2

3

SUPERS.

DATECHECK

16

2K9

2008-06-02

C

17 18

8204 000 8857

23

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

194

1

2

3

20

18310_631_090306.eps

2009-Aug-07

10 LED Ambilight LEDs

Circuit Diagrams and PWB Layouts

EN 84Q548.1E LA 10.

1

A

123

3

4

5

6

8

914

456

10

7

LED LITEON

B

A

VLED1-F

VLED2

9307

9308

C

B

VLED1-F

D

C

E

VLED2

9309-11 8

9309-2

9309-4

45

9301

9302

F341F340

F342

LTW-E500T-PH1

4

GREEN

RED

BLUE

F343

7000

GND_HS

3

25

16

7

LTW-E500T-PH1

4

GREEN

RED

BLUE

7001

GND_HS

3

25

16

7

7002

LTW-E500T-PH1

4

GREEN

RED

BLUE

GND_HS

3

25

16

7

9305-227

9305-445

1 89305-1

27

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7003

GND_HS

7

3

2

16

9318-3

9318-1

9318-4

F F

G

H

K

owner.

is prohibited without the written consent of the copyright

L

M

D

E

I

F

J

G

3338

560R

3340

560R

3343

560R

3346

560R

3349

560R

3352

560R

3355

560R

3369

560R

3370

560R

3371

560R

3372

560R

3373

560R

3374

560R

3341

1K5 3344

1K5 3347

1K5 3350

1K5 3353

1K5 3356

1K5 3384

1K5 3385

1K5 3386

1K5 3387

1K5

3388

1K5 3389

1K5 3390

1K5 3391

1K5

H

I

3336

390R 3337

390R 3339

390R 3342

390R

PWM-B1

PWM-R1

PWM-G1

VLED1-F

3331

3332

10K

VLED1-F

3325

3326

10K

VLED1-F

3327

3330

54

9320-2 72

9320-1 81

9306-4 45

9306-336

9306-1 18

F307

7307 BC847BW

F308

3334

1K0

F303

3328

1K0

10K

3333

1K0

10K

7305 BC847BW

7306 BC847BW

F305

9317

F302

Place jumper 9314, 9316, 9317

if VLED < 17V

9314

F304

9316

9320-4

N

9310-4

9310-227

45

36

18

45

PWM-B2

PWM-R2

PWM-G2

11

8

9310-1

1 8

LTW-E500T-PH1

4 9315-227

GREEN

RED

BLUE

7004

GND_HS

7

VLED1-F

3301

3303

12 132

GREEN6GREEN6

BLUE6BLUE6

10K

VLED1-F

3304

3306

3

RED6RED6

10K

VLED1-F

9

25

16

9319-1

1 8

3302

1K0

10K

3307

10K

3309

3 6

9303-3

9303-445

9303-11 8

9319-3

9319-4

3 6

45

7317 BC847BW

F326

7315 BC847BW

F328

3305

1K0

7316 BC847BW

F330

3308

1K0

10 11

9312-445

9312-1

9312-3

3 6

1 8

LTW-E500T-PH1

4

5

9304-22

7

9304-11 8

9304-4

F325

BLUE-2

9325

F327

RED-2

9326

F329

GREEN-2

9327

GREEN

RED

BLUE

7005

GND_HS

15

3

2

16

7

Place jumper 9325, 9326, 9327

G

if VLED < 17V

R

9315-44

1 8

9315-1

B

3335

390R 3345

390R 3348

390R 3351

390R

16

12

9313-1

1 8

B

5

F344

B

F347

17

9313-4

9313-2

45

27

G

R

F345

RG

3310

1K5

3311

1K5

3312

1K5

3313

1K5

3314

1K5

3315

1K5 3316

1K5 3317

1K5 3318

1K5 3319

1K5 3320

1K5 3321

1K5 3322

1K5 3323

1K5

F348

9311-3

9311-445

3 6

18

13

F346

RED-1

GREEN-1

3354

560R

3357

560R

3358

560R

3359

560R

3360

560R

3361

560R

3362

560R

3363

560R

3364

560R

3365

560R

3366

560R

3367

560R

3368

560R

9311-11 8

BLUE-1

F349

GREEN-2

RED-2

BLUE-2

197

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12

A

3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12

B

3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2

C

3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12

D

3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13

E

3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1

F

3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1

7000 C2

G

7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1

H

9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5

I

9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20

A

B

C

D

E

G

H

I

J

K

L

M

N

1

2

O

P

1

2

4

3

5

456

63

7

8

9

7 8 9

10

11

CLASS_NO

12

SETNAMECHN

13

DRIVER 6LED LITEON

2

2008-08-08

3

Peter Van Hove

NAME

10 18

11

12

13

1514

SUPERS.

DATECHECK

16

2K9

2008-06-02

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

19

O

2008-06-10

1

2008-08-08

2

??

3

P

33

A2

20

18310_632_090306.eps

090306

2009-Aug-07

Circuit Diagrams and PWB Layouts

10 LED Ambilight LED Drive

EN 85Q548.1E LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

L

1

45

6

7

8 20

9

10

11

12

13

142 3

15

17

18 1916

A

1

2 3 456

7

8

9

10

LED DRIVE

A

7006

GREEN

RED

BLUE

GND_HS

7

2

3

2

LTW-E500T-PH1

GREEN-1

RED-1

B

BLUE-1

4

5

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7007

GND_HS

3

16

7

2

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7008

GND_HS

7009

LTW-E500T-PH1

4

3

1616

7

2

GREEN

RED

5

BLUE

GND_HS

3

16

7

C

1M85

1 2

3

4 5

D

E

I

J

F

6 7

8

9 10 11 12 13 14

15 16

1M3A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

+3V3

VLED1

VLED2

+3V3

VLED1

VLED2

G

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

GREEN-2

RED-2

BLUE-2

3538

560R

3540

560R

3543

560R

3

546

560R

3549

560R

3552

560R

3555

560R

3569

560R

3570

560R

3571

560R

3572

560R

3573

560R

3574

560R

3541

1K5 3544

1K5 3547

1K5 3550

1K5 3553

1K5 3556

1K5 3584

1K5 3585

1K5 3586

1K5 3587

1K5 3588

1K5 3589

1K5 3590

1K5 3591

1K5

3536

390R 3537

390R 3539

390R 3542

390R

1M3A E2 1M85 D2

3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7

A

3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8

B

3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8

7006 A2 7007 A4 7008 A5 7009 A6

C

B

C

D

E

F

G

D

H

E

I

F

J

K

G

L

M

12

1X04

REF EMC HOLE

3

4

O

P

12 14

3

4

5

67

5678 910

CLASS_NO

2008-08-14

2008-10-3123

NAME

Peter Van Hove

8 1211

9

10

13 19

15

EMANTESNHC

4 LED + CONNECTOR

LITEON 2K9

SUPERS.

CHECK DATE

2008-07-29

16

1

232008-10-24

8204 000 8897

11

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

17

18

130

20

18310_633_090306.eps

M

NN

O

2008-08-14

2008-10-31

P

A2

090306

2009-Aug-07

Layout 10 LED Ambilight

1M83 1M841M85

1X03

3342 3339

3337

7000

3336

9110

2130

9114

9107

2202

9302

3338

3374

3385

3389

3369

3340

3384

3390

3121

3356

3343

3373

3391

3350

3346

3372

3386

3212

9214

3371

3387

3349

3347

3370

3388

3352

3344

3220

2218

9210

3355

7201

3353

3341

3209

9301

9211

9108

2201

2220

Circuit Diagrams and PWB Layouts

3107

3109

3108

21092110

I113

3103

I115

3124

3130

2120

2123

2131

3142

7002

9103

9101

3118

3101

9104

3128 3129

3132 3133

I110

1101

I114

7102

3102

2114

3110

2119

I111

9113

9109

9112

9111

2125

3221

3224

3216

2211

6216

3222

2203

1105

9212

3211

9208

3219

3207

2217

9213

9209

3223

2219

2216 2215

3214

7001

3215

3218

7215

2210

3328

3326

3217

9316

9314

7305

21282129

2101

2102

2103

7101

2104

3334

3331

3332

9308 9307

9317

3327

3333

3330

3325

7307

7306

9309

9305

9306

3120 3119

9121

3106

3127

3113

3114

9102

3117

7110

2111

2117 2116

3115

3131

3126

2126

9106

2112 3116 9119

2113

2124 2121

3104

2122

3105

3125

2118

3112

2115

2209

7209

7210

3213

7212

2214

3204

3210

7214

7003

3203

3205

3136

3138

3139

2106

2108

2107

3134 3141

9318

9320

C140

3111

2105

3137

3135

3140

3123

7116

9310

EN 86Q548.1E LA 10.

3305

3306

9326

7315

7004

9313

3363

3354

3359

3360

3364

3365

3368

3357

3358

3361

3362

3366

3367

9315

3314

2127

3301

3302

3308

3307

3303

3304

3309

9325

9327

7316

7317

9319

9304

9303

9312

3316

3317

3315

3319

3320

3318

3312

3310

3311

3335

3313

3321

3322

3323

7005

3351

3345

3348

1X04

3555

3569

3570

3571

3572

3574

3573

3588

3553

3586

3587

3589

3590

3591

3538

3543

3540

3546

3552

9311

7006

7007

7008

3549

3541

3544

3547

3556

3550

3584

3585

3537

3539

3536

7009

3542

3104 313 6315.2

F347F348 F349

F135

F346

F345

F344

F326

F328

F330

F325

F329

F215

F214

F116

F213

F327

F106

F118

F209

F202 F203

F133

F136

I126

F107 F108

F105

F104

F109

F134

I125

F112

F117

I124

F137

F103

F102

F132

F130

F212

F101

F210

F308

F305

F211

F303

F307

F304

F204

F302

F123

F127

F139

F126

1M1A1M2A1M3A

F131

F138

F207

F208

F125

F205

F120

F122

F128

F121

F206

F342

F124

F340

F343

F341

18310_553_090309

090309

F129

2009-Aug-07

Circuit Diagrams and PWB Layouts

12 LED Ambilight Microcontroller

EN 87Q548.1E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

N

100n

2107

1

PWM-CLOCK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-LATCH-2

TEMP-SENSOR

+3V3

16

+3V3

3136

10n

2108

3139

CONTROL-1

SPI-DATA-IN

SPI-LATCH

EEPROM-CS

BLANK-BUF

PROG

CONTROL-2

SDA

SCL

1%1K5

F106

1K5 1%

100K

7116-2 LM393PT

5

6

TEMP-SENSOR

7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

20

A

B

C

D

E

F

G

H

I

J

K

L

M

17

3134

RES

+3V3

8

7

4

F117

2106

RES

10n

3138

47K

RES

3141

10K

RES

18

19

1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11

A

2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6

B

2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10

C

3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10

D

3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7

E

3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4

F

3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11

G

3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12

H

3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11

7101 A7 7102 E6 7110 F4 7116-1 B11

1

2

1

3

4

2

5

3

6

7

4

8 9

6

10

11

8

12

13

975

14

10 11 12 13

15

MICROCONTROLLER LITEON

A

B

C

IN

1M83

F120

1

F121

2

F122

3

F123

4

F124

5

F125

6

F126

7

F127

8

F128

9

F129

10

F130

11

F131

12

F132

13 14

15 16

1M1A

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15 16

1u0

2127

2128

+3V3

VLED1

VLED2

35V

35V10u

2129

10u

+3V3

VLED1

VLED2

9111

RES

9113

RES

9112

9114

TEMP-SENSOR

33p

2125

TEMP-SENSOR

SPI-DATA-IN

CONTROL-1 CONTROL-2

BLANK

EEPROM-CS

PROG

CONTROL-1 CONTROL-2

EEPROM-CS

PROG

SCL

SDA

SCL

SDA

SCL SPI-DATA-RETURN

CONTROL-1 CONTROL-2

VLED1

9107 9108

9109 9110

1105

T1.5A

SPI-CLOCK

SPI-LATCH

PWM-CLOCK

SDA

VLED1-F

+3V3

D

7102

LPC2103FBD48

E

OUT

1M84

F133

1

F135

2

F136

3

F139

4

F137

I

F

G

H

5

6

F138

7

F134

8

9 10 11 12 13 14

15 16

1M2A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15 16

VLED1

VLED2

+3V3

VLED1

VLED2

+3V3

1u0

2130

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

+3V3

10K

3119

F109

2

3

RES

5

9121

100n

2111

7110

NCP303LSN10T1

IN

RST

GND

NC

CD

16M9

1101

+3V3

3120

1

4

9101

3118

RES

10K

9102

F102

RES 9103

9104 RES

F104

10K

+1V8

11

12

20 25

26

4

27

6

X1

X2

RTXC1 RTXC2

RTCK

VBAT

DBGSEL

RST

VDD_1V8

2119

7

VSS

MICRO-

CTRL

5

+3V3

100n

43

19

Φ

P0.0|TXD0|MAT3.1

P0.1|RXD0|MAT3.2

P0.2|SCL0|CAP0.0

P0.3|SDA0|MAT0.0

P0.8|TXD1|MAT2.1

P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4

P0.12|DSR1|MAT1.0|AD0.5

P0.13|DTR1|MAT1.1

SCK1|EINT1

P0.14|DCD1|

P0.15|RI1|EINT2

P0.16|EINT0|MAT0.2

P0.17|CAP1.2|SCL1

P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0

P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7

P0.27|TRST|CAP2.0

P0.28|TMS|CAP2.1

P0.29|TCK|CAP2.2

P0.30|TDI|MAT3.3

VDD_3V3

17

40

9119

100n

2121

100n

2120

VSSA

P0.31|TDO

VDDA

7101

LD2985BM18R

1

OUTIN

3

INH BP

1u0

2101

COM

2

+3V3

10K

3107

3108

F107

F105

F108

3109

3110

100R

2109

100p

31

13 14 18 21 22 23 24 28 29

30 35 36 37

41 44 45 46 47 48

1 2

3 32 33 34 38

UD-MD

39

8

9 10 15 16

42

F103

100n

2113

10K

100R

2110

2112

5

4

2104

2102

10n

72

10K

3101-2

100p

27

3104-2

3117

10K

3130

22R

3131

100R

100n

10K

3116

F112

F101

100n

10K

3 6

3104-3

9106

RES

4u7

2103

10K

45

273105-2

3105-4

10K

3 6

3105-3

RES

2118

+1V8

10K

27

RES

3106-2

3113

10K

1 8

3106-1

3106-33 6

I110

10K

100p

3133

+3V3

10K

1 8

10K

3104-4 4 5

3102-1

3104-1

10K

RES

1 8

3114

3115

3105-1

RES

2114

100p

2115

I111

10K

3132

10K

3 6

3101-3

3112

10K

100p

10K

27

3102-2

3102-4 4 5

10K

8

10K

3 63102-3

45

3103-1

3101-4

100p

2116

2117

10K

1

RES

2124

2122

100p

2123

100p

2126

100p

I113

3103-445 I114 I115

3103-2

+3V3

1%

3135

1K5

F116

RES

10K

10n

3137

2105

3111

-T

C140

+3V3

3140

3123

3124-4

3128 3129

3124-2 2 7 3124-3

3125-1 1 8

3142 3125-2 3125-4 3126-2 3126-4

3126-1

3127-1 3127-4 4 5

100p

2131

100p

10K

3103-336

7

10K

2

10K

7116-1 LM393PT

1%1K5

RES

3

F118

2

RES

1K8 1%

45

100R 100R

1 83124-1

100R 100R

3 6

100R 100R 100R 100R

27

5

100R

4

100R

27

100R

45

100R

1 8

100R

1 8

100R 100R

+3V3

84

I124

I125

I126

10K

123 45678 910111213

N

1X03

REF EMC HOLE

O

345

1

2

P

1

2

4

5

6

7

8

103

119

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

2

3

15

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

130

19

1

2

3

13

20

18560_510_090403.eps

2008-06-10

2008-08-08

??

O

P

A2

090410

2009-Aug-07

Circuit Diagrams and PWB Layouts

12 LED Ambilight Microcontroller

EN 88Q548.1E LA 10.

1

A

123 45678

32 8

4

5

6

7

10

11

12

13 19

910111213

MICROCONTROLLER LITEON

3207

9209

3209

9211

3211

9213

74HCT125PW

F205

RES

74HCT125PW

F206

RES

74HCT125PW

F207

RES

2

1

7201-4

12

13

5

4

7201-3 74HCT125PW

8

INPUT BUFFER

9208 RES

7201-1

EN

9210 RES

EN

9212

7201-2

EN

9214

A

B

C

B

EEPROM-CS

PDTC144EU

33p

2209

D

PDTC144EU

C

EEPROM-CS-LOCAL

+3V3

3213

7209

3

1

2

7210

3

1

2

10K

F202

7212

PDTC144EU

+3V3

10K

3210

SPI-CS

+3V3

10K

3203

F203

RES

3205

10K

5

6

1

3 11

E E

D

F

G

7214

D

(64K)

C

S

W

M95010-WDW6

+3V3

2214

100n

8

VCC

GND

2

Φ

Q

3204

7

HOLD

4

10K

SPI-DATA-RETURN

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN

PWM-CLOCK

SPI-CLOCK

BLANK

SPI-DATA-RETURN

+3V3

33p

2201

33p

2202

33p

2203

1K0

+3V3

1K0

+3V3

1K0

3121

100R

RES

2220

100p

E

H

F

J

K

owner.

is prohibited without the written consent of the copyright

L

I

TLC5946PWP

G

PWM-CLOCK-BUF BLANK-BUF

PROG

SPI-LATCH

H

SPI-CLOCK-BUF

SPI-DATA-IN SPI-DATA-OUT

SPI-DATA-OUT-FIL

+3V3

2210

33p

3217

100R

RES

3218 3215

1K2

3216

100R

3214

10K

2211

F204

2216

1u0

7215

25

2

6

27

3

4 5 24

33p

+3V3

28

VCC

Φ

LED DRIVER

PWM CONTROL

GSCLK

BLANK

MODE

IREF

XLAT

SCLK SIN SOUT

XHALF

GND GND_HS

1

29

2215

100n

7

0

8

1

9

2

10

3

11

4

12

5

13

6

14

7

15

OUT

8

16

9

17

10

18

11

19

12

20

13

21

14

22

15

2326

XERR

VIA

32

30

31

33

3222

470R

F210

F211

F212

F213

F214

F215

EEPROM-CS-LOCAL

DATA-RETURN-SWITCH

PWM-R1

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL DATA-RETURN-SWITCH

14

+3V3

14

3

7

+3V3

14

7

RES

+3V3

14

6

7

RES

+3V3

14

9

F208

10

EN

7

15

3219

100R

3220

3223

100R

169

PWM-CLOCK-BUF

100p

22172218

27R

3212

100R

SPI-CLOCK-BUF

100p

BLANK-BUF

100p

2219

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

17

18

20

2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7

A

2217 B12 2218 C12 2219 D12 2220 E9

3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3

B

3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8

C

3223 C11 3224 H11

6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7

D

9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10

E

F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

F

G

+3V3

3K3

3221

3224

F209

H

A

B

C

D

F

G

H

I

J

K

L

I

M

N

123 456

7 8 9 10111213

O

P

12

3

5

6 15

7 8

9

10

6216

SML-310

+3V3

I

M

N

2008-06-10

2008-08-08

??

O

P

A2

090410

11

12

13

14

CLASS_NO

2008-08-08

NAME

Peter Van Hove

SETNAMECHN

DRIVER 6LED LITEON

2

3

SUPERS.

DATECHECK

16

2K9

2008-06-02

C

17 18

8204 000 8857

23

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

194

1

2

3

20

18560_511_090403.eps

2009-Aug-07

12 LED Ambilight LEDs

Circuit Diagrams and PWB Layouts

EN 89Q548.1E LA 10.

1

A

123

3

4

5

6

8

914

456

10

7

LED LITEON

B

A

VLED1-F

9307

VLED2

9308

C

B

VLED2

D

E

VLED1-F

9309-2

9309-11 8

9309-4

45

25

16

LTW-E500T-PH1

4

GREEN

RED

BLUE

7002

GND_HS

3

25

16

7

9301

9302

C

F341F340

F342

LTW-E500T-PH1

4

GREEN

RED

BLUE

F343

7000

GND_HS

3

25

16

7

LTW-E500T-PH1

4

GREEN

RED

BLUE

7001

GND_HS

3

7

9305-227

9305-445

1 89305-1

27

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7003

GND_HS

3

2

16

7

F F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

M

D

3338

560R

3340

560R

3343

560R

3346

560R

3349

E

560R

3352

560R

3355

560R

3369

560R

3370

I

560R

3371

3372

3373

3374

F

G

3341

1K5 3344

1K5 3347

1K5 3350

1K5 3353

1K5 3356

1K5

3384

1K5

3385

1K5

3386

1K5

3387

1K5

3388

1K5

3389

1K5

3390

1K5

3391

1K5

H

I

3336

390R 3337

390R 3339

390R 3342

390R

PWM-B1

PWM-R1

PWM-G1

VLED1-F

3331

3332

10K

VLED1-F

3325

3326

10K

VLED1-F

3327

3330

54

9320-2 72

9320-1 81

9306-1 18

9306-4 45

9306-336

F307

7307 BC847BW

F308

3334

1K0

7305 BC847BW

F303

3328

1K0

10K

3333

1K0

10K

F305

7306 BC847BW

9317

F302

Place jumper 9314, 9316, 9317

if VLED < 17V

9314

F304

9316

9320-4

N

1

2

3

456

7 8 9

9318-3

9318-1

9318-4

36

18

45

PWM-B2

PWM-R2

PWM-G2

11

8

9310-227

9310-1

9310-4

1 8

45

LTW-E500T-PH1

4 9315-227

GREEN

RED

BLUE

7004

GND_HS

7

VLED1-F

3301

3303

12 132

GREEN6GREEN6

10K

VLED1-F

BLUE6BLUE6

3304

3306

3

25

16

RED6RED6

10K

VLED1-F

3307

3309

9

9319-3

9319-445

9319-1

3 6

1 8

7317 BC847BW

F326

3302

1K0

F328

3305

1K0

10K

3308

1K0

10K

3 6

9303-3

9303-445

9303-11 8

9304-22

9304-11 8

45

9304-4

F325

7315 BC847BW

7316 BC847BW

F330

10 11

9312-11 8

9312-3

9312-445

3 6

7

9325

F327

F329

9326

9327

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

BLUE-2

RED-2

GREEN-2

7005

GND_HS

10

15

3

2

16

7

Place jumper 9325, 9326, 9327

G

if VLED < 17V

R

11

1 8

B

9315-44

9315-1

3335

390R 3345

390R 3348

390R 3351

390R

16

12

5

12

9313-4

9313-2

9313-1

45

27

1 8

G

B

F344

B

F347

17

13

R

F345

F346

RG

3310

1K5

3311

1K5

3312

1K5

3313

1K5

3314

1K5

3315

1K5

3316

1K5

3317

1K5

3318

1K5

3319

1K5

3320

1K5

3321

1K5

3322

1K5

3323

1K5

3354

560R

3357

560R

3358

560R

3359

560R

3360

560R

3361

560R

3362

560R

3363

560R

3364

560R

3365

560R

3366

560R

3367

560R

3368

560R

F348

9311-445

9311-3

9311-11 8

3 6

13

F349

GREEN-2

RED-2

BLUE-2

RED-1

GREEN-1

BLUE-1

18

9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20

197

3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12

A

3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12

B

3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2

C

3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12

D

3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13

E

3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1

F

3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1

7000 C2

G

7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1

H

9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5

I

9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8

A

B

C

D

E

G

H

I

J

K

L

M

N

2008-06-10

2008-08-08

??

O

P

A2

090403

O

CLASS_NO

P

NAME

1

2

4

5

63

7

8

9

10 18

11

12

13

2008-08-08

Peter Van Hove

2

3

1514

SETNAMECHN

DRIVER 6LED LITEON

2K9

SUPERS.

2008-06-02

DATECHECK

16

17

8204 000 8857

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

130

19

1

2

3

33

20

18560_512_090403.eps

2009-Aug-07

Circuit Diagrams and PWB Layouts

12 LED Ambilight LED Drive

EN 90Q548.1E LA 10.

A

B

C

D

E

F

G

H

J

K

owner.

is prohibited without the written consent of the copyright

L

12

I

3

45

7

8

9

10

11

1312

14

15

16

17

18 19

206

A

1

2 3 4

56

7

8

91011

12

LED DRIVE

A

7006

GREEN

RED

BLUE

GND_HS

2

3

2

16

7

B

GREEN-1

RED-1

BLUE-1

LTW-E500T-PH1

4

5

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7007

GND_HS

3

2

16

7

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

7008

GND_HS

3

2

16

7

7009

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

GND_HS

7

7010

LTW-E500T-PH1

4

3

2

16

GREEN

RED

5

BLUE

3

22

GND_HS

16

7

7011

LTW-E500T-PH1

4

GREEN

RED

5

BLUE

GND_HS

3

16

7

C

1M3A F2 1M85 D2

3536 E11 3537 E11 3538 E9 3539 F11 3540 F9 3541 E10 3542 F11 3543 F9

A

3544 F10 3546 F9 3547 F10 3549 F9 3550 F10 3552 F9 3553 F10 3555 G10 3556 F10 3569 G9 3570 G9 3571 G9

B

3572 G9 3573 H9 3574 H9 3584 G10 3585 G10 3586 G10 3587 G10 3588 G10 3589 H10 3590 H10 3591 H10

C

7006 B2 7007 B3 7008 B5 7009 B6 7010 B7 7011 B8

B

C

D

E

F

D

E

F

G

H

1M85

1 2

3

4 5 6 7

8

9 10 11 12 13 14

15 16

1M3A

1

2

3

4

5

6

7

8

9 10 11 12 13 14

15

16

+3V3

VLED1

VLED2

+3V3

VLED1

VLED2

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

SPI-CLOCK-BUF

SPI-DATA-OUT

SPI-DATA-RETURN

SPI-LATCH

PWM-CLOCK-BUF

BLANK-BUF

EEPROM-CS

TEMP-SENSOR

PROG

3538

560R

3540

560R

3543

560R

3546

560R

3549

560R

3552

560R

3555

560R

3569

560R

3570

560R

3571

560R

3572

560R

3573

560R

3574

560R

GREEN-2

RED-2

BLUE-2

3541

1K5

3544

1K5

3547

1K5

3550

1K5

3553

1K5

3556

1K5

3584

1K5

3585

1K5

3586

1K5

3587

1K5

3588

1K5

3589

1K5

3590

1K5

3591

1K5

3536

390R 3537

390R 3539

390R 3542

390R

D

G

E

H

I

F

J

G

K

H

L

M

12

1X04

REF EMC HOLE

3 4

5

6

7 8 9

10 11

12

M

NN

O

CLASS_NO

SETNAMECHN

2

O

2008-10-29

6 LED + CONNECTOR

P

NAME

12

3

4

5

67

98

10

1211

13

14

2008-08-14

2008-10-29

Peter Van Hove

2

3

15

2K9 LITEON

SUPERS.

2008-07-30

DATECHECK

16

17

2009-Aug-07

8204 000 8898

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

130

1918

18560_513_090403.eps

A2

20

090729

P

Layout 12 LED Ambilight

9113

2203

1105

9212

3211

3219

9208

3207

2217

9213

9209

3223

2219

2201

9108

2220

1X03

1M83 1M84 1M85

3342

2130

9110

9114

9107

2202

9302

3339

3338

3374

3385

3389

3340

3369

3384

3390

3121

3343

3356

3373

3391

3350

3346

3372

3386

3212

9214

3349

3347

3371

3387

3344

3352

3370

3388

3220

2218

9210

7201

3341

3355

3353

3337

7000

3209

9301

3336

9211

9109

9111

9112

2125

3221

3224

3216

2211

6216

3222

7001

Circuit Diagrams and PWB Layouts

3107

21092110

3108

3109

3128

3110

3103

I115

3124

3130

2120

2123

2131

3142

7002

9103

3118

3101

9104

3129

I113

1101

I114

7102

3102

2114

9101

3132 3133

3106

I110

9102

3117

2119

I111

2124 2121

3214

2216 2215

3215

3218

7215

2210

3326

3328

3217

9316

9314

7305

21282129

2101

2102

2103

7101

2104

3332

3334

3331

9308 9307

9317

3327

3333

3330

3325

7307

7306

9305

9309

9306

EN 91Q548.1E LA 10.

9313

3354

3357

3358

3360

3361

3362

3365

3366

3367

3368

3359

3363

3120 3119

9121

3127

3113

3114

7110

2111

2117 2116

3115

3131

3126

2126

9106

2112 3116 9119

2113

3104

2122

3105

3125

2115

2118

3112

2209

7210

7209

3213

7212

2214

3210

7214

7003

3203

3205

3136

3138

C140

2106

3139

3111

2108

2105

3137

2107

3135

3140

3134

3204

3123

3141

7116

7004

9310

9318

9320

2127

3301

3305

3306

3303

3304

3307

3308

3309

3302

9325

9327

9326

7315

7316

7317

9312

3364

9315

3345

3348

3310

3311

3312

3313

3315

3316

3335

3351

3317

3318

3323

3314

3320

3321

3322

3319

3555

3569

3570

3571

3572

3573

3574

3591

3553

3586

3587

3588

3589

3590

3538

3549

3540

3543

3546

7005

9319

9303

9304

9311

7006

7007

7008

7009

7010

3552

3544

3547

3541

3550

3556

3584

3585

3536

3537

3539

1X04

7011

3542

3104 313 6335.2

F135

F346

F347F348 F349

F345

F344

F326

F330

F329

F215

F214

F328

F325

F327

F106

F116

F213

F118

F209

F202 F203

F133

F136

F107 F108

F105

F104

F109

I126

F134

I125

F112

F117

I124

F137

F103

F102

F132

F130

F212

F101

F210

F308

F305

F211

F303

F307

F304

F302

F123

F127

F139

F126

1M1A1M2A1M3A

F131

F138

F207

F208

F204

F205

F120

F122

F128

F121

F129

F124

F206

F340

F125

F343

F342

F341

18490_551_090326.eps

090729

2009-Aug-07

SSB: DC/DC +3V3 +1V2

Circuit Diagrams and PWB Layouts

EN 92Q548.1E LA 10.

1

2100 B2

A

2101 B4 2102 D1 2103 D4 2104 B6 2105 D6 2106 E5

B

C

A

D

B

E

F

C

G

D

H

E

I

J

F

K

is prohibited without the written consent of the copyright

owner.

G

L

2107 B6 2108 B5 2109 C6 2110 C8 2111 C8 2112 C9 2113 C7

2114 C8 2115 D7 2116 E9 2117 E9 2118 E9 2119 E9 2120 E8

2121 E8 2122 B11 2123 B11 2124 C12 2125 E12 2127 E12 2128 F7

2129 F8 2130 F7 2131 F7 2132 F5 2133 H2 2134 H2 2135 H2

2140 C9 2141 C9 3100 B2 3101 B2 3102 C2 3103 C1 3105 C1

5

3106 C2 3107 C3 3108 B4 3109 C5 3110 C5 3113 C5 3114 C5

3115 C6 3116 C5 3117 D1 3118 E1 3119 E4 3120 E4 3121 E4

6

3122 F2 3124 C6 3125 D6 3126 D6 3127 D6 3128 D5 3129 D5

7

3130 E5 3131 E6 3132 C7 3133 C8 3134 C8 3135 D8 3136 D7

3137 D6 3138 E9 3139 E7 3140 E8 3141 E8 3142 E6 3143 E6

84

3144 F8 3145 E11 3146 E10 3147 F11 3148 F10 3149 F11 3150 F11

92

3151 G11 3152 G11 3153 F8 3154 F8 3155 F8 3156 F7 3157 F7

3158 F3 3159 H1 3160 H1 3164 D4 5100 B8 5101 C8 5102 E8

10

5103 E8 5104 B11 5105 E11 6100 E6 6101 F5 6102 G7 6103 F7

11

6104 B2 7100-1 C2 7100-2 B1 7101-1 B5 7101-2 C6 7102-1 C7 7102-2 D6

7103 C4 7104 D2 7105-1 E3 7105-2 E4 7106 F7 7107-1 E10 7107-2 F10

12

F100 C4 F101 C7 F102 D6 F103 D6 F104 E7 F105 F4 F106 C2

133

F107 B7 F108 D10 F109 E10 F110 F10 F111 E12 F112 D9 F113 F7

F114 D4 F115 D4 I100 B3 I101 B1 I102 C1 I103 B4 I106 D4

I107 D3 I108 D4 I109 C2 I111 D5 I112 B5 I113 C5 I114 D8

15

I115 C5 I116 D5 I117 D5 I118 D6 I119 D6 I120 D6 I121 C6

I122 E5 I124 E4 I125 F3 I126 F5 I127 F2 I128 D1 I129 E6

16

I130 F7 I131 E8 I132 E8 I133 F8 I134 F8 I136 E9 I137 E11

1714

I138 F11 I141 H2 I143 C8 I144 C8 I146 E5 I147 F7 I148 C8

18

1 2 3 4 5 6 7 8 9 1011121314

DC / DC +3V3_+1V2

100R

1K0

5104

10u

22u

10u

2122

2123

RES

2124

220u 25V

RES

6.3V

2125

330u

F111

5105

22u

2127

3149

3K3

2K2

3151

1%

1K0

3152

1%120R

RES

3100

4

BC847BPN

7100-2

I101

3

10K

3103

I102

0V

2

10K

3105

100n

2102

GND-SIG

I128

3117

33K

3118

GND-SIG

5

7104 BC847BW

1

3V3-ST

I109

6

7100-1 BC847BPN

1

GND-SIG

3101

22K

6104

I100

BAS316

F106

3102

100R

3V3

22K

10K

3107

3106

3

2

7105-1

3122

10K

I127

BC857BS

RES

DETECT1

NCP5422ADR2G

F100

I107

2103

GND-SIG GND-SIG

I124

1

7105-2

BC857BS

2

I125

6

3158

100K

F114

F115

I106

I108

100n

GND-SIG

4

3

22K

2100

100n

2101

GND-SIG

3164

4

7

10

8

9

13

330R

10R

3108

I103

1u0

22R

3109

7103

14

Φ

VCC

BST

1

VFB

2

1

COMP

2

ROSC

39K

3119

3120

5

F105

1

H1

GATE

2

L1

16

H2

GATE

15

L2

5

+1

6

-1

IS

12

+2

11

-2

GND

3

I146

1K0

3121

I126

1K0

6101

PDZ9.1-B

12V UNDER-VOLTAGE DETECTION

7101-1

I112

3110 22R

I115

I116

78

FDS6930B

2

1

2108

3n3

I113

4

4R7

3114

3113

3130

2K7

I111

+12VF

3115

3116

22R

I117

I118

I120

2105

3128

2K7

3129

I122

1K0

100n

2106

2132

56

3

22R

100n

BAS316

1u0

7101-2

FDS6930B

3124

4R7

3125

4R7

3126

1K0

F103

3131

6100

10u

22u

RES

2104

2107

VSW

I121

2

2109

3n3

7102-2

56

4

3

I119

FDS6930B

F102

2K2

3127

3137

6K8

F104

2K2

I129

3142

68R

3143

68R

I147

6103

I130

3

7106

BC817-25W

2

BOOSTER

+1V2-PNX85XX

78

FDS6930B

1

BAS316

F107

12V/3V3 CONVERSION

F101

22R

7102-1

3136

6K8

3132

RES

I144

1n0

2113

RES

I114

1n0

2115

RES

12V/1V2 CONVERSION

3139

RES

2128

RES

2130

F113

RES

6102

PDZ18-B

470R

2131

100n 3156

3157

1

RES

5100

10u

5101

10u

22u

3133

RES

I143

100n

2114

I148

1K0

3135

RES

5102

10u

5103

10u

6K8

22R

3140

3141

RES

I131

I132

1n0

2129

100n

I133

I134

1n0

1K0

3153

3154

15K

GND-SIG

2112

2111

2110

F112

2119

10u

3n3

2120

1u0

2121

3144

120R

1%

1K0

3155

1%

GND-SIG

22u

3n3

6K8

22R

3134

22u

2141

2140

RES

F108

RESFRES

RES

2116

2117

2118

*

10R

3138

10u

RES

F109

I136

3146

10K

3148

10K

7107-1

BC847BS

F110

7107-2

BC847BS

6

3145

2

I137

1

3147

3

I138

5

4

3150

220u 25V

+12VF

+12V

+3V3

+1V2-PNX85XX

+3V3F

SENSE+1V2-PNX85XX

ENABLE-3V3

PROT-DC

19

20

A

B

C

A

D

B

E

C

G

D

H

E

I

J

F

K

G

L

100p

2133

2134

M

H

GND-SIG

4K7

3160

3159

470R

1%

GND-SIG

N

12345678910

O

P

1

2

I141

100p

2135

100n

GND-SIG

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

H

M

N

11 12 13 14

" X100 ~ X199 "

1X05

REF EMC HOLE

1X06

REF EMC HOLE

Round screw hole of 4.02mm

3

4

510

6 18

1X12

REF EMC HOLE

1X02

REF EMC HOLE

Round screw hole of 4.5mm

987

1X07

REF EMC HOLE

11

1X03

REF EMC HOLE

Oval screw hole of 5mm x 4.02mm

12

1X08

REF EMC HOLE

13

14

DC343514

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-1623

Kailash

NAME

SV

1

CHECK DATE

15

********EMANTESNHC

PCB SB SSB BD

TV543_2K9

**** *** *****

SUPERS.

2008-10-17

16

17

1

1 2008-12-16

3139 123 6443

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

13010

19

01

20

18440_500_090223.eps

O

2009-01-16

P

A2

090224

2009-Aug-07

Circuit Diagrams and PWB Layouts

SSB: DC/DC +3V3 +1V2 Standby

EN 93Q548.1E LA 10.

1

A

1M95 D1

B

1M99 B1 2200 C1 2201 C1 2202 C2

C

D

A

E

F

G

1M99

1 2 3

B

4 5 6

FROM PSU

7 8

9 10 11 12

1-1735446-2

C

H

D

I

E

1 2 3 4 5 6 7 8

FROM PSU

9 10 11

1-1735446-1

J

K

F

owner.

is prohibited without the written consent of the copyright

L

2203 C2 2204 D2 2205 D3 2206 E1 2207 E2

2208 E2

2210 B6 2211 D4 2212 B9

2213 B9 2214 B9 2215 B12 2216 C13 2217 B12

2218 B12 2219 C10 2220 D2 2221 F9 2222 F9

2223 F9 2224 F12 2225 F12 2226 F13 2227 F13

5

2228 F13 2229 F13 2230 E2 2231 C1 2232 C2

2233 B6 2235 C32209 B5 2236 C2 2237 C2 3200 B1

6

3201 B1 3204 D2 3207 B10 3208 C11 3210 C12

78

3211 C12 3212 B14 3213 B13 3214 C13 3215 C14

3221 G12 3222 G12 3223 F13 3224 F12 3225 C5

3226 C5 3227 C6 3228 D6 3229 D6 3230 D6

3231 D6 3232 D4 3233 E4 3234 E5 4201 B2

4202 C2 5203 B9 5204 B11 5221 F9 5222 F11

102

1234567

DC / DC +3V3-STANDBY_+1V2-STANDBY

7201

10K

I212

5

10K

I213

6

I215

1

BC847BPN(COL)

1

3

LD3985M122

INH BP

3228

3230

2

7224-1

5

OUTIN

I202

4

COM

2

4

7223-2

BC847BPN(COL)

I218

3227

3

220K

6K8

10K

I217

+1V2-STANDBY

F218

1u0

2233

100n

2210

4

I219

7224-2

BC847BPN(COL)

5

RES

10K

3229

F227

3K3

3231

3

DETECT-12V

3V3-ST

1M95

+3V3-STANDBY

F228

F201

F202

F203 F204 F205 F206 F223 F224 F225 F226

2200 100p

F207 F208 F209 F210 F211 F212 F213 F214 F215

F216

F217

68R3200 68R

3201

4201 4202

100p2201

2231 100p

GNDSND

RES

2206

100n

RES

100p2203

100p

2232

RES

1n0

2220

3204 68R

RES

100n

2207

2208

100n

RES

GNDSND

10n2235

100p

2202 100p

2203

2203 100p

RES

2204 1n0

2205 1n0

1n02230

RES

+3V3-STANDBY

STANDBY

+12V

+AUDIO-POWER

+12VD

LAMP-ON-OUT

BACKLIGHT-OUT

BACKLIGHT-BOOST

POWER-OK

SCL-SET

SDA-SET

+1V2-STANDBY

3232

3233

10K

I214

6225

PDZ8.2-B

1K0

2211

2

1u0

2209

+12V

1u0

3225

3226

6

7223-1 BC847BPN(COL)

1

I216

3234

22K

6217 B12 6225 D4 7201 A6 7202-1 B10 7202-2 C10

DC / DC

+12V

DC / DC

+12V

11

7203 B14 7204 D10 7222-1 E10 7222-2 F10 7223-1 D5

5203

33R

5221

33R

2212

2221

7223-2 C6 7224-1 E6 7224-2 C7 F201 B1 F202 B1

9

10u

2213

10u

2222

12

13

14

15

164

17

18

193

209

A

RES

I216 D5 I217 D6 I218 C6 I219 C6

F230

ENABLE-3V3

15

+5V5-TUN

+5V

PROT-DC

4121018

F220

I206

3213

3K9

1K0

3215

F221

7203 BC847BW

3212

10K

B

C

D

A

E

B

F

C

G

H

D

F203 B1 F204 B1 F205 B1 F206 B1 F207 D1

F208 D1 F209 D1 F210 D1 F211 D1 F212 D1

F213 D1 F214 E1 F215 E1 F216 E1 F217 E1

F218 B6 F219 B12 F220 B14 F221 D14 F222 F12

F223 B1 F224 B1 F225 C1 F226 C1 F227 D6

F228 B1 F229 B12 F230 B15 F231 F12 I202 B6

I203 B9 I204 B10 I205 B11 I206 B14 I207 D11

11

7202-1

1

2

INH

SYNCSWVFB

4

7202-2

10 11

2219

100n

GND

VIA

6

A

SW

VIN

HSPA

9

8

3208

100K

5204

+3V3

F219

10u

2215

RES

3210

I205

7

35

I207

6217 SS36

2218

100K

25V220u

RES

2216

4n7 3214

10u

2217

F229

1%

1K0

3211

18K

ST1S10PH

RES

I204

3207

I203

100K

10u

2214

ST1S10PH

RES 7204

PDTC144EU

I210 F9 I212 C5 I213 D5 I214 D4 I215 E5

13

1%

I

E

7222-1

1

I210

10u

2223

ST1S10PH

10u

ST1S10PH

A

INH

VIN

SYNCSWVFB

GND

4

7222-2

10 11

VIA

6

SW

HSPA

928

5222

7

35

F222

2u0

4n7

2225

4K7

3221

RES

3224

3222

1%

100K

1%

1K0

22u2224

2226 22u

F231

3223

2227

22u2228

220u 25V

2229 22u

RES

1%470R

+1V2-PNX5100

SENSE+1V2-PNX5100

J

K

F

L

G

M

H

N

MULTI 12NC : 3139_123_64421 / 64541 / 64561

G

M

H

N

BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

O

12345 14 15

P

2

3 1715

5

64

7 13

6 7 8 9 10 11 12 13

" X200 ~ X299 "

8

9

10

11

12

14

DC343514

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-1623

NAME

Kailash

SV

1

CHECK DATE

********EMANTESNHC

PCB SB SSB BD

TV543_2K9

**** *** *****

SUPERS.

2008-10-17

16

2009-Aug-07

O

2009-01-16

1

2008-12-16

1

3139 123 6443

P

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

0213010

191

A2

20

18440_501_090223.eps

090224

Circuit Diagrams and PWB Layouts

EN 94Q548.1E LA 10.

SSB: Front End

12345678

1

A

B

C

D

E

F

G

H

I

J

K

L

A

B

C

+5V5-TUN

D

E

1XXX

*

HD1816 MK1

RF-IN

F

DC_PWR

NC1

RF_AGC

NC2

AS SCL SDA

TUNER

XTAL_OUT

4XXX

RES

TUNER

XTAL_OUT

IF_OUT1 IF_OUT2

4XXX

RES

RF-IN

DC_PWR

RF_AGC

IF_OUT1 IF_OUT2

+5V

MT MT

1XXX

*

HD1816

MT

NC1

NC2

AS SCL SDA

+5V

A312

MT

G

H

I

J

K

owner.

is prohibited without the written consent of the copyright

L

M

N

O

P

MULTI 12NC : 3139_123_64421 / 64541 / 64561

BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

1

1234567

2

54

1

1u0

2336

* I…C ADRESS C0

2302

*

4n7

F317 F318 F319 F320 F321 F322 F323 F324 F325 A310 A311

MK2

3386

4R7

7307

LK112SM50

OUTIN

SHDN BP

COM

2

ANTENNA-SUPPLY

RES

4316

2358 4n7

*

3

FRONT END

+5V

RES

5309

F306

3

100n

2337

2363

2360 10n

*

4302

*

4303

*

2369

2304

4u7RES

4n72359

4304

RES

RES 5302

1

820n

2

3

4323

3306

0R05

RES

3307

4u7

2u2

+5V-TUNER

5301

2305

100n

I

GND

OFWX6966M

510R

4

+5V-TUNER

30R

16V47u

1303

36M125

4

O1 O2IGND

+5V-TUNER

3301

2301

RES 5310

30R

5 4

2307 10n

1300 E6

910111213141516

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

A

B

I324

7308

OUTIN

COM

1

F301

TDO

F302

TCK

F303

TMS

F304

TDI

F305

DRX3926K-XK-A3

2331

12p

1304

2332

12p

I322 I323

100n

47R 47R3399

3370

F337

10K

10K3376

2311

3318

RES

120R

7303

49

XI

27M

50

XO

40 39

47

P

48

PD

N

32

RSTN

31

SAW_SW

23

SCL1

24

I2C

SDA1

62

SCL2

61

I2C

SDA2

59

TCK

60

TDI

57

TDO

58

TMS

4

GPIO1

30

GPIO2

66 67 85 68 69 70 71 72 73 74

VIA

75 76 77 78 79 80 81

83

10u

2312

+3V3A

+3V3E

37

425236468

VDDAH_AFE1

VDDAH_CVBS

VSSAH_AFE1

VSSAH_CVBS

38

415135

SIF-GND

10u

2314

2313

5305

30R

2321

5306

30R

2323

2325

+3V3B

+3V3D

+1V2A

53

18

26

VDDH VDDL

VDDAH_OSC

VDDAL_AFE1

VDDAL_AFE2

Φ

DEMODULATOR

VSSH VSSL

VSSAL_AFE1

VSSAL_AFE2

VSSAH_OSC

45717

25

54

2315

2316

100n

2u2

100n

2322

2u2

2324

100n

2326

+1V2

16

27

2

3

15

28

56

55

100n

2327

MSTRT

MD

RF_AGC

IF_AGC

I2S

VSYNC

MERR MCLK

MVAL

CVBS

65

2317

2u2

SIF

DA CL

WS

VIA

GND_HS

5304

10u

100n

5307

10u

2u2

2328

5

MSTRT

6

MERR

9

MCLK

10

MVAL

11

MD0

0

12

MD1

1

13

MD2

2

14

MD3

3

19

MD4

4

MD5

20

5

21

MD6

6

22

MD7

7

33 34

44

43

64 63

1

29

84

86 87 88 89 90 91 92 93 94 95 96 97 98

99 10082 101

100n

2318

2319

100n

2u2

2329

2330

100n

+3V3B

10K

3396

3394

3393

3395

3397RES

RES

F339

I301

2353 100n

3357

10K

RES

2346

I307

22u

3345

10K

3349

150R

2320

3348

18K

2

F308

2u2

F309

F310

F311

3355

3311 100R

3346

+1V2

+1V2A

+3V3E

+3V3D

+3V3A

3308-4

4 3308-3 3308-2

2747R 3308-1

18 3309-4 3309-3

36 3309-2 3309-1 3310-4

45 3310-3 3310-2

2747R 3310-1

18

18K

2

3358

150R

+5V-TUNER

7345-2

BC847BPN(COL)

470R

I308

5

6

7345-1 BC847BPN(COL)

1

3347

150R I306

3356

6

7312-1 BC847BPN

1

5

47R 47R36

47R

FE-DATA(0)

5

47R4

FE-DATA(1)

47R

FE-DATA(2)

47R2

7

FE-DATA(3)

47R18

FE-DATA(4)

47R

FE-DATA(5)

47R36

FE-DATA(6) FE-DATA(7)

47R

4

470R

I303

BC847BPN 7312-2

5

3

3359

150R

2354

22u

2345

4

3

3391

18R

F315

4314

BC857BS

RES

7314-1

3362

RES

2

100R

F314

4315

RES 3363

5

100R

+5V-TUNER

3p3

+5V-TUNER

150R3361RES

3360 150RRES

1

6

4

BC857BS 7314-2

RES

3

FE-VALID

FE-DATA(0:7)

RF-AGC

I325

3392

68R

CVBS-TER-OUT

FE-SOP

FE-CLK

IF-AGC

SIF

CVBS

B

C

D

E

D

F

E

G

F

H

I

G

J

H

K

L

I

M

J

N

K

2009-01-16

O

P

A2

L

18440_502_090223.eps

14

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-1623

Wang Bing Bing

NAME

SV

DC343514

1

CHECK DATE

15

********EMANTESNHC

PCB SB SSB BD

TV543_2K9

**** *** *****

SUPERS.

2008-10-17

16

17

1

1 2008-12-16

3139 123 6443

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

18

13010

19

03

20

5313

RES

10K

4319

F312 F313

6302

BZX384-C6V8

+5V-TUNER

3387

I328

3372

I329

3375

RES 30R5308

32

30R

2344

100n

3354

22R

RES

3302 10K

RES

ANTENNA-SUPPLY

2355

100n

100K

3377

100K

+12V

7316-1

84

3

LM393PT

2

27K

+12V

7316-2

84

LM393PT

5

6

4K7

LD1117DT12

2334

3398

I327

1

7

+1V2-PNX85XX

+3V3

7309

6K8

22n

I313 I314

18p

2341

2342

4318

3303

220R

22p

2308

2370

3304

220R

6K8

3305

22n

22K

2335

3XXX

RES

PDN

N Y Y N N N N Y Y Y N N Y Y N NY N

N N N N

RES

4320

2364

10n

2367

10n

10n2306

2362 100n

*

2350 100n

*

A328 A329

4307

4308

*

not in Arch2K8

UPC3221GV-E1

5311

820n

100n2349

4306

*

4312

*

4313

*

7302

2 INPUT1

3 INPUT2

4VAGC

33AA

560R

4321

RES

33AC

560R

4322

RES

*

AGC CONTROL

2351 100n

F327

F332 F333 F334 A322 A323 F335

2361 100n

*

+5V-TUNER

ANT_PWR B1 RF_AGC SCL SDA B2 VTU_TP NC IF_AGC DIF2 DIF1 AIF

100n

A325

2352

*

1

VCC

GND1

8

2365

10n

470R

33AB

2368

10n

LG1

Pend new 12nc

TUNER

4317

100n

2300

*

7OUTPUT1

I318

I319

6OUTPUT2

RES

GND2

+5V-TUNER

5

A327

2366

RES

4324 4325

+3V3A

100n

RFS

LGI

*

1300

Y N

1301

N

2302 2349

Y Y

2350 2351

Y

2352

Y

2358

N

2359

N N

2360

Y

2361

Y

2362 4302

N N

4303 4304

Y 4306 4307

Y 4308

YN 4312

Y

4313

Y

4317

Y4318

1XXX

MTMT

*

TDTC-G321D

3316 3317

A324

2p2

5303

A326

220K

ANTENNA-CTRL

+5V

47R 47R

2309

100p

680n

2310

100p

F316

LK112M33TR

54

1

SHDN BP

1u0

2371

RF-AGC

SCL-TUNER SDA-TUNER

IF-N

IF-P

IF-AGC

I321

PDP

+12V

3364

4K7

22n

2357

F338

COM

OUTIN

2

3

2372

100n

IF-P IF-N

PDP

PDN RESET-SYSTEM

SCL-SSB SDA-SSB

SCL-TUNER SDA-TUNER

ANTENNA-CTRL

RESERVED

+5V-TUNER

2

1

3

6301

BAS316

+3V3

+3V3B

2u2

2373

TUNER BOUNDARY SCAN

+3V3B

3350

3351

3352 10K

3353 10K

+3V3B

4K73365

3388 4K7

18p2347

RES

2348 18p

3366

+3V3B

4K7

2356

100n

4

7315 BCP56

I326

3389

2R2

3367

2R2

3369

3368

220R

I331

3371

3373

3374

RES

F336

220R

27K

10K

2K7

" X300 ~ X399 "

5

63

7

8

9

10

11

8 9 10 11 12 13 14 15 16

12

132

1301 D1 1303 G3 1304 E11 1306 F1 2300 F6 2301 C4 2302 E2 2304 D3 2305 D3 2306 G4 2307 G4 2308 G7 2309 G8 2310 G8 2311 C12 2312 C12 2313 C12 2314 C13 2315 C13 2316 C13 2317 C13 2318 C14 2319 C14 2320 C14 2321 C13 2322 C13 2323 C13 2324 C13 2325 D13 2326 D13 2327 D13 2328 D13 2329 D14 2330 D14 2331 E11 2332 E11 2334 F11 2335 H7 2336 C2 2337 C2 2341 E7 2342 E7 2344 C11 2345 H15 2346 H14 2347 G10 2348 G10 2349 E5 2350 E5 2351 F5 2352 F5 2353 F14 2354 G16 2355 H10 2356 H9 2357 H8 2358 E2 2359 E2 2360 E2 2361 F5 2362 E5 2363 E2 2364 H4 2365 H6 2366 H6 2367 H4 2368 H6 2369 C3 2370 G7 2371 C8 2372 C9 2373 C9 3301 C4 3302 E10 3303 G7 3304 G7 3305 H7 3306 H3 3307 H3 3308-1 E15 3308-2 E15 3308-3 E15 3308-4 E15 3309-1 F15 3309-2 F15 3309-3 E15 3309-4 E15 3310-1 F15 3310-2 F15 3310-3 F15 3310-4 F15 3311 G15 3312 H7 3313 H7 3316 D7 3317 D7 3318 C12 3345 I14 3346 H15 3347 I15 3348 H15 3349 I14 3350 D10 3351 D10 3352 D10 3353 D10 3354 D11 3355 F15 3356 F15 3357 G14 3358 G15 3359 G15 3360 I16 3361 I16 3362 I15 3363 J15 3364 H9 3365 E10 3366 G10 3367 I10 3368 I9 3369 I10 3370 I11 3371 I10 3372 I10 3373 J10 3374 J10 3375 J10 3376 I11 3377 H10 3386 B2 3387 H10 3388 E10 3389 H10 3391 I15 3392 I16 3393 E14 3394 E14 3395 E14 3396 E14 3397 E14

3398 F11 3399 F11 33AA H5 33AB H5 33AC H5 4302 E2 4303 F2 4304 F3 4306 E5 4307 F4 4308 F5 4312 E5 4313 F5 4314 I15 4315 J15 4316 E2 4317 F7 4318 F7 4319 F10 4320 H4 4321 H5 4322 I5 4323 G3 4324 G7 4325 G7 4326 F1 4327 F1 5301 D3 5302 G3 5303 G8 5304 B14 5305 C12 5306 C12 5307 D14 5308 B11 5309 B3 5310 D4 5311 H4 5313 B10 6301 H9 6302 H10 7302 G5 7303 E12 7307 B2 7308 B11 7309 B9 7312-1 G15 7312-2 G16 7314-1 I15 7314-2 J16 7315 H9 7316-1 I11 7316-2 J11 7345-1 I15 7345-2 H15 A310 E2 A311 F2 A312 F1 A322 E5 A323 F5 A324 G7 A325 F6 A326 G7 A327 G6 A328 E4 A329 F4 F301 D11 F302 D11 F303 D11 F304 D11 F305 D11 F306 B3 F308 B15 F309 C15 F310 C15 F311 D15 F312 F10 F313 F10 F314 J16 F315 I16 F316 H8 F317 E2 F318 E2 F319 E2 F320 E2 F321 E2 F322 E2 F323 E2 F324 E2 F325 E2 F327 E5 F332 E5 F333 E5 F334 E5 F335 F5 F336 G10 F337 I11 F338 J8 F339 E14 I301 F14 I303 F15 I306 I15 I307 H14 I308 H15 I313 D7 I314 D7 I318 G6 I319 G6 I321 H8 I322 F11 I323 F11 I324 B11 I325 G16 I326 H9 I327 H11 I328 I10 I329 J10 I331 I9

090224

2009-Aug-07

Circuit Diagrams and PWB Layouts

EN 95Q548.1E LA 10.

SSB: PNX8543 - Power

1234567891011121314151617

1

A

B

C

D

E

F

G

H

I

J

K

L

A

B

C

D

E

F

+1V8-PNX85XX

+1V2-PNX85XX

+3V3F

10u

2603

5600

+3V3

33R

G

H

I

7600-10

J

PNX85439E

K

is prohibited without the written consent of the copyright

owner.

L

M

V14

U6

AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 P18 AA5 AB31 AB4 AB5 AC31 AC33 AE6 AF33 AG31 AH29

VSS

AH6 AJ15 AJ24 AJ25 AJ29 AJ33 AJ5 AJ9 AK10 AK13 AK23 AK25 AL1 AL2 AL3 AL30 AM1 AM18

N

O

P

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

1

2

1234

PNX8543 - POWER

7601

LD1117DT18

32

OUTIN

COM

100n

2601

2604

2606

F601

2607

V15

AM2

V16

AM21

1

I600

1u0

100n

2605

6.3V330u

C600

SENSE+1V2-PNX85XX

330u 6.3V

V18

AM31

V19

AM32

V20

AM33

W14

AM34

W18

W15

W16

W19

W17

VSS

AN1

AP33

AN32

AN33

AN34

V17

AM22

3

F600

2602

RREF-PNX85XX

W20

Y15

Y16

Y14

B34

D13

D12

AP34

2600 C4 2601 C2 2602 C4 2603 C2 2604 D2 2605 D3

8 1513

2612

100n

2693

RES

+1V2-PNX85XX

100n

2614

2613RES

2615RES

RES

100n

1u0

RES

100n

2623

2624

5602

33R

2627

100n

5627

33R

100n

26A4

26A3

5601

33R

100n

2629

2628

5604

33R

100n

2631

10u

22u

2626

26A1

F607

1u0

2637

100n

2636

+1V2-PNX85XX

F609

1u0

2640

100n

2641

87

2625

2699

26A2

2630

+3V3-PER

5611

9

100n

2616

RES

100n

10u

100n

33R

100n

2617

2618

RES

F602

I616

F625

F603

5610

F608

33R

1u0

2638

2639

F610

1u0

2642

2643

RES

9

7 8 9 1011121314151617

2608

2621

100R

1u0

2609

1u0

2622

+3V3-STANDBY

+1V2-PNX85XX

+3V3

7

2610

100n

2611

100n

2692

2691

RES

+3V3

5608

33R

5609

33R

53

+1V2-PNX85XX

+1V2-STANDBY

+1V8-PNX85XX

10u

22u

2600

7602

LD1117

5603

+3V3

33R

10u

2697

RES

+1V2-PNX85XX

RREF-PNX85XX

I615

Y20

Y33

Y17

Y18

Y5

Y6

Y19

5626

33R

5605

33R

5607

+3V3

33R

VSS

E18

E12

D17

D18

F5F7F8

E3

E4

F22

F30

F21

F27

F29

K2

H6

G6

G5

G29

5

2 4

3

OUTIN

COM

3601

1

F605

100n

2632

100n

2633

F606

100n

2634

2635

L5 M2 N5

P14 P15 P16 P17

P19

P2

P20 P21 P33 R14 R15 R16 R17 R18

VSS

R19 R20 T14 T15 T16 T17 T18 T19 T20 T31 U14 U15 U16 U17 U18 U19 U20 U33

L33

6

56

10

100n

2620

2619

7600-9

PNX85439E

AJ12 AJ13 AJ14 AJ20 AJ23 F18 F19 F20 F25 F26 F9 K30 L30 U30 V30 V6

AF5 AF6 AG5 AG6

AC6 AD6

P6 R6 H5

T5

F604

100n

T3 L6 M6 N6 T6

D16 E17

F16 E16 C13 C17

E13

E14

AJ26

100n

F17

D4 K6

VDD_1V2_CORE

VDD_1V2_SBCORE

VDD_3V3_SBPER

VDDA_3V3_VID_1_1 VDDA_3V3_VID_1_2 VDDA_3V3_VID_4 VDDA_3V3_DCSCCO VDDA_1V2_DCS_A

VDDA_1V2_VID

VSS_CL

VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_2 VDDA_HDMI_3V3_BIAS VDDA_3V3_HDMI_PLL_2 VDD_1V2_HDMI_1 VDD_1V2_HDMI_2 VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_1 VDDA_3V3_HDMI_PLL_1

VPP_ID_8542 VPP_ID_8543 VDDA_3V3_VIDOUT VDDA_1V2_ADC4A

112

12

VDD

AH30

AG30

VDD_1V8_DDR

R21

" X600 ~ X699 "

1110

13

+3V3-PER

VDD_3V3_PER

VDDA_1V2_CAB

VDDA_3V3_MCAB

JTAG_VSST1

VDDA_1V2_USB_PLL

VDDA_3V3_USB

GNDA_USB

VDDA_1V2_LVDS_PLL

VDD_3V3_LVDS

VDDA_3V3_LVDS

VDDA_1V2_AADC VDDA_3V3_AADC

VDDA_3V3_ACT

VDDA_3V3_ADAC

VDDA_1V2_DLL

VDDA_3V3_DDRPLL0

VSSA_DDRPLL0

VDD_1V2_DDRPLL0

VSS_DDRPLL

VSSA_DLL

T21

T30

V21

R30

U21

W21

14

AJ21 AJ22 AJ27 AJ28

AJ8 F10 F23 F24 F28

F6

H29

J29

J6

W6

AA6 AB6

AM3

AK17

AJ17

AJ16

AJ18 AK20 AK21 AK24

AL21

AJ19

AJ7 AJ6 AK8 AK12

Y30

AJ30

P30

AF30D14

AC30 AD30

AB30 AA30

W30

0

AK30

1

N30

4

AE30

7

Y21

2682

100n

DC343514

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-1623

NAME

Vincent Yap / Lee CW

SV

144 15

100n

RES

2645

RES

2644

2684

100n

2683

1

CHECK DATE

RES

100n

16

100n

RES

2648

2647

2646

I614

2657

2696

2694

2695

100n

PCB SB SSB BD

TV543_2K9

SUPERS.

16

RES

2649

2667

RES

2685

100n

5618

33R

100n

2668

100n

2008-10-17

100n

RES

2650

2664

RES

F619

100n

2686

**** *** *****

100n

RES

2651

+1V2-PNX85XX

2665

100n

1u0

2669

VDDA-DAC

VDDA-ADC

2674

2687

100n

********EMANTESNHC

17

100n

2652

2653

I613

F616

100n

2666

100n

F620

100n2673

100n

2676

100n

2675

100n

2678

2680 100n

2688

2689

100n

17

1864

19

20

A

F611

5612

+3V3

100n

2654

2655

100n

2658

2659

5616

33R

100n

2663

5620

+1V2-PNX85XX

33R

2656 1u0

F612

5617

+3V3

33R

1u0

+1V2-PNX85XX

VDDA-LVDS

F617

F618

RES

2670

5613

+1V2-PNX85XX

33R

1u0

100n

2660

2661

F615

5614

+3V3

33R

100n

2662

5615

+3V3

33R

5619

+3V3

33R

1u0

2671

100n

B

C

D

E

F

5621 33R

F621

100n

2672

F622

100n

2677

100n

F623

1u0

2679

F624

2681 100n

F626

2690

1u0

VDDA-AUDIO

33R5622

VDDA-AUDIO

G

5623

+1V2-PNX85XX

33R

5624

+3V3

33R

5625

+1V2-PNX85XX

33R

+1V8-PNX85XX

H

I

J

K

L

M

N

O

1

2009-01-16

1 2008-12-16

3139 123 6443

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

1812

13010

19

04

20

P

A2

2606 D2 2607 E2 2608 A6 2609 A6

A

2610 A6 2611 A6 2612 A7 2613 A7 2614 A7 2615 A7 2616 A7 2617 A8 2618 A8 2619 A8 2620 A8 2621 B6

B

2622 B6 2623 C7 2624 C7 2625 C7 2626 E7 2627 C7 2628 D7 2629 D7 2630 E7 2631 D7 2632 E5 2633 E5

C

2634 F5 2635 F5 2636 F7 2637 F7 2638 F8 2639 F8 2640 G7 2641 G7 2642 G8 2643 G8 2644 B12

D

2645 B13 2646 B13 2647 B13 2648 B13 2649 B13 2650 B14 2651 B14 2652 B14 2653 B14 2654 B15 2655 B15 2656 B15

E

2657 C13 2658 C14 2659 C15 2660 B16 2661 B16 2662 C16 2663 C15 2664 D14 2665 D14 2666 D14 2667 D14 2668 D14

F

2669 D14 2670 D16 2671 D16 2672 F15 2673 F14 2674 F14 2675 F14 2676 F14 2677 F15 2678 G14 2679 G15

G

2680 H14 2681 H15 2682 H12 2683 H12 2684 H13 2685 H13 2686 H14 2687 H14 2688 H14 2689 H14 2690 H15 2691 B6

H

2692 B6 2693 B7 2694 H13 2695 H13 2696 H13 2697 D5 2699 C7 26A1 E7 26A2 D7 26A3 C7 26A4 C7 3601 D6

I

5600 C2 5601 D7 5602 C7 5603 D4 5604 D7 5605 E5 5607 F5 5608 E6 5609 F6 5610 F8 5611 G7

J

5612 A15 5613 B16 5614 C16 5615 D16 5616 C15 5617 B15 5618 B14 5619 D16 5620 D15 5621 E15 5622 E15 5623 F15

K

5624 G15 5625 G15 5626 E5 5627 C7 7600-10 G2 7600-9 B9 7601 B3 7602 D5 C600 E3 F600 C4 F601 E2 F602 C8

L

F603 D8 F604 E8 F605 E6 F606 F6 F607 E7 F608 F8

18440_503_090223.eps

F609 F7 F610 G8 F611 A15 F612 B15 F615 C16 F616 C14 F617 D15 F618 D15 F619 D14 F620 E14 F621 E15 F622 F15 F623 G15 F624 G15 F625 D8 F626 H15 I600 C3 I613 B14 I614 B13 I615 G4 I616 C8

090224

2009-Aug-07

Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Video/LVDS Out

EN 96Q548.1E LA 10.

2

3

4

5

6

7

8

91413

10 11 121

A

1234

B

PNX8543 - VIDEO STREAMS / LVDS OUTPUT

56

789101112

A

C

7600-5

PNX85439E

LVDS

B

D

E

C

F

7600-11

Y29

W29

AA29

AB29

AC29

PNX85439E

Y4 R2 C4 R4 T4 W4

W5 F11 F12 F13 F14 F15 C14 AJ11 AL12 AK15

AD29

AE29

NC NC

AL25

AL17

AP21

AN21

AN25

AM25

AM26

AP30

AN26

AN31

AP26

AP31

AM27

AP32

AN27

K31

M30

AK28

AL28 AM28 AK29

AL29 AM29 AN29

K29

L29

M29

N29 P29 R29 T29 U29 V29

AF29

AG29

AM30R5AN30

NC

AL26

AP25

AK26

D

G

IREF_LVDS

CLK

LOUT2_A

LOUT2_B

LOUT2_C

LOUT2_D

LOUT2_E

LOUT2_CLK

VDDA-LVDS

12K

3700

F700

AK19

AN18

N

A

AP18

P

AK18

N

B

AL18

P

AN19

N

C

AP19

P

AN20

N

D

AP20

P

AL20

N

E

AM20

P

AL19

N

AM19

P

AN22

N

AP22

P

AK22

N

AL22

P

AN23

N

AP23

P

AN24

N

AP24

P

AL24

N

AM24

P

AL23

N

AM23

P

F702 F703

F704 F705

F706 F707

F708 F709

F710 F711

F712 F713

RX51001A-

RX51001A+

RX51001B-

RX51001B+

RX51001C-

RX51001C+

RX51001D-

RX51001D+

RX51001E-

RX51001E+

RX51001CLK-

RX51001CLK+

RX51002A-

RX51002A+

RX51002B-

RX51002B+

RX51002C-

RX51002C+

RX51002D-

RX51002D+

RX51002E-

RX51002E+

RX51002CLK-

RX51002CLK+

171615

18

19

20

A

3700 B6 3707-1 F6 3707-2 F6 3707-3 F6 3707-4 F6 3708-1 F6 3708-2 F6 3708-3 F6 3708-4 F6

A

3709-1 F8 3709-2 G8 3709-3 F6 3709-4 G6 3710 G7 3711 H1 3714 H2 4700 H6 4701 H2 4702 G4 7600-11 B2 7600-12 F5

B

7600-5 B5 F700 B6 F701 H2 F702 C7 F703 C7 F704 D7 F705 D7 F706 D7 F707 D7 F708 D7 F709 D7 F710 D7

C

F711 D7 F712 D7 F713 E7

B

C

D

E

F

D

G

H

E

I

F

J

G

K

owner.

is prohibited without the written consent of the copyright

L

H

M

I

N

7600-12

E33 C32 B32 J30 K34 K33 H30 J33

E34

D34

D10 E10 A9 A11 C11 D11 E11 A10

C12

B10

B9

C10

PNX85439E

0 1 2 3

CA_MDO

4 5 6 7

CA_MOSTRT

CA_MOVAL

CA_MOCLK

0 1 2 3

TNR_TSDI

4 5 6 7

TNR_ERROR

TNR_MICLK

TNR_MISTRT

TNR_MIVAL

TUN_CA

CA_DATA

CA_MDI

CA_MISTRT

CA_MIVAL

CA_MICLK

CA_ADD_EN

CA_CDN

CA_OOB_EN

CA_RDY

CA_RST

CA_VCCEN

CA_VPPEN

CA_VSN

G33

0

G31

1

G30

2

H34

3

F34

4

F32

5

F31

6

G34

7

J31

E32

H32H31

B31

K32

0

A32

1

D31

DIR

A31

EN

C31

J34

C34

C33

A33

J32

0

A34

1

3708-1 1 8

36

3708-3 47R

453708-4 47R 27

3708-2

4700

2747R3707-2

47R

45

3707-4 47R

18

3707-1 47R

47R

36

3709-3

3709-4

3710 33R

47R3707-3

36

47R

47R45

CA-MOCLK_VS2

+3V3-PER

CA-MDO(0:7)

CA-MDO(0) CA-MDO(1) CA-MDO(2) CA-MDO(3) CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7)

CA-MOSTRT

CA-MOVAL

CA-MOCLK_VS2

FE-DATA(0:7)

FE-DATA(0) FE-DATA(1) FE-DATA(2) FE-DATA(3) FE-DATA(4) FE-DATA(5) FE-DATA(6)

F701

3711

4K7

4701

3714

FE-ERR FE-ERR

RES

10K

FE-DATA(7)

FE-CLK

FE-SOP

FE-VALID

4702

MULTI 12NC : 3139_123_64421 / 64541 / 64561 BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

1234567

CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7

CA-MISTRT

CA-MIVAL

CA-MICLK

CA-ADDEN

CA-CD1 CA-CD2

CA-DATADIR

CA-DATAEN

IRQ-CA

CA-RST

CA-VS1

NC

813709-1 47R

3709-2

72

47R

NC

89

10 11 12

E

H

I

F

J

G

K

H

L

M

I

N

2009-01-16

2008-12-161

O

P

A2

090224

O

P

" X700 ~ X799 "

1

2

543

7

8

9

106

11

12

1413

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-16

NAME

Vincent Yap / Lee CW

SV

DC343514

********SETNAMECHN

1

2

3

PCB SB SSB BD

CHECK

TV543_2K9

**** *** *****

SUPERS.

DATE

2008-10-17

17

3139 123 6443

19

03101

05

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

181615

1

20

18440_504_090223.eps

2009-Aug-07

Circuit Diagrams and PWB Layouts

SSB: PNX8543 Audio Amplifier

EN 97Q548.1E LA 10.

1

A

B

A

C

+AUDIO-POWER

B

D

E

C

F

D

G

H

E

RESERVED FOR ITV

I

F

J

BATHROOM SPEAKER

1 2

G

K

owner.

is prohibited without the written consent of the copyright

3

502382-0370

L

H

MULTI 12NC : 3139_123_64421 / 64541 / 64561

M

BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

N

2

3 12

5

123

6

4 5 6 7 8 9 10 11 12 13 14

7

PNX8543 - AUDIO AMPLIFIER

ADAC(7)

RES

3819-2

22K

3812

5K6

4801

22K

27

I819

I822

BC847BW

1800

45

3821 100R

F800

3818

4R7

I818

1u0

6801

2800

BZX384-C6V8

3819-3

36

I821

10K

3820

AUDIO-VDD

10K

3810

I810

I811

7808

BC847BW

3814

470R

F801

100R3822

F802

1n0

EMC

2824

2825

12345

BC807-25W

22K

3819-1

18

7802 BC847BW

I823

5

22K

3819-4

4

AUDIO-VDD

10K

3811

I813

7809

3815

470R

F812

7801

I812

AUDIO-VDD

ADAC(8)

ADAC(5)

ADAC(6)

3813

5K6

ADAC(3)

ADAC(4)

ADAC(3)

2833 1u0

ADAC(4)

AUDIO-RESET

3

I833

2

3816-2

7

10K

5

I835

6

3816-3

10K

10

I836

2830

9

220p

3817-1

10K

12

I837

2831

13

220p

3817-3

10K

3835-3 22K36

27

2836 33p

7830

TPA6111A2DGN

I847

AMPLIFIER

2

1

I848

IN-

6

2

5

SHUTDOWN

I849

3

BYPASS

GND

104

AUDIO-VDD

4

7803-1 LM324

11

3816-1

18

10K 2823

33p

AUDIO-VDD

4

7803-2 LM324

11

3816-4

54

10K 2808

33p

AUDIO-VDD

4

7803-3 LM324

11

3817-2

27

10K 2809

33p

AUDIO-VDD

4

7803-4 LM324

11

3817-4

5

10K 2810

33p

33p2835

22K3835-2

VDD

Φ

GND_HS

4

9

2806

100n

1

7

8

14

4

8

1

VO

2

10

VIA

11

+3V3

F809

1K0

RES

3831

F803

1K0

3832

RES

F804

1K0

RES

3840

F805

1K0

3834

RES

1u0

2834

1

7

AUDIO-OUT-L

AUDIO-OUT-R

I850

I851

AUDIO-CL-L

AUDIO-CL-R

HP_LOUT

HP_ROUT

8

I845

3835-1 22K18

1u02832

I846

9

I814

2826

220p

2

I815

2827

220p

36

I816

3n3

2811

18

I817

3n3

2812

36

22K3835-4 4 5

3839

10K

1u02837

6789

AUDIO-RESET

F808

3830-4

45

22K

14

63

3830-3

15

7807-1 BC847BPN(COL)26

I839

3841

0R

22K

1u0

2822RES

16

10K

3833

3830-2

22K

1

27

I840

17

+AUDIO-POWER

22K

3830-1

18

5

4

7807-2

BC847BPN(COL)

F811

3

10 11 12 13 14

18

A-PLOP

A-STBY

191311

1800 G1 2800 B2 2806 A8 2808 C8 2809 E8 2810 F8 2811 D7 2812 E7 2822 C12 2823 B8 2824 G2 2825 G2 2826 A7 2827 B7

A

2830 D7 2831 E7 2832 H6 2833 H6 2834 G8 2835 G7 2836 G7 2837 H6 3810 F2 3811 F3 3812 F3 3813 F4

B

3814 G2 3815 G3 3816-1 B8 3816-2 B7 3816-3 C7 3816-4 C8 3817-1 D7 3817-2 D8 3817-3 F7 3817-4 F8 3818 B2

C

3819-1 B3 3819-2 B3 3819-3 C3 3819-4 C3 3820 C2 3821 G1 3822 G1 3830-1 B13 3830-2 C13 3830-3 C11 3830-4 C11 3831 A9

D

3832 C9 3833 B12 3834 E9 3835-1 H6 3835-2 G7 3835-3 F7 3835-4 H6 3839 H7 3840 D9 3841 C11 4801 A3 6801 B2

E

7801 B4 7802 C3 7803-1 A8 7803-2 B8 7803-3 D8 7803-4 E8 7807-1 C12 7807-2 C14 7808 F2 7809 F3 7830 G7

F

F800 G1 F801 G2 F802 G2 F803 B9 F804 D9 F805 E9 F808 C11 F809 A9 F811 C14 F812 B4 I810 F2 I811 F3

G

I812 F4 I813 F3 I814 A7 I815 B7 I816 D7 I817 E7 I818 B2 I819 B3 I821 C2 I822 C3 I823 C3 I833 A7

H

I835 B7 I836 D7 I837 E7 I839 C12 I840 C13 I845 H6 I846 H6 I847 H7 I848 H7 I849 H7

20

I850 H9 I851 H9

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

1

4

5

6

7

8

10

11

" X800 ~ X899 "

1223

139

14

DC343514

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-1623

NAME

Hor Siew Lee

SV

1

15

CHECK

********EMANTESNHC

PCB SB SSB BD

TV543_2K9

SUPERS.

**** *** *****

DATE

2008-10-17

16

17

1

1 2008-12-16

3139 123 6443

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

06

13010

1918

20

18440_505_090223.eps

O

2009-01-16

P

A2

090224

2009-Aug-07

SSB: PNX8543 Audio

Circuit Diagrams and PWB Layouts

EN 98Q548.1E LA 10.

1

A

B

A

C

B

D

E

C

F

D

G

E

H

4903 & 4904

I

F

J

G

K

owner.

is prohibited without the written consent of the copyright

H

L

MULTI 12NC : 3139_123_64421 / 64541 / 64561

BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

M

2

3

4

5

6

87

10

11 20199

12

13

14

15

16

123456789101112

PNX8543 - AUDIO

I901

I902

I903

I904

I905

I906

I907

I908

I909

I910

2926

2927

2928

2929

2930 1u0

2931

2933

2934

2935

1u0

33p

RES

2900

1u0

33p

2901

RES

1u0

33p

2902

RES

1u0

33p2903

RES

33p

RES

2904

1u0

33p

RES

2905

1u02932

33p

RES

2906

1u0

33p

RES

2907

1u0

33p

RES

2908

1u0

33p

RES

2909

VDDA-AUDIO

RES

47K

3932

SPDIF-IN

47K

3933

10u

4K7

2924

3906

2925

100n

3907

3908

I921

I916

75R

5902

33R

2910-1

5900

33R

100n 100n

2910-2

2718

I914

10u

2912

2910-4

45

7600-7

PNX85439E

AK7 AL7

AM8 AM9

AP8 AN8

AN7 AP7

AK6 AL6

AM6 AN6

AP6 AM5

AN5 AP5

U5 C19

AN15 AL14

AK14 AP15 AM15 AL15

AM14

I917

B1

I918

AM7

I919

100n

2910-3

36

L

VREF_AADC

R

NEG

VREF

POS

VRNEG AADC

L

AIN_1

R

L

AIN_2

R

L

AIN_3

R

L

AIN_4

R

L

AIN_5

R

1

SPDIF_IN

2

OSCLK SCK

SD1 SD2

I2S_IN

SD3 SD4

I2S_IN_WS

RESREF

VCOM_ADC

C1

AOUT

D3

AGND1

VDDA-AUDIO

AUDIO

AADC

I2S_IN

VDDA_3V3_DAC

VSSA_ADAC

ADAC1

ADAC3

ADAC6 N

ADAC7BUF ADAC8BUF

ADAC

SPDIF_OUT

OSCLK

I2S_OUT

I2S_OUT_SD

I2S_OUT_WS

VDDA-AUDIO

7900

10u

2919

ADAC(1)

ADAC(2)

ADAC(3)

ADAC(4)

ADAC(5)

ADAC(6)

ADAC(7) ADAC(8)

SPDIF-OUT-1

AUD_GND

10

I922

2920

LD2985BM33R

5

OUT IN

4

10n

ADAC(1) ADAC(2) ADAC(3) ADAC(4)

ADAC(8) ADAC(7)

1

3

INHBP

COM

2

3n3

2936

3n3

2922

11 12

RES

2921

I913

22K

3909

3n3

2937

2938

AUD_GNDAUD_GND

3n3

2923

+5V

10u

3910

+3V3

22K

3n3

2939

I911

8

100n

2915-2

2915-1

VDDA-DAC

1

27

AK9

AJ10

AN14 AP14

N

AL13

P

AP13 AN13

NADAC2

AM1333K27

P

AM12

AN12

N

AP12

P

AM11

AL11

NADAC4

AK11

P

AN11 AP11

NADAC5

AL10

P

AP10 AN10

AM10

P

AP9 AN9

AL9

7

AL8

8

V1

AA2

Y2

SCK

Y3

1

AA1

2

AA3

3

AA4

4

Y1

AUD_GND

I920

3911-4

3911-3 33R

3912-3 33R

3912-1

3914 33R

3911-1 33R

3915 68R

100n

2915-3

36

45

36

45

36

7

2

8

1

27

1

8

5

2915-4

4

33R

33R3912-4

33R3912-2

33R

33R3913 RES

33R3911-2

5901

F901

33R

100n

RES

F902

45

RES

6901

CDS4C12GTA

RES

6900

CDS4C12GTA

PnS SS

12V

OTHERS

YESX

X 33K33K 33K33K 33K 33KX33K

22K 100K

X

3900-4 33K

3900-1 1 8 33K

45

3904-4 33K

3904-3 3 6

4 5 33K3903-4

3903-2 33K27

3924-2

3926-1 33K18

X X

X 33K 33K 33K

33K 33K 33K 33K

33K

3900-3

36

33K

3900-2

27

33K

3905-4

4901

45

33K

3905-3

4902

36

33K

3923-4

4905

45

33K

3923-2

27

33K3924-1 1 8

33K

3925-1

4903

4906

18

33K

3925-2

27

33K

3927-1

33K3926-2 2 7

4904

33K

3927-2

7281

AUDIO-IN1-L

AUDIO-IN1-R

AUDIO-IN2-L

AUDIO-IN2-R

AUDIO-IN3-L

AUDIO-IN3-R

AUDIO-IN4-L

AUDIO-IN4-R

AUDIO-IN5-L

AUDIO-IN5-R

4901 & 4902

4905 & 4906

3904 3905 3903 3923 3924 3925 3926 3927

FLAVORS 22"

FLAVORS 32"/42"

YES

X

YES

X

X 15K 220K

100K XX X X 33K X

X

YES

22K

X

33K

123456789

I905 C4 I906 C4 I907 D4 I908 D4 I909 E4 I910 E4 I911 C9 I913 C11 I914 C7 I916 B7 I917 F7 I918 F7 I919 G7 I920 F9 I921 B7 I922 C10

18

A

B

C

D

E

F

G

H

I

J

K

L

17

2900 B5 2901 B5 2902 B5 2903 C5 2904 C5 2905 D5 2906 D5 2907 E5 2908 E5

A

2909 E5 2910-1 B7 2910-2 B7 2910-3 C7 2910-4 C7 2912 C7 2915-1 C9 2915-2 C9 2915-3 C9 2915-4 C9 2919 C10 2920 C10

B

2921 C11 2922 E11 2923 E11 2924 G5 2925 G6 2926 A4 2927 B4 2928 B4 2929 C4 2930 C4 2931 C4 2932 D4

C

2933 D4 2934 E4 2935 E4 2936 E11 2937 E11 2938 E11 2939 E12 3900-1 B2 3900-2 B3 3900-3 A3 3900-4 A2

D

3903-2 C2 3903-4 C2 3904-3 C2 3904-4 B2 3905-3 C3 3905-4 B3 3906 G6 3907 G6 3908 G6 3909 C11 3910 C11 3911-1 F9

E

3911-2 F9 3911-3 D9 3911-4 D9 3912-1 E9 3912-2 E9 3912-3 E9 3912-4 D9 3913 F9 3914 F9 3915 F9 3923-1 D3 3923-4 C3

F

3924-1 D2 3924-2 D2 3925-1 D3 3925-2 E3 3926-1 E2 3926-2 E2 3927-1 E3 3927-2 E3 3932 F6 3933 F6 4901 B4

G

4902 C4 4903 D3 4904 E4 4905 C4 4906 D4 5900 B7 5901 C10 5902 B7 6900 E2 6901 D2 7600-7 C7 7900 B11

H

F901 C10 F902 F10 I901 A4 I902 B4 I903 B4 I904 C4

M

N

O

P

" X900 ~ X999"

21

3

4

5

6

7

8

9 15

10

11

12 13

14

DC343514

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-1623

Hor Siew Lee

NAME

SV

********EMANTESNHC

1

PCB SB SSB BD

CHECK

TV543_2K9

**** *** *****

SUPERS.

2008-10-17

DATE

16

17

3139 123 6443

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

07

13010

18

1

1 2008-12-16

2019

18440_506_090223.eps

N

O

2009-01-16

P

A2

090224

2009-Aug-07

Circuit Diagrams and PWB Layouts

SSB: PNX8543 Analog AV

EN 99Q548.1E LA 10.

2A02 D3 2A03 E3 2A04 F2

A

2A06 B6 2A07 C6 2A08 D6 2A09 D5

B

C

A

D

B

E

F

C

G

D

H

E

I

J

F

K

owner.

is prohibited without the written consent of the copyright

G

L

M

H

MULTI 12NC : 3139_123_64421 / 64541 / 64561

N

BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

2A10 E11 2A11 E11 2A12 D11 2A13 E6 2A14 E6 2A15 E6 2A16 E6

2A17 F6 2A18 F6 2A19 F6 2A20 F6 2A21 F6 2A22 G6 2A23 G6

32

2A24 G6 2A25 G6 2A26 H6 2A27 H6 2A28 H6 2A29 H6 2A30 H6

2A31 F12 2A32 C11 2A33 C12 2A34 C12 2A35 B11 2A36 B12 2A37 B12

4

2A38 C11 2A39 C12 2A40 C12 2A41 F11 2A42 F12 2A43 F12 2A44 E11

2A45 E12 2A46 E12 2A47 D11 2A48 D12 2A49 D12 2A50 F11 2A51 G6

6

2A52 G11 2A53 H11 2A54 A7 2A55 B7 2A56 A7 2A57 G11 2A59 H12

2A60 H11 2A65 E9 2A66 E10 2A67 E10 2A68 F11 2A69 F11 2A70 E10

7

2A71 G6 2A72 C5 2A73 C6 2A74 C5 2A75 C6 2A76 D5 2A77 D6

8

3A06 E3 3A07 E3 3A08 E3 3A09 F3 3A10 F2 3A11 F2 3A13 D3

3A14 B5 3A15 C6 3A16 C5 3A17 C6 3A18 D5 3A19 D6 3A20 F14

9

3A21 F12 3A22 C13 3A23 C12 3A24 B13 3A25 B12 3A26 C13 3A27 C12

105

3A28 F13 3A29 F12 3A30 E13 3A31 E12 3A32 D13 3A33 D12 3A34 G14

3A35 G12 3A36 G14 3A37 G12 3A38 H14 3A39 H12 3A40 A6 3A41 A6

3A42 B6 3A43 B7 3A44 A6 3A45 B7 3A46 G14 3A47 H12 3A49 H11

121

3A50 D3 3A51 F3 3A52 E2 3A53 E2 3A54 B5 3A55 C5

4A01 D12 4A02 E12 4A03 E12 4A04 E5 4A05 E5 4A06 F5 5A00 C12

13

5A01 B12 5A02 C12 5A03 F12 5A04 E12 5A05 D12 5A06 B6 5A07 C6

4111

5A08 D6 7600-1 D3 CA01 H10 FA11 C6 FA13 B6 FA14 D3 IA03 E3

IA04 E3 IA05 F3 IA06 F3 IA07 F3 IA09 F6 IA11 G6 IA12 G53A56 D5

15

IA14 H5 IA15 H5 IA16 H5 IA17 C12 IA18 C13 IA19 F13

16

IA20 E12 IA21 F12 IA22 C12 IA24 D12 IA25 F12 IA27 H12 IA28 A6

IA29 A6 IA30 G12 IA33 F12 IA35 E3 IA43 E13 IA44 D13 IA45 H11

17

18

IA46 H12IA13 G6

19

1234567891011121314

PNX8543 - ANALOG AV

3A44

3A4218R

RES 2A73

2A75

RES

2A77

RES

3A40

10n2A13

22n2A14

22n

22n2A19

22n

22n2A22

22n2A26

22n2A28

22n2A30

IA28

IA29

FA13

56R

100p

3A15

FA11

56R

100p

3A17

56R

100p

3A19

IA09

IA11

IA13

SIF-GND

2A06

2A07

2A08

56R

22n

56R

3A41

22n 2A56

3A45

3A43

2A5422n

2A5522n

SCART

CINCH

Y Y Y

N N N N Y YYN

N Y N

N N N

Y Y Y Y N

N Y

22n

2A66 22n

2A65

*

2A67 22n

2A70 22n

*

CA01

2A10 2A11 2A12 2A41 2A44 2A47 2A65 2A66 2A67 2A68 2A69 2A70

22n2A68

**

SIF-GND

22n2A69

2A60 12p

SCART

2A32

2A12 22n

*

2A47 22n

*

2A11

* *

2A10 22n

*

2A41

*

2A35

22n

2A38

22n

22n2A44

22n

2A57 22n

IA45

3A49 390R

2A31

5A01

1u8

47R

150p

3A25

2A36

IA22

5A02

1u8

47R

150p

2A39

3A27

5A00

IA17

1u8

47R

150p

2A33

3A23

FOR CINCH

IA24

3A33

2A48

*

IA20

150p

2A45

3A31

*

FOR CINCH

IA21

3A29

2A42

*

22n

IA33

47R

3A21

22n

IA25

47R

3A35

22n2A52

47R

3A37

IA30

47R

3A47

IA27

22n2A53

47R

3A39

IA46

2A59

2A37

2A40

2A34

4A01

5A05

1u8

150p

FOR SCART

FOR CINCH

4A02

5A04

1u8

FOR SCART

4A03

5A03

1u8

150p

FOR SCART

3A24

27R

150p

3A26

27R

150p

IA18

3A22

27R

150p

IA44

3A32

*

SCART

27R

150p

2A49

IA43

*

3A30

150p

2A46

3A28

*

IA19

150p

2A43

100n

3A28 3A29 3A30 3A31 3A32 3A33

3A20

3A34

3A46 27R

47R 27R 47R 27R 47R

27R

27R2A50

27R3A36

27R3A38

AV2-Y_SC2-G

CINCH 18R 56R 18R 56R 18R 56R

AV2-PB_SC2-B

AV2-PR_SC2-R

FRONT-Y_CVBS

SC1-G

SC1-B

SC1-R

CVBS1

CVBS2

CVBS

FRONT-C

H-SYNC-VGA

V-SYNC-VGA

RES

3A10

RES

3A11RES 75R

R-VGA

B-VGA

G-VGA

2A04

3A50

3A53 100R

2A03

3A06

3A07

3A08 3A51

3A09

270p

75R

180R

FA14

270p

3A13

180R

2A02

RES

T1 P1

100R3A52

T2

IA03

U1

22n

IA35

A1

10K

IA04

C3

4K7

C2

4K7

180R

A3

180R

B3

IA05

A2

IA06

B2

IA07

J5

Y_CVBS-MON-OUT

7600-1 PNX85439E

ANALOG_VIDEO

SYNC_IN_1 SYNC_IN_2

HSYNCIN

IN

VSYN

OUT

CURREF

BIAS

DAC

AGC

P

CVBS1Y

N

P

CVBS2C

N

GND_A3_TG

PC1_AI1 PC1_AI2 PC1_AI3

PC1_AID

REF 1

PC2_AI1 PC2_AI2 PC2_AI3 PC2_AID

REF 2

PC3_AI1 PC3_AI2 PC3_AI3 PC3_AID

REF 3

REF 4

REF 5

AI1N_IF AI1P_IF AI2P_IF AI2N_IF

18R

AV3-PR

AV3-PB

AV3-Y

2A09

R1 R3

P3 P4 P5 N1

AI11

N2

AI12

N3

AI13

N4

M1 M3

M4 M5 L1

AI21

L2

AI22

L3

AI23

L4

K1

K3 K4 K5 J1

AI31

J2

AI32

J3

AI33

J4

G3

AI4N

G4

AI41

H1

AI42

H2

AI43

H3

AI44

H4

F1

AI5N

F2

AI51

F3

AI52

F4

AI53

G1

AI54

G2

D2 D1

E1

E2

3A14

18R

5A06

RES

3A54

RES

18R

330n

100p

2A72

RES

3A16

18R

5A07

RES

3A55RES

18R

330n

100p

2A74

RES

3A18

18R

5A08

RES

RES 3A56

18R

4A04

4A05

4A06

2A76

RES

IA12

IA14

IA15

IA16

330n

100p

2A15 22n

2A16 22n

2A17 22n 2A18

2A20 2A21 22nRES

2A23 22n

2A24 22n

2A71 100p

2A25 22n 2A51 22n

2A27 22n

2A29 22n

10n

15

SIF

20

A

B

C

A

D

B

E

C

F

G

D

H

E

I

J

F

K

G

L

M

H

N

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

O

P

" XA00 ~ XA99 "

1

3

42

5

6

7

8

9

10

11 12

13

14

CLASS_NO

3PC332

-- -- --

2008-10-17

2009-01-16

NAME

Vincent Yap / Lee CW

SV

DC343514

1

2

3

15

PCB SB SSB BD

********SETNAMECHN

TV543_2K9

**** *** *****

SUPERS.

2008-10-17

DATECHECK

1

3139 123 6443

19

08

03101

20

25

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

1716

18

18440_507_090223.eps

2009-Aug-07

2009-01-16

2008-12-161

O

P

A2

090224

SSB: PNX8543 SDRAM

Circuit Diagrams and PWB Layouts

EN 100Q548.1E LA 10.

12

A

B

C

D

E

F

G

H

I

J

K

owner.

is prohibited without the written consent of the copyright

L

M

4

1

2 3 4 5 6 7 8 9 10 11 12 13

7

863

9

10 18

115

13

14

5121

16

PNX8543 - SDRAM

7600-2

A

B

C

D

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

DDR2-BA0 DDR2-BA1 DDR2-BA2

DDR2-CAS

DDR2-CKE

DDR2-CLK_N DDR2-CLK_P

DDR2-CS

DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3

DDR2-DQS0_N DDR2-DQS0_P

DDR2-DQS1_N DDR2-DQS1_P

DDR2-DQS2_N DDR2-DQS2_P

DDR2-DQS3_N DDR2-DQS3_P

3B00

220R

+1V8-PNX85XX

E

100n

2B06

2B05

2B04

F

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS

DDR2-BA0 DDR2-BA1

G

H

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

DDR2-CLK_P DDR2-CLK_N

DDR2-DQS0_P DDR2-DQS0_N

DDR2-DQS1_P DDR2-DQS1_N

3B06

3B08

33R

2B07

3B05

100n

2B08

33R

2B10

2B09

RES

220R

3B07

33R

3B09

100n

2B12

2B11

HYB18TC512160B2F-3S

7B01

M9

A1E1J9

J1

A9G9C1C3C7

R1

VDD

K9

ODT

K2

CKE

K3

WE

L8

CS

K7

RAS

L7

CAS

L2

0

BA

L3

1

M8

0

M3

1

M7

2

N2

3

N8

4

N3

5

N7

6

P2

7

P8

8

P3

9

M2

10

P7

11

R2

12

J8

CK

K8

F7

LDQS

E8

B7

UDQS

A8

VDDL

Φ

SDRAM

A

VSSDL

J3

P9J7A7

N1

B2

A3

E3

PNX85439E

MEMORY

AA34

0

AE33

1

AA33

2

AD31

3

Y34

4

AD32

5

M_A

W33

6

AC32

7

W34

8

Y31

9

AD34

10

V33

11

Y32

12

AC34

0

AD33

M_BA

1

AA32

2

W32

M_CASB

AE31

M_CKE

AB33

N

M_CLK

AB34

P

W31

M_CSB

AJ34

0

AJ31

1

M_DQM

R34

2

R31

3

AG33

N

AG34

M_DQS0

P

AH31

N

M_DQS1

AH32

P

N34

N

M_DQS2

N33

P

N31

N

M_DQS3

N32

P

2B02

1u0

2B03

330u 6.3V

RES

2B13

G7

G3

C9E9G1

VDDQ

B8

E7

D2

D8

A2 E2

L1

NC

R3 R7 R8

G8

0

G2

1

H7

2

H3

3

H1

4

H9

5

F1

6

F9

7

DQ

C8

8

C2

9

D7

10

D3

11

D1

12

D9

13

B1

14

B9

15

B3

UDM

F3

LDM

J2

VREF

QSSVSSV

F2

F8

H2

H8

AH34

0

AK33

1

AH33

2

AL34

3

AL33

4

AE34

5

AK34

6

AF34

7

AG32

8

AK31

9

AJ32

10

AL32

11

AL31

12

AF31

13

AK32

14

AF32

15

P34

M_DQ

16

T34

17

R33

18

U34

19

V34

20

M33

21

T33

22

M34

23

P31

24

T32

25

P32

26

U31

27

U32

28

M31

29

R32

30

M32

31

AA31

IREF

V31

ODT

V32

M

RASB

AB32

VREF

AE32

WEB

100n

2B15

2B14

2B16RES

3B11

3B13

3B15

3B17

3B19

3B21

3B23

3B25

33R

2B21 100n

3B03

FB02

5K6

3B04

820R

2B01

100n

2B18

2B17

RES 2B19

RES

3B10

33R

3B12 33R 3B14

33R

33R 3B16

33R

33R 3B18

33R

33R 3B20

33R

33R 3B22

33R

33R 3B24

33R

DDR2-VREF-DDR

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8

DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31 DDR2-D27 DDR2-D29

+1V8-PNX85XX

2B00

100n

DDR2-VREF-CTRL

100n

DDR2-ODT

DDR2-RAS

DDR2-WE

22u

100n

2B20

RES

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS

DDR2-BA2 DDR2-BA2

DDR2-RAS DDR2-CAS

DDR2-BA0

DDR2-D0

DDR2-BA1 DDR2-D1 DDR2-D3

DDR2-A0 DDR2-D2

DDR2-A1 DDR2-D4

DDR2-A2 DDR2-D5

DDR2-A3

DDR2-A4

DDR2-D6 DDR2-D7

DDR2-A5 DDR2-D8

DDR2-A6 DDR2-D9

DDR2-A7

DDR2-D10

DDR2-A8

DDR2-D11

DDR2-A9

DDR2-D12

DDR2-A10

DDR2-D13

DDR2-A11

DDR2-D14

DDR2-A12

DDR2-D15

DDR2-CLK_P

DDR2-CLK_N

DDR2-DQM1 DDR2-DQM0

DDR2-DQS2_P

DDR2-DQS2_N

DDR2-DQS3_P

DDR2-DQS3_N

2B25

100n

2B27

2B28

2B26

3B27

33R

3B29

100n

3B26

33R

2B29

DDR2-VREF-CTRL

100n

2B30

220R

33R

RES

100n

2B32

2B31

HYB18TC512160B2F-3S

3B28

3B30

+1V8-PNX85XX

6.3V

RES

3B47

2B22

3B49

+1V8-PNX85XX

VDD

J3

E3

1K0 1% 1%1K0

J1

SDRAM

P9J7A7H8B2

N1

VDDL

VSSDL

330u

2B23RES

A9

C1

Φ

DDR2-VREF-DDR

6.3V330u 1u0

2B24

C7C9E9G1G3

C3

VDDQ

B8

E7

D2

D8

G7

DQ

QSSVSSV

F8

F2

H2

FB01

100n

2B33

7B00

A1E1J9M9R1

K9

ODT

K2

CKE

K3

WE

L8

CS

K7

RAS

L7

CAS

L2

0

BA

L3

1

M8

0

M3

1

M7

2

N2

3

N8

4

N3

5

N7

A

6

P2

7

P8

8

P3

9

M2

10

P7

11

R2

12

J8

CK

K8

F7

LDQS

E8

B7 A8

UDQS

A3

G9

VREF

+1V8-PNX85XX

FB00

100n

2B34

2B35

A2 E2 L1

NC

R3 R7 R8

G8

0

G2

1

H7

2

H3

3

H1

4

H9

5

F1

6

F9

7

C8

8

C2

9

D7

10

D3

11

D1

12

D9

13

B1

14

B9

15

B3

UDM

F3

LDM

J2

17

1%1%1K0

1K0

3B50 3B48

100n

2B37

2B36

3B32 3B33

3B36

3B38

3B40

3B42

3B44

3B46

2B39

2B38RES

RES

3B31

33R 33R

33R

2B42

100n

2B40

RES

33R

3B3433R

33R3B35 3B37 33R 3B39 33R 3B41 33R 3B43 33R 3B45 33R

DDR2-VREF-DDR

2B41

RES

22u

DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D29 DDR2-D27 DDR2-D31

DDR2-DQM3 DDR2-DQM2

19

20

2B00 D7 2B01 D6 2B02 E5 2B03 E5 2B04 F1 2B05 F2 2B06 F2 2B07 F2 2B08 F2 2B09 F2 2B10 F3 2B11 F3

A

2B12 F3 2B13 F5 2B14 F5 2B15 F6 2B16 F6 2B17 F6 2B18 F6 2B19 F6 2B20 F7 2B21 H6 2B22 B10 2B23 E10

B

2B24 E10 2B25 F8 2B26 F8 2B27 F8 2B28 F8 2B29 F8 2B30 F9 2B31 F9 2B32 F9 2B33 F9 2B34 F11

C

2B35 F11 2B36 F12 2B37 F12 2B38 F12 2B39 F12 2B40 F12 2B41 F13 2B42 H12 3B00 C3 3B03 C7 3B04 D7 3B05 H2

D

3B06 H2 3B07 H3 3B08 H2 3B09 H3 3B10 G6 3B11 G6 3B12 G6 3B13 G6 3B14 G6 3B15 G6 3B16 G6 3B17 G6

E

3B18 G6 3B19 G6 3B20 H6 3B21 H6 3B22 H6 3B23 H6 3B24 H6 3B25 H6 3B26 H8 3B27 H8 3B28 H9

F

3B29 H8 3B30 H9 3B31 G12 3B32 G12 3B33 G12 3B34 G12 3B35 G12 3B36 G12 3B37 G12 3B38 G12 3B39 G12 3B40 G12

G

3B41 H12 3B42 H12 3B43 H12 3B44 H12 3B45 H12 3B46 H12 3B47 B10 3B48 B12 3B49 B10 3B50 B12 7600-2 A5 7B00 F10

H

7B01 F3 FB00 B11 FB01 B10 FB02 C6

A

B

C

D

E

F

G

H

I

J

K

L

M

I

N

MULTI 12NC : 3139_123_64421 / 64541 / 64561

I

N

BD 12NC : 3139_123_64431 / 64551 / 64571

CELL 12C : 8239_125_14871

O

P

2

1 2 3 4 5 6 7 8 9 10 11 12 13

DC343514

CLASS_NO

3PC332

-- -- --

1

2008-10-17

2

3

2009-01-16

NAME

" XB00 ~ XB99 "

3

4

6

7

85

9

10

11

12

13

Vincent Yap / Lee CW

SV

1514

PCB SB SSB BD

CHECK

2009-Aug-07

********SETNAMECHN

TV543_2K9

SUPERS.

**** *** *****

DATE

2008-10-17

161

17

25

C

3139 123 6443

03101

ROYAL PHILIPS ELECTRONICS N.V. 2008

09

1918

O

2009-01-16

1

2008-12-161

P

A2

20

18440_508_090223.eps

090224

Philips Q548.1E Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Contents Page Contents Page

1. Revision List

2. Technical Specifications and Connections

2.1 Technical Specifications

2.2 Directions for Use

Table 2-1 Described Model numbers

2.3 Connections

2.3.1 Side Connections

1 - Cinch: Audio - In

2 - Cinch: Video CVBS - In

Figure 2-1 Connection overview

4 - Head phone (Output)

5 - Common Interface

6 - USB2.0

3 - S-Video (Hosiden): Video Y/C - In

Figure 2-2 USB (type A)

7 - HDMI: Digital Video, Digital Audio - In (see connector 15)

8 - Service Connector (UART)

2.3.2 Rear Connections

9 - EXT1/2: Video RGB - In, CVBS - In/Out, Audio - In/Out (*)

Figure 2-3 SCART connector

10 - Cinch: S/PDIF - Out

11 - Cinch: Audio - Out

12 - VGA: Video RGB - In

13 - Mini Jack: Audio - In

14 - EXT3: Cinch: Video YPbPr - In, Audio - In

15 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In

Figure 2-5 HDMI (type A) connector

16 - Aerial - In

Figure 2-4 VGA Connector

2.4 Chassis Overview

3. Precautions, Notes, and Abbreviation List

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.3.2 Schematic Notes

3.3.3 Spare Parts

3.3.4 BGA (Ball Grid Array) ICs

Introduction

BGA Temperature Profiles

3.3.1 General

3.3.5 Lead-free Soldering

3.3.6 Alternative BOM identification

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

3.3.8 Practical Service Precautions

3.4 Abbreviation List

4. Mechanical Instructions

4.1 Cable Dressing

Figure 4-1 Cable dressing 32PFL7xxx/xx

Figure 4-2 Cable dressing 42PFL7xxx/xx

Figure 4-3 Cable dressing 47PFL7xxx/xx

Figure 4-4 Cable dressing 52PFL7xxx/xx

Figure 4-5 Cable dressing 32PFL8xxx/xx

Figure 4-6 Cable dressing 37PFL8xxx/xx

Figure 4-7 Cable dressing 42PFL8xxx/xx

Figure 4-8 Cable dressing 47PFL8xxx/xx

4.2 Service Positions

4.2.1 Foam Bars

4.3.2 Speakers

4.3.3 Ambi Light

Figure 4-9 Foam bars

4.3 Assy/Panel Removal

Figure 4-10 Ambi Light unit

4.3.4 Main Supply Panel

4.3.5 IR & LED Board / Stand Support

4.3.1 Rear Cover

Figure 4-11 IR & LED Board / Stand Support

4.3.6 Small Signal Board (SSB)

Figure 4-12 LCD Panel - top support

4.3.7 Keyboard Control Panel

4.3.8 LCD Panel

Figure 4-13 LCD Panel - SSB subframe

Figure 4-14 LCD Panel - PSU subframe

4.4 Set Re-assembly

Figure 4-15 LCD Panel - panel removal