Philips PUMH7 Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
dbook, halfpage
MBD128
PUMH7
NPN resistor-equipped double
transistor
Product specification
Supersedes data of 1998 Jun 29
1999 Apr 22
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH7
FEATURES
• Transistors with built-in bias
resistor R1 (typ. 4.7 kΩ)
• No mutual interference between
the transistors
• Simplification of circuit design
• Reduces number of components
and board space.
handbook, halfpage
132
Top view
56
4
MAM380
654
R1
TR1
123
TR2
R1
APPLICATIONS
Fig.1 Simplified outline (SC-88; SOT363) and symbol.
• Especially suitable for space
reduction in interface and driver
circuits
• Inverter circuit configurations
without use of external resistors.
DESCRIPTION
NPN resistor-equipped double
transistor in an SC-88 (SOT363)
plastic package.
2, 5
1, 4
MBK120
6, 3
Fig.2 Equivalent inverter
symbol.
PINNING
PIN DESCRIPTION
1, 4 emitter TR1; TR2
2, 5 base TR1; TR2
6, 3 collector TR1; TR2
MARKING
TYPE
NUMBER
MARKING CODE
PUMH7 Ht7
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per transistor
V
CBO
V
CEO
V
EBO
I
O
I
CM
P
tot
T
stg
T
j
T
amb
collector-base voltage open emitter − 50 V
collector-emitter voltage open base − 50 V
emitter-base voltage open collector − 5V
output current (DC) − 100 mA
peak collector current − 100 mA
total power dissipation T
≤ 25 °C; note 1 − 200 mW
amb
storage temperature −65 +150 °C
junction temperature − 150 °C
operating ambient temperature −65 +150 °C
Per device
P
tot
total power dissipation T
≤ 25 °C − 300 mW
amb
Note
1. Refer to SC-88 standard mounting conditions.
1999 Apr 22 2
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH7
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th j-a
Note
1. Refer to SC-88 standard mounting conditions.
CHARACTERISTICS
=25°C unless otherwise specified.
T
amb
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Per transistor
I
CBO
I
CEO
I
EBO
h
FE
V
CEsat
R1 input resistor 3.3 4.7 6.1 kΩ
C
c
thermal resistance from junction to ambient note 1 416 K/W
collector cut-off current IE= 0; VCB=50V −−100 nA
collector cut-off current IB= 0; VCE=30V −−1µA
I
= 0; VCE=30V; Tj= 150 °C −−50 µA
B
emitter cut-off current IC= 0; VEB=5V −−100 nA
DC current gain IC= 1 mA; VCE= 5 V 200 330 −
collector-emitter saturation voltage IC= 5 mA; IB= 0.25 mA −−100 mV
collector capacitance IE=ie= 0; VCB=10V; f=1MHz −−2.5 pF
3
10
handbook, halfpage
h
FE
2
10
−1
10
VCE=5V.
(1) T
(2) T
(3) T
amb
amb
amb
= 100°C.
=25°C.
= −40 °C.
(1)
(2)
(3)
11010
MGR354
I
(mA)
C
Fig.3 DC current gain as a function of collector
current; typical values; per transistor.
2
3
10
handbook, halfpage
V
CEsat
(mV)
2
10
10
−1
10
IC/IB= 20.
(1) T
(2) T
(3) T
amb
amb
amb
= 100 °C.
=25°C.
= −40 °C.
(2)
(1)
(3)
11010
MGR353
I
(mA)
C
Fig.4 Collector-emitter saturation voltage as a
function of collector current; typical values;
per transistor.
2
1999 Apr 22 3
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