Philips psmn035-100ls Datasheet

Page 1
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
Rev. 2 — 18 August 2010 Product data sheet

1. Product profile

1.1 General description

Stan dard level N-channel MOSFET in QFN3333 package qualified to 1 50 °C. This product is designed and qualified for use in a wide range of industrial, communications and power supply equipment.

1.2 Features and benefits

High efficiency due to low switching
Suitable for standard level gate drive
sources
Small footprint for compact designs

1.3 Applications

DC-to-DC convertersLithium-ion battery protection
Load switching

1.4 Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
I
D
P
tot
T
j
Static characteristics
R
DSon
drain-source voltage
drain current Tmb=25°C; VGS=10V;
total power dissipation
junction temperature
drain-source on-state resistance
Tj≥ 25 °C; Tj≤ 150 °C - - 100 V
--27A
see Figure 1 Tmb= 25 °C; see Figure 2 --65W
-55 - 150 °C
VGS=10V; ID=10A; T
= 100 °C; see Figure 12
j
=10V; ID=10A;
V
GS
=25°C; see Figure 13
T
j
--63mΩ
- 2932mΩ
Page 2
NXP Semiconductors
m
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
Table 1. Quick reference data
…continued
Symbol Parameter Conditions Min Typ Max Unit
Dynamic characteristics
Q Q
GD G(tot)
gate-drain charge VGS=10V; ID=15A;
=50V; see Figure 14;
V
total gate charge - 23 - nC
DS
see Figure 15
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source avalanche energy
VGS=10V; T ID=27A; V
sup
unclamped; R
=25°C;
j(init)
≤ 100 V;
=50Ω
GS

2. Pinning information

drain
8765
1234
Transparent
top view
SOT873-1 (QFN3333)
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1Ssource 2Ssource 3Ssource 4 G gate 5,6,7,8 D drain mb D mounting base; connected to
-7-nC
--37mJ
D
G
S
bb076

3. Ordering information

Table 3. Ordering information
Type number Package
PSMN035-100LS QFN3333 plastic thermal enhanced very thin small outline package;
Name Description Version
no leads; 8 terminals
SOT873-1
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 2 of 14
Page 3
NXP Semiconductors

4. Limiting values

PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
T
sld(M)
Source-drain diode
I
S
I
SM
Avalanche ruggedness
E
DS(AL)S
drain-source voltage Tj≥ 25 °C; Tj≤ 150 °C - 100 V drain-gate voltage Tj≤ 150 °C; Tj≥ 25 °C; RGS=20kΩ - 100 V gate-source voltage -20 20 V drain current VGS=10V; Tmb= 100 °C; see Figure 1 -17A
=10V; Tmb=25°C; see Figure 1 -27A
V
GS
peak drain current pulsed; tp≤ 10 µs; Tmb=25°C;
- 109 A
see Figure 3 total power dissipation Tmb=25°C; see Figure 2 -65W storage temperature -55 150 °C junction temperature -55 150 °C peak soldering temperature - 260 °C
source current Tmb=25°C - 27 A peak source current pulsed; tp≤ 10 µs; Tmb= 25 °C - 109 A
non-repetitive drain-source avalanche energy
VGS=10V; T
≤ 100 V; unclamped; RGS=50Ω
V
sup
=25°C; ID=27A;
j(init)
-37mJ
30
I
D
(A)
20
10
0
0 50 100 150
003aa e352
(°C)
T
mb
Fig 1. Continuous drain current as a function of
mounting base temperature
120
P
der
(%)
80
40
0
0 20015050 100
003aab937
Tmb (°C)
Fig 2. Normalized total power dissipation as a
function of solder point temperature
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 3 of 14
Page 4
NXP Semiconductors
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
3
10
I
D
(A)
2
10
10
1
−1
10
−2
10
1 10 10
Limit R
DSon
= VDS / I
D
DC
tp = 10 μs
100 μs
1 ms
10 ms 100 ms
2
VDS (V)
003aa e353
10
3
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain -sou rce voltage

5. Thermal characteristics

Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance from junction to mounting base
R
th(j-a)
thermal resistance from junction to ambient
see Figure 4 -11.3K/W
[1]
- 5360K/W
[1] R
is guaranteed by design and assumes that the device is mounted on a 40mm x 40mm x 70µm copper pad at 20°C ambient
th(j-a)
temperature. In practice R
will be determined by the customer’s PCB characteristics
th(j-a)
10
Z
th(j-mb)
(K/W)
003aae141
1
δ
= 0.5
0.2
−1
10
0.1
P
δ =
t
p
T
0.05
10
−2
10
0.02
single shot
−6
t
p
T
−5
10
−4
10
−3
10
−2
10
−1
10
t
t
1
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 4 of 14
Page 5
NXP Semiconductors

6. Characteristics

PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
drain-source breakdown voltage
gate-source threshold voltage
ID=0.25mA; VGS=0V; Tj= -55 °C 90 - - V
=0.25mA; VGS=0V; Tj= 25 °C 100 - - V
I
D
ID=1mA; VDS=VGS; Tj= 150 °C;
1--V
see Figure 10
=1mA; VDS=VGS; Tj=25°C;
I
D
see Figure 10 I
=1mA; VDS=VGS; Tj=-55°C;
D
; see Figure 11
2.334V
--4.7V
see Figure 10
I
DSS
I
GSS
R
DSon
drain leakage current VDS=100V; VGS=0V; Tj= 125 °C - - 50 µA
=100V; VGS=0V; Tj= 25 °C - 0.1 2 µA
V
DS
gate leakage current VGS=20V; VDS=0V; Tj= 25 °C - 10 100 nA
=-20V; VDS=0V; Tj= 25 °C - 10 100 nA
V
GS
drain-source on-state resistance
VGS=10V; ID=10A; Tj= 100 °C; see Figure 12
=10V; ID=10A; Tj= 150 °C;
V
GS
--63mΩ
- 72.5 80 mΩ
see Figure 12 V
=10V; ID=10A; Tj=25°C;
GS
- 2932mΩ
see Figure 13
R
G
internal gate resistance
f=1MHz - 0.9 - Ω
(AC)
Dynamic characteristi cs
Q
Q
G(tot)
GS
total gate charge ID=15A; VDS=50V; VGS=10V;
see Figure 14
=0A; VDS=0V; VGS=10V - 19 - nC
I
D
; see Figure 15
gate-source charge ID=15A; VDS=50V; VGS=10V;
-23-nC
-5.7-nC
see Figure 14; see Figure 15
Q
GS(th)
Q
GS(th-pl)
pre-threshold gate-source charge
post-threshold
ID=15A; VDS=50V; VGS=10V; see Figure 14
-3.7-nC
-2-nC
gate-source charge
Q
V
C C C
GD
GS(pl)
iss oss rss
gate-drain charge ID=15A; VDS=50V; VGS=10V;
gate-source plateau voltage
see Figure 14 VDS=50V; see Figure 14;
see Figure 15
; see Figure 15
input capacitance VDS=50V; VGS= 0 V; f = 1 MHz; output capacitance - 96 - pF
Tj=25°C; see Figure 16
reverse transfer
-7-nC
-4.6-V
- 1350 - pF
-60-pF
capacitance
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 5 of 14
Page 6
NXP Semiconductors
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
Table 6. Characteristics
…continued
Symbol Parameter Conditions Min Typ Max Unit
t
d(on)
t
r
t
d(off)
t
f
turn-on delay time VDS=50V; RL=3Ω; VGS=10V;
=4.7Ω; Tj=25°C
R
rise time - 6 - n s
G(ext)
turn-off delay time - 22 - ns fall time -7-ns
-11-ns
Source-drain diode
V
SD
source-drain voltage IS=15A; VGS=0V; Tj=25°C;
- 0.85 1.2 V
see Figure 17
t
rr
Q
r
40
g
fs
(S)
30
20
reverse recovery time IS=15A; dIS/dt = 100 A/µs; VGS=0V;
V
=50V
recovered charge - 102 - nC
DS
003aa e357
I
(A)
30
D
20
-52-ns
003aa e356
10
0
0 10203040
(A)
I
D
Fig 5. Forward transconductance as a function of
drain current; typical values
10
Tj = 150 °C
0
0246
Tj = 25 °C
(V)
V
GS
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical value s
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 6 of 14
Page 7
NXP Semiconductors
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
2000
C
(pF)
1500
1000
500
0
02468
003aa e359
C
iss
C
rss
(V)
V
GS
Fig 7. Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
003aa e355
5
4.7
VGS (V) = 4.5
I
(A)
30
10
D
20
6
100
R
DSon
(mΩ)
80
60
40
20
0
0 5 10 15 20
003aa e360
(V)
V
GS
Fig 8. Drain-source on-state resistance as a function
of gate-source voltage; typical values
003aae486
V
GS(th)
(V)
5
4
3
max
typ
10
0
0 0 .5 1 1.5 2
Fig 9. Output characteristics: drain current as a
(V)
V
DS
Fig 10. Gate-source threshold voltage as a function of
function of drain-source voltage; typical values
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
2
1
0
-60 0 60 120 180
junction temperature
min
Tj (°C)
Product data sheet Rev. 2 — 18 August 2010 7 of 14
Page 8
NXP Semiconductors
003aae358
003aaa508
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
−1
10
I
D
(A)
−2
10
−3
10
−4
10
−5
10
−6
10
0642
min typ max
003aae487
VGS (V)
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
R
DSon
(mΩ)
100
80
VGS (V ) = 4.5
4.7
3.2
a
2.4
1.6
0.8
0
-60 0 60 120 180
003aae372
(°C)
T
j
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
V
DS
I
D
60
5
40
20
0
0102030
6
10
I
(A)
D
Fig 13. Drain-source on-state resistance as a fun ction
of drain current; typical values
V
GS(pl)
V
GS(th)
V
GS
Q
GS1QGS2
Q
G(tot)
Q
GD
Q
GS
Fig 14. Gate charge wa veform definitions
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 8 of 14
Page 9
NXP Semiconductors
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
80 V
50 V
Q
003aa e361
(nC)
G
10
V
GS
(V)
8
6
4
2
0
0102030
VDS = 20 V
Fig 15. Gate-source voltage as a function of gate
charge; typical values
30
003aa e362
C
C
C
VDS (V)
iss
oss
rss
2
C
(pF)
10
10
10
10
4
3
2
−1
10
1 10 10
Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical values
003aa e363
I
S
(A)
20
10
Tj = 150 °C
0
0 0 .3 0.6 0.9 1.2
Tj = 25 °C
(V)
V
SD
Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 9 of 14
Page 10
NXP Semiconductors
1
Q 8
N-channel QFN3333 100 V 32mΩ standard level MOSFET

7. Package outline

FN3333: plastic thermal enhanced very thin small outline package; no leads;
terminals; body 3.3 x 3.3 x 1.0 mm
PSMN035-100LS
SOT873-
X
terminal 1 index area
terminal 1 index area
L
1
E
h
D
e
1
e
b
B A
E
M
v
41
M
A
A
1
detail X
B
AC
Cw
y
C
1
c
C
y
L
2
8
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm 1
OUTLINE VERSION
SOT873-1
A1bc ee1L
max.
0.05
0.45
0.00
0.25
DE
D
h
2.4
2.2
3.4
3.2
3.4
0.2
3.2
IEC JEDEC JEITA
D
h
1.80
1.58
5
0 1 2 mm
scale
E
h
0.65
REFERENCES
- - -- - -- - -
0.55
0.45
ywv
L
1
2
0.52
0.35
0.05 0.1
y
1
0.10.11.95
EUROPEAN
PROJECTION
ISSUE DATE
10-03-10 19-04-10
Fig 18. Package outline SOT873-1 (QFN3333)
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 10 of 14
Page 11
NXP Semiconductors

8. Revision history

PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PSMN035-100LS v.2 20100818 Product data sheet - PSMN035-100LS v.1 Modifications: PSMN035-100LS v.1 20100517 Objective data sheet - -
• Status changed from objective to product.
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 11 of 14
Page 12
NXP Semiconductors
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET

9. Legal information

9.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specificat ion for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) desc r ibed in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

9.3 Disclaimers

Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
In no event shall NXP Semiconductors be lia ble for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonabl y be expected to result in personal injury, death or severe property or environmenta l damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective
, unless otherwise
Product data sheet Rev. 2 — 18 August 2010 12 of 14
Page 13
NXP Semiconductors
PSMN035-100LS
N-channel QFN3333 100 V 32mΩ standard level MOSFET
agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpret ed or construed as an offer to sell products that is open f or acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It i s neither qua lif ied nor test ed in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equ ipment or applications.
In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, da mages or failed produ ct cl aims resulting from custome r design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.

9.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V .
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 18 August 2010 13 of 14
Page 14
NXP Semiconductors
N-channel QFN3333 100 V 32mΩ standard level MOSFET

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
10 Contact information. . . . . . . . . . . . . . . . . . . . . .13
PSMN035-100LS
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 18 August 2010
Document identifier: PSMN035-100LS
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