Philips psmn017-30ll Datasheet

1. Product profile

1.1 General description

Logic level N-channel MOSFET in QFN3333 package qualified to 150 °C. This product is
designed and qualified for use in a wide range of industrial, communications and power
supply equipment.

1.2 Features and benefits

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Rev. 03 — 7 July 2010 Product data sheet

 High efficiency due to low switching

and conduction losses

 Suitable for logic level gate drive

sources

 Small footprint for compact designs

1.3 Applications

 Battery protection
 DC-to-DC converters

 Load switching
 Power ORing

1.4 Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

V

DS

I

D

P

tot

T

j

Static characteristics

R

DSon

drain-source
voltage

drain current Tmb=25°C; VGS=10V;

total power
dissipation

junction
temperature

drain-source
on-state
resistance

Tj≥ 25 °C; Tj≤ 150°C --30V

--15A

see Figure 1
Tmb= 25 °C; see Figure 2 --37W

-55 - 150 °C

VGS=4.5V; ID=5A;

=25°C; see Figure 12

T

j

=10V; ID=5A;

V

GS

= 100 °C; see Figure 13

T

j

V

=10V; ID=5A;

GS

Tj=25°C; see Figure 12

-20.525mΩ

--23.4mΩ

- 1517mΩ

NXP Semiconductors

m

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Table 1. Quick reference data

…continued

Symbol Parameter Conditions Min Typ Max Unit

Dynamic characteristics

Q
Q

GD
G(tot)

gate-drain charge VGS=10V; ID=5A;

=15V; see Figure 14;

V

total gate charge - 10 - nC

DS

see Figure 17

=4.5V; ID=5A;

V

GS

VDS=15V; see Figure 17;
see Figure 14

Avalanche ruggedness

E

DS(AL)S

non-repetitive
drain-source
avalanche energy

VGS=10V; T
I

=35A; V

D

j(init)

sup

=25°C;

≤ 30 V;

unclamped; RGS=50Ω

2. Pinning information

drain

8765

1234

Transparent

top view

SOT873-1 (QFN3333)

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphic symbol

1Ssource
2Ssource
3Ssource
4 G gate
5,6,7,8 D mounting base; connected to

-1.5-nC

-5-nC

--8mJ

D

G

S

bb076

3. Ordering information

Table 3. Ordering information

Type number Package

PSMN017-30LL QFN3333 plastic thermal enhanced very thin small outline package; no

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 2 of 15

Name Description Version

SOT873-1

leads; 8 terminals

NXP Semiconductors

4. Limiting values

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

I

D

I

DM

P

tot

T

stg

T

j

T

sld(M)

Source-drain diode

I

S

I

SM

Avalanche ruggedness

E

DS(AL)S

drain-source voltage Tj≥ 25 °C; Tj≤ 150 °C - 30 V
drain-gate voltage Tj≤ 150 °C; Tj≥ 25 °C; RGS=20kΩ -30V
gate-source voltage -20 20 V
drain current VGS=10V; Tmb= 100 °C; see Figure 1 -15A

=10V; Tmb=25°C; see Figure 1 -15A

V

GS

peak drain current pulsed; tp≤ 10 µs; Tmb=25°C;

- 140 A

see Figure 3
total power dissipation Tmb=25°C; see Figure 2 -37W
storage temperature -55 150 °C
junction temperature -55 150 °C
peak soldering temperature - 260 °C

source current Tmb=25°C - 15 A
peak source current pulsed; tp≤ 10 µs; Tmb= 25 °C - 140 A

non-repetitive drain-source
avalanche energy

VGS=10V; T

≤ 30 V; unclamped; RGS=50Ω

V

sup

=25°C; ID=35A;

j(init)

-8mJ

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 3 of 15

NXP Semiconductors

003aab937

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

40

I

D

(A)

30

20

(1)

10

0

0 50 100 150 200

003aae257

T

(°C)

mb

Fig 1. Continuous drain current as a function of

mounting base temperature

3

10

I

D

(A)

10

2

Limit R

DSon

= VDS / I

D

120

P

der

(%)

80

40

0

0 20015050 100

Tmb (°C)

Fig 2. Normalized total power dissipation as a

function of solder point temperature

003aae405

tp =10 μs

10

1

10

DC

-1

-1

10

1 10 10

100 μs

1 ms

10 ms
100 ms

V DS (V)

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain -sou rce voltage

2

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 4 of 15

NXP Semiconductors

003aae259

5. Thermal characteristics

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Table 5. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-mb)

thermal resistance

see Figure 4 -3.68.4K/W
from junction to
mounting base

R

th(j-a)

thermal resistance

[1]

- 5760K/W
from junction to
ambient

[1] R

is guaranteed by design and assumes that the device is mounted on a 40mm x 40mm x 70µm copper pad at 20°C ambient

th(j-a)

temperature. In practice R

10

Z

th(j-mb)

(K/W)

δ

= 0.5

1

0.2

0.1

0.05

-1

0.02

10

single shot

will be determined by the customer’s PCB characteristics

th(j-a)

P

δ =

t

p

T

t

p

-2

10

-6

10

-5

10

-4

10

-3

10

-2

10

10

T

-1

t

1

t

(s )

p

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical

values

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 5 of 15

NXP Semiconductors

6. Characteristics

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Table 6. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

V

GS(th)

drain-source
breakdown voltage

gate-source threshold
voltage

ID=0.25mA; VGS=0V; Tj= -55 °C 27 - - V

=0.25mA; VGS=0V; Tj=25°C 30--V

I

D

ID=1mA; VDS=VGS; Tj= 150 °C;

0.5--V

see Figure 10

=1mA; VDS=VGS; Tj=25°C;

I

D

see Figure 11
I

=1mA; VDS=VGS; Tj=-55°C;

D

; see Figure 10

1.3 1.7 2.15 V

--2.55V

see Figure 10

I

DSS

I

GSS

R

DSon

drain leakage current VDS=30V; VGS=0V; Tj= 25 °C - 0.02 1 µA

=30V; VGS=0V; Tj=125°C --50µA

V

DS

gate leakage current VGS=20V; VDS=0V; Tj= 25 °C - 5 100 nA

=-20V; VDS=0V; Tj= 25 °C - 5 100 nA

V

GS

drain-source on-state
resistance

VGS=4.5V; ID=5A; Tj=25°C;
see Figure 12

=10V; ID=5A; Tj= 100 °C;

V

GS

- 20.5 25 mΩ

- - 23.4 mΩ

see Figure 13
V

=10V; ID=5A; Tj= 150 °C;

GS

- 27 30.6 mΩ

see Figure 13

=10V; ID=5A; Tj=25°C;

V

GS

- 1517mΩ

see Figure 12

R

G

internal gate resistance

f=1MHz - 1.23 - Ω

(AC)

Dynamic characteristi cs

Q

G(tot)

total gate charge ID=5A; VDS=15V; VGS=10V;

-10-nC

see Figure 14; see Figure 17

Q
Q

GS
GS(th)

=5A; VDS=15V; VGS=4.5V;

I

D

see Figure 17
I

=0A; VDS=0V; VGS=10V -9-nC

D

; see Figure 14

gate-source charge ID=5A; VDS=15V; VGS=10V;
pre-threshold

see Figure 14

-5-nC

-1.8-nC

-1-nC
gate-source charge

Q

GS(th-pl)

post-threshold

-0.8-nC
gate-source charge

Q

V

C
C
C

GD

GS(pl)

iss
oss
rss

gate-drain charge ID=5A; VDS=15V; VGS=10V;

; see Figure 17

gate-source plateau
voltage

see Figure 14
VDS=15V; see Figure 14;

see Figure 17

input capacitance VDS=15V; VGS= 0 V; f = 1 MHz;

=25°C; see Figure 15

T

output capacitance - 108 - pF

j

reverse transfer

-1.5-nC

-2.7-V

- 526 - pF

-53-pF
capacitance

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 6 of 15

NXP Semiconductors

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Table 6. Characteristics

…continued

Symbol Parameter Conditions Min Typ Max Unit

t

d(on)

t

r

t

d(off)

t

f

turn-on delay time VDS=15V; RL=3Ω; VGS=4.5V;

=4.7Ω; Tj=25°C

R

rise time - 12 - ns

G(ext)

turn-off delay time - 18.3 - ns
fall time - 5.8 - ns

-13-ns

Source-drain diode

V

SD

source-drain voltage IS=5A; VGS=0V; Tj=25°C;

- 0.85 1.2 V

see Figure 16

t

rr

Q

r

1000

C

(pF)

750

500

reverse recovery time IS=5A; dIS/dt = 100 A/µs; VGS=0V;

V

=15V

recovered charge - 17 - nC

DS

003aae263

C

iss

C

rss

R

DSon

(mΩ)

60

45

30

-10-ns

003aae266

250

0

036912

V

(V)

GS

Fig 5. Input and reverse transfer capacitances as a

function of gate-source voltage, typical values

15

0

0 5 10 15 20

V

(V)

GS

Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 7 of 15

NXP Semiconductors

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

30

g

fs

(S)

20

10

0

0 5 10 15 20

003aae262

I

(A)

D

Fig 7. Forward transconductance as a function of

drain current; typical values

003aae261

(A)

20

I

D

15

20

I

D

(A)

15

10

5

0

0 0.25 0.5 0.75 1

10

4.5

4.0

003aae260

3.5

3.0

2.8

VGS (V ) = 2.6

V

(V)

DS

Fig 8. Output characteristics: drain current as a

function of drain-source voltage; typica l v al ue s

003aae453

V

GS(th)

(V)

3

2

max

10

Tj = 150 °C

5

0

01234

Tj = 25 °C

V

(V)

GS

Fig 9. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

typ

min

1

0

-60 0 60 120 180

= 1 mA; VDS = V

I

D

GS

T

(°C)

j

Fig 10. Gate-source threshold voltage as a function of

junction temperature

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 8 of 15

NXP Semiconductors

003aae265

003aaa508

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

-1

10

I

D

(A)

-2

10

-3

10

-4

10

-5

10

-6

10

0123

003aab271

maxtypmin

V

(V)

GS

Fig 11. Sub-threshold drain current as a function of

gate-source voltage

2

a

1.5

03aa27

R

DSon

(mΩ)

60

VGS (V ) = 30

3.5

40

4.0

20

4.5

10

0

0 5 10 15 20

I

(A)

D

Fig 12. Drain-source on-state resistance as a function

of drain current; typical values

V

DS

I

D

V

GS(pl)

1

0.5

0

−60 0 60 120 180

T

(°C)

j

Fig 13. Normalized drain-source o n-state resistan ce

factor as a function of junction temperature

V

GS(th)

V

GS

Q

GS1QGS2

Q

G(tot)

Q

GD

Q

GS

Fig 14. Gate charge wa veform definitions

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 9 of 15

NXP Semiconductors

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

10

C

(pF)

10

10

3

2

-1

10

1 10 10

003aae264

C

iss

C

oss

C

rss

VDS (V)

2

Fig 15. In put, output and reverse trans fer capacitances

as a function of drain-source voltage; typical
values

10

V

GS

(V)

7.5

6V

20

I

S

(A)

15

10

Tj = 150 °C

5

0

0 0.3 0 .6 0 .9 1.2

003aae268

Tj = 25 °C

V

SD

(V)

Fig 16. Source (diode forward) current as a function of

source-drain (diode forward) voltage; typical
values

003aae267

24V

VDS = 15V

5

2.5

0

036912

Q

(nC)

G

Fig 17. Gate-source voltage as a function of gate charge; typical values

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 10 of 15

NXP Semiconductors

1

Q
8

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

7. Package outline

FN3333: plastic thermal enhanced very thin small outline package; no leads;

terminals; body 3.3 x 3.3 x 1.0 mm

PSMN017-30LL

SOT873-

X

terminal 1
index area

terminal 1
index area

L

1

E

h

D

e

1

e

b

B A

E

M

v

41

M

A

A

1

detail X

B

AC

Cw

y

C

1

c

C

y

L

2

8

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm 1

OUTLINE

VERSION

SOT873-1

A1bc ee1L

max.

0.05

0.45

0.00

0.25

DE

D

h

2.4

2.2

3.4

3.2

3.4

0.2

3.2

IEC JEDEC JEITA

D

h

1.80

1.58

5

0 1 2 mm

scale

E

h

0.65

REFERENCES

- - -- - -- - -

0.55

0.45

ywv

L

1

2

0.52

0.35

0.05 0.1

y

1

0.10.11.95

EUROPEAN

PROJECTION

ISSUE DATE

10-03-10
19-04-10

Fig 18. Package outline SOT873-1 (QFN3333)

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 11 of 15

NXP Semiconductors

8. Revision history

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Table 7. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PSMN017-30LL v.3 20100707 Product data sheet - PSMN017-30LL v.2
Modifications:
PSMN017-30LL v.2 20100624 Preliminary data sheet - -

• Status changed from preliminary to product.

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 12 of 15

NXP Semiconductors

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

9. Legal information

9.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) des cribed in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied u pon to co nt ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.

Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.

9.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.

In no event shall NXP Semiconductors be lia ble for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonabl y be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.

NXP Semiconductors does not accept any liability related to any default ,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred t o as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.

Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteri stics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as de fined in the
Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell product s that is ope n for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.

, unless otherwise

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 13 of 15

NXP Semiconductors

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neither qua lif ied nor test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equ ipment or applications.

In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed produ ct claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.

9.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks
are the property of their respective owners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFAR E Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

10. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

PSMN017-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 03 — 7 July 2010 14 of 15

NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3

5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12

9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13

9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13

9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13

9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14

10 Contact information. . . . . . . . . . . . . . . . . . . . . .14

PSMN017-30LL

N-channel QFN3333 30 V 17 mΩ logic level MOSFET

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2010. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

Date of release: 7 July 2010

Document identifier: PSMN017-30LL