Philips PSMN003-25W Datasheet

Philips Semiconductors Product specification
N-channel logic level TrenchMOS transistor PSMN003-25W
FEATURES SYMBOL QUICK REFERENCE DATA
’Trench’ technology V
DSS
= 25 V
• Very low on-state resistance
D
= 100 A
• Low thermal resistance
R
DS(ON)
3.2 m (VGS = 10 V)
R
DS(ON)
3.5 m (VGS = 5 V)
GENERAL DESCRIPTION PINNING SOT429 (TO247)
SiliconMAXproductsusethelatest PIN DESCRIPTION
Philips Trench technology to achieve the lowest possible 1 gate on-state resistance in each package at each voltage rating. 2 drain
Applications:- 3 source
• d.c. to d.c. converters
• switched mode power supplies tab drain The PSMN003-25W is supplied in
the SOT429 (TO247) conventional leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
Drain-source voltage Tj = 25 ˚C to 175˚C - 25 V
V
DGR
Drain-gate voltage Tj = 25 ˚C to 175˚C; RGS = 20 k -25V
V
GS
Continuous gate-source - ± 15 V voltage
V
GSM
Peak pulsed gate-source Tj 150 ˚C - ± 20 V voltage
I
D
Continuous drain current Tmb = 25 ˚C; VGS = 5 V - 100
1
A
Tmb = 100 ˚C; VGS = 5 V - 100
1
A
I
DM
Pulsed drain current Tmb = 25 ˚C - 300 A
P
D
Total power dissipation Tmb = 25 ˚C - 300 W
Tj, T
stg
Operating junction and - 55 175 ˚C storage temperature
d
g
s
2
3
1
1 Maximum continuous current limited by package.
October 1999 1 Rev 1.100
Philips Semiconductors Product specification
N-channel logic level TrenchMOS transistor PSMN003-25W
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
Non-repetitive avalanche Unclamped inductive load, IAS = 100 A; - 162 mJ energy tp = 100 µs; Tj prior to avalanche = 25˚C;
VDD 15 V; RGS = 50 ; VGS = 5 V; refer to fig:15
I
AS
Non-repetitive avalanche - 100 A current
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction - - 0.5 K/W to mounting base
R
th j-a
Thermal resistance junction in free air - 45 - K/W to ambient
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 25 - - V voltage Tj = -55˚C 23 - - V
V
GS(TO)
Gate threshold voltage VDS = VGS; ID = 1 mA 1 1.5 2 V
Tj = 175˚C 0.5 - - V
Tj = -55˚C - - 2.3 V
R
DS(ON)
Drain-source on-state VGS = 10 V; ID = 25 A - 2.8 3.2 m resistance VGS = 5 V; ID = 25 A - 3.1 3.5 m
VGS = 4.5 V; ID = 25 A - 3.3 4.0 m VGS = 5 V; ID = 25 A; Tj = 175˚C - 4.8 6.5 m
I
GSS
Gate-source leakage current VGS = ±5 V; VDS = 0 V; - 0.02 100 nA
I
DSS
Zero gate voltage drain VDS = 25 V; VGS = 0 V; - 0.05 10 µA current Tj = 175˚C - - 500 µA
Q
g(tot)
Total gate charge ID = 100 A; V
DD
= 15 V; VGS = 5 V - 219 - nC
Q
gs
Gate-source charge - 30 - nC
Q
gd
Gate-drain (Miller) charge - 113 - nC
t
d on
Turn-on delay time VDD = 15 V; RD = 0.6 ; - 28 - ns
t
r
Turn-on rise time VGS = 10 V; RG = 5.6 - 133 - ns
t
d off
Turn-off delay time Resistive load - 716 - ns
t
f
Turn-off fall time - 424 - ns
L
d
Internal drain inductance Measured tab to centre of die - 3.5 - nH
L
d
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH
L
s
Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad
C
iss
Input capacitance VGS = 0 V; VDS = 20 V; f = 1 MHz - 12.6 - nF
C
oss
Output capacitance - 3500 - pF
C
rss
Feedback capacitance - 2400 - pF
October 1999 2 Rev 1.100
Philips Semiconductors Product specification
N-channel logic level TrenchMOS transistor PSMN003-25W
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
Continuous source current - - 100 A (body diode)
I
SM
Pulsed source current (body - - 300 A diode)
V
SD
Diode forward voltage IF = 25 A; VGS = 0 V - 0.85 1.2 V
IF = 75 A; VGS = 0 V - 1.0 -
t
rr
Reverse recovery time IF = 20 A; -dIF/dt = 100 A/µs; - 250 - ns
Q
rr
Reverse recovery charge VGS = 0 V; VR = 20 V - 1.5 - µC
October 1999 3 Rev 1.100
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