Philips pmv40un Datasheet

M3D088

1. Product proﬁle

1.1 Description

1.2 Features

1.3 Applications

PMV40UN

TrenchMOS™ ultra low level FET

Rev. 01 — 05 August 2003 Product data

N-channel enhancement mode ﬁeld-effect transistor in a plastic package using TrenchMOS™ technology.

Product availability:

PMV40UN in SOT23.

■ Ultra low level threshold ■ Surface mount package.

■ Battery management ■ High-speed switch.

1.4 Quick reference data

■ VDS≤ 30 V ■ ID≤ 4.9 A

■ P

≤ 1.9 W ■ R

tot

DSon

2. Pinning information

Table 1: Pinning - SOT23, simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g) 2 source (s) 3 drain (d)

12

Top view

3

MSB003

SOT23

≤ 47 mΩ.

MBB076

d

g

s

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

3. Ordering information

Table 2: Ordering information

Type number Package

Name Description Version

PMV40UN - plastic surface mounted package; 3 leads SOT23

4. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

S

I

SM

drain-source voltage (DC) 25 °C ≤ Tj≤ 150 °C - 30 V drain-gate voltage (DC) 25 °C ≤ Tj≤ 150 °C; RGS=20kΩ -30V gate-source voltage (DC) - ±8V drain current (DC) Tsp=25°C; VGS= 4.5 V; Figure 2 and 3 - 4.9 A

= 100 °C; VGS= 4.5 V; Figure 2 - 3.1 A

T

sp

peak drain current Tsp=25°C; pulsed; tp≤ 10 µs; Figure 3 - 19.6 A total power dissipation Tsp=25°C; Figure 1 - 1.9 W storage temperature −55 +150 °C junction temperature −55 +150 °C

source (diode forward) current (DC) Tsp=25°C - 1.6 A peak source (diode forward) current Tsp=25°C; pulsed; tp≤ 10 µs - 6.4 A

9397 750 11668

Product data Rev. 01 — 05 August 2003 2 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

120

P

der

(%)

80

40

0

0 50 100 150 200

P

tot

P

der

-----------------------

P

tot 25 C°()

100%×= I

03aa17

Tsp (°C)

Fig 1. Normalized total power dissipation as a

function of solder point temperature.

2

10

120

I

der

(%)

80

40

0

0 50 100 150 200

I

D

der

-------------------

I

D25C

()

100%×=

°

03aa25

Tsp (°C)

Fig 2. Normalized continuous drain current as a

function of solder point temperature.

03an54

I

D

(A)

10

1

10

-1

-2

-1

10

Limit R

DSon

= V

/ I

DS

D

tp = 10 µs

100 µs

1 ms

DC

1 10 10

10 ms

100 ms

VDS (V)

Tsp=25°C; IDM is single pulse; VGS= 4.5 V

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

2

9397 750 11668

Product data Rev. 01 — 05 August 2003 3 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

5. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-sp)

thermal resistance from junction to solder point Figure 4 --65K/W

5.1 Transient thermal impedance

2

10

Z

th(j-sp)

(K/W)

10

1

10

-4

= 0.5

δ

0.2

0.1

0.05

0.02

single pulse

P

t

p

T

-3

10

-2

10

-1

10

1 10

tp (s)

Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.

δ =

03an53

t

p

T

t

9397 750 11668

Product data Rev. 01 — 05 August 2003 4 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

6. Characteristics

Table 5: Characteristics

Tj=25°C unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

V

GS(th)

I

DSS

I

GSS

R

DSon

Dynamic characteristics

Q

g(tot)

Q

gs

Q

gd

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

Source-drain diode

V

SD

drain-source breakdown voltage ID= 250 µA; VGS=0V

=25°C 30--V

T

j

= −55 °C 27--V

T

j

gate-source threshold voltage ID= 1 mA; VDS=VGS; Figure 9 V

=25°C 0.45 0.7 - V

T

j

= 150 °C 0.25 0.4 - V

T

j

drain-source leakage current VDS=30V; VGS=0V

=25°C --1µA

T

j

= 150 °C - - 100 µA

T

j

gate-source leakage current VGS= ±8 V; VDS= 0 V - 10 100 nA drain-source on-state resistance VGS= 4.5 V; ID=2A;Figure 7 and 8

=25°C - 40 47 mΩ

T

j

= 150 °C - 68 79.9 mΩ

T

j

= 2.5 V; ID= 1.5 A; Figure 7 and 8 - 4553mΩ

V

GS

= 1.8 V; ID=1A;Figure 7 and 8 - 5573mΩ

V

GS

total gate charge ID= 1 A; VDD=15V; VGS= 4.5 V; gate-source charge - 0.7 - nC

Figure 13

- 9.3 - nC

gate-drain (Miller) charge - 2.2 - nC input capacitance VGS=0V; VDS= 30 V; f = 1 MHz; output capacitance - 65 - pF

Figure 11

- 445 - pF

reverse transfer capacitance - 50 - pF turn-on delay time VDD=15V; RL=15Ω;

= 4.5 V; RG=6Ω

V

rise time -12-ns

GS

-6-ns

turn-off delay time - 38 - ns fall time -12-ns

source-drain (diode forward) voltage IS= 1.25 A; VGS=0V;Figure 12 - 0.66 1.2 V

9397 750 11668

Product data Rev. 01 — 05 August 2003 5 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

20

I

D

(A)

15

10

5

0

0 0.5 1 1.5 2

2.5 V4.5 V

2.2 V

03an55

2 V

1.8 V

1.6 V

1.4 V

VGS = 1.2 V

V

(V)

DS

Tj=25°CT

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

03an56

2 V

2.2 V

2.5 V

R

(mΩ)

DSon

80

60

Tj = 25 °C

VGS = 1.8 V

20

V

> ID x R

DS

I

D

(A)

15

10

5

Tj = 150 °C

0

0123

=25°C and 150 °C; VDS> IDxR

j

DSon

25 °C

DSon

Fig 6. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

1.8

a

1.2

03an57

VGS (V)

03al00

40

20

0

0 5 10 15 20

4.5 V

ID (A)

Tj=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

0.6

0

-60 0 60 120 180

R

DSon

=

a

---------------------------- -

R

DSon 25 C°()

Tj (°C)

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

9397 750 11668

Product data Rev. 01 — 05 August 2003 6 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

1

V

GS(th)

(V)

0.8 typ

0.6

min

0.4

0.2

0

-60 0 60 120 180

ID= 1 mA; VDS=V

GS

03aj65

Tj (°C)

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

4

10

C

(pF)

-3

10

I

D

(A)

-4

10

min typ

-5

10

-6

10

0 0.2 0.4 0.6 0.8 1

03aj64

VGS (V)

Tj=25°C; VDS=5V

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

03an59

3

10

C

iss

2

10

-1

10

1 10 10

C C

VDS (V)

oss rss

2

VGS= 0 V; f = 1 MHz

Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.

9397 750 11668

Product data Rev. 01 — 05 August 2003 7 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

20

VGS = 0 V

I

S

(A)

15

10

5

150 °C

0

00.511.5

Tj = 25 °C

03an58

VSD (V)

5

ID = 1 A

V

GS

(V)

Tj = 25 °C

4

VDD = 15 V

3

2

1

0

0246810

Tj=25°C and 150 °C; VGS=0V ID= 1 A; VDD=15V

Fig 12. Source (diode forward) current as a function of

source-drain (diode forward) voltage; typical

Fig 13. Gate-source voltage as a function of gate

charge; typical values.

values.

03an60

QG (nC)

9397 750 11668

Product data Rev. 01 — 05 August 2003 8 of 12

Philips Semiconductors

PMV40UN

TrenchMOS™ ultra low level FET

7. Package outline

Plastic surface mounted package; 3 leads SOT23

D

3

A

1

12

e

1

b

p

e

w M

B

E

H

E

detail X

AB

Q

L

p

X

v M

A

c

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

A

UNIT

1.1

mm

0.9

OUTLINE VERSION

SOT23 TO-236AB

1

A

max.

0.48

0.1

0.38

cD

b

p

0.15

3.0

0.09

2.8

IEC JEDEC EIAJ

e

E

1.4

1.9

1.2

REFERENCES

e

0.95

H

L

Qwv

1

2.5

2.1

p

E

0.55

0.45

0.15

0.45

0.2

0.1

EUROPEAN

PROJECTION

ISSUE DATE

97-02-28 99-09-13

Fig 14. SOT23.

9397 750 11668

Product data Rev. 01 — 05 August 2003 9 of 12

Philips Semiconductors

8. Revision history

Table 6: Revision history

Rev Date CPCN Description

01 20030805 - Product data (9397 750 11668).

PMV40UN

TrenchMOS™ ultra low level FET

9397 750 11668

Product data Rev. 01 — 05 August 2003 10 of 12

Philips Semiconductors

9. Data sheet status

PMV40UN

TrenchMOS™ ultra low level FET

Level Data sheet status

I Objective data Development This data sheet contains data from the objective speciﬁcation for product development. Philips

II Preliminary data Qualiﬁcation This data sheet containsdatafrom the preliminary speciﬁcation. Supplementary datawillbe published

III Product data Production This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

[1]

Product status

10. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation.

[2][3]

Deﬁnition

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

at a later date.PhilipsSemiconductors reserves the right to change the speciﬁcation without notice,in order to improve the design and supply the best possible product.

right to make changes at anytimeinorder to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, andmakes no representationsor warranties thattheseproducts are free frompatent,copyright, or mask workrightinfringement, unless otherwise speciﬁed.

12. Trademarks

11. Disclaimers

TrenchMOS —is a trademark of Koninklijke Philips Electronics N.V.

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors

Contact information

For additional information, please visit http://www.semiconductors.philips.com. For sales ofﬁce addresses, send e-mail to: [email protected]. Fax: +31 40 27 24825

9397 750 11668

Product data Rev. 01 — 05 August 2003 11 of 12

Philips Semiconductors

Contents

1 Product proﬁle . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

5.1 Transient thermal impedance . . . . . . . . . . . . . . 4

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10

9 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 11

10 Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PMV40UN

TrenchMOS™ ultra low level FET

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Date of release: 05 August 2003 Document order number: 9397 750 11668