Philips pmk35ep Datasheet

Page 1

1. Product profile

1.1 General description

Extremely low level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only.
Low conduction losses due to low

1.3 Applications

Battery management Load switching
PMK35EP
P-channel TrenchMOS extremely low level FET
Rev. 02 — 29 April 2010 Product data sheet
on-state resistance

1.4 Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
I
D
P
tot
Static characteristics
R
DSon
Dynamic characteristics
Q
GD
drain-source voltage
drain current Tsp=25°C; VGS= -10 V; see
total power dissipation
drain-source on-state resistance
gate-drain charge VGS=-10V; ID=-9.2A;
25 °C ≤ Tj≤ 150 °C - - -30 V
---14.9A
Figure 1; see Figure 3
Tsp=25°C; see Figure 2 --6.9W
VGS=-10V; ID=-9.2A; T
=25°C; see Figure 9
j
=-15V; Tj=25°C;
V
DS
see Figure 11
; see Figure 12
- 1619mΩ
-6-nC
Page 2
NXP Semiconductors
4
5
1
8
G
D
S
001aaa025

2. Pinning information

PMK35EP
P-channel TrenchMOS extremely low level FET
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1Ssource 2Ssource 3Ssource 4 G gate 5 D drain 6 D drain
SOT96-1 (SO8)
7 D drain 8 D drain

3. Ordering information

Table 3. Ordering information
Type number Package
PMK35EP SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
Name Description Version

4. Limiting values

Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Typ Max Unit
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage 25 °C ≤ Tj≤ 150°C ---30V drain-gate voltage 25 °C ≤ Tj≤ 150 °C; RGS=20kΩ ---30V gate-source voltage -25 - 25 V drain current Tsp=25°C; VGS= -10 V; see Figure 1;
---14.9A
see Figure 3 T
= 100 °C; VGS= -10 V; see Figure 1 ---7A
sp
peak drain current Tsp=25°C; tp≤ 10 µs; pulsed;
---28.8A
see Figure 3 total power dissipation Tsp=25°C; see Figure 2 --6.9W storage temperature -55 - 150 °C junction temperature -55 - 150 °C
source current Tsp=25°C ---5.8A peak source current Tsp=25°C; tp≤ 10 µs; pulsed - - -23 A
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 2 of 12
Page 3
NXP Semiconductors
Tj (°C)
0 20015050 100
003aab604
40
80
120
I
der
(%)
0
Tsp (°C)
0 20015050 100
003aab948
40
80
120
P
der
(%)
0
003aab603
VDS (V)
−10
−1
−10
2
−10−1
−10
−1
−10
2
I
D
(A)
−10
−1
Limit R
DSon
= VDS / I
D
tp = 10 μs
1 ms
10 ms
100 ms
DC
PMK35EP
P-channel TrenchMOS extremely low level FET
Fig 1. Normalized continuous drain current as a
function of solder point temperature
T
= 25 °C; IDM is single pulse
sp
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

5. Thermal characteristics

Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-sp)
thermal resistance from junction to solder point
Fig 2. Normalized total power dissipation as a
function of solder point temperature
see Figure 4 --18K/W
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 3 of 12
Page 4
NXP Semiconductors
003aab605
1
10
−1
10
10
2
Z
th(j−sp)
(K/W)
10
−2
10
−4
tp (s)
11010
−1
10
−3
10
−2
t
p
t
p
T
P
t
T
δ =
single pul se
0.2
0.1
0.05
0.02
δ = 0.5
PMK35EP
P-channel TrenchMOS extremely low level FET
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration

6. Characteristics

Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
V
GS(th)
gate-source threshold voltage
I
DSS
I
GSS
R
DSon
drain leakage current VDS=-30V; VGS=0V; Tj=25°C ---1µA
gate leakage current VGS=20V; VDS=0V; Tj= 25 °C - - -100 nA
drain-source on-state resistance
Dynamic characteristi cs
Q
G(tot)
Q
GS
Q
GD
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 4 of 12
total gate charge ID=-9.2A; VDS=-15V; VGS=-10V; gate-source charge - 8 - nC gate-drain charge - 6 - nC
ID=-250µA; VGS=0V; Tj=25°C -30--V
=-250µA; VGS=0V; Tj=-55°C -27--V
I
D
ID=-250µA; VDS=VGS; Tj=25°C;
-1 - -3 V
see Figure 7; see Figure 8
=-250µA; VDS=VGS; Tj= 150 °C;
I
D
-0.7--V
see Figure 7; see Figure 8
=-250µA; VDS=VGS; Tj=-55°C;
I
D
see Figure 7
=-30V; VGS=0V; Tj= 70 °C - - -10 µA
V
DS
=-20V; VDS=0V; Tj= 25 °C - - -100 nA
V
GS
; see Figure 8
VGS=-10V; ID=-9.2A; Tj=25°C;
---3.3V
- 1619mΩ
see Figure 9
=-10V; ID=-9.2A; Tj=150°C;
V
GS
- 2531mΩ
see Figure 9
=-4.5V; ID=-6.8A; Tj=25°C;
V
GS
see Figure 10
; see Figure 9
- 2635mΩ
-42-nC
Tj=25°C; see Figure 11; see Figure 12
Page 5
NXP Semiconductors
VDS (V)
0 −2−1.5−0.5 −1
003aab606
−10
−20
−30
I
D
(A)
0
VGS (V) = −5 −4
−3.5
−3
−2.8
VGS (V)
0 −4−3−1 −2
003aab608
−10
−20
−30
I
D
(A)
0
Tj = 150 °C 25 °C
PMK35EP
P-channel TrenchMOS extremely low level FET
Table 6. Characteristics …continued
Symbol Parameter Conditions Min Typ Max Unit
V
GS(pl)
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Source-drain diode
V
SD
gate-source plateau voltage
input capacitance VDS=-25V; VGS= 0 V; f = 1 MHz; output capacitance - 365 - pF reverse transfer
ID=-9.2A; VDS=-15V; Tj=25°C;
see Figure 11
; see Figure 12
Tj=25°C; see Figure 13
--2.5-V
- 2100 - pF
- 275 - pF
capacitance turn-on delay time VDS=-25V; RL=6Ω; VGS=-10V;
R
=6Ω; Tj=25°C
rise time - 9 - ns
G(ext)
-9-ns
turn-off delay time - 50 - ns fall time - 24 - ns
source-drain voltage IS= -3.45 A; VGS=0V; Tj=25°C;
- -0.8 -1.2 V
see Figure 14
Fig 5. Output characteristics: drain current as a
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 5 of 12
Tj = 25 °C VDS > ID x R
Fig 6. Transfer characteristics: drain current as a
function of drain-source voltage; typical values
function of gate-source voltage; typical val ue s
DSon
Page 6
NXP Semiconductors
Tj (°C)
−60 180120060
003aab613
−2
−1
−3
−4
V
GS(th)
(V)
0
max.
typ.
min.
003aab612
−10
−4
−10
−5
−10
−3
I
D
(A)
−10
−6
VGS (V)
0 −4−3−1 −2
min. typ. max.
Tj (°C)
−60 180120060
003aab614
1
0.5
1.5
2
a
0
003aab607
ID (A)
0 −30−20−10
50
25
75
100
R
DSon
(mΩ)
0
VGS (V) = −3 −3.5
−4
−4.5
−5
PMK35EP
P-channel TrenchMOS extremely low level FET
ID = -1 mA; VDS = V
GS
Fig 7. Gate-source threshold voltage as a function of
junction temperature
Fig 9. Normalized drain-source on-state resistance
factor as a function of junction temperature
Tj = 25 °C; VDS = -5 V
Fig 8. Sub-threshold drain current as a function of
gate-source voltage
= 25 °C
T
j
Fig 10. Drain-source on-state resistance as a function
of drain current; typical values
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 6 of 12
Page 7
NXP Semiconductors
QG (nC)
05037.512.5 25
003aab611
−5
−2.5
−7.5
−10
V
GS
(V)
0
VDS = −5 V I
D
= −9.2 A
T
j
= 25 °C
003aaa508
V
GS
V
GS(th)
Q
GS1QGS2
Q
GD
V
DS
Q
G(tot)
I
D
Q
GS
V
GS(pl)
003aab610
VDS (V)
−10
−1
−10
2
−10−1
10
3
10
4
C
(pF)
10
2
C
iss
C
oss
C
rss
VSD (V)
0 −1.6−1.2−0.4 −0.8
003aab609
−12
−6
−18
−24
I
S
(A)
0
Tj = 150 °C 25 °C
ID = -9.2 A; VDS = -15 V; Tj = 25 °C
Fig 11. Gate-so urce voltage as a function of gate
charge; typical values
PMK35EP
P-channel TrenchMOS extremely low level FET
Fig 12. Gate charge waveform definitions
Fig 13. In put, output and reverse trans fer capacitances
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 7 of 12
VGS = 0 V; f = 1 MHz VGS = 0 V
Fig 14. Source current as a function of source-drain as a function of drain-source voltage; typical values
voltage; typical values
Page 8
NXP Semiconductors
UNIT
A
max.
A1A2A3b
p
cD
(1)E(2)
(1)
eHELLpQZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
0.7
0.6
0.7
0.3
8 0
o o
0.25 0.10.25
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
1.0
0.4
SOT96-1
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M
A
(A )
3
A
4
5
pin 1 index
1
8
y
076E03 MS-012
0.069
0.010
0.004
0.057
0.049
0.01
0.019
0.014
0.0100
0.0075
0.20
0.19
0.16
0.15
0.05
0.244
0.228
0.028
0.024
0.028
0.012
0.010.010.041 0.004
0.039
0.016
0 2.5 5 mm
scale
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
99-12-27 03-02-18

7. Package outline

PMK35EP
P-channel TrenchMOS extremely low level FET
Fig 15. Package outline SOT96-1 (SO8)
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 8 of 12
Page 9
NXP Semiconductors

8. Revision history

PMK35EP
P-channel TrenchMOS extremely low level FET
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PMK35EP_2 20100429 Product data sheet - PMK35EP_1 Modifications: PMK35EP_1 20070917 Product data sheet - -
• Various changes to content.
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 9 of 12
Page 10
NXP Semiconductors
PMK35EP
P-channel TrenchMOS extremely low level FET

9. Legal information

9.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product developmen t. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was pub lished and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
Product specificatio n — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

9.3 Disclaimers

Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as de fined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is open for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
, unless otherwise
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 10 of 12
Page 11
NXP Semiconductors
PMK35EP
P-channel TrenchMOS extremely low level FET
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It i s neit her qua lif ied nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, custome r (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed produ ct claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.

9.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
PMK35EP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 April 2010 11 of 12
Page 12
NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .4
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .8
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . .9
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .10
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .10
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .10
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .11
10 Contact information. . . . . . . . . . . . . . . . . . . . . .11
PMK35EP
P-channel TrenchMOS extremely low level FET
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 29 April 2010
Document identifier: PMK35EP
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