Philips PHW80NQ10T Datasheet

Philips Semiconductors Product specification

N-channel TrenchMOS transistor PHW80NQ10T

FEATURES SYMBOL QUICK REFERENCE DATA

• ’Trench’ technology

• Very low on-state resistance V

d

= 100 V

DSS

• Fast switching

• Low thermal resistance I

g

s

R

DS(ON)

= 80 A

D

≤ 15 mΩ

GENERAL DESCRIPTION PINNING SOT429 (TO247)

N-channel enhancement mode PIN DESCRIPTION
field-effect power transistor in a
plastic envelope using ’trench’ 1 gate
technology.

2 drain

Applications:-

• d.c. to d.c. converters 3 source

• switched mode power supplies

2

tab drain

1

The PHW80NQ10T is supplied in
the SOT429 (TO247) conventional
leaded package.

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

3

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DSS

V

DGR

V

GS

I

D

Drain-source voltage Tj = 25 ˚C to 175˚C - 100 V
Drain-gate voltage Tj = 25 ˚C to 175˚C; RGS = 20 kΩ - 100 V
Gate-source voltage - ± 20 V
Continuous drain current Tmb = 25 ˚C - 80 A

Tmb = 100 ˚C - 57 A

I

DM

P

D

Tj, T

Pulsed drain current Tmb = 25 ˚C - 320 A
Total power dissipation Tmb = 25 ˚C - 263 W
Operating junction and - 55 175 ˚C

stg

storage temperature

AVALANCHE ENERGY LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

E

AS

I

AS

Non-repetitive avalanche Unclamped inductive load, IAS = 74 A; - 481 mJ
energy tp = 100 µs; Tj prior to avalanche = 25˚C;

VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer

to fig:15
Non-repetitive avalanche - 80 A
current

August 1999 1 Rev 1.000

Philips Semiconductors Product specification

N-channel TrenchMOS transistor PHW80NQ10T

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT

R

th j-mb

R

th j-a

ELECTRICAL CHARACTERISTICS

Tj= 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GS(TO)

R

DS(ON)

I

GSS

I

DSS

Q

g(tot)

Q

gs

Q

gd

t

d on

t

r

t

d off

t

f

L

d

L

d

L

s

C

iss

C

oss

C

rss

Thermal resistance junction - 0.57 K/W
to mounting base
Thermal resistance junction in free air 45 - K/W
to ambient

Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V
voltage Tj = -55˚C 89 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2.0 3.0 4.0 V

Tj = 175˚C 1.0 - - V

Tj = -55˚C - - 6 V
Drain-source on-state VGS = 10 V; ID = 25 A - 12 15 mΩ
resistance Tj = 175˚C - - 41 mΩ
Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA
Zero gate voltage drain VDS = 100 V; VGS = 0 V; - 0.05 10 µA
current Tj = 175˚C - - 500 µA

Total gate charge ID = 75 A; V

= 80 V; VGS = 10 V - 109 - nC

DD

Gate-source charge - 20 - nC
Gate-drain (Miller) charge - 50 - nC

Turn-on delay time VDD = 50 V; RD = 1.8 Ω; - 30 - ns
Turn-on rise time VGS = 10 V; RG = 5.6 Ω -80-ns
Turn-off delay time Resistive load - 150 - ns
Turn-off fall time - 95 - ns

Internal drain inductance Measured from tab to centre of die - 3.5 - nH
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH
Internal source inductance Measured from source lead to source - 7.5 - nH

bond pad

Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 4720 - pF
Output capacitance - 650 - pF
Feedback capacitance - 380 - pF

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

S

I

SM

V

SD

t

rr

Q

rr

August 1999 2 Rev 1.000

Continuous source current - - 80 A
(body diode)
Pulsed source current (body - - 320 A
diode)
Diode forward voltage IF = 25 A; VGS = 0 V - 0.8 1.2 V

Reverse recovery time IF = 20 A; -dIF/dt = 100 A/µs; - 90 - ns
Reverse recovery charge VGS = 0 V; VR = 30 V - 0.3 - µC

Philips Semiconductors Product specification

N-channel TrenchMOS transistor PHW80NQ10T

Normalised Power Derating, PD (%)

100

90
80
70
60
50
40
30
20
10

0

0 25 50 75 100 125 150 175

Mounting Base temperature, Tmb (C)

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

Normalised Current Derating, ID (%)

100

90
80
70
60
50
40
30
20
10

0

0 25 50 75 100 125 150 175

Mounting Base temperature, Tmb (C)

D 25 ˚C

= f(Tmb)

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

D 25 ˚C

= f(Tmb)

Transient thermal impedance, Zth j-mb (K/W)

1

D = 0.5

0.2

0.1

0.1

0.05

0.02

0.01

single pulse

0.001
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00

Pulse width, tp (s)

P

D

D = tp/T

tp

T

Fig.4. Transient thermal impedance.

Z

= f(t); parameter D = tp/T

th j-mb

Drain Current, ID (A)

50

VGS = 15V

45
40
35
30
25
20
15
10

5
0

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

10 V

Drain-Source Voltage, VDS (V)

5 V

Tj = 25 C

3.6 V

4.6 V

4.4 V

4.2 V
4 V

3.8 V

Fig.5. Typical output characteristics, Tj = 25 ˚C

ID = f(VDS); parameter V

GS

.

Peak Pulsed Drain Current, IDM (A)

1000

RDS(on) = VDS/ ID

100

10

1

1 10 100 1000

D.C.

Drain-Source Voltage, VDS (V)

tp = 10 us

100 us

1 ms

10 ms
100 ms

Fig.3. Safe operating area. Tmb = 25 ˚C

ID & IDM = f(VDS); IDM single pulse; parameter t

p

Drain-Source On Resistance, RDS(on) (Ohms)

0.05

0.045

0.04

0.035

0.03

0.025

0.02

0.015

0.01

0.005
0

4 V

4.2 V

0 5 10 15 20 25 30 35 40 45 50

4.4 V

Drain Current, ID (A)

4.6 V

Tj = 25 C

VGS = 15V

Fig.6. Typical on-state resistance, Tj = 25 ˚C

R

= f(VGS)

DS(ON)

5V

10 V

.

August 1999 3 Rev 1.000