Philips php129nq04lt_phb129nq04lt Datasheet

1. Product proﬁle

1.1 Description

1.2 Features

1.3 Applications

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

Rev. 01 — 11 May 2004 Product data

Logic level N-channel enhancement mode ﬁeld-effect transistor in a plastic package using TrenchMOS™ technology.

■ Logic level threshold ■ Very low on-state resistance.

■ Motors, lamps, solenoids ■ Uninterruptible power supplies

■ DC-to-DC converters ■ General industrial applications.

1.4 Quick reference data

■ VDS≤ 40 V ■ ID≤ 75 A

■ P

≤ 200 W ■ R

tot

DSon

≤ 5mΩ.

2. Pinning information

Table 1: Pinning - SOT78 (TO-220AB) and SOT404 (D2-PAK), simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g) 2 drain (d) 3 source (s) mb mounting base;

connected to drain (d)

[1] It is not possible to make connection to pin 2 of the SOT404 package.

[1]

12mb3

SOT78 (TO-220AB)

MBK106

mb

2

13

SOT404 (D

2

-PAK)

MBK116

g

mbb076

d

s

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

3. Ordering information

Table 2: Ordering information

Type number Package

Name Description Version

PHP129NQ04LT TO-220AB Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 leads SOT78

2

PHB129NQ04LT D

-PAK Plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT404

4. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

S

I

SM

Avalanche ruggedness

E

DS(AL)S

drain-source voltage (DC) 25 °C ≤ Tj≤ 175 °C - 40 V drain-gate voltage (DC) 25 °C ≤ Tj≤ 175 °C; RGS=20kΩ -40V gate-source voltage (DC) - ±15 V drain current (DC) Tmb=25°C; VGS=10V;Figure 2 and 3 -75A

= 100 °C; VGS=10V;Figure 2 -75A

T

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs; Figure 3 - 240 A total power dissipation Tmb=25°C; Figure 1 - 200 W storage temperature −55 +175 °C junction temperature −55 +175 °C

source (diode forward) current (DC) Tmb=25°C - 75 A peak source (diode forward) current Tmb=25°C; pulsed; tp≤ 10 µs - 240 A

non-repetitive drain-source avalanche energy

unclamped inductive load; ID=69A;

= 0.27 ms; VDD≤ 40 V; RGS=50Ω;

t

p

= 10 V; starting Tj=25°C

V

GS

- 475 mJ

9397 750 13164

Product data Rev. 01 — 11 May 2004 2 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

120

P

der

(%)

80

40

0

0 50 100 150 200

P

tot

P

der

-----------------------

P

tot 25 C°()

100%×= I

03aa16

T

(°C)

mb

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

3

10

120

I

der

(%)

80

40

0

0 50 100 150 200

I

D

der

-------------------

I

D25C

()

100%×=

°

03aq72

Tmb (°C)

Fig 2. Normalized continuous drain current as a

function of mounting base temperature.

03aq74

I

D

Limit R

(A)

2

10

1

1 10 10

DSon

= V

DS

/ I

D

tp = 10 µs

100 µs

DC

1 ms

10 ms 100 ms

VDS (V)

Tmb=25°C; IDM is single pulse; VGS=10V

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

2

9397 750 13164

Product data Rev. 01 — 11 May 2004 3 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

5. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-mb)

R

th(j-a)

thermal resistance from junction to mounting base Figure 4 - - 0.75 K/W thermal resistance from junction to ambient

SOT78 vertical in still air - 60 - K/W SOT404 mounted on a printed-circuit

- 50 - K/W board; vertical in still air; minimum footprint.

5.1 Transient thermal impedance

03aq73

δ =

t

p

T

Z

th(j-mb) (K/W)

1

10

= 0.5

δ

0.2

0.1

-1

0.05

0.02 single pulse

P

-2

-4

10

-3

10

-2

10

-1

10

tp (s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

t

p

T

t

1

9397 750 13164

Product data Rev. 01 — 11 May 2004 4 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

6. Characteristics

Table 5: Characteristics

Tj=25°C unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

V

GS(th)

I

DSS

I

GSS

R

DSon

Dynamic characteristics

Q

g(tot)

Q

gs

Q

gd

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

Source-drain diode

V

SD

t

rr

Q

r

drain-source breakdown voltage ID= 250 µA; VGS=0V

=25°C 40--V

T

j

= −55 °C 36--V

T

j

gate-source threshold voltage ID= 1 mA; VDS=VGS; Figure 9 and 10

=25°C 1 1.5 2 V

T

j

= 175 °C 0.5 - - V

T

j

= −55 °C - - 2.2 V

T

j

drain-source leakage current VDS=40V; VGS=0V

=25°C --1µA

T

j

= 175 °C - - 500 µA

T

j

gate-source leakage current VGS= ±15 V; VDS= 0 V - 2 100 nA drain-source on-state resistance VGS= 10 V; ID=25A;Figure 7 and 8

=25°C - 4.1 5 mΩ

T

j

= 175 °C - 7.8 9.6 mΩ

T

j

=5V; ID=25A;Figure 7 and 8 - 5.7 6.4 mΩ

V

GS

= 4.5 V; ID=25A - - 7.1 mΩ

V

GS

total gate charge ID=25A;VDD=32V;VGS=5V;Figure 13 - 44.2 - nC gate-source charge - 10.9 - nC gate-drain (Miller) charge - 17.4 - nC input capacitance VGS=0V; VDS= 25 V; f = 1 MHz; output capacitance - 635 - pF

Figure 11

-3965-pF

reverse transfer capacitance - 280 - pF turn-on delay time VDD=30V; RL= 1.2 Ω;

=5V;RG=10Ω

V

rise time - 145 - ns

GS

-43-ns

turn-off delay time - 132 - ns fall time -92-ns

source-drain (diode forward) voltage IS= 25 A; VGS=0V;Figure 12 - 0.85 1.2 V reverse recovery time IS= 20 A; dIS/dt = −100 A/µs;

=0V;VR=30V

V

recovered charge - 57 - nC

GS

-61-ns

9397 750 13164

Product data Rev. 01 — 11 May 2004 5 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

V

GS

03aq75

5 V6 V

4.8 V

4.4 V

3.6 V

3.2 V

= 2.8 V

VDS (V)

4 V

240

Tj = 25 °C

I

D

(A)

160

80

0

0 0.5 1 1.5 2

10 V

Tj=25°CT

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

03aq76

4.4 V

4.8 V 5 V

6 V

10 V

R

DSon

(mΩ)

10

VGS = 4 VTj = 25 °C

8

6

4

80

VDS > ID x R

I

D

(A)

60

40

20

0

01234

=25°C and 175 °C; VDS> IDxR

j

DSon

Tj = 175 °C 25 °C

Fig 6. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

2

a

1.5

1

03aq77

VGS (V)

DSon

03aa27

2

0

0 80 160 240

ID (A)

Tj=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

9397 750 13164

0.5

0

-60 0 60 120 180

R

DSon

=

a

---------------------------- -

R

DSon 25 C°()

T

(°C)

j

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

Product data Rev. 01 — 11 May 2004 6 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

03aa33

V

2.5

GS(th)

(V)

2

1.5

1

max

typ

min

0.5

0

-60 0 60 120 180

ID= 1 mA; VDS=V

GS

T

(°C)

j

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

4

10

10 I

-1

D

03aa36

(A)

-2

10

-3

10

maxtypmin

-4

10

-5

10

-6

10

0123

(V)

V

GS

Tj=25°C; VDS=5V

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

03aq79

C

(pF)

10

3

2

-1

10

1 10 10

C

iss

C

oss

C

rss

VDS (V)

2

VGS= 0 V; f = 1 MHz

Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.

9397 750 13164

Product data Rev. 01 — 11 May 2004 7 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

80

VGS = 0 V

I

S

(A)

60

40

20

175 °C

0

0 0.3 0.6 0.9 1.2

Tj = 25 °C

03aq78

VSD (V)

10

V

ID = 25 A

GS

(V)

T

= 25 °C

j

8

6

4

2

0

0 25 50 75 100

14 V

Tj=25°C and 175 °C; VGS=0V ID= 25 A; VDD= 14 V and 32 V

Fig 12. Source (diode forward) current as a function of

source-drain (diode forward) voltage; typical

Fig 13. Gate-source voltage as a function of gate

charge; typical values.

values.

03aq80

VDD = 32 V

QG (nC)

9397 750 13164

Product data Rev. 01 — 11 May 2004 8 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

7. Package outline

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78

AE

p

A

1

q

D

1

D

(1)

L

1

b

L

1

L

2

mounting

base

Q

123

b

e

0 5 10 mm

scale

c

DIMENSIONS (mm are the original dimensions)

L

(1)

b

A

4.5

4.1

A

1.39

1.27

1

UNIT

mm

Note

1. Terminals in this zone are not tinned.

OUTLINE

VERSION

SOT78 SC-463-lead TO-220AB

b

c

1

1.3

1.0

0.7

0.4

0.9

0.7

IEC JEDEC EIAJ

D

15.8

6.4

15.2

5.9

REFERENCES

e

E

1

10.3

9.7

2.54

L

15.0

13.5

L

3.30

2.79

2

1

max.

3.0

qQ

p

3.8

3.0

3.6

2.7

EUROPEAN

PROJECTION

2.6

2.2

ISSUE DATE

00-09-07 01-02-16

Fig 14. SOT78 (TO-220AB).

9397 750 13164

Product data Rev. 01 — 11 May 2004 9 of 13

Philips Semiconductors

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped)

A

E

D

1

D

H

D

mounting

base

2

A

1

SOT404

13

e e

DIMENSIONS (mm are the original dimensions)

0.64

0.46

D

max.

11

UNIT

mm

A

4.50

4.10

OUTLINE VERSION

SOT404

A

1.40

1.27

b

1

0.85

0.60

IEC JEDEC EIAJ

D

1

1.60

10.30

1.20

9.70

REFERENCES

b

0 2.5 5 mm

scale

E

eLpH

2.90

2.54

2.10

D

15.80

14.80

Qc

2.60

2.20

L

p

c

Q

EUROPEAN

PROJECTION

ISSUE DATE

99-06-25 01-02-12

Fig 15. SOT404 (D2-PAK)

9397 750 13164

Product data Rev. 01 — 11 May 2004 10 of 13

Philips Semiconductors

8. Revision history

Table 6: Revision history

Rev Date CPCN Description

01 20040511 - Product data (9397 750 13164)

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

9397 750 13164

Product data Rev. 01 — 11 May 2004 11 of 13

Philips Semiconductors

9. Data sheet status

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

Level Data sheet status

I Objective data Development This data sheet contains data from the objective speciﬁcation for product development. Philips

II Preliminary data Qualiﬁcation This data sheetcontains data from thepreliminary speciﬁcation. Supplementary datawillbe published

III Product data Production This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

[1]

Product status

10. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation orwarranty that such applications willbesuitable for the speciﬁed use without further testing or modiﬁcation.

[2][3]

Deﬁnition

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

at a laterdate. Philips Semiconductors reserves theright to changethe speciﬁcation without notice, in order to improve the design and supply the best possible product.

right to makechangesat any time in order toimprove the design, manufacturingandsupply. Relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, andmakes norepresentations or warrantiesthat these productsare free frompatent, copyright, ormaskwork right infringement, unlessotherwise speciﬁed.

12. Trademarks

11. Disclaimers

TrenchMOS —is a trademark of Koninklijke Philips Electronics N.V.

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors

Contact information

For additional information, please visit http://www.semiconductors.philips.com. For sales ofﬁce addresses, send e-mail to: [email protected]. Fax: +31 40 27 24825

9397 750 13164

Product data Rev. 01 — 11 May 2004 12 of 13

Philips Semiconductors

Contents

1 Product proﬁle . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

5.1 Transient thermal impedance . . . . . . . . . . . . . . 4

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12

10 Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

PHP/PHB129NQ04LT

N-channel TrenchMOS™ logic level FET

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Date of release: 11 May 2004 Document order number: 9397 750 13164