Philips pemd15_pumd15 Datasheet [en, ca]

Page 1
PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
Rev. 03 — 2 September 2009 Product data sheet
1. Product profile

1.1 General description

NPN/PNP Resistor-Equipped Transistors (RET)
Table 1. Product overview
Type number Package PNP/PNP
PEMD15 SOT666 - PEMB15 PEMH15 PUMD15 SOT363 SC-88 PUMB15 PUMH15

1.2 Features

n Built-in bias resistors n Simplifies circuit design n Reduces component count n Reduces pick and place costs
NXP JEITA
complement
NPN/NPN complement
n Low current peripheral driver n Control of IC inputs n Replaces general-purpose transistors in digital applications

1.4 Quick reference data

Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
CEO
I
O
R1 bias resistor 1 (input) 3.3 4.7 6.1 kΩ R2/R1 bias resistor ratio 0.8 1 1.2
collector-emitter voltage open base - - 50 V output current (DC) - - 100 mA
Page 2
NXP Semiconductors

2. Pinning information

Table 3. Pinning
Pin Description Simplified outline Symbol
1 GND (emitter) TR1 2 input (base) TR1 3 output (collector) TR2 4 GND (emitter) TR2 5 input (base) TR2 6 output (collector) TR1
PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
6 45
1 32
001aab555
65 4
R2
R1
TR1
R2 R1
TR2

3. Ordering information

Table 4. Ordering information
Type number Package
PEMD15 - plastic surface mounted package; 6 leads SOT666 PUMD15 SC-88 plastic surface mounted package; 6 leads SOT363

4. Marking

Table 5. Marking codes
Type number Marking code
PEMD15 5E PUMD15 D0*
[1] * = -: made in Hong Kong
* = p: made in Hong Kong * = t: made in Malaysia * = W: made in China
1
23
006aaa143
Name Description Version
[1]
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 2 of 10
Page 3
NXP Semiconductors

5. Limiting values

Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor; for the PNP transistor with negative polarity
V
CBO
V
CEO
V
EBO
V
I
I
O
I
CM
P
tot
T
stg
T
j
T
amb
Per device
P
tot
PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
collector-base voltage open emitter - 50 V collector-emitter voltage open base - 50 V emitter-base voltage open collector - 10 V input voltage TR1
positive - +30 V negative - −10 V
input voltage TR2
positive - +10 V
negative - −30 V output current (DC) - 100 mA peak collector current - 100 mA total power dissipation T
SOT363
SOT666 storage temperature −65 +150 °C junction temperature - 150 °C ambient temperature −65 +150 °C
total power dissipation T
SOT363
SOT666
amb
amb
≤ 25 °C
≤ 25 °C
[1]
- 200 mW
[1][2]
- 200 mW
[1]
- 300 mW
[1][2]
- 300 mW
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 3 of 10
Page 4
NXP Semiconductors

6. Thermal characteristics

Table 7. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
R
th(j-a)
Per device
R
th(j-a)
[1] Device mounted on a FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method.
thermal resistance from junction to ambient
SOT363 SOT666
thermal resistance from junction to ambient
SOT363 SOT666
PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
in free air
[1]
- - 625 K/W
[1][2]
- - 625 K/W
in free air
[1]
- - 416 K/W
[1][2]
- - 416 K/W

7. Characteristics

Table 8. Characteristics
T
= 25°C unless otherwise specified.
amb
Symbol Parameter Conditions Min Typ Max Unit
Per transistor; for the PNP transistor with negative polarity
I
CBO
I
CEO
I
EBO
h
FE
V
CEsat
V
I(off)
V
I(on)
R1 bias resistor 1 (input) 3.3 4.7 6.1 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 C
c
collector-base cut-off
VCB=50V; IE= 0 A - - 100 nA
current collector-emitter
cut-off current
emitter-base cut-off
VCE=30V; IB=0A - - 1 µA
=30V; IB=0A;
V
CE
T
= 150 °C
j
--50µA
VEB=5V; IC= 0 A - - 0.9 mA
current DC current gain VCE=5V; IC=10mA 30 - ­collector-emitter
IC= 10 mA; IB= 0.5 mA - - 150 mV
saturation voltage off-state input voltage VCE=5V; IC= 100 µA - 1.1 0.5 V on-state input voltage VCE= 0.3 V; IC= 20 mA 2.5 1.9 - V
collector capacitance VCB=10V; IE=ie=0A;
f = 1 MHz TR1 (NPN) - - 2.5 pF TR2 (PNP) - - 3 pF
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 4 of 10
Page 5
NXP Semiconductors
PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
3
10
h
FE
2
10
10
1
−1
10
006aaa030
(1) (2) (3)
2
101
IC (mA)
10
VCE=5V (1) T (2) T (3) T
amb amb amb
= 150 °C =25°C = −40 °C
Fig 1. TR1 (NPN): DC current gain as a function of
collector current; typical values
1
V
CEsat
(V)
−1
10
−2
10
110
(1) (2) (3)
10
006aaa031
IC (mA)
IC/IB=20 (1) T (2) T (3) T
amb amb amb
= 100 °C =25°C = −40 °C
Fig 2. TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
2
10
V
I(on)
(V)
(1)
(2)
1
(3)
−1
10
−1
10
006aaa032
101
IC (mA)
10
VCE= 0.3 V (1) T (2) T (3) T
amb amb amb
= −40 °C =25°C = 100 °C
Fig 3. TR1 (NPN): On-state input voltage as a
function of collector current; typical values
10
V
I(off)
(V)
(1)
1
−1
2
10
(2)
(3)
−2
10
−1
006aaa033
IC (mA)
10110
VCE=5V (1) T (2) T (3) T
amb amb amb
= −40 °C =25°C = 100 °C
Fig 4. TR1 (NPN): Off-state input voltage as a
function of collector current; typical values
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 5 of 10
Page 6
NXP Semiconductors
PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
3
10
h
FE
2
10
10
1
−1
−10
006aaa213
(2)
(1)
(3)
2
−10−1 IC (mA)
−10
VCE= −5V (1) T (2) T (3) T
amb amb amb
= 150 °C =25°C = −40 °C
Fig 5. TR2 (PNP): DC current gain as a function of
collector current; typical values
−1
V
CEsat
(V)
−1
−10
−2
−10
−1 −10
(2)
−10
006aaa214
(1)
(3)
IC (mA)
IC/IB=20 (1) T (2) T (3) T
amb amb amb
= 100 °C =25°C = −40 °C
Fig 6. TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
2
006aaa215
−10−1 IC (mA)
−10
V
I(on)
(V)
−10
−10
−1
−1
−10
(1)
(2) (3)
−1
VCE= −0.3 V (1) T (2) T (3) T
amb amb amb
= −40 °C =25°C = 100 °C
Fig 7. TR2 (PNP): On-state input voltage as a
function of collector current; typical values
−10
V
I(off)
(V)
(1)
−1
−1
2
−10
−10
−2
(2) (3)
−1
006aaa216
IC (mA)
−10−1−10
VCE= −5V (1) T (2) T (3) T
amb amb amb
= −40 °C =25°C = 100 °C
Fig 8. TR2 (PNP): Off-state input voltage as a
function of collector current; typical values
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 6 of 10
Page 7
NXP Semiconductors

8. Package outline

PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
2.2
2.0
1.35
1.15
2.2
1.8
pin 1 index
132
0.65
1.3
0.45
465
0.15
0.3
0.2
1.1
0.8
0.25
0.10
1.7
1.5
1.7
1.3
1.5
1.1
06-03-16Dimensions in mm
Dimensions in mm
pin 1 index
123
0.5 1
Fig 9. Package outline SOT363 (SC-88) Fig 10. Package outline SOT666

9. Packing information

Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
Type number Package Description Packing quantity
3000 4000 8000 10000
PEMD15 SOT666 2 mm pitch, 8 mm tape and reel - - -315 -
4 mm pitch, 8 mm tape and reel - -115 - -
[2]
PUMD15 SOT363 4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-115 - - -135
[3]
-125 - - -165
0.6
0.5
456
0.3
0.1
0.27
0.17
[1]
0.18
0.08
04-11-08
[1] For further information and the availability of packing methods, seeSection 12. [2] T1: normal taping [3] T2: reverse taping
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 7 of 10
Page 8
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
PEMD15; PUMD15

10. Revision history

Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PEMD15_PUMD15_3 20090902 Product data sheet - PEMD15_PUMD15_2 Modifications:
PEMD15_PUMD15_2 20050425 Product data sheet - PUMD15_1 PUMD15_1 20040204 Product specification - -
• This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical content.
• Figure 9 “Package outline SOT363 (SC-88)”: updated
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 8 of 10
Page 9
NXP Semiconductors

11. Legal information

11.1 Data sheet status

PEMD15; PUMD15
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The productstatus of device(s) described inthis document may havechanged since this document waspublished andmay differin caseof multiple devices. The latest product status
information is available on the Internet at URL
[1][2]
Product status
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information includedherein and shallhave no liabilityfor the consequencesof use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with thesame product typenumber(s) and title.A short data sheetis intended for quickreference only and shouldnot be relied upon tocontain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

11.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXPSemiconductors does not giveany representations or warranties, expressed or implied, asto the accuracy or completenessof such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves theright to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. Thisdocument supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
[3]
http://www.nxp.com.
Definition
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in the Absolute MaximumRatings System of IEC 60134)may cause permanent damage tothe device. Limitingvalues are stress ratingsonly and operationof the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditionsof commercial sale, as published at
http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of anylicense under any copyrights,patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.

11.4 Trademarks

Notice: Allreferenced brands,product names, servicenames and trademarks are the property of their respective owners.

12. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
PEMD15_PUMD15_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 2 September 2009 9 of 10
Page 10
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ

13. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 7
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Contact information. . . . . . . . . . . . . . . . . . . . . . 9
13 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PEMD15; PUMD15
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 2 September 2009
Document identifier: PEMD15_PUMD15_3
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