Philips PDTC115EE Technical data

Philips PDTC115EE Technical data

DISCRETE SEMICONDUCTORS

DATA SHEET

M3D173

PDTC115EE

NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ

Product specification

 

2002 May 08

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Philips Semiconductors

Product specification

 

 

NPN resistor-equipped transistor;

Ω Ω PDTC115EE

R1 = 100 k , R2 = 100 k

FEATURES

Built-in bias resistors R1 and R2 (typically 100 kΩ each)

Simplification of circuit design

Reduces number of components and required PCB area.

APPLICATIONS

Especially suitable for space reduction in interface and driver circuits

Inverter circuit configuration without use of external resistors.

DESCRIPTION

NPN resistor-equipped transistor in a SOT416 (SC-75) plastic package.

MARKING

TYPE NUMBER

MARKING CODE

 

 

PDTC115EE

46

 

 

QUICK REFERENCE DATA

SYMBOL

PARAMETER

MAX.

UNIT

 

 

 

 

VCEO

collector-emitter voltage

50

V

IO

output current (DC)

20

mA

R1

bias resistor

100

kΩ

 

 

 

 

R2

bias resistor

100

kΩ

 

 

 

 

PINNING

 

 

 

 

 

 

PIN

DESCRIPTION

 

 

 

 

 

1

base/input

 

 

 

 

 

 

2

emitter/ground

 

 

 

 

 

 

3

collector/output

 

 

 

 

 

 

handbook, halfpage

3

 

3

 

 

 

 

 

R1

 

 

 

1

 

 

 

R2

1

 

2

2

 

 

Top view

 

 

MAM346

Fig.1 Simplified outline (SOT416) and symbol.

1

3

2

MGA893 - 1

Fig.2 Equivalent inverter symbol.

2002 May 08

2

Philips Semiconductors

Product specification

 

 

NPN resistor-equipped transistor;

Ω Ω PDTC115EE R1 = 100 k , R2 = 100 k

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

 

 

 

 

 

 

VCBO

collector-base voltage

open emitter

50

V

VCEO

collector-emitter voltage

open base

50

V

VEBO

emitter-base voltage

open collector

10

V

Vi

input voltage

 

 

 

 

 

positive

 

+40

V

 

negative

 

10

V

 

 

 

 

 

 

IO

output current (DC)

 

20

mA

ICM

peak collector current

 

100

mA

Ptot

total power dissipation

Tamb 25 °C; note 1

150

mW

Tstg

storage temperature

 

65

+150

°C

Tj

junction temperature

 

150

°C

Tamb

operating ambient temperature

 

65

+150

°C

Note

1. Refer to standard SOT416 (SC-75) mounting conditions.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

 

 

 

 

 

Rth j-a

thermal resistance from junction to

in free air; note 1

833

K/W

 

ambient

 

 

 

 

 

 

 

 

Note

 

 

 

 

1. Refer to standard SOT416 (SC-75) mounting conditions.

CHARACTERISTICS

Tamb = 25 °C unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

ICBO

collector-base cut-off current

VCB = 50 V; IE = 0

100

nA

ICEO

collector-emitter cut-off current

VCE = 30 V; IB = 0

1

μA

 

 

VCE = 30 V; IB = 0; Tj = 150 °C

50

μA

IEBO

emitter-base cut-off current

VEB = 5 V; IC = 0

50

μA

hFE

DC current gain

VCE = 5 V; IC = 5 mA

80

 

VCEsat

collector-emitter saturation voltage

IC = 300 mA; IB = 10 mA

150

mV

Vi(off)

input off voltage

VCE = 5 V; IC = 100 μA

0.5

V

Vi(on)

input on voltage

VCE = 0.3 V; IC = 1 mA

3

V

R1

input resistor

 

70

100

130

kΩ

 

 

 

 

 

 

 

R2

resistor ratio

 

0.8

1

1.2

 

-------

 

 

 

 

 

 

R1

 

 

 

 

 

 

Cc

collector capacitance

IE = ie = 0; VCB = 10 V;

2.5

pF

 

 

f = 1 MHz

 

 

 

 

 

 

 

 

 

 

 

2002 May 08

3

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