Philips pcd3755x DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
PCD3755A; PCD3755E; PCD3755F
Product specification Supersedes data of 1997 Apr 16 File under Integrated Circuits, IC03
2000 Oct 16
Philips Semiconductors Product specification
8-bit microcontrollerswith DTMF generator, 8 kbytes OTP and 128 bytes EEPROM
CONTENTS
1 FEATURES 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 BLOCK DIAGRAM 5 PINNING INFORMATION
5.1 Pinning
5.2 Pin description 6 FREQUENCY GENERATOR
6.1 Frequency generator derivative registers
6.2 Melody output (P1.7/MDY)
6.3 Frequency registers
6.4 DTMF frequencies
6.5 Modem frequencies
6.6 Musical scale frequencies 7 EEPROM AND TIMER 2 ORGANIZATION
7.1 EEPROM registers
7.2 EEPROM latches
7.3 EEPROM flags
7.4 EEPROM macros
7.5 EEPROM access
7.6 Timer 2 8 DERIVATIVE INTERRUPTS 9 TIMING 10 RESET 11 IDLE MODE 12 STOP MODE 13 INSTRUCTION SET RESTRICTIONS 14 OVERVIEW OF PORT AND
POWER-ON-RESET CONFIGURATION 15 OTP PROGRAMMING 16 SUMMARY OF DERIVATIVE REGISTERS 17 HANDLING 18 LIMITING VALUES 19 DC CHARACTERISTICS 20 AC CHARACTERISTICS 21 PACKAGE OUTLINES 22 SOLDERING
22.1 Reflow soldering
22.2 Wave soldering
22.3 DIP
22.4 Repairing soldered joints 23 DEFINITIONS 24 LIFE SUPPORT APPLICATIONS
PCD3755A; PCD3755E;
PCD3755F
2000 Oct 16 2
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

1 FEATURES

8-bit CPU, ROM, RAM, EEPROM and I/O; in a single
28-lead or 32-lead package
8 kbytes user-programmable ROM (One-Time
Programmable)
128 bytes RAM
128 bytes Electrically Erasable Programmable
Read-Only Memory (EEPROM)
Over 100 instructions (based onMAB8048) all of 1 or 2
cycles
20 quasi-bidirectional I/O port lines
8-bit programmable Timer/event counter 1
8-bit reloadable Timer 2
Three single-level vectored interrupts:
– external – 8-bit programmable Timer/event counter 1 – derivative; triggered by reloadable Timer 2
Twotestinputs,oneofwhichalsoservesastheexternal
interrupt input
DTMF, modem, musical tone generator
Reference for supply and temperature-independent
tone output
Filtering for low output distortion (CEPT compatible)
Melody output for ringer application
Power-on-reset
Stop and Idle modes
Supply voltage: 2 to 6 V (DTMF tone output and
EEPROM erase/write from 2.5 V)
Clock frequency: 1 to 16 MHz (3.58 MHz for DTMF
suggested)
Operating temperature: 25 to +70 °C
Manufactured in silicon gate CMOS process.
PCD3755A; PCD3755E;
PCD3755F

2 GENERAL DESCRIPTION

This data sheet details the specific properties of the PCD3755A, PCD3755E and PCD3755F. The devices differ in their Port and Power-on-reset configurations. References to ‘PCD3755x’ apply to all three types. The devices are members of the PCD33xxA family of microcontrollers. The shared properties of the family are described in the
“PCD33xxA family”
conjunction with this publication. The PCD3755A, PCD3755E and PCD3755F are
One-Time Programmable (OTP) microcontrollers designedprimarilyfortelephonyapplications.Theyinclude anon-chipgeneratorfordualtonemultifrequency(DTMF), modem and musical tones. In addition to dialling, generated frequencies can be made available as square waves(P1.7/MDY)for melody generation, providing ringer operation.
The PCD3755A, PCD3755E and PCD3755F also incorporate 128 bytes of EEPROM. The EEPROM can be used for storing telephone numbers, particularly for implementing redial functions.
The Power-on-reset circuitry is extra accurate to accommodate parallel telephones and fax equipment.
The instruction set is similar to that of the MAB8048 and is a sub-set of that listed in the sheet.
Remark: These products are design-in tools and should therefore not be used for mass production.
data sheet, which should be read in
“PCD33xxA family”
data

3 ORDERING INFORMATION (see note 1)

TYPE NUMBER
NAME DESCRIPTION VERSION
PCD3755xP DIP28 plastic dual in-line package; 28 leads (600 mil) SOT117-1 PCD3755xT SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 PCD3755xH LQFP32 plastic low profile quad flat package; 32 leads; body 7 × 7 × 1.4 mm SOT358-1
Note
1. Please refer to the Order Entry Form (OEF) for this device for the full type number to use when ordering. This type
number will also specify the required program and the ROM mask options.
2000 Oct 16 3
PACKAGE
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2000 Oct 16 4

4 BLOCK DIAGRAM

8 kbytes OTP and 128 bytes EEPROM
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator,
8
TIMER 2 RELOAD
REGISTER
POWER-ON-RESET
RESET
PORT 2
FLIP-FLOP
8
TIMER 2
REGISTER
P2.0 to P2.3
4 7
PORT 2
BUFFER
4
8
EEPROM ADDRESS REGISTER
EEPROM
128 bytes
V
POR
8
EEPROM
CONTROL
REGISTER
GENERATOR
HGF
REGISTER
8
8
EEPROM
DATA
TRANSFER
TONE
FILTER
SINE WAVE
derivative
interrupt
LGF
REGISTER
8
8
INTERRUPT
LOGIC
MELODY CONTROL REGISTER
ACCUMULATOR
timer interrupt
external interrupt
P1.7/MDY
PORT 1
FLIP-FLOP
8
8
TEMPORARY
STOP
IDLE
INTERRUPT INITIALIZE
P1.0 to P1.6
PORT 1
BUFFER
8
REGISTER 2
CE/T0
INTERNAL
CLOCK
FREQ.
30
32
T1
PCD3755x
88
TEMPORARY
REGISTER 1
CONTROL AND TIMING
OSCILLATOR
MEMORY
BANK
FLIP-FLOPS
TIMER/ EVENT
COUNTER
ARITHMETIC
LOGIC UNIT
DECIMAL
ADJUST
XTAL2XTAL1RESET
RESIDENT
OTP-ROM
8 kbytes
DECODE
HIGHER PROGRAM COUNTER
8
88 8
INSTRUCTION
REGISTER DECODER
LOWER PROGRAM COUNTER
5 888 8
AND
CONDITIONAL
BRANCH
LOGIC
PROGRAM
STATUS
WORD
RAM ADDRESS REGISTER
T 1 CE/T0
TIMER
FLAG
CARRY ACC
ACC BIT
TEST
MBG639
P0.0 to P0.7
PORT 0
BUFFER
PORT 0
FLIP-FLOP
MULTIPLEXER
REGISTER 0 REGISTER 1 REGISTER 2 REGISTER 3 REGISTER 4 REGISTER 5
D
REGISTER 6
E
REGISTER 7
C
8 LEVEL STACK
O
(VARIABLE LENGTH)
D
OPTIONAL SECOND
E
REGISTER BANK
DATA STORE
RESIDENT RAM ARRAY
128 bytes
8
8
PCD3755A; PCD3755E;
Fig.1 Block diagram.
handbook, full pagewidth
PCD3755F
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

5 PINNING INFORMATION

5.1 Pinning

handbook, halfpage
XTAL1 XTAL2
RESET
P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7
T1
CE/T0
1 2 3 4 5 6 7
PCD3755xP PCD3755xT
8
9 10 11 12
28 27 26 25 24 23 22 21 20 19 18 17
P0.0 P2.3 P2.2 P2.1
V
DD TONE V
SS P2.0
P1.7/MDY P1.6 P1.5 P1.4
PCD3755A; PCD3755E;
PCD3755F
handbook, full pagewidth
P1.0 P1.1
13
MBG640
16
P1.3
1514
P1.2
Fig.2 Pin configuration (SOT117-1 and SOT136-1).
P2.2
P2.3
P0.0
n.c.
P0.1
P0.2
P0.3
P0.4 32
31
30
29
28
27
26
25
n.c.
1 2
P0.5 P0.6
3 4
P0.7
T1 XTAL1 XTAL2
RESET
5 6 7 8
PCD3755xH
24 23 22 21 20 19 18 17
P2.1 V
DD TONE V
SS P2.0
P1.7/MDY P1.6 n.c.
9
10
11
12
P1.0
P1.1
CE/T0
P1.2
Fig.3 Pin configuration (SOT358-1).
2000 Oct 16 5
13 n.c.
14
P1.3
15
P1.4
16
P1.5
MBG641
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

5.2 Pin description Table 1 SOT117-1 and SOT136-1 packages (for information on parallel I/O ports, see Chapter 14)

SYMBOL PIN TYPE DESCRIPTION
P1.1 to P0.7 1 to 7 I/O 7 bits of Port 0: 8-bit quasi-bidirectional I/O port T1 8 I Test 1 or count input of 8-bit Timer/event counter 1 XTAL1 9 I crystal oscillator or external clock input XTAL2 10 O crystal oscillator output RESET 11 I reset input CE/
T0 12 I Chip Enable or Test 0 P1.0 to P1.6 13 to 19 I/O 7 bits of Port 1: 8-bit quasi-bidirectional I/O port P1.7/MDY 20 I/O 1 bit of Port 1: 8-bit quasi-bidirectional I/O port; or melody output P2.0 21 I/O 1 bit of Port 2: 4-bit quasi-bidirectional I/O port V
SS
TONE 23 O DTMF output V
DD
P2.1 to P2.3 25 to 27 I/O 3 bits of Port 2: 4-bit quasi-bidirectional I/O port P0.0 28 I/O 1 bit of Port 0: 8-bit quasi-bidirectional I/O port
22 P ground
24 P positive supply voltage
PCD3755A; PCD3755E;
PCD3755F
Table 2 SOT358-1 package (for information on parallel I/O ports, see Chapter 14)
SYMBOL PIN TYPE DESCRIPTION
n.c. 1, 13, 17, 28 not connected P0.5 to P0.7 2 to 4 I/O 3 bits of Port 0: 8-bit quasi-bidirectional I/O port T1 5 I Test 1 or count input of 8-bit Timer/event counter 1 XTAL1 6 I crystal oscillator or external clock input XTAL2 7 O crystal oscillator output RESET 8 I reset input CE/
T0 9 I Chip Enable or Test 0 P1.0 to P1.6 10 to 12,
14 to 16, 18 P1.7/MDY 19 I/O 1 bit of Port 1: 8-bit quasi-bidirectional I/O port; or melody output P2.0 20 I/O 1 bit of Port 2: 4-bit quasi-bidirectional I/O port V
SS
TONE 22 O DTMF output V
DD
P2.1 to P2.3 24 to 26 I/O 3 bits of Port 2: 4-bit quasi-bidirectional I/O port P0.0 to P0.4 27, 29 to 32 I/O 5 bits of Port 0: 8-bit quasi-bidirectional I/O port
21 P ground
23 P positive supply voltage
I/O 7 bits of Port 1: 8-bit quasi-bidirectional I/O port
2000 Oct 16 6
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

6 FREQUENCY GENERATOR

A versatile frequency generator section is provided (see Fig.4). For normal operation, use a 3.58 MHz quartz crystal or PXE resonator. The frequency generator includes precision circuitry for dual tone multifrequency (DTMF) signals, which is typically used for tone dialling telephone sets.
Theirfrequenciesareprovided in purely sinusoidal formon the TONE output or as square waves on the P1.7/MDY output.

6.1 Frequency generator derivative registers

6.1.1 HIGH AND LOW GROUP FREQUENCY REGISTERS Table 3 gives the addresses, mnemonics and access types of the High Group Frequency (HGF) and Low Group
Frequency (LGF) registers.
Table 3 Hexadecimal addresses, mnemonics, access types and bit mnemonics of the frequency registers
REGISTER
ADDRESS
11H HGF W H7H6H5H4H3H2H1H0 12H LGF W L7L6L5L4L3L2L1L0
REGISTER
MNEMONIC
ACCESS
TYPE
7 6 5 4 3 2 1 0
The TONE output can alternatively issue twelve modem frequencies for data rates between 300 and 1200 bits/s.
In addition to DTMF and modem frequencies, two octaves of musical scale in steps of semitones are available.
In case no tones are generated the TONE output is in 3-state mode.
PCD3755A; PCD3755E;
PCD3755F
BIT MNEMONICS
6.1.2 MELODY CONTROL REGISTER (MDYCON) MDYCON is a R/W register.
Table 4 Melody Control Register (address 13H)
7 6 5 4 3 2 1 0
0000000EMO
Table 5 Description of MDYCON bits
BIT MNEMONIC DESCRIPTION
7to1 These bits are set to a logic 0.
0 EMO Enable Melody Output. If bit EMO = 0, then P1.7/MDY is a standard port line.
If bit EMO = 1, then P1.7/MDY is the melody output. EMO = 1 does not inhibit the port instructions for P1.7/MDY. Therefore the state of both port line and flip-flop may be read in and the port flip-flop may be written by port instructions. However, the port flip-flop of P1.7/MDY must remain set to avoid conflicts between melody and port outputs. When the HGF contents are zero while EMO = 1, P1.7/MDY is in the logic HIGH state.
2000 Oct 16 7
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM
handbook, full pagewidth
8
8
8
INTERNAL BUS
8
MELODY CONTROL
REGISTER
HGF REGISTER
LGF REGISTER
square wave
DIGITAL
SINE WAVE
SYNTHESIZER
SWITCHED
CAPACITOR
BANDGAP
VOLTAGE
REFERENCE
DIGITAL
SINE WAVE
SYNTHESIZER
DAC
DAC
PCD3755A; PCD3755E;
PCD3755F
PORT/MELODY
OUTPUT LOGIC
SWITCHED
CAPACITOR
LOW-PASS
FILTER
RC LOW-PASS
FILTER
MLC416
P1.7/ MDY
TONE
Fig.4 Block diagram of the frequency generator and melody output (P1.7/MDY) section.
2000 Oct 16 8
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

6.2 Melody output (P1.7/MDY)

The melody output (P1.7/MDY) is very useful for generating musical tones when a purely sinusoidal signal is not required, such as for ringer applications.
The square wave (duty cycle =12⁄23 or 52%) will include the attenuated harmonics of the base frequency, which is defined by the contents of the HGF register (Table 3). However, even higher frequency tones may be produced since the low-pass filtering on the TONE output is not applied to the P1.7/MDY output. This results in the minimum decimal value x in the HGF register being 2 for the P1.7/MDY output, rather than 60 for the TONE output
- the value shown in equation (1). A sinusoidal TONE output is produced at the same time as the melody square wave, but due to the filtering, the higher frequency sine waves with x < 60 will not appear at the TONE output.
Since the melody output is shared with P1.7, the port flip-flop of P1.7 has to be set HIGH before using the melody output. This is to avoid conflicts between melody and port outputs. The melody output drive depends on the configuration of port P1.7/MDY; see Chapter 14, Table 24.

6.3 Frequency registers

PCD3755A; PCD3755E;
PCD3755F
The amplitude of the Low group frequency sine wave is attenuated by 2 dB compared to the amplitude of the High group frequency sine wave. The two sine waves are summed and then filtered by an on-chip switched capacitorandRClow-passfilters.These guarantee that all DTMF tones generated fulfil the CEPT recommendations with respect to amplitude, frequency deviation, total harmonic distortion and suppression of unwanted frequency components.
The value 00H in a frequency register stops the corresponding digital sine synthesizer. If both frequency registers contain 00H, the whole frequency generator is shut off, resulting in lower power consumption.
The frequency of the sine wave generated ‘f’ is dependent on the clock frequency ‘f in the frequency registers (HGF and LGF). The variables are related by the equation:
f
f
The frequency limitation given by x 60 is due to the low-pass filters which would attenuate higher frequency sine waves.
xtal
= where 60 x 255≤≤
----------------------------­23 x 2+()[]
’ and the decimal value ‘x’ held
xtal
(1)
The two frequency registers HGF and LGF define two frequencies. From these, the digital sine synthesizers together with the Digital-to-Analog Converters (DACs) construct two sine waves. Their amplitudes are precisely scaled according to the bandgap voltage reference. This ensures tone output levels independent of supply voltage and temperature.
2000 Oct 16 9
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

6.4 DTMF frequencies

Assuming an oscillator frequency f DTMF standard frequencies can be implemented as shown in Table 6.
The relationships between telephone keyboard symbols, DTMFfrequencypairsandthefrequencyregistercontents are given in Table 7.
Table 6 DTMF standard frequencies and their
implementation; value = LGF, HGF contents
VALUE
(HEX)
FREQUENCY (Hz) DEVIATION
STANDARD GENERATED (%) (Hz)
DD 697 697.90 0.13 0.90
C8 770 770.46 0.06 0.46 B5 852 850.45 0.18 1.55 A3 941 943.23 0.24 2.23 7F 1209 1206.45 0.21 2.55
72 1336 1341.66 0.42 5.66 67 1477 1482.21 0.35 5.21
5D 1633 1638.24 0.32 5.24
Table 7 Dialling symbols, corresponding DTMF
frequency pairs and frequency register contents
TELEPHONE
KEYBOARD
SYMBOLS
DTMF FREQ.
PAIRS
(Hz)
0 (941, 1336) A3 72 1 (697, 1209) DD 7F 2 (697, 1336) DD 72 3 (697, 1477) DD 67 4 (770, 1209) C8 7F 5 (770, 1336) C8 72 6 (770, 1477) C8 67 7 (852, 1209) B5 7F 8 (852, 1336) B5 72 9 (852, 1477) B5 67 A (697, 1633) DD 5D
B (770, 1633) C8 5D C (852, 1633) B5 5D D (941, 1633) A3 5D
(941, 1209) A3 7F
# (941, 1477) A3 67
= 3.58 MHz, the
xtal
LGF
VALUE
(HEX)
HGF
VALUE
(HEX)
PCD3755A; PCD3755E;
PCD3755F

6.5 Modem frequencies

Again assuming an oscillator frequency f the standard modem frequencies can be implemented as in Table 8. It is suggested to define the frequency by the HGF register while the LGF register contains 00H, disabling Low Group Frequency generation.
Table 8 Standard modem frequencies and their
implementation
HGF
FREQUENCY (Hz) DEVIATION
VALUE
(HEX)
9D 980
82 1180
8F 1070
79 1270 80 1200 45 2200 76 1300 48 2100
5C 1650
52 1850
4B 2025
44 2225
MODEM GENERATED (%) (Hz)
(1)
(1) (2) (2) (3) (3) (4) (4) (1) (1) (2) (2)
978.82 0.12 1.18
1179.03 0.08 0.97
1073.33 0.31 3.33
1265.30 0.37 4.70
1197.17 0.24 2.83
2192.01 0.36 7.99
1296.94 0.24 3.06
2103.14 0.15 3.14
1655.66 0.34 5.66
1852.77 0.15 2.77
2021.20 0.19 3.80
2223.32 0.08 1.68
Notes
1. Standard is V.21.
2. Standard is Bell 103.
3. Standard is Bell 202.
4. Standard is V.23.
= 3.58 MHz,
xtal
2000 Oct 16 10
Philips Semiconductors Product specification
8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM

6.6 Musical scale frequencies

Finally, two octaves of musical scale in steps of semitones can be realized, again assuming an oscillator frequency f
= 3.58 MHz (Table 9). It is suggested to define the
xtal
frequency by the HGF register while the LGF contains 00H, disabling Low Group Frequency generation.
Table 9 Musical scale frequencies and their
implementation
HGF
NOTE
D#5 F8 622.3 622.5
E5 EA 659.3 659.5 F5 DD 698.5 697.9
F#5 D0 740.0 741.1
G5 C5 784.0 782.1
G#5 B9 830.6 832.3
A5 AF 880.0 879.3
A#5 A5 923.3 931.9
B5 9C 987.8 985.0
C6 93 1046.5 1044.5
C#6 8A 1108.7 1111.7
D6 82 1174.7 1179.0
D#6 7B 1244.5 1245.1
E6 74 1318.5 1318.9 F6 6D 1396.9 1402.1
F#6 67 1480.0 1482.2
G6 61 1568.0 1572.0
G#6 5C 1661.2 1655.7
A6 56 1760.0 1768.5
A#6 51 1864.7 1875.1
B6 4D 1975.5 1970.0
C7 48 2093.0 2103.3
C#7 44 2217.5 2223.3
D7 40 2349.3 2358.1
D#7 3D 2489.0 2470.4
VALUE
(HEX)
FREQUENCY (Hz)
STANDARD
(1)
GENERATED
PCD3755A; PCD3755E;
PCD3755F

7 EEPROM AND TIMER 2 ORGANIZATION

The PCD3755A, PCD3755E and PCD3755F have 128 bytes of Electrically Erasable Programmable Read-OnlyMemory(EEPROM). Such non-volatilestorage provides data retention without the need for battery backup. In telecom applications, the EEPROM is used for storing redial numbers and for short dialling of frequently usednumbers. More generally, EEPROM may be used for customizing microcontrollers, such as to include a PIN code or a country code, to define trimming parameters, to select application features from the range stored in ROM.
The most significant difference between a RAM and an EEPROM is that a bit in EEPROM, once written to a logic 1, cannot be cleared by a subsequent write operation. Successive write accesses actually perform a logical OR with the previously stored information. Therefore, to clear a bit, the whole byte must be erased and re-written with the particular bit cleared. Thus, an erase-and-write operation is the EEPROM equivalent of a RAM write operation.
Whereas read access times to an EEPROM are comparable to RAM access times, write and erase accesses are much slower at 5 ms each. To make these operations more efficient, several provisions are available in the PCD3755A, PCD3755E and PCD3755F.
First, the EEPROM array is structured into 32 four-byte pages (see Fig.5) permitting access to 4 bytes in parallel (write page, erase/write page and erase page). It is also possible to erase and write individual bytes. Finally, the EEPROM address register provides auto-incrementing, allowing very efficient read and write accesses to sequential bytes.
To simplify the erase and write timing, the derivative 8-bit down-counter (Timer 2) with reload register is provided. In addition to EEPROM timing, Timer 2 can be used for general real-time tasks, such as for measuring signal duration and for defining pulse widths.
Note
1. Standard scale based on A4 @ 440 Hz.
2000 Oct 16 11
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