• Two test inputs, one of which also serves as the external
interrupt input
• DTMF, modem, musical tone generator
• Reference for supply and temperature-independent
tone output
• Filtering for low output distortion (CEPT compatible)
• Melody output for ringer application
• Power-on-reset
• Stop and Idle modes
• Supply voltage: 1.8 to 6 V (DTMF tone output and
EEPROM erase/write from 2.5 V)
• Clock frequency: 1 to 16 MHz (3.58 MHz for DTMF
suggested)
• Operating temperature: −25 to +70 °C
• Manufactured in silicon gate CMOS process.
PCD3755A; PCD3755E;
PCD3755F
2GENERAL DESCRIPTION
This data sheet details the specific properties of the
PCD3755A, PCD3755E and PCD3755F. The devices
differ in their Port and Power-on-reset configurations.
References to ‘PCD3755x’ apply to all three types.
The devices are members of the PCD33xxA family of
microcontrollers.
The shared properties of the family are described in the
“PCD33xxA family”
conjunction with this publication.
The PCD3755A, PCD3755E and PCD3755F are
One-Time Programmable (OTP) microcontrollers
designed primarily for telephony applications.They include
an on-chip generator for dual tone multifrequency (DTMF),
modem and musical tones. In addition to dialling,
generated frequencies can be made available as square
waves (P1.7/MDY) for melody generation, providing ringer
operation.
The PCD3755A, PCD3755E and PCD3755F also
incorporate 128 bytes of EEPROM. The EEPROM can be
used for storing telephone numbers, particularly for
implementing redial functions.
The Power-on-reset circuitry is extra accurate to
accommodate parallel telephones and fax equipment.
The instruction set is similar to that of the MAB8048 and is
a sub-set of that listed in the
sheet.
8-bit microcontrollers with DTMF generator,
8 kbytes OTP and 128 bytes EEPROM
5PINNING INFORMATION
5.1Pinning
handbook, halfpage
XTAL1
XTAL2
RESET
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
T1
CE/T0
1
2
3
4
5
6
7
PCD3755xP
PCD3755xT
8
9
10
11
12
28
27
26
25
24
23
22
21
20
19
18
17
P0.0
P2.3
P2.2
P2.1
V
DD
TONE
V
SS
P2.0
P1.7/MDY
P1.6
P1.5
P1.4
PCD3755A; PCD3755E;
PCD3755F
handbook, full pagewidth
P1.0
P1.1
13
MBG640
16
P1.3
1514
P1.2
Fig.2 Pin configuration (SOT117-1 and SOT136-1).
P2.2
P2.3
P0.0
n.c.
P0.1
P0.2
P0.3
P0.4
32
31
30
29
28
27
26
25
n.c.
1
2
P0.5
P0.6
3
4
P0.7
T1
XTAL1
XTAL2
RESET
5
6
7
8
PCD3755xH
24
23
22
21
20
19
18
17
P2.1
V
DD
TONE
V
SS
P2.0
P1.7/MDY
P1.6
n.c.
9
10
11
12
P1.0
P1.1
CE/T0
P1.2
Fig.3 Pin configuration (SOT358-1).
1997 Apr 165
13
n.c.
14
P1.3
15
P1.4
16
P1.5
MBG641
Philips SemiconductorsProduct specification
8-bit microcontrollers with DTMF generator,
8 kbytes OTP and 128 bytes EEPROM
5.2Pin description
Table 1 SOT117-1 and SOT136-1 packages (for information on parallel I/O ports, see Chapter 14)
SYMBOLPINTYPEDESCRIPTION
P1.1 to P0.71 to 7I/O7 bits of Port 0: 8-bit quasi-bidirectional I/O port
T18ITest 1 or count input of 8-bit Timer/event counter 1
XTAL19Icrystal oscillator or external clock input
XTAL210Ocrystal oscillator output
RESET11Ireset input
CE/
T012IChip Enable or Test 0
P1.0 to P1.613 to 19I/O7 bits of Port 1: 8-bit quasi-bidirectional I/O port
P1.7/MDY20I/O1 bit of Port 1: 8-bit quasi-bidirectional I/O port; or melody output
P2.021I/O1 bit of Port 2: 4-bit quasi-bidirectional I/O port
V
SS
TONE23ODTMF output
V
DD
P2.1 to P2.325 to 27I/O3 bits of Port 2: 4-bit quasi-bidirectional I/O port
P0.028I/O1 bit of Port 0: 8-bit quasi-bidirectional I/O port
22Pground
24Ppositive supply voltage
PCD3755A; PCD3755E;
PCD3755F
Table 2 SOT358-1 package (for information on parallel I/O ports, see Chapter 14)
SYMBOLPINTYPEDESCRIPTION
n.c.1, 13, 17, 28−not connected
P0.5 to P0.72 to 4I/O3 bits of Port 0: 8-bit quasi-bidirectional I/O port
T15ITest 1 or count input of 8-bit Timer/event counter 1
XTAL16Icrystal oscillator or external clock input
XTAL27Ocrystal oscillator output
RESET8Ireset input
CE/
T09IChip Enable or Test 0
P1.0 to P1.610 to 12,
14 to 16, 18
P1.7/MDY19I/O1 bit of Port 1: 8-bit quasi-bidirectional I/O port; or melody output
P2.020I/O1 bit of Port 2: 4-bit quasi-bidirectional I/O port
V
SS
TONE22ODTMF output
V
DD
P2.1 to P2.324 to 26I/O3 bits of Port 2: 4-bit quasi-bidirectional I/O port
P0.0 to P0.427, 29 to 32I/O5 bits of Port 0: 8-bit quasi-bidirectional I/O port
21Pground
23Ppositive supply voltage
I/O7 bits of Port 1: 8-bit quasi-bidirectional I/O port
1997 Apr 166
Philips SemiconductorsProduct specification
8-bit microcontrollers with DTMF generator ,
8 kbytes OTP and 128 bytes EEPROM
6FREQUENCY GENERATOR
A versatile frequency generator section is provided (see
Fig.4). For normal operation, use a 3.58 MHz quartz
crystal or PXE resonator. The frequency generator
includes precision circuitry for dual tone multifrequency
(DTMF) signals, which is typically used for tone dialling
telephone sets.
Their frequencies are provided in purely sinusoidal form on
the TONE output or as square waves on the P1.7/MDY
output.
6.1Frequency generator derivative registers
6.1.1H
Table 3 gives the addresses, mnemonics and access types of the High Group Frequency (HGF) and Low Group
Frequency (LGF) registers.
Table 3 Hexadecimal addresses, mnemonics, access types and bit mnemonics of the frequency registers
REGISTER
ADDRESS
IGH AND LOW GROUP FREQUENCY REGISTERS
REGISTER
MNEMONIC
11HHGFWH7H6H5H4H3H2H1H0
12HLGFWL7L6L5L4L3L2L1L0
ACCESS
TYPE
7 6 5 4 3 2 1 0
The TONE output can alternatively issue twelve modem
frequencies for data rates between 300 and 1200 bits/s.
In addition to DTMF and modem frequencies, two octaves
of musical scale in steps of semitones are available.
In case no tones are generated the TONE output is in
3-state mode.
BIT MNEMONICS
PCD3755A; PCD3755E;
PCD3755F
6.1.2M
MDYCON is a R/W register.
Table 4 Melody Control Register (address 13H)
Table 5 Description of MDYCON bits
ELODY CONTROL REGISTER (MDYCON)
7 6 5 4 3 2 1 0
0000000EMO
BITMNEMONICDESCRIPTION
7to1−These bits are set to a logic 0.
0EMOEnable Melody Output. If bit EMO = 0, then P1.7/MDY is a standard port line.
If bit EMO = 1, then P1.7/MDY is the melody output. EMO = 1 does not inhibit the port
instructions for P1.7/MDY. Therefore the state of both port line and flip-flop may be read
in and the port flip-flop may be written by port instructions. However, the port flip-flop of
P1.7/MDY must remain set to avoid conflicts between melody and port outputs.
When the HGF contents are zero while EMO = 1, P1.7/MDY is in the logic HIGH state.
1997 Apr 167
Philips SemiconductorsProduct specification
8-bit microcontrollers with DTMF generator ,
8 kbytes OTP and 128 bytes EEPROM
handbook, full pagewidth
8
8
8
INTERNAL BUS
8
MELODY CONTROL
REGISTER
HGF REGISTER
LGF REGISTER
square wave
DIGITAL
SINE WAVE
SYNTHESIZER
SWITCHED
CAPACITOR
BANDGAP
VOLTAGE
REFERENCE
DIGITAL
SINE WAVE
SYNTHESIZER
DAC
DAC
PCD3755A; PCD3755E;
SWITCHED
CAPACITOR
LOW-PASS
FILTER
PCD3755F
PORT/MELODY
OUTPUT LOGIC
RC LOW-PASS
FILTER
MLC416
P1.7/
MDY
TONE
Fig.4 Block diagram of the frequency generator and melody output (P1.7/MDY) section.
1997 Apr 168
Philips SemiconductorsProduct specification
8-bit microcontrollers with DTMF generator,
8 kbytes OTP and 128 bytes EEPROM
6.2Melody output (P1.7/MDY)
The melody output (P1.7/MDY) is very useful for
generating musical tones when a purely sinusoidal signal
is not required, such as for ringer applications.
The square wave (duty cycle =12⁄23 or 52%) will include
the attenuated harmonics of the base frequency, which is
defined by the contents of the HGF register (Table 3).
However, even higher frequency tones may be produced
since the low-pass filtering on the TONE output is not
applied to the P1.7/MDY output. This results in the
minimum decimal value x in the HGF register being 2 for
the P1.7/MDY output, rather than 60 for the TONE output
- the value shown in equation (1). A sinusoidal TONE
output is produced at the same time as the melody square
wave, but due to the filtering, the higher frequency sine
waves with x < 60 will not appear at the TONE output.
Since the melody output is shared with P1.7, the port
flip-flop of P1.7 has to be set HIGH before using the
melody output. This is to avoid conflicts between melody
and port outputs. The melody output drive depends on the
configuration of port P1.7/MDY; see Chapter 14, Table 24.
6.3Frequency registers
PCD3755A; PCD3755E;
PCD3755F
The amplitude of the Low group frequency sine wave is
attenuated by 2 dB compared to the amplitude of the High
group frequency sine wave. The two sine waves are
summed and then filtered by an on-chip switched
capacitor and RC low-pass filters. These guarantee that all
DTMF tones generated fulfil the CEPT recommendations
with respect to amplitude, frequency deviation, total
harmonic distortion and suppression of unwanted
frequency components.
The value 00H in a frequency register stops the
corresponding digital sine synthesizer. If both frequency
registers contain 00H, the whole frequency generator is
shut off, resulting in lower power consumption.
The frequency of the sine wave generated ‘f’ is dependent
on the clock frequency ‘f
in the frequency registers (HGF and LGF). The variables
are related by the equation:
f
=where60x 255≤≤
f
The frequency limitation given by x ≥ 60 is due to the
low-pass filters which would attenuate higher frequency
sine waves.
xtal
--------------------------------23 x 2+()[]
’ and the decimal value ‘x’ held
xtal
(1)
The two frequency registers HGF and LGF define two
frequencies. From these, the digital sine synthesizers
together with the Digital-to-Analog Converters (DACs)
construct two sine waves. Their amplitudes are precisely
scaled according to the bandgap voltage reference. This
ensures tone output levels independent of supply voltage
and temperature.
1997 Apr 169
Philips SemiconductorsProduct specification
8-bit microcontrollers with DTMF generator,
8 kbytes OTP and 128 bytes EEPROM
6.4DTMF frequencies
Assuming an oscillator frequency f
DTMF standard frequencies can be implemented as
shown in Table 6.
The relationships between telephone keyboard symbols,
DTMF frequency pairs and the frequency register contents
are given in Table 7.
Again assuming an oscillator frequency f
the standard modem frequencies can be implemented as
in Table 8. It is suggested to define the frequency by the
HGF register while the LGF register contains 00H,
disabling Low Group Frequency generation.
Table 8 Standard modem frequencies and their
implementation
HGF
FREQUENCY (Hz) DEVIATION
VALUE
(HEX)
9D980
821180
8F1070
791270
801200
452200
761300
482100
5C1650
521850
4B2025
442225
MODEMGENERATED(%)(Hz)
(1)
(1)
(2)
(2)
(3)
(3)
(4)
(4)
(1)
(1)
(2)
(2)
978.82−0.12−1.18
1179.03−0.08−0.97
1073.330.313.33
1265.30−0.37−4.70
1197.17−0.24−2.83
2192.01−0.36−7.99
1296.94−0.24−3.06
2103.140.153.14
1655.660.345.66
1852.770.152.77
2021.20−0.19−3.80
2223.32−0.08−1.68
Notes
1. Standard is V.21.
2. Standard is Bell 103.
3. Standard is Bell 202.
4. Standard is V.23.
= 3.58 MHz,
xtal
1997 Apr 1610
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