• Two test inputs, one of which also serves as the external
interrupt input
• Stop and Idle modes for power saving
• Logic supply: 1.8 to 6 V
• CPU clock frequency: 1 to 16 MHz
• Operating temperature: −25 to +70 °C
• Manufactured in silicon gate CMOS process.
PCD3745A
2GENERAL DESCRIPTION
The PCD3745A is a microcontroller oriented towards
communication and metering applications. It has
4.5 kbytes of One Time Programmable (OTP) memory,
224 bytes RAM and 16 I/O lines.
The PCD3745A also incorporates a low power Real-Time
Clock (RTC) and two low power 16-bit counters. The RTC
runs using a 32 kHz crystal oscillator and is register
adjustable. The RTC and the counters are able to operate
in all microcontroller modes. The instruction set is based
on that of the MAB8048 and is software compatible with
the PCD33xxA family.
This data sheet details the specific properties of the
PCD3745A. The shared characteristics of the PCD33xxA
family of microcontrollers are described in the
8-bit microcontroller with 4.5 kbytes OTP
memory and 32 kHz real-time clock
5PINNING INFORMATION
5.1Pinning
handbook, halfpage
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
T1
XTAL1
XTAL2
RESET
CE/T0
P1.0
P1.1
1
2
3
4
5
6
7
PCD3745A
8
9
10
11
12
13
MBH910
28
27
26
25
24
23
22
21
20
19
18
17
16
1514
P0.0
CLK2
CLK1
EMUN
V
DD
RTC2
V
SS
RTC1
P1.7/RCO
P1.6
P1.5
P1.4
P1.3
P1.2
PCD3745A
handbook, full pagewidth
Fig.2 Pin configuration (SOT117-1 and SOT136-1).
CLK1
CLK2
P0.0
n.c.
P0.1
P0.2
P0.3
P0.4
31
n.c.
P0.5
P0.6
P0.7
T1
XTAL1
XTAL2
RESET
32
1
2
3
4
5
6
7
8
9
CE/T0
10
P1.0
30
29
PCD3745A
11
12
P1.1
P1.2
28
13
n.c.
27
14
P1.3
26
15
P1.4
25
16
P1.5
EMUN
24
V
23
RTC2
22
V
21
20
RTC1
P1.7/RCO
19
P1.6
18
17
n.c.
MBH911
DD
SS
Fig.3 Pin configuration (SOT358-1).
1999 Feb 025
Philips SemiconductorsProduct specification
8-bit microcontroller with 4.5 kbytes OTP
PCD3745A
memory and 32 kHz real-time clock
5.2Pin description
Table 1 SOT117-1 and SOT136-1 packages
SYMBOLPINDESCRIPTION
P0.0 to P0.728, 1 to 7Port 0: 8 quasi-bidirectional I/O lines
T18Test 1 or count input of 8-bit Timer/event counter 1
XTAL19crystal oscillator or external clock input
XTAL210crystal oscillator output
RESET11reset input
CE/
T012chip enable or Test 0
P1.0 to P1.613 to 19Port 1: 7 quasi-bidirectional I/O lines
P1.7/RCO20Port 1: 1 quasi-bidirectional I/O line/Real Clock Output 16 kHz
RTC121RTC 32 kHz oscillator input
V
SS
RTC223RTC 32 kHz oscillator output
V
DD
EMUN25emulation pin, must be connected to V
CLK126count input of 16-bit peripheral Counter 1
CLK227count input of 16-bit peripheral Counter 2
22ground
24positive supply voltage
for normal mode operation.
DD
Table 2 SOT358-1 package
SYMBOLPINDESCRIPTION
n.c.1, 13, 17, 28not connected
T15Test 1 or count input of 8-bit Timer/event counter 1
XTAL16crystal oscillator or external clock input
XTAL27crystal oscillator output
RESET8reset input
CE/
T09chip enable or Test 0
P1.0 to P1.610 to 12,
Port 1: 7 quasi-bidirectional I/O lines
14 to 16, 18
P1.7/RCO19Port 1: 1 quasi-bidirectional I/O line/Real Clock Output 16 kHz
RTC120RTC 32 kHz oscillator input
V
SS
21ground
RTC222RTC 32 kHz oscillator output
V
DD
EMUN24emulation pin, must be connected to V
23positive supply voltage
for normal mode operation.
DD
CLK125count input of 16-bit peripheral Counter 1
CLK226count input of 16-bit peripheral Counter 2
P0.0 to P0.727, 29 to 32,
Port 0: 8 quasi-bidirectional I/O lines
2to4
1999 Feb 026
Philips SemiconductorsProduct specification
8-bit microcontroller with 4.5 kbytes OTP
memory and 32 kHz real-time clock
6REAL-TIME CLOCK (RTC)
The RTC consists of a 32 kHz crystal oscillator, a 32 kHz
to 1 second, 1.5 second and 1 minute divider chain, an
8-bit Frequency Adjustment Register (FAR) and the Clock
Control Register (CLCR). The complete real-time clock
section is independent of the microcontroller status, even
in Idle or Stop mode.
6.1Oscillator
The internal 32 kHz oscillator requires an external
32.768 kHz quartz crystal (a positive deviation up to
+259 ppm is allowed by using frequency adjustment) and
an external feedback resistor (4.7 MΩ) connected
between the RTC1 and RTC2 pins. The oscillator is
controlled by the RUN bit in the Clock Control Register.
6.2Divider chain
The divider chain operates with the 32 kHz oscillator
output and divides this signal down to produce three
different clocks with periods of 1 second, 1.5 second and
1 minute. Depending on the state of the ITS and SITS bits
in the Clock Control Register, the falling edge of the
1 second, 1.5 second or 1 minute clock is used to set the
Clock Interrupt Flag (CIF) in the Clock Control Register.
Since the clock interrupt is used to let the microcontroller
leave the Stop mode, it is wire ORed with the external
interrupt (CE/
must be enabled in the Clock Control Register (ECI = 1)
and by execution of EN I. The clock interrupt will then be
treated as an external interrupt
T0) and has the same functionality, e.g. it
PCD3745A
6.3Frequency adjustment
Frequency adjustment is used to extend the interrupt time
by defining the number of 16 kHz clocks in the Frequency
Adjustment Register that will be counted twice within the
first 1 second or 1.5 second period after a minute interrupt.
The DIV512 is reset if its contents is equal to FAR, this will
extend the time of the next interrupt. This is done within the
first 1 second or 1.5 seconds of every minute. If the second
interrupt is used (ITS = 1 and SITS = 0), every 60th
interval may be up to 15.3 ms longer than the others as a
result of the frequency adjustment. If the 1.5 second
interrupt is used (ITS = 1 and SITS = 1), the prolongation
will affect every 40th interval. The adjusted Minute
Interrupt Time (MIT) shows now a maximum deviation of
0.5 ppm.
The frequency adjustment value of the real-time clock
section is defined by the decimal value of the contents of
the 8-bit Frequency Adjustment Register. It can be read or
written. The significance of the individual bits is illustrated
by the following equation:
14
---------------- -
Minute Interrupt Time (MIT)60 2
Table 7 shows the recommended correction factor FAR for
all allowed real-time clock frequencies (FRCO).
The value of CLCR and FAR at reset is 00H.
FRCO
+×=
FAR
----------- -
14
2
Additionally, the divider chain generates a 16 kHz clock
(RCO) that can be routed through port line P1.7/RCO,
controlled by the ERCO bit in the Clock Control Register.
1999 Feb 027
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1999 Feb 028
Philips SemiconductorsProduct specification
8-bit microcontroller with 4.5 kbytes OTP
memory and 32 kHz real-time clock
RUN
RTC2RTC2
32 kHz
COMPARE LOGIC
register reset
DIV512DIV2
internal bus
compare bit
FAR
DIV32/DIV48
DIV6060 s
P1.7/RCO
1.5 s
1.0 s
RTCI
ERCOTST1TST2SITSRUNITSCIFECI CLCR
INTERRUPT
SELECT
MBH919
PCD3745A
Fig.4 RTC block diagram.
handbook, full pagewidth
Philips SemiconductorsProduct specification
8-bit microcontroller with 4.5 kbytes OTP
PCD3745A
memory and 32 kHz real-time clock
6.4Clock Control Register (CLCR)
Table 3 Clock Control Register (address 20H)
76543210
SITSTST2TST1ERCORUNITSCIFECI
Table 4 Description of CLCR bits
BITSYMBOLDESCRIPTION
7SITSSecond Interrupt Time Select. If SITS = 1 and ITS = 1, then the interrupt time is
1.5 seconds.
6TST2Test 2 input. This is a test bit and must be fixed at zero by user software.
5TST1Test 1 input. This is a test bit and must be fixed at zero by user software.
4ERCOEnable 16 kHz Clock Output. If ERCO = 0, then P1.7/RCO is a port line. If ERCO = 1,
then P1.7/RCO is a 16 kHz clock output. The port instructions for P1.7/RCO are not
inhibited and therefore the state of both the port line and flip-flop may be read in and the
port flip-flop may be written to by port instructions.
3RUNClock Run/Stop. If RUN = 0, then the 32 kHz oscillator is stopped and the divider chain
is reset. If RUN = 1, then the 32 kHz oscillator and the divider chain are running.
2ITSInterrupt Time Select.If ITS = 1 and SITS = 0, then the interrupt time is one second. If
ITS = 0 and SITS = X, then the interrupt time is one minute.
1CIFClock Interrupt Flag. Set by hardware, if RTC divider chain overflows (every second,
1.5 second or minute depending on ITS) or by software. Reset: by software.
0ECIEnable Clock Interrupt. If ECI = 0, the RTC interrupt is disabled. If ECI = 1, the RTC