(loudspeaker) or for piezo-electric transducer (PXE)
• 7 basic output frequencies (tones) and a pause
• 4 selectable tone sequences
• 4 selectable repetition rates
• 3 selectable impedance settings
2GENERAL DESCRIPTION
The PCD3360 is a CMOS integrated circuit, designed to
replace the electro-mechanical bell in telephone sets.
It meets most postal requirements, with selectivity of
output tone sequences and input ringer frequencies.
Output signals for a loudspeaker or for a piezo-electric
(PXE) transducer are provided. No audio transformer is
required since the loudspeaker is driven in class D.
• 3-step automatic swell
• Delta-modulated output signal that approximates a
sinewave
• Input ringing frequency discriminator with selectable
upper and lower frequency limits
• Output for optical signal
• Customized tone sequences, impedance settings and
automatic swell levels are mask programmable.
3QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSVALUEUNIT
f
TONE
n
int
available frequencies
(tones)
number of intervals per tone
553, 600, 667, 800, 1000, 1067,
1333
15 or 16
Hz
sequence
f
LL
lower limits of frequency
13.33 or 20Hz
discriminator
f
UL
upper limits of frequency
30 or 60Hz
discriminator
Z
set
t
d(on)
impedance settingswith 50 Ω loudspeaker≈7, ≈10.5 or ≈17.5kΩ
switch-on delayringer frequency = 25 Hz60 (maximum)ms
4ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
PCD3360PDIP16plastic dual in-line package; 16 leads (300 mil)SOT38-4
PCD3360TSO16plastic small outline package; 16 leads; body width 7.5 mmSOT162-1
), the oscillator and most other functions are switched
stb
and VSS)
DD
) drops below the standby voltage
DD
off and the supply current is reduced to the standby current
(I
). The automatic swell register retains its information
stb
until VDD drops further to a value VAS at which reset
occurs.
7.2Oscillator (OSC)
The 64 kHz oscillator is operated via an external resistor
and capacitor connected to pin OSC (see Fig.8).
The oscillator signal is divided by two to provide the32 kHz
internal system clock.
7.3Selection pin input circuit (see Fig.3)
Pins FDE, RR1, RR2, DM, IS1, IS2, TS1, TS2, FL and FH
are pulled down internally by a pull-down current I
when
IH
they are connected to VDD and by a pull-down resistance
RIL when they are connected to VSS. Thus when the pins
are open-circuit they are defined LOW. Therefore only a
single-contact switch is required to connect the pins to
VDD; yet the supply current is only marginally increased as
IIH is very small.
7.4Frequency discriminator circuit (FDE and FDI)
The frequency discriminator circuit prevents the ringer
being activated unintentionally by dial pulses, speech or
other invalid signals.
The circuit is enabled or disabled by input FDE. WhenFDE
is LOW and VDD>V
, the circuit is enabled and FDI acts
stb
as the input for ringing frequency detection. When FDE is
HIGH, the circuit is disabled and FDI becomes the
enable/disable input for tone sequence generation.
When the circuit is enabled, it starts to produce output
ringing tones after one cycle of an appropriate input
frequency is detected at FDI. An input cycle is detected
when either 2 rising or 2 falling edges are received, and
this implies a delay of between 1 and 1.5 input cycles
before output ringing begins. The allowed input frequency
range is set by the states of pins FL and FH, as shown in
Table 2. Output ringing continues for as long as valid input
ringing frequency is detected.
FDI has a Schmitt-trigger action; the levels are set by an
external resistor R2 (see Fig.8) and an internal sink current
that is switched from 20µA (typ.) for FDI = LOW to <0.1 µA
for FDI = HIGH. Excess current entering FDI via R2 is
absorbed by internal diodes clamped to V
and VSS.
DD
7.5Selection of frequency discriminator limits
(FL and FH)
FDE
RR1
RR2
pins
DM
IS1
IS2
TS1
TS2
FL
FH
I
IH
(1)
PCD3360
V
SS
selection
(1) Transistor resistance is RIL when switched on.
Fig.3 Input circuit of selection pins.
MGD709
With the frequency discriminator enabled (V
DD>Vstb
and
FDE = LOW) the lower and upper limits of the input
frequency are set by the inputs FL and FH as shown by
Table 2.
Table 2 Selection of lower and upper frequency
discriminator limits (f
FL INPUT
STATE
LOWER
LIMIT
= 64 kHz)
OSC
FH INPUT
STATE
UPPER
LIMIT
LOW20 HzLOW60 Hz
HIGH13.3 HzHIGH30 Hz
1997 Jan 155
Philips SemiconductorsProduct specification
Programmable multi-tone telephone ringerPCD3360
7.6Selection of tone sequences (TS1 and TS2)
TS1 and TS2 are effective when both FDE and FDI are HIGH, and VDD>V
. TS1 and TS2 normally select one of the
stb
four standard tone sequences shown in Fig.4. Different tone sequences of 15 or 16 consecutive tones and pauses can
be mask programmed to order. The seven tones (plus pause) available are shown in Fig.5, together with the
corresponding ROM codes.
The tone sequences are repeated continuously provided the enable conditions at inputs FDE and FDI are valid and
VDD>V
handbook, full pagewidth
. The first sequence and subsequent repetitions always begin with the first note in the sequence.
stb
pin state
TS1TS2
LL
tone code
HL
tone code
LH
tone code
HH
tone sequence output at pin TONE
3
33
1311313133131331
4544545455454554
222444777666
handbook, full pagewidth
tone code
4444040444444400
MGD715
Fig.4 Tone sequences mask-programmed in the PCD3360.
tone key−cdegbce
frequency (Hz)5330
frequency ratio891012151620::::::
tone code1234567
0
600 667 800 1000 1067 1333
MGD714
Fig.5 Available tones (including pause) and their corresponding ROM codes.
1997 Jan 156
Loading...
+ 14 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.