PCA2000
INTEGRATED CIRCUITS
DATA SHEET
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
Product specification |
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2003 Dec 17 |
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Supersedes data of 2003 Feb 04 |
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Philips Semiconductors |
Product specification |
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32 kHz watch circuit with programmable
PCA2000; PCA2001
adaptive motor pulse
FEATURES
∙Amplitude-regulated 32 kHz quartz crystal oscillator, with excellent frequency stability and high immunity to leakage currents
∙Electrically programmable time calibration with 1 ppm resolution stored in One Time Programmable (OTP) memory
∙The quartz crystal is the only external component connected
∙Very low power consumption, typical 90 nA
∙One second output pulses for bipolar stepping motor
∙Minimum power consumption for the entire watch, due to self adaptation of the motor drive according to the required torque
∙Reliable step detection circuit
∙Motor pulse width, pulse modulation, and pulse adaptation range programmable in a wide range, stored in OTP memory
∙Stop function for accurate time setting and power saving during shelf life
∙End Of Life (EOL) indication for silver oxide or lithium battery (only the PCA2000 has the EOL feature)
∙Test mode for accelerated testing of the mechanical parts and the IC.
APPLICATIONS
∙Driver circuits for bipolar stepping motors
∙High immunity motor drive circuits.
ORDERING INFORMATION
GENERAL DESCRIPTION
The PCA2000; PCA2001 are CMOS integrated circuits for battery operated wrist watches with a 32 kHz quartz crystal as timing element and a bipolar 1 Hz stepping motor. The quartz crystal oscillator and the frequency divider are optimized for minimum power consumption. A timing accuracy of 1 ppm is achieved with a programmable, digital frequency adjustment.
To obtain the minimum overall power consumption for the watch, an automatic motor pulse adaptation function is provided. The circuit supplies only the minimum drive current, which is necessary to ensure a correct motor step. Changing the drive current of the motor is achieved by chopping the motor pulse with a variable duty cycle. The pulse width and the range of the variable duty cycle can be programmed to suit different types of motor. The automatic pulse adaptation scheme is based on a safe dynamic detection of successful motor steps.
A pad RESET is provided (used for stopping the motor) for accurate time setting and for accelerated testing of the watch.
The PCA2000 has a battery EOL warning function. If the battery voltage drops below the EOL threshold voltage (which can be programmed for silver oxide or lithium batteries), the motor steps change from one pulse per second to a burst of four pulses every 4 seconds.
The PCA2001 uses the same circuit as the PCA2000, but without the EOL function.
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NAME |
DESCRIPTION |
VERSION |
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PCA2000U/AA |
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bare die; chip in tray |
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PCA2001U/AA |
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bare die; chip in tray |
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PCA2000U/10AA |
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bare die; chip on film frame carrier |
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PCA2001U/10AA |
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bare die; chip on film frame carrier |
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2003 Dec 17 |
2 |
Philips Semiconductors |
Product specification |
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32 kHz watch circuit with programmable
PCA2000; PCA2001
adaptive motor pulse
BLOCK DIAGRAM
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8 kHz |
32 Hz |
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3 |
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8 |
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OSCIN |
OSCILLATOR |
÷ 4 |
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DIVIDER |
RESET |
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4 |
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RESET |
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OSCOUT |
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TIMING ADJUSTMENT, |
reset |
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INHIBITION |
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5 |
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VDD |
VOLTAGE DETECTOR, |
OTP-MEMORY |
1 Hz |
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1 |
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VSS |
OTP-CONTROLLER |
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EOL |
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MOTOR CONTROL WITH |
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ADAPTIVE PULSE MODULATION |
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PCA2000 only |
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2 |
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STEP |
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TEST |
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DETECTION |
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PCA2000 |
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PCA2001 |
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6 |
7 |
mgw567 |
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MOT1 |
MOT2 |
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Fig.1 Block diagram.
PINNING |
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handbook, halfpage |
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SYMBOL |
PAD |
DESCRIPTION |
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VSS |
1 |
8 |
RESET |
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VSS |
1 |
ground |
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TEST |
2 |
7 |
MOT2 |
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TEST |
2 |
test output |
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PCA2000 |
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PCA2001 |
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OSCIN |
3 |
oscillator input |
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MOT1 |
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OSCIN |
3 |
6 |
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OSCOUT |
4 |
oscillator output |
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OSCOUT |
4 |
5 |
VDD |
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VDD |
5 |
supply voltage |
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MOT1 |
6 |
motor 1 output |
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MGU554 |
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MOT2 |
7 |
motor 2 output |
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Fig.2 |
Pad configuration. |
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RESET |
8 |
reset input |
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2003 Dec 17 |
3 |
Philips Semiconductors |
Product specification |
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32 kHz watch circuit with programmable
PCA2000; PCA2001
adaptive motor pulse
FUNCTIONAL DESCRIPTION
Motor pulse
The motor output supplies pulses of different driving stages, depending on the torque required to turn on the motor. The number of different stages can be selected between three and six. With the exception of the highest driving stage, each motor pulse (tp in Figs 3 and 6) is followed by a detection phase during which the motor movement is monitored, in order to check whether the motor has turned correctly or not.
If a missing step is detected, a correction sequence is generated (see Fig.3) and the driving stage is switched to the next level. The correction sequence consists of two pulses: first a short pulse in the opposite direction
(0.98 ms, modulated with the maximum duty cycle) to give the motor a defined position, followed by a motor pulse of the strongest driving level. Every 4 minutes, the driving level is lowered again by one stage.
The motor pulse has a constant pulse width. The driving level is regulated by chopping the driving pulse with a variable duty cycle. The driving level starts from the programmed minimum value and increases by 6.25% after each failed motor step. The strongest driving stage, which is not followed by a detection phase, is programmed separately.
Therefore, it is possible to program a larger energy gap between the pulses with step detection and the strongest, not monitored, pulse. This might be necessary to ensure a reliable and stable operation under adverse conditions (magnetic fields, vibrations). If the watch works in the highest driving stage, the driving level jumps after the 4-minute period directly to the lowest stage, and not just one stage lower.
To optimize the performance for different motors, the following parameters can be programmed:
∙Pulse width: 0.98 to 7.8 ms in steps of 0.98 ms
∙Duty cycle of lowest driving level: 37.5% to 56.25% in steps of 6.25%
∙Number of driving levels (including the highest driving level): 3 to 6
∙Duty cycle of the highest driving level: 75% or 100%
∙Enlargement pulse for the highest driving level: on or off.
The enlargement pulse has a duty cycle of 25% and a pulse width which is twice the programmed motor pulse width. The repetition period for the chopping pattern is 0.98 ms. Figure 4 shows an example of a 3.9 ms pulse.
handbook, full pagewidth |
1.96 ms |
tp |
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detection phase |
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tp |
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2tp |
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MGW350
0.98 ms
31.25 ms 31.25 ms
Fig.3 Correction sequence after failed motor step.
2003 Dec 17 |
4 |
Philips Semiconductors |
Product specification |
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32 kHz watch circuit with programmable
PCA2000; PCA2001
adaptive motor pulse
handbook, full pagewidth |
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0.244 ms |
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0.122 ms |
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DUTY CYCLE |
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37.5% |
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43.75%
50%
56.25%
62.5%
68.75%
75%
81.25%
100%
0.98 ms |
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0.98 ms |
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0.98 ms |
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0.98 ms |
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MGW351 |
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Fig.4 Possible modulations for a 3.9 ms motor pulse.
Step detection
Figure 5 shows a simplified diagram of the motor driving and step detection circuit, and Fig.6 shows the step detection sequence and corresponding sampling current. Between the motor driving pulses, the switches P1 and P2 are closed, which means the motor is short-circuited. For a pulse in one direction, P1 and N2 are open, and
P2 and N1 are closed with the appropriate duty cycle; for a pulse in the opposite direction, P2 and N1 are open, and P1 and N2 closed.
The step detection phase is initiated after the motor driving pulse (see Fig.3). P1 and P2 are first closed for 0.98 ms and then all four drive switches (P1, N1, P2 and N2) are opened for 0.98 ms.
As a result, the energy stored in the motor inductance is reduced as fast as possible.
The induced current caused by the residual motor movement is then sampled in phase 3 (closing P3 and P2) and in phase 4 (closing P1 and P4). For step detection in the opposite direction P1 and P4 are closed during phase 3 and P2 and P3 during phase 4 (see Fig.6).
The condition for a successful motor step is a positive step detection pulse (current in the same direction as in the driving phase) followed by a negative detection pulse within a given time limit. This time limit can be programmed between 3.9 and 10.7 ms (in steps of 0.98 ms) in order to ensure a safe and correct step detection under all conditions (for instance magnetic fields). The step detection phase stops after the last 31.25 ms, after the start of the motor driving pulse.
2003 Dec 17 |
5 |
Philips Semiconductors |
Product specification |
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32 kHz watch circuit with programmable
PCA2000; PCA2001
adaptive motor pulse
VDD
RD |
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D1 |
P1 |
P2 |
P3 |
P4 |
MOTOR |
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MOT1 |
MOT2 |
N1 |
N2 |
VSS
MGW352
Fig.5 Simplified diagram of motor driving and step detection circuit.
IMOT
phase 1 |
2 |
phase 3 |
phase 4 |
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phase |
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tp
positive detection level t
negative detection level
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0.98 ms |
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programmable time limit |
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(motor shorted) |
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td = 0.98 ms |
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OTP C4 to C6 |
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t |
sampling |
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positive detection |
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negative detection |
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sampling results |
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motor shorted |
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sampling |
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61 μs |
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0.49 ms |
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MGW569 |
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Fig.6 Step detection sequence and corresponding sampling voltage.
2003 Dec 17 |
6 |