Philips pbls2001d Datasheet

Page 1
PBLS2001D
20 V PNP BISS loadswitch
Rev. 02 — 27 August 2009 Product data sheet
1. Product profile

1.1 General description

PNP low V
Breakthrough in Small Signal (BISS) transistor and NPN Resistor-
CEsat
Equipped Transistor (RET) in a SOT457 (SC-74) small Surface Mounted Device (SMD) plastic package.

1.2 Features

(BISS) and resistor-equipped transistor in one package
CEsat

1.3 Applications

n Supply line switches n Battery charger switches n High-side switches for LEDs, drivers and backlights n Portable equipment

1.4 Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
TR1; PNP low V
V
CEO
I
C
R
CEsat
TR2; NPN resistor-equipped transistor
V
CEO
I
O
R1 bias resistor 1 (input) 1.54 2.2 2.86 kΩ R2/R1 bias resistor ratio 0.8 1 1.2
collector-emitter voltage open base - - −20 V collector current (DC) - - −1A collector-emitter saturation
resistance
collector-emitter voltage open base - - 50 V output current - - 100 mA
CEsat
transistor
IC= −1A; I
= −100 mA
B
[1]
- 185 280 mΩ
[1] Pulse test: tp≤ 300 µs; δ≤0.02
Page 2
NXP Semiconductors

2. Pinning information

Table 2. Pinning
Pin Description Simplified outline Symbol
1 emitter TR1 2 base TR1 3 output (collector) TR2 4 GND (emitter) TR2 5 input (base) TR2 6 collector TR1

3. Ordering information

Table 3. Ordering information
Type number Package
PBLS2001D SC-74 plastic surface mounted package; 6 leads SOT457
PBLS2001D
20 V PNP BISS loadswitch
4
56
132
Name Description Version
65 4
R2
R1
TR1
1
23
TR2
sym036

4. Marking

Table 4. Marking codes
Type number Marking code
PBLS2001D F6

5. Limiting values

Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
TR1; PNP low V
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
I
BM
P
tot
transistor
CEsat
collector-base voltage open emitter - −20 V collector-emitter voltage open base - −20 V emitter-base voltage open collector - −5V collector current (DC) - −1A peak collector current tp≤ 300 µs-−2A base current (DC) - −0.3 A peak base current tp≤ 300 µs-−0.6 A total power dissipation T
amb
≤ 25 °C
[1]
- 250 mW
[2]
- 350 mW
[3]
- 400 mW
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 2 of 16
Page 3
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch
Table 5. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
TR2; NPN resistor-equipped transistor
V V V V
CBO CEO EBO I
collector-base voltage open emitter - 50 V collector-emitter voltage open base - 50 V emitter-base voltage open collector - 10 V input voltage
positive - +12 V negative - −10 V
I
O
I
CM
P
tot
output current - 100 mA peak collector current tp≤ 300 µs - 100 mA total power dissipation T
amb
≤ 25 °C
[1]
- 200 mW
Per device
P
tot
T
stg
T
j
T
amb
total power dissipation
storage temperature −65 +150 °C junction temperature - 150 °C ambient temperature −65 +150 °C
[1]
- 400 mW
[2]
- 530 mW
[3]
- 600 mW
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2. [3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
0.8
P
tot
(W)
(1)
0.6
(2)
(3)
0.4
0.2
0
0 16012040 80
(1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1cm (3) FR4 PCB, standard footprint
2
006aaa414
T
(°C)
amb
Fig 1. Power derating curves
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 3 of 16
Page 4
NXP Semiconductors

6. Thermal characteristics

Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per device
R
th(j-a)
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2. [3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
thermal resistance from junction to ambient
in free air
PBLS2001D
20 V PNP BISS loadswitch
[1]
- - 315 K/W
[2]
- - 236 K/W
[3]
- - 210 K/W
006aaa415
2
10
tp (s)
3
10
Z
th(j-a)
(K/W)
10
3
10
2
10
10
1
−1
10
duty cycle =
1
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
0
−5
−4
10
−3
10
−2
−1
10
1
1010
FR4 PCB, standard footprint
Fig 2. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical
values
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 4 of 16
Page 5
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch
3
10
Z
th(j-a)
δ = 1
(K/W)
0.75
0.5
2
0.33
10
0.2
0.1
0.05
10
0.02
0.01
0
1
−5
10
−4
10
FR4 PCB, mounting pad for collector 1cm
−3
10
−2
2
−1
10
1
1010
006aaa463
2
10
tp (s)
3
10
Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical
values
006aaa464
Z
th(j-a)
(K/W)
3
10
δ = 1
0.75
0.5
2
10
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
−5
10
−4
10
−3
10
−2
−1
10
1
1010
2
10
tp (s)
3
10
Ceramic PCB, Al2O3, standard footprint
Fig 4. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical
values
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 5 of 16
Page 6
NXP Semiconductors

7. Characteristics

Table 7. Characteristics
T
amb
Symbol Parameter Conditions Min Typ Max Unit
TR1; PNP low V
I
CBO
I
CES
I
EBO
h
FE
V
CEsat
R
CEsat
V
BEsat
V
BEon
t
d
t
r
t
on
t
s
t
f
t
off
f
T
C
c
PBLS2001D
20 V PNP BISS loadswitch
=25°C unless otherwise specified
transistor
CEsat
collector-base cut-off current
collector-emitter cut-off current
emitter-base cut-off current
DC current gain VCE= −2 V; IC= −1 mA 220 495 -
collector-emitter saturation voltage
collector-emitter saturation resistance
base-emitter saturation voltage
base-emitter turn-on voltage
delay time IC= −1 A; I rise time - 34 - ns turn-on time - 42 - ns storage time - 140 - ns fall time - 45 - ns turn-off time - 185 - ns transition frequency IC= −50 mA; VCE= −10 V;
collector capacitance VCB= −10 V; IE=ie=0A;
VCB= −20 V; IE=0A - - −0.1 µA
= −20 V; IE=0A;
V
CB
T
= 150 °C
j
-- −50 µA
VCE= −20 V; VBE=0V - - −0.1 µA
VEB= −5 V; IC=0A - - −0.1 µA
= −2 V; IC= −100 mA 220 440 -
V
CE
= −2 V; IC= −500 mA
V
CE
= −2 V; IC= −1A
V
CE
= −2 V; IC= −2A
V
CE
[1]
220 310 -
[1]
155 220 -
[1]
60 120 -
IC= −100 mA; IB= −1mA - −55 −90 mV
= −500 mA; IB= −50 mA
I
C
= −1 A; IB= −50 mA
I
C
= −1 A; IB= −100 mA
I
C
IC= −1 A; IB= −100 mA
IC= −1 A; IB= −50 mA
= −1 A; IB= −100 mA
I
C
VCE= −5 V; IC= −1A
= −50 mA;
I
Boff
Bon
=50mA
[1]
- −100 −150 mV
[1]
- −200 −300 mV
[1]
- −185 −280 mV
[1]
- 185 280 mΩ
[1]
- −0.95 −1.1 V
[1]
- −1 −1.1 V
[1]
- −0.85 −1.1 V
-8 - ns
150 185 - MHz
f = 100 MHz
-1520pF
f=1MHz
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 6 of 16
Page 7
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch
Table 7. Characteristics
T
=25°C unless otherwise specified
amb
…continued
Symbol Parameter Conditions Min Typ Max Unit
TR2; NPN resistor-equipped transistor
I
CBO
collector-base cut-off
VCB=50V; IE= 0 A - - 100 nA
current
I
CEO
I
EBO
collector-emitter cut-off current
emitter-base cut-off
VCE=30V; IB=0A - - 1 µA
=30V; IB=0A;
V
CE
T
= 150 °C
j
-- 50µA
VEB=5V; IC=0A - - 2 mA
current h V
FE
CEsat
DC current gain VCE=5V; IC=20mA 30 - -
collector-emitter
IC= 10 mA; IB= 0.5 mA - - 150 mV
saturation voltage V
I(off)
V
I(on)
off-state input voltage VCE=5V; IC= 1 mA - 1.2 0.5 V
on-state input voltage VCE= 0.3 V; IC= 20 mA 2 1.6 - V R1 bias resistor 1 (input) 1.54 2.2 2.86 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 C
c
collector capacitance VCB=10V; IE=ie=0A;
- - 2.5 pF
f=1MHz
[1] Pulse test: tp≤ 300 µs; δ≤0.02
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 7 of 16
Page 8
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch
1000
h
FE
800
600
400
200
0
−10
(1)
(2)
(3)
−1
−1 −10
−10
006aaa416
(mA)
C
−10
4
−10
3
I
2
VCE= −2V (1) T (2) T (3) T
amb amb amb
= 100 °C =25°C = −55 °C
Fig 5. TR1 (PNP): DC current gain as a function of
collector current; typical values
006aaa417
3
−10 IC (mA)
−10
V
CEsat
(V)
−10
−10
−10
−1
−1
−2
−3
−10
−1
−1 −10
−10
(1) (2) (3)
2
IC/IB=20 (1) T (2) T (3) T
amb amb amb
= 100 °C =25°C = −55 °C
Fig 6. TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
4
006aaa418
3
−10 I
C
(mA)
−10
4
V
(V)
−1.0
BE
−0.8
−0.6
−0.4
−0.2
−10
−1
−1 −10
−10
(1)
(2)
(3)
2
VCE= −5V (1) T (2) T (3) T
amb amb amb
= −55 °C =25°C = 100 °C
Fig 7. TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
006aaa419
3
−10 I
C
(mA)
−10
4
V
−1.2
BEsat
(V)
−1.0
−0.8
−0.6
−0.4
−0.2
−10
−1
−1 −10
−10
(1)
(2)
(3)
2
IC/IB=20 (1) T (2) T (3) T
amb amb amb
= −55 °C =25°C = 100 °C
Fig 8. TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 8 of 16
Page 9
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch
−2.0
I
C
(A)
−1.6
−1.2
−0.8
−0.4
−0
−0 −6−4−2
T
amb
IB = −13 mA
=25°CI
006aaa420
−11.7 mA
−10.4 mA
−9.1 mA
−7.8 mA
−6.5 mA
−5.2 mA
−3.9 mA
−2.6 mA
−1.3 mA
VCE (V)
Fig 9. TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aaa421
3
−10 IC (mA)
−10
R
CEsat
(Ω)
2
10
10
1
−1
10
−10
(1) T (2) T (3) T
−1
−1 −10
=20
C/IB
= 100 °C
amb
=25°C
amb
= −55 °C
amb
−10
(1) (2) (3)
2
Fig 10. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current; typical values
4
006aaa422
−10
3
IC (mA)
−10
V
CEsat
(V)
−10
−10
−10
−1
−1
−2
−3
−10
(1) (2)
(3)
−1
−1 −10
T
=25°C
amb
−10
2
(1) IC/IB= 100 (2) IC/IB=50 (3) IC/IB=10
Fig 11. TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current; typical values
3
10
R
CEsat
(Ω)
2
10
10
1
−1
4
10
−10
−1
−1 −10
T
=25°C
amb
−10
2
006aaa423
3
−10 IC (mA)
(1)
(2) (3)
4
−10
(1) IC/IB= 100 (2) IC/IB=50 (3) IC/IB=10
Fig 12. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current; typical values
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 9 of 16
Page 10
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch
3
10
h
FE
2
10
10
1
−1
10
006aaa015
(1) (2) (3)
2
101
IC (mA)
10
VCE=5V (1) T (2) T (3) T
amb amb amb
= 150 °C =25°C = −40 °C
Fig 13. TR2 (NPN): DC current gain as a function of
collector current; typical values
3
10
V
CEsat
(mV)
2
10
10
110
(1) (2) (3)
10
006aaa014
IC (mA)
IC/IB=20 (1) T (2) T (3) T
amb amb amb
= 100 °C =25°C = −40 °C
Fig 14. TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
2
2
10
V
I(on)
(V)
10
(1) (2)
1
(3)
−1
10
−1
10
006aaa016
101
IC (mA)
10
VCE= 0.3 V (1) T (2) T (3) T
amb amb amb
= −40 °C =25°C = 100 °C
Fig 15. TR2 (NPN): On-state input voltage as a
function of collector current; typical values
10
V
I(off)
(V)
(1) (2)
1
(3)
−1
2
10
−2
10
−1
006aaa017
IC (mA)
10110
VCE=5V (1) T (2) T (3) T
amb amb amb
= −40 °C =25°C = 100 °C
Fig 16. TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 10 of 16
Page 11
NXP Semiconductors

8. Test information

−
PBLS2001D
20 V PNP BISS loadswitch
I
B
90 %
10 %
−
90 %
10 %
input pulse (idealized waveform)
−
I
(100 %)
Bon
−
I
Boff
output pulse
I
C
t
t
d
r
t
on
t
s
t
off
(idealized waveform)
−
IC (100 %)
t
t
f
006aaa266
Fig 17. BISS transistor switching time definition
IC= −1 A; I
oscilloscope
V
= −50 mA; I
Bon
I
V
R
(probe)
450 Ω
= 50 mA; R1 = open; R2= 45 Ω; RB= 145 Ω; RC=10Ω
Boff
B
R2
R1
BB
V
CC
R
C
V
o
(probe)
oscilloscope
450 Ω
DUT
mgd624
Fig 18. Test circuit for switching times
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 11 of 16
Page 12
NXP Semiconductors

9. Package outline

PBLS2001D
20 V PNP BISS loadswitch
Fig 19. Package outline SOT457 (SC-74)

10. Packing information

Table 8. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
Type number Package Description Packing quantity
PBLS2001D SOT457 4 mm pitch, 8 mm tape and reel; T1
3.0
2.5
3.1
2.7
4
1.7
1.3
56
pin 1 index
132
0.95
1.9
4 mm pitch, 8 mm tape and reel; T2
0.40
0.25
0.6
0.2
[1]
1.1
0.9
0.26
0.10
04-11-08Dimensions in mm
3000 10000
[2]
-115 -135
[3]
-125 -165
[1] For further information and the availability of packing methods, seeSection 14. [2] T1: normal taping [3] T2: reverse taping
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 12 of 16
Page 13
NXP Semiconductors

11. Soldering

3.30
2.825
0.95
3.45
1.95
1.60
1.70
3.10
3.20
PBLS2001D
20 V PNP BISS loadswitch
solder lands
solder resist
0.45 0.55 occupied area
solder paste
msc422
Dimensions in mm
Fig 20. Reflow soldering footprint
5.30
5.05
1.40
4.30
Dimensions in mm
Fig 21. Wave soldering footprint
0.45
1.45 4.45
msc423
solder lands solder resist occupied area
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 13 of 16
Page 14
NXP Semiconductors
PBLS2001D
20 V PNP BISS loadswitch

12. Revision history

Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBLS2001D_2 20090827 Product data sheet - PBLS2001D_1 Modifications:
PBLS2001D_1 20050705 Product data sheet - -
• This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical content.
• Figure 21 “Wave soldering footprint”: updated
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 14 of 16
Page 15
NXP Semiconductors

13. Legal information

13.1 Data sheet status

PBLS2001D
20 V PNP BISS loadswitch
Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document mayhave changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL
[1][2]
Product status
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

13.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or warranties, expressedor implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
[3]
http://www.nxp.com.
Definition
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at
http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyanceor implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.

13.4 Trademarks

Notice: All referencedbrands,product names, service names and trademarks are the property of their respective owners.

14. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
PBLS2001D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 27 August 2009 15 of 16
Page 16
NXP Semiconductors

15. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 11
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
10 Packing information. . . . . . . . . . . . . . . . . . . . . 12
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
14 Contact information. . . . . . . . . . . . . . . . . . . . . 15
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PBLS2001D
20 V PNP BISS loadswitch
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 27 August 2009
Document identifier: PBLS2001D_2
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