1998 Mar 10 2
Philips Semiconductors Product specification
SDH/SONET STM16/OC48 demultiplexer OQ2536HP
FEATURES
• Normal and loop (test) modes
• 1.2 V GTL (Gunning Transceiver Logic) level compatible
data and clock outputs (low speed interface)
• Differential CML (Current-Mode Logic) data and clock
inputs
• High input sensitivity (100 mV for the high speed inputs)
• Boundary Scan Test (BST) at low speed interface, in
accordance with
“IEEE Std 1149.1-1990”
• Low power dissipation (typically 1.45 W).
DESCRIPTION
The OQ2536HP is a 32-channel demultiplexer intended
for use in STM16/OC48 applications. It demultiplexes a
single 2.5 Gbits/s input channel to 32 × 78 Mbits/s output
channels. The data and clock outputs on the low speed
interface are GTL compatible, while the high speed data
and clock inputs are CML compatible.
ORDERING INFORMATION
BLOCK DIAGRAM
TYPE
NUMBER
PACKAGE
NAME DESCRIPTION VERSION
OQ2536HP HLQFP100 plastic heat-dissipating low profile quad flat package; 100 leads; body
14 × 14 × 1.4 mm
SOT470-1
Fig.1 Block diagram.
(1) See Chapter “Pinning” for D0 to D31 pin numbers.
(2) Pins 1, 8, 17, 22, 25, 29, 33, 35, 40 to 50, 52, 55, 58, 61, 64, 67, 78, 82, 91 and 96.
handbook, full pagewidth
4
ENL
TRST
TMS
TCK
TDI
TDO
CDIV
DIN
DINQ
CIN
CINQ
DLOOP
DLOOPQ
CLOOP
CLOOPQ
DIOA
DIOC
1 : 4 DMUX
DIVIDE BY 4
622 MHz
OQ2536HP
78 MHz
2.5 GHz
BAND GAP
REFERENCE 1
DIVIDE BY 8
BST LOGIC
4 ×
1 : 8 DMUX
622
Mbits/s
2.5 Gbits/s
78
Mbits/s
75
70
72
69
68
71
12
26, 27, 28,
76, 77
13, 14, 36,
37, 63, 85,
86
11, 38, 39,
62, 88
V
DD
V
CC1
V
EE
V
CC2
BGCAP1
29 5 7 5
(2)
(1)
GND
74 51
BAND GAP
REFERENCE 2
BGCAP2
34 73
REFC
54
53
56
57
65
66
60
59
32
31
D0
to
D31
MGK346