Philips N74F2240D, N74F2241D, N74F2241N, N74F2240N Datasheet

INTEGRATED CIRCUITS

74F2240

Octal inverter buffer with 30Ω equivalent output termination (3-State)

74F2241

Octal buffer with 30Ω equivalent output termination (3-State)

Product specification

1990 Dec 13

IC15 Data Handbook

m n r

Philips Semiconductors	Product specification
Octal buffers	74F2240, 74F2241

FEATURES

•Octal bus interface

•30Ω output termination ideal for driving DRAM

•15mA source current

DESCRIPTION

The 74F2240 and 74F2241 are octal buffers that are ideal for driving dynamic DRAM with impedance matching. The outputs are all capable of sinking 5mA and sourcing up to 15mA. The device features two output enables, each controlling four of the 3-state outputs.

	TYPICAL	TYPICAL
TYPE	PROPAGATION	SUPPLY CURRENT
	DELAY	(TOTAL)
74F2240	4.3ns	37mA
74F2241	4.5ns	30mA

ORDERING INFORMATION

	ORDER CODE
DESCRIPTION	COMMERCIAL RANGE	PKG DWG #
	VCC = 5V ±10%,
	Tamb = 0°C to +70°C
20-pin plastic DIP	N74F2240N, N74F2241N	SOT146-1
20-pin plastic SOL	N74F2240D, N74F2241D	SOT163-1

INPUT AND OUTPUT LOADING

AND FAN-OUT TABLE

									74F (U.L.)	LOAD
			PINS					DESCRIPTION		VALUE
									HIGH/LOW
										HIGH/LOW
		Ian, Ibn						Data inputs	1.0/0.33	20μA/0.2mA
								Output enable inputs
	OEa, OEb								1.0/0.33	20μA/0.2mA
								(active Low)
			OEb					Output enable input	1.0/0.33	20μA/0.2mA
								(74F2241)
		Yan, Ybn						Data outputs (74F2241)	750/8.33	15mA/5mA
								Data outputs (74F2240)	750/8.33	15mA/5mA
		Yan, Ybn

NOTE: One (1.0) FAST unit load is defined as: 20μA in the High state and 0.6mA in the Low state.

PIN CONFIGURATION

						74F2240
					1	20	VCC
	OEa
		Ia0			2	19
							OEb
					3	18
		Yb0
							Ya0
		Ia1			4	17	Ib0
					5	16
		Yb1
							Ya1
		Ia2			6	15	Ib1
					7	14
		Yb2
							Ya2
		Ia3			8	13	Ib2
	Yb3				9	12
							Ya3
GND					10	11	Ib3

SF00561

LOGIC SYMBOL

74F2240

2 4 6 8 17 15 13 11

Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3

1 OEa

19 OEb

Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3

18	16	14	12	3	5	7	9
VCC = Pin 20
GND = Pin 10						SF00562

IEC/IEEE SYMBOL

				74F2240
1		EN1
19
		EN2
2						18
		2D		1
4						16
6						14
8						12
17				2		3
15						5
13						7
11						9

SF00563

December 13, 1990

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853-1524 01255

Philips Semiconductors	Product specification
Octal buffers	74F2240, 74F2241

	PIN CONFIGURATION				LOGIC DIAGRAM FOR 74F2240
			74F2241		Ia0 2	18 Ya0	17	2
	OEa	1	20	VCC			Ib0	Yb0
	Ia0	2	19	OEb	Ia1 4	15	15	5
	Yb0	3	18			Ya1	Ib1	Yb1
				Ya0
	Ia1	4	17	Ib0	6	14	13	7
								Yb2
					Ia2	Ya2	Ib2
	Yb1	5	16	Ya1
	Ia2	6	15	Ib1	Ia3 8	12	11	9
						Ya3	Ib3	Yb3
	Yb2	7	14	Ya2
	Ia3	8	13	Ib2	OEa 1		10
							OEb
	Yb3	9	12	Ya3	VCC = Pin 20
	GND	10	11	Ib3	GND = Pin 10			SF00567
					SF00564

LOGIC SYMBOL

								74F2241
		2		4		6		8		17		15		13		11
		Ia0		Ia1		Ia2		Ia3		Ib0		Ib1		Ib2		Ib3
1		OEa
19		OEb
		Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
		18		16		14		12		3		5		7		9

VCC = Pin 20
GND = Pin 10	SF00565

LOGIC DIAGRAM FOR 74F2241

Ia0 2	18		17	2
		Ya0	Ib0	Yb0
Ia1 4	15	Ya1	15	5
			Ib1	Yb1
Ia2 6	14		13	7
		Ya2	Ib2	Yb2
Ia3 8	12		11	9
		Ya3	Ib	Yb3
OEa 1			10
			OEb
VCC = Pin 20
GND = Pin 10				SF00568

FUNCTION TABLE FOR 74F2240

IEC/IEEE SYMBOL

INPUTS

OUTPUTS

OEa

Ia

OEb

Ib

Ya

Yb

74F2241

1

L

L

L

L

H

H

EN1

L

H

L

H

L

L

19

EN2

2

18

H

X

H

X

Z

Z

2D

1

Notes to function table for 74F2240

4

16

H

=

High voltage level

L

=

Low voltage level

6

14

X

=

Don't care

8

12

Z

=

High impedance ºoffº state

17

2

3

15

5

FUNCTION TABLE FOR 74F2241

13

7

11

9

INPUTS

OUTPUTS

SF00566

OEa

Ia

OEb

Ib

Ya

Yb

L

L

H

L

L

L

L

H

H

H

H

H

H

X

L

X

Z

Z

Notes to function table for 74F2241

H

=

High voltage level

L

=

Low voltage level

X

=

Don't care

Z

=

High impedance ºoffº state

December 13, 1990

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