Philips N74F166D, N74F166N Datasheet

INTEGRATED CIRCUITS

74F166

8-bit bidirectional universal shift register

Product specification

1991 Feb 14

IC15 Data Handbook

m n r

Philips Semiconductors	Product specification
8-bit bidirectional universal shift register	74F166

FEATURES

•High impedance NPN base inputs for reduced loading (20mA in high and low states)

•Synchronous parallel to serial applications

•Synchronous serial data input for easy expansion

•Clock enable for ºdo nothingº mode

•Asynchronous master reset

•Expandable to 16 bits in 8±bit increments

•Industrial temperature range available (±40°C to +85°C)

DESCRIPTION

The 74F166 is a high speed 8±bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low±to±high clock transition, parallel data is entered into the register.

When PE is high, data is entered into internal bit position Q0 from serial data input (Ds), and the remaining bits are shifted one place to the right (Q0 → Q1 → Q2, etc.) with each positive going clock transition.

ORDERING INFORMATION

For expansion of the register in parallel to serial converters, the Q7 output is connected to the Ds input of the succeeding stage. The clock input is gated OR structure which allows one input to be used as an active±low clock enable (CE)

input. The pin assignment for the CP and CE inputs is arbitrary and can be reversed for layout convenience. The low±to±high transition of CE input should only take place while the CP is high for predictable operation. A low on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all bit positions to a low state.

TYPE	TYPICAL fmax	TYPICAL SUPPLY CUR-
		RENT( TOTAL)
74F166	175MHz	50mA

							ORDER CODE
						COMMERCIAL RANGE		INDUSTRIAL RANGE
DESCRIPTION						VCC = 5V ±10%,		VCC = 5V ±10%,			PKG DWG #
						Tamb = 0°C to +70°C		Tamb = ±40°C to +85°C
16±pin plastic DIP						N74F166N		I74F166N			SOT38-4
16±pin plastic SO						N74F166D		I74F166D			SOT109-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS						DESCRIPTION			74F (U.L.) HIGH/		LOAD VALUE HIGH/
									LOW		LOW
D0 ± D7						Parallel data inputs			1.0/0.033		20μA/20μA
	Ds					Serial data input (shift right)			2.0/0.066		40μA/40μA
	CP					Clock input (active rising edge)			1.0/0.033		20μA/20μA
						Clock enable input (active low)			1.0/0.033		20μA/20μA
	CE
						Parallel enable input (active low)			1.0/0.033		20μA/20μA
	PE
						Master reset input (active low)			2.0/0.066		40μA/40μA
	MR
	Q7					Data output			50/33		1.0mA/20mA

Note to input and output loading and fan out table

1. One (1.0) FAST unit load is defined as: 20μA in the high state and 0.6mA in the low state.

Feb. 14, 1991

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853±0349 01718

Philips Semiconductors	Product specification
8-bit bidirectional universal shift register	74F166

PIN CONFIGURATION

IEC/IEEE SYMBOL

9

SRG 8

R

Ds

1

16

VCC

15

M1 [SHIFT]

D0

2

15

PE

6

M2 [LOAD]

D1

3

14

D7

7

1

C3/1

D2

4

13

Q7

1

D3

5

12

D6

1, 3D

2

2, 3D

CE

6

11

D5

3

2,3D

CP

7

10

D4

4

GND

5

8

9

MR

10

SP000283

11

LOGIC SYMBOL

12

14

13

1

2

3

4

5

10

11

12

14

SF00285

Ds

D0

D1

D2

D3

D4

D5

D6

D7

6

CE

7

CP

9

MR

15

PE

Q7

13

VCC = Pin 16

GND = Pin 8

SF00284

FUNCTION TABLE

INPUTS

Qn REGISTER

OUTPUT

OPERATING MODE

PE

CE

CP

DS

D0 ±D7

Q0

Q1 ± Q6

Q7

l

l

↑

X

l ± l

L

L ± L

L

Parallel load

l

l

↑

X

h ± h

H

H ± H

H

h

l

↑

l

X ± X

L

q0 ± q5

q6

Serial shift

h

l

↑

h

X ± X

H

q0 ± q5

q6

X

h

X

X

X ± X

qn

q1 ± q6

q7

Hold (do nothing)

Notes to function table

1.

H

=

High±voltage level

2.

h

=

High voltage level one setup time before the low±to±high clock transition

3.

L

=

Low±voltage level

4.

l

=

Low voltage level one setup time before the low±to±high clock transition

5.	qn =		Lower case letters indicate the state of the referenced input (or output) one setup time prior to the low±to±high clock transition
6.	X	=	Don't care
7.	↑	=	Low±to±high clock transition

Feb. 14, 1991

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Philips Semiconductors	Product specification
8-bit bidirectional universal shift register	74F166

LOGIC DIAGRAM

VCC = Pin 16

GND = Pin 8

MR DS

PE

D0

D1

D2

D3

D4

D5

D6

D7 CP

CE

9
1
R	CP	S
15	Q
2
R	CP	S
3	Q
R	CP	S
4	Q
R	CP	S
5	Q
R	CP	S
10	Q
R	CP	S
11	Q
R	CP	S
12	Q
R	CP	S
14	Q
7		13	Q7
6

SF00286

Feb. 14, 1991

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