Philips N74F126D, N74F126N, N74F125D, N74F125N Datasheet

INTEGRATED CIRCUITS

74F125, 74F126

Quad buffers (3-State)

Product specification	1989 March 28
IC15 Data Handbook

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Philips Semiconductors	Product specification
Quad buffers (3-State)	74F125, 74F126

FEATURE

•High impedance NPN base inputs for reduced loading

(20μA in High and Low states)

	TYPICAL	TYPICAL
TYPE	PROPAGATION	SUPPLY CURRENT
	DELAY	(TOTAL)
74F125	5.0ns	23mA
74F126	5.0ns	26mA

ORDERING INFORMATION

	COMMERCIAL RANGE
DESCRIPTION	VCC = 5V ±10%,	PKG DWG #
	Tamb = 0°C to +70°C
14-pin plastic DIP	N74F125N, N74F126N	SOT27-1
14-pin plastic SO	N74F125D, N74F126D	SOT108-1

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

	PINS				DESCRIPTION	74F (U.L.) HIGH/LOW	LOAD VALUE HIGH/LOW
	D0±D3				Data inputs	1.0/0.033	20μA/20μA
					Output Enable inputs (active Low), 74F125	1.0/0.033	20μA/20μA
	OE0±OE3
	OE0±OE3				Output Enable inputs (active High), 74F126	1.0/0.033	20μA/20μA
	Q0±Q3				Data outputs	750/106.7	15mA/64mA

NOTE: One (1.0) FAST unit load is defined as: 20μA in the High state and 0.6mA in the Low state.

PIN CONFIGURATIONS

								74F125																	74F126
																						OE0
				OE0		1							14	VCC									1							14	VCC
																						D0									OE3
				D0		2							13		OE3								2							13
																						Q0									D3
				Q0		3							12	D3									3							12
																						OE1									Q3
				OE1		4							11	Q3									4							11
																						D1									OE2
				D1		5							10		OE2								5							10
																						Q1									D2
				Q1		6							9	D2									6							9
																						GND									Q2
			GND			7							8	Q2									7							8
												SF00117																	SF00118
LOGIC SYMBOLS
								74F125																	74F126
						2		5		9		12											2		5		9		12
						D0		D1		D2		D3											D0		D1		D2		D3
1				OE0															1			OE0
4				OE1															4			OE1
10				OE2															10			OE2
13				OE3		Q0		Q0		Q1		Q1							13			OE3	Q0		Q0		Q1		Q1
VCC = Pin 14						3		6		8		11							VCC = Pin 14				3		6		8		11
GND = Pin 7																			GND = Pin 7
												SF00119																	SF00120

March 28, 1989

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853±0341 96146

Philips Semiconductors	Product specification
Quad buffers (3-State)	74F125, 74F126

IEC/IEEE SYMBOLS

							74F125
1					EN		1			3
2
4										6
5
10										8
9
13										11
12
											SF00121
LOGIC DIAGRAMS
						74F125
			1
		OE0							3
2											Q0
		D0
			4
		OE1							6
5											Q1
		D1
			10
		OE2							8
9											Q2
		D2
			13
		OE3							11
12											Q3
		D3
VCC = Pin 14
GND = Pin 7
									SF00123

					74F126
1			EN		1			3
2
4								6
5
10								8
9
13								11
12
									SF00122
				74F126
1
	OE0						3
2									Q0
	D0
4
	OE1						6
5									Q1
	D1
10
	OE2						8
9									Q2
	D2
13
	OE3						11
12									Q3
	D3

VCC = Pin 14

GND = Pin 7

SF00124

FUNCTION TABLE, 74F125

			I NPUTS		OUTPUT
				Dn	Qn
	OEn
	L			L	L
	L			H	H
	H			X	Z

NOTES TO THE FUNCTION TABLES:

H = High voltage level

L = Low voltage level

X = Don't care

Z = High impedance ªoffº state

FUNCTION TABLE, 74F126

	I NPUTS		OUTPUT
OEn		Dn	Qn
H		L	L
H		H	H
L		X	Z

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL	PARAMETER	RATING	UNIT
VCC	Supply voltage	±0.5 to +7.0	V
VIN	Input voltage	±0.5 to +7.0	V
IIN	Input current	±30 to +5	mA
VOUT	Voltage applied to output in High output state	±0.5 to VCC	V
IOUT	Current applied to output in Low output state	128	mA
Tamb	Operating free-air temperature range	0 to +70	°C
Tstg	Storage temperature range	±65 to +150	°C

March 28, 1989

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