INTEGRATED CIRCUITS
74F1240
Octal inverter buffer (3-State)
74F1241
Octal buffer (3-State)*
* Discontinued part. Please see the Discontinued Product List.
Product specification |
1999 Jan 08 |
Supercedes data of 1989 Apr 04
IC15 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Buffers |
74F1240, 74F1241* |
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74F1240 Octal inverter buffer (3-State)
FEATURES
•High impedance NPN base inputs for reduced loading (20μA in High and Low states)
•Low power, light loading
•Functional pin-for-pin equivalent of 74F240 and 74F241
•1/30th the bus loading of 74F240 and 74F241
•Provides ideal interface and increase fan-out of MOS microprocessors
•Octal bus interface
•3-State buffer outputs sink 64mA
•15mA source current
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TYPICAL |
TYPICAL |
TYPE |
PROPAGATION |
SUPPLY CURRENT |
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DELAY |
(TOTAL) |
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74F1240 |
3.5ns |
40mA |
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74F1241 |
4.5ns |
46mA |
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ORDERING INFORMATION
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COMMERCIAL RANGE |
DRAWING |
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DESCRIPTION |
VCC = 5V ±10%, |
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NUMBER |
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Tamb = 0°C to +70°C |
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20-pin plastic DIP |
N74F1240N |
SOT146-1 |
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20-pin plastic SOL |
N74F1240D |
SOT163-1 |
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DESCRIPTION
The 74F1240 and 74F1241 are octal buffers that are ideal for driving bus lines or buffer memory address registers. The outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features two Output Enables, OEa and OEb, each controlling four of the 3-State outputs.
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
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PINS |
DESCRIPTION |
74F (U.L.) |
LOAD VALUE |
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HIGH/LOW |
HIGH/LOW |
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Ian, Ibn |
Data inputs |
1.0/0.033 |
20μA/20μA |
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Output enable inputs (active Low) |
1.0/0.033 |
20μA/20μA |
OEa, OEb |
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OEb |
Output enable input (active High, 74F1241) |
1.0/0.033 |
20μA/20μA |
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Yan, Ybn |
Data outputs (74F1241) |
750/106.7 |
15mA/64mA |
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Data outputs (74F1240) |
750/106.7 |
15mA/64mA |
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Yan, Ybn |
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NOTE: One (1.0) FAST unit load is defined as: 20μA in the High state and 0.6mA in the Low state.
* Discontinued part. Please see the Discontinued Products List. |
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1999 Jan 08 |
2 |
853±0039 20619 |
Philips Semiconductors |
Product specification |
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Buffers |
74F1240, 74F1241* |
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PIN CONFIGURATION ± 74F1240
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VCC |
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OEa |
1 |
20 |
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Ia0 |
2 |
19 |
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OEb |
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3 |
18 |
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Yb0 |
Ya0 |
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Ia1 |
4 |
17 |
Ib0 |
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5 |
16 |
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Yb1 |
Ya1 |
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Ia2 |
6 |
15 |
Ib1 |
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7 |
14 |
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Yb2 |
Ya2 |
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Ia3 |
8 |
13 |
Ib2 |
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9 |
12 |
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Yb3 |
Ya3 |
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GND |
10 |
11 |
Ib3 |
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SF00320 |
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PIN CONFIGURATION ± 74F1241
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20 |
VCC |
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OEa |
1 |
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Ia0 |
2 |
19 |
OEb |
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Yb0 |
3 |
18 |
Ya0 |
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Ia1 |
4 |
17 |
Ib0 |
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Yb1 |
5 |
16 |
Ya1 |
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Ia2 |
6 |
15 |
Ib1 |
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Yb2 |
7 |
14 |
Ya2 |
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Ia3 |
8 |
13 |
Ib2 |
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Yb3 |
9 |
12 |
Ya3 |
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GND |
10 |
11 |
Ib3 |
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SF00324 |
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LOGIC SYMBOL ± 74F1240
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2 |
4 |
6 |
8 |
17 |
15 |
13 |
11 |
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Ia0 |
Ia1 |
Ia2 |
Ia3 |
Ib0 |
Ib1 |
Ib2 |
Ib3 |
1 |
OEa |
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19 |
OEb |
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Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 |
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18 |
16 |
14 |
12 |
3 |
5 |
7 |
9 |
VCC = Pin 20
GND = Pin 10
SF00321
LOGIC SYMBOL ± 74F1241
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2 |
4 |
6 |
8 |
17 |
15 |
13 |
11 |
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Ia0 |
Ia1 |
Ia2 |
Ia3 |
Ib0 |
Ib1 |
Ib2 |
Ib3 |
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1 |
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OEa |
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19 |
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OEb |
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Ya0 |
Ya1 Ya2 |
Ya3 Yb0 |
Yb1 Yb2 |
Yb3 |
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18 |
16 |
14 |
12 |
3 |
5 |
7 |
9 |
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VCC = Pin 20
GND = Pin 10
SF00325
IEC/IEEE SYMBOL ± 74F1240 |
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IEC/IEEE SYMBOL ± 74F1241 |
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1 |
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1 |
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EN1 |
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EN1 |
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19 |
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EN2 |
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EN2 |
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SF01367 |
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SF01368 |
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* Discontinued part. Please see the Discontinued Products List.
1999 Jan 08 |
3 |
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