N74F11D
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
Product specification
IC15 Data Handbook
1989 Sep 20
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74F10, 74F11Gates
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
2
September 20, 1989 853–0329 97683
TYPE
TYPICAL
PROPAGATION
DELA Y
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F10 3.5ns 3.3mA
74F11 4.2ns 5.3mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V ±10%,
T
amb
= 0°C to +70°C
PKG DWG #
14-pin plastic DIP N74F10N, N74F11N SOT27-1
14-pin plastic SO N74F10D, N74F11D SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
Dna, Dnb, Dnc Data inputs 1.0/1.0 20µA/0.6mA
Qn Data output (74F10) 50/33 1.0mA/20mA
Qn Data output (74F11) 50/33 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
PIN CONFIGURATIONS
14
13
12
11
10
9
87
6
5
4
3
2
1
GND
V
CC
D2b
D2a
Q2
D2c
D0c
Q
0
D0a
D0b
Q
1
D1a
D1b
D1c
SF00055
74F10
14
13
12
11
10
9
87
6
5
4
3
2
1
GND
V
CC
D2b
D2a
Q2
D2c
D0c
Q0
D0a
D0b
Q1
D1a
D1b
D1c
SF00056
74F11
LOGIC SYMBOLS
D0a D0b D0c D1b D1c D2a D2bD1a
Q0 Q1 Q2
12 6 8
1 2 13 3 4 5 9 10
V
CC
= Pin 14
GND = Pin 7
SF00057
D2c
11
74F10
D0a D0b D0c D1b D1c D2a D2bD1a
Q0 Q1 Q2
12 6 8
1 2 13 3 4 5 9 10
V
CC
= Pin 14
GND = Pin 7
SF00058
D2c
11
74F11
Philips Semiconductors Product specification
74F10, 74F11Gates
September 20, 1989
3
IEC/IEEE SYMBOLS
SF00059
&
12
6
8
1
2
13
3
4
5
9
10
11
74F10
SF00060
&
12
6
8
1
2
13
3
4
5
9
10
11
74F11
LOGIC DIAGRAMS
V
CC
= Pin 14
GND = Pin 7
SF00061
Q0
Q1
Q2
12
6
8
1
2
13
3
4
5
9
10
11
D0a
D0b
D0c
D1a
D1b
D1c
D2a
D2b
D2c
74F10
V
CC
= Pin 14
GND = Pin 7
SF00062
Q0
Q1
Q2
12
6
8
1
2
13
3
4
5
9
10
11
D0a
D0b
D0c
D1a
D1b
D1c
D2a
D2b
D2c
74F11
FUNCTION TABLE
OUTPUTS
INPUTS
74F10 74F11
Dna Dnb Dnc Qn Qn
L L L H L
L L H H L
L H L H L
L H H H L
H L L H L
H L H H L
H H L H L
H H H L H
NOTES:
1. H = High voltage level
2. L = Low voltage level
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