Colour Television Chassis
ME8
LC8.2A
LA
ME8
I_17760_000.eps
040208
Contents Page Contents Page
1. Technical Specifications, Connections, and Chassis
Overview 2
2. Safety Instructions, Warnings, and Notes 5
3. Directions for Use 6
4. Mechanical Instructions 7
5. Service Modes, Error Codes, and Fault Finding 14
6. Block Diagrams, Test Point Overview, and
Waveforms
Wiring Diagram 32" 50Hz (ME8) 27
Wiring Diagram 42" 50Hz (ME8) 28
Wiring Diagram 42" 100Hz (ME8) 29
Wiring Diagram 47" 50Hz (ME8) 30
Wiring Diagram 52" 50Hz (ME8) 31
Wiring Diagram 52" 100Hz (ME8) 32
Block Diagram Video 33
Block Diagram Audio 34
Block Diagram Control & Clock Signals 35
SSB Test Point Overview 36-40
I2C IC Overview 41
Supply Lines Overview 42
7. Circuit Diagrams and PWB Layouts Diagram PWB
Main Power Supply (42"): Part 1 (A1) 43 45-46
Main Power Supply (42"): Part 2 (A2) 44 45-46
DFI Panel: DC - DC (AB01) 47 57-58
DFI Panel: Video Flow (AB02) 48 57-58
DFI Panel: Clock (AB03) 49 57-58
DFI Panel: Supply (AB04) 50 57-58
DFI Panel: FPGA: Power & Control (AB05) 51 57-58
DFI Panel: FPGA: DFI (AB06) 52 57-58
DFI Panel: DDR A (AB07) 53 57-58
DFI Panel: DDR B (AB08) 54 57-58
DFI Panel: Display Interfacing (AB09) 55 57-58
DFI Panel: FPGA Ambilight (AB10) 56 57-58
Small Signal Board (B01-B08) 59-77 80-89
©
Copyright 2008 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
SSB: SRP List Explanation 78
SSB: SRP List 79
Keyboard Control Panel (E) 90 90
IR / LED Panel (J) 91 92
8. Alignments 93
9. Circuit Descriptions, Abbreviation List, and IC Data
Sheets 96
Abbreviation List 101
IC Data Sheets 103
10. Spare Parts List & CTN Overview 108
11. Revision List 108
Published by JY 0869 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 17764
EN 2 LC8.2A LA1.
Technical Specifications, Connections, and Chassis Overview
1. Technical Specifications, Connections, and Chassis Overview
Index of this chapter:
1.1 Technical Specifications
1.2 Connection Overview
1.3 Chassis Overview
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
1.1 Technical Specifications
1.1.1 Vision
Display type : LCD
Screen size : 32" (81 cm), 16:9
: 42" (107 cm), 16:9
: 47" (120 cm), 16:9
: 52" (132 cm), 16:9
Resolution (H × V pixels) : 1366 × 768 (32")
Dyn. contrast ratio : 29000:1 (42" and 47")
Min. light output (cd/m
Typ. response time (ms) : 8.5 (32")
Viewing angle (H × V degrees) : 176 × 176 (32", 52")
Tuning system : PLL, DMBT (some
Presets/channels : 99 presets
Tuner bands : VHF, UHF, S, H
TV Colour systems : PAL B/G, D/K, I
Video playback : NTSC
Supported computer formats:
- 60, 72, 75, 85 Hz : 640 × 480
- 70 Hz : 720 × 400
- 60, 72, 75, 85 Hz : 800 × 600
- 60 Hz : 1280 × 768
- 60 Hz : 1280 × 1024
- 60 Hz : 1360 × 768
Supported video formats
- 60 Hz : 480i
- 60 Hz : 480p
- 50 Hz : 576i
- 50 Hz : 576p
- 50, 60 Hz : 720p
- 50, 60 Hz : 1080i
- 24, 25, 30, 50, 60 Hz : 1080p
2
) : 500
: 1920 × 1080 (42", 47"
and 52")
: 33000:1 (32" and 52")
: 5 (42" and 47")
: 3 (42PFL7403/93)
: 6 (52")
: 178 × 178 (42", 47")
sets)
: SECAM B/G, D/K
: PAL
: SECAM
Power consumption (values are indicative)
- Normal operation (W) : ≈ 130 (32")
: ≈ 200 (42PFL5403/
98, 42PFL7403/93,
42PFL5403/93)
: ≈ 210 (42PFL7603/
93, 42PFL7603/98)
: ≈ 260 (47PFL5403/
98)
: ≈ 330 (52PFL5403/
93)
- Stand-by (W) : < 0.15
Dimensions (W × H × D mm) : 819 × 518 × 92 (32")
: 1046 × 645 × 88 (42")
: 1046 × 645 × 108
(42PFL7603/xx)
: 1163 × 712 × 104
(47")
: 1302 × 798 × 116
(52")
Weight (kg) : 14.5 (32")
: 20.0 (42")
: 20.5 (42PFL7603/xx)
: 26.0 (47")
: 38.0 (52")
1.1.2 Sound
Sound systems : stereo, BBE
Maximum power (W
1.1.3 Miscellaneous
Power supply:
- Mains voltage (V
- Mains frequency (Hz) : 50 / 60
Ambient conditions:
- Temperature range (°C) : +5 to +40
- Maximum humidity : 90% R.H.
):2 × 15
RMS
) : 100 - 240
AC
®
Technical Specifications, Connections, and Chassis Overview
1.2 Connection Overview
EN 3LC8.2A LA 1.
6
SERV. C
5
75X
TV ANTENNA
4
Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, and Ye= Yellow.
1.2.1 Rear Connections
1 - AV In: Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 V
Wh - Audio L 0.5 V
Rd - Audio R 0.5 V
2 - AV Out: Cinch: Video CVBS - Out, Audio - Out
Ye - Video CVBS 1 V
Wh - Audio L 0.5 V
Rd - Audio R 0.5 V
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
/ 75 Ω kq
PP
/10 kΩ kq
RMS
/ 10 kΩ kq
RMS
HDMI 1
AUDIO IN VGA
RL
Y
Pb
Pr
L
R
VIDEO
L
R
CVI AV INAV OU T
HDMI 3HDMI 2
OPTIONAL
VIDEO
L
R
321
Figure 1-1 Side and rear I/O connections
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - n.c.
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H
10
9
7
8
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3 - CVI: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V
Bu - Video Pb 0.7 V
Rd - Video Pr 0.7 V
Wh - Audio L 0.5 V
Rd - Audio R 0.5 V
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
4 - Aerial - In
- - IEC-type (EU) Coax, 75 Ω D
5 - Service Connector (ComPair)
1 - SDA-S I
2 - SCL-S I
2
C Data (0 - 5 V) jk
2
C Clock (0 - 5 V) j
3 - Ground Gnd H
6 - HDMI1, 2 and 3 (optional): Digital Video, Digital Audio In
1 - D2+ Data channel j
2 - Shield Gnd H
3 - D2- Data channel j
4 - D1+ Data channel j
7 - PC: VGA: Video RGB - In, Cinch: Audio - In
1
5
6
11
10
15
E_06532_002.eps
050404
Figure 1-2 VGA Connector
1 - Video Red 0.7 V
2 - Video Green 0.7 V
3 - Video Blue 0.7 V
4-n.c.
/ 75 Ω j
PP
/ 75 Ω j
PP
/ 75 Ω j
PP
5 - Ground Gnd H
6 - Ground Red Gnd H
7 - Ground Green Gnd H
8 - Ground Blue Gnd H
9-+5V
10 - Ground Sync Gnd H
+5 V j
DC
11 - n.c.
12 - DDC_SDA DDC data j
13 - H-sync 0 - 5 V j
EN 4 LC8.2A LA1.
Technical Specifications, Connections, and Chassis Overview
14 - V-sync 0 - 5 V j
15 - DDC_SCL DDC clock j
Wh - Audio L 0.5 V
Rd - Audio R 0.5 V
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
1.2.2 Side Connections
8 - S-Video (Hosiden): Video Y/C - In
1 - Ground Y Gnd H
2 - Ground C Gnd H
3 - Video Y 1 V
4 - Video C 0.3 V
/ 75 Ω j
PP
P / 75 Ω j
PP
8 - Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 V
Wh - Audio L 0.5 V
Rd - Audio R 0.5 V
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
9 - Head phone - Out
Bk - Head phone 32 - 600 Ω / 10 mW rt
10 - HDMI: Digital Video, Digital Audio - In
19
18 2
1
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Figure 1-3 HDMI (type A) connector
1 - D2+ Data channel j
2 - Shield Gnd H
3 - D2- Data channel j
4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - n.c.
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H
1.3 Chassis Overview
MAIN POWER
A
SUPPLY PANEL
KEYBOARD CONTROL
E
PANEL
IR & LED PANEL
J
Figure 1-4 PWB/CBA locations
DFI MODULE
DIGITAL BOLT-ON
(Optional)
SMALL SIGNAL
BOARD
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AB
B
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Safety Instructions, Warnings, and Notes
2. Safety Instructions, Warnings, and Notes
EN 5LC8.2A LA 2.
Index of this chapter:
2.1 Safety Instructions
2.2 Warnings
2.3 Notes
2.1 Safety Instructions
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
• Route the wire trees correctly and fix them with the
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for
proper function.
• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
2.2 Warnings
• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
• Be careful during measurements in the high voltage
section.
• Never replace modules or other components while the unit
is switched “on”.
• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
2.3 Notes
2.3.1 General
• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode (see chapter 5) with a colour bar
signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated
otherwise) and picture carrier at 475.25 MHz for PAL, or
61.25 MHz for NTSC (channel 3).
• Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
2.3.2 Schematic Notes
• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kΩ).
• Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
• All capacitor values are given in micro-farads (μ=× 10
nano-farads (n =× 10
• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
• An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
• The correct component values are listed in the Spare Parts
List. Therefore, always check this list when there is any
doubt.
2.3.3 BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: www.atyourservice.ce.philips.com (needs subscription,
not available for all regions). After login, select “Magazine”,
then go to “Repair downloads”. Here you will find Information
on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile,
which is coupled to the 12NC. For an overview of these profiles,
visit the website www.atyourservice.ce.philips.com (needs
subscription, but is not available for all regions)
You will find this and more technical information within the
“Magazine”, chapter “Repair downloads”.
For additional questions please contact your local repair help
desk.
2.3.4 Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
• Use only lead-free soldering tin Philips SAC305 with order
code 0622 149 00106. If lead-free solder paste is required,
please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
-9
), or pico-farads (p =× 10
-12
-6
),
).
EN 6 LC8.2A LA3.
2.3.5 Alternative BOM identification
It should be noted that on the European Service website,
“Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production center (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.
Directions for Use
MODEL :
PROD.NO:
2.3.6 Board Level Repair (BLR) or Component Level Repair (CLR)
If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
2.3.7 Practical Service Precautions
• It makes sense to avoid exposure to electrical shock.
• Always respect voltages. While some may not be
32PF9968/10
AG 1A0617 000001
Figure 2-1 Serial number (example)
While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.
MADE IN BELGIUM
220-240V 50/60Hz
~
VHF+S+H+UHF
BJ3.0E LA
S
E_06532_024.eps
128W
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3. Directions for Use
You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
4. Mechanical Instructions
Mechanical Instructions
EN 7LC8.2A LA 4.
Index of this chapter:
4.1 Cable Dressing
4.2 Service Positions
4.3 Assy/Panel Removal ME8 Styling
4.4 Set Re-assembly
4.1 Cable Dressing
Notes:
• Figures below can deviate slightly from the actual situation,
due to the different set executions.
• Follow the disassemble instructions in described order.
Figure 4-1 Cable dressing 50 Hz basic sets
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EN 8 LC8.2A LA4.
Mechanical Instructions
Figure 4-2 Cable dressing 50 Hz with AmbiLight
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Figure 4-3 Cable dressing 100 Hz sets with DFI panel
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Mechanical Instructions
EN 9LC8.2A LA 4.
4.2 Service Positions
For easy servicing of this set, there are a few possibilities
created:
• The buffers from the packaging.
• Foam bars (created for Service).
• Aluminium service stands (created for Service).
Note: the aluminium service stands can only be used when the
set is equipped with so-called “mushrooms”. Otherwise use the
original stand that comes with the set.
4.2.1 Foam Bars
1
Required for sets
1
42"
1. First remove the screws [1] from the back cover hatch and
remove the hatch.
2. Then unplug connector(s) [3].
3. Remove the screws [2], gently lift the back cover from the
set. Make sure that wires and flat coils are not damaged
while lifting the back cover from the set.
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Figure 4-4 Foam bars
The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs. See figure “Foam
bars” for details. Sets with a display of 42" and larger, require
four foam bars [1]. Ensure that the foam bars are always
supporting the cabinet and never only the display. Caution:
Failure to follow these guidelines can seriously damage the
display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen.
4.2.2 Service Stands
The MkII aluminium Service Stands are not suitable for this
chassis. Use the stands that come with the set instead.
4.3 Assy/Panel Removal ME8 Styling
4.3.1 Back Cover
Warning: Disconnect the mains power cord before you remove
the back cover.
Note: it is not necessary to remove the stand while removing
the back cover.
Warning: AmbiLight sets have an additional hatch located in
the back cover. These are meant for disconnecting the flat
cables to the AmbiLight units in the back cover, before the
back cover is lifted from the set. The hatches are not always
located at the same place for all sets, therefore the figures
below are only meant as indication.
It is mandatory to locate these hatches first, open them, and
unplug connectors behind. Lifting the back cover without
having done so, could result in damaging the connectors
inside!
Refer to next figures for details.
EN 10 LC8.2A LA4.
Mechanical Instructions
22
22
2
2
2
2
2
2
2
1
1
2
2
2
2 2
2
2
2
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Figure 4-6 Back Cover Removal [2/2]
4.3.2 Ambilight (if present)
Refer to next figure for details.
1. Unplug the connectors [1].
2. Remove the screws [2].
3. Pull the unit sidewards from the back cover.
When defective, replace the whole unit.
Figure 4-5 Back Cover Removal [1/2]
3
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4.3.3 Woofers
2
1
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180108
Figure 4-7 Ambilight Unit
Refer to next figure for details.
1. Remove the screws [1] and [2] and lift the whole unit from
the back cover.
Take the speakers out together with their casing. When
defective, replace the whole unit.
32
31
Figure 4-8 Woofer
4.3.4 Tweeters
Refer to next figure for details.
Warning: The speakers should never be connected or
disconnected when the set is playing! This can damage the
amplifiers on the SSB.
1. Remove the screws [1] and lift the whole unit from the back
cover.
When defective, replace the whole unit.
Mechanical Instructions
H_17740_023.eps
230108
3. Lift the unit and take it out of the set.
When defective, replace the whole unit.
1
Figure 4-11 Key Board
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EN 11LC8.2A LA 4.
1
2
H_17650_095.eps
Figure 4-9 Tweeter
4.3.5 IR & LED Board
Refer to next figure for details.
1. Unplug connectors [1].
2. Use a flat screw driver to release the clip by pushing it in
the indicated direction [2].
3. Lift the board and take it out of the set.
When defective, replace the whole unit.
1
180108
4.3.7 Display Supply Panel
Refer to next figure for details.
1. Unplug connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
2
2
2
2
1
1
2
2
1
2
1
2
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230108
2
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Figure 4-10 IR & LED Board
4.3.6 Key Board
Refer to next figure for details.
1. Unplug the key board connector from the IR & LED board.
2. Remove the screws [1].
180108
Figure 4-12 Display Supply Panel
4.3.8 Small Signal Board (SSB)
Refer to next figure for details.
Caution: it is mandatory to remount all different screws at their
original position during re-assembly. Failure to do so may result
in damaging the SSB.
1. Unplug the LVDS connector(s) [1].
Caution: be careful, as this is a very fragile connector!
2. Unplug the connectors [2].
3. Remove the screws [3].
4. The SSB can now be taken out of the set, together with the
front shield and the side cover.
5. To remove the shield, remove the screws [4] and lift it of
while releasing clips [5].
6. Remove screw [6] and slide the cover sidewards from the
SSB.
EN 12 LC8.2A LA4.
Mechanical Instructions
OPTIONAL
3 3
1
1
2
(
3x
)
3
2
(
4x
)
3
5
4 4 4
6
444
4 4
3 3 3
4.3.9 Direct Frame Insertion (DFI) Panel
Refer to next figures or details.
1. Mark LVDS connectors [1] feeding the display, preventing
mixing up during re-assembly.
Caution: be careful, as these are very fragile connectors!
2. Unplug the LVDS connectors [1] [2].
3. Unplug the connector [3].
4. Remove the screws [4].
5. The DFI panel can now be taken out of the set.
4 44
1 1 2
Figure 4-13 Small Signal Board
4.3.10 LCD Panel
Refer to next figures for details.
1. Remove the stand.
2. Unplug the LVDS connector(s) [1] and remove the
3. Unplug the connectors [2].
4. Remove the fixation screws [3] from rim.
5. Take the rim from the set.
6. Remove the fixation screws [4] and [5].
7. Lift the subframe from the set.
8. The LCD panel can now be lifted from the front cabinet.
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adhesive tape [1a].
Caution: be careful, as this is a very fragile connector!
4 4 4
Figure 4-14 DFI Panel
3
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Mechanical Instructions
EN 13LC8.2A LA 4.
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4.4 Set Re-assembly
To re-assemble the whole set, execute all processes in reverse
order.
Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position. See figure “Cable
dressing”.
• Pay special attention not to damage the EMC foams.
Ensure that EMC foams are mounted correctly (one is
located above the LVDS connector on the display, between
the LCD display and the metal sub-frame).
Figure 4-15 LCD Panel
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EN 14 LC8.2A LA5.
Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding
Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Service Tools
5.4 Error Codes
5.5 The Blinking LED Procedure
5.6 Software Upgrading
5.7 Fault Finding and Repair Tips
5.1 Test Points
In the chassis schematics and layout overviews, the test points
(Fxxx) are mentioned. In the schematics, test points are
indicated with a rectangular box around “Fxxx” or “Ixxx”, in the
layout overviews with a “half-moon” sign.
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. Several key ICs are
capable of generating test patterns, which can be controlled via
ComPair. In this way it is possible to determine which part is
defective.
Perform measurements under the following conditions:
• Service Default Mode.
• Video: Colour bar signal.
• Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
The Service Mode feature is split into four parts:
• Service Default Mode (SDM).
• Service Alignment Mode (SAM).
• Customer Service Mode (CSM).
• Digital Customer Service Mode (DCSM).
• Computer Aided Repair Mode (ComPair).
SDM and SAM offer features, which can be used by the Service
engineer to repair/align a TV set. Some features are:
• A pre-defined situation to ensure measurements can be
made under uniform conditions (SDM).
• Activates the blinking LED procedure for error identification
when no picture is available (SDM).
• The possibility to overrule software protections when SDM
was entered via the Service pins.
• Make alignments (e.g. white tone), (de)select options,
enter options codes, reset the error buffer (SAM).
• Display information (“SDM” or “SAM” indication in upper
right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).
The CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
• Increase the home repair hit rate.
• Decrease the number of nuisance calls.
• Solved customers' problem without home visit.
ComPair Mode is used for communication between a computer
and a TV on I2C /UART level and can be used by a Service
engineer to quickly diagnose the TV set by reading out error
codes, read and write in NVMs, communicate with ICs and the
uP (PWM, registers, etc.), and by making use of a fault finding
database. It will also be possible to up and download the
software of the TV set via I2C with help of ComPair. To do this,
ComPair has to be connected to the TV set via the ComPair
connector, which will be accessible through the rear of the set
(without removing the rear cover).
5.2.1 General
Some items are applicable to all Service Modes or are general.
These are listed below.
Life Timer
During the life time cycle of the TV set, a timer is kept. It counts
the normal operation hours (not the Stand-by hours). The
actual value of the timer is displayed in SDM and CSM in a
decimal value. Every two soft-resets increase the hour by +1.
Software Identification, Version, and Cluster
The software ID, version, and cluster will be shown in the main
menu display of SDM, SAM, and CSM.
The screen will show: “AAAABCD X.YY”, where:
• AAAA is the chassis name: LC82.
• B is the region indication: E= Europe, A= AP/China, U=
NAFTA, L= LATAM.
• C is the display indication: L= LCD, P= Plasma.
• D is the language/feature indication: 1= standard, H=
1080p full HD.
• X is the main version number: this is updated with a major
change of specification (incompatible with the previous
software version). Numbering will go from 1 - 9 and A - Z.
– If the main version number changes, the new version
number is written in the NVM.
– If the main version number changes, the default
settings are loaded.
• YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous versions)
Numbering will go from 00 - 99.
– If the sub version number changes, the new version
number is written in the NVM.
– If the NVM is fresh, the software identification, version,
and cluster will be written to NVM.
Display Option Code Selection
When after an SSB or display exchange, the display option
code is not set properly, it will result in a TV with “no display”.
Therefore, it is required to set this display option code after
such a repair.
To do so, press the following key sequence on a standard RC
transmitter: “062598” directly followed by MENU and “xxx”,
where “xxx” is a 3 digit decimal value of the panel type: see
column “Display code” in table “Option code overview” (ch. 8),
or see sticker on the side/bottom of the cabinet. When the value
is accepted and stored in NVM, the set will switch to Stand-by,
to indicate that the process has been completed.
Display Option
Code
39mm
040
PHILIPS
MODEL:
32PF9968/10
27mm
PROD.SERIAL NO:
AG 1A0620 000001
(CTN Sticker)
E_06532_038.eps
Figure 5-1 Location of Display Option Code sticker
During this algorithm, the NVM-content must be filtered,
because several items in the NVM are TV-related and not SSBrelated (e.g. Model and Prod. S/N). Therefore, “Model” and
“Prod. S/N” data is changed into “See Type Plate”.
In case a call centre or consumer reads “See Type Plate” in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.
240108
Service Modes, Error Codes, and Fault Finding
s
7
5.2.2 Service Default Mode (SDM)
Purpose
Set the TV in SDM mode in order to be able to:
• Create a pre-defined setting for measurements to be
made.
• Override software protections.
• Start the blinking LED procedure.
• Read the error buffer.
• Check the life timer.
Specifications
Table 5-1 SDM default settings
Region Freq. (MHz) Default syst.
Europe (except France),
AP-PAL/-Multi
France SECAM L
NAFTA, AP-NTSC 61.25 (channel 3) NTSC M
LATAM PAL M
• Set linear video and audio settings to 50%, but volume to
25%. Stored user settings are not affected.
• All service-unfriendly modes (if present) are disabled, since
they interfere with diagnosing/repairing a set. These
service unfriendly modes are:
– (Sleep) timer.
– Blue mute/Wall paper.
– Auto switch “off” (when there is no “ident” signal).
– Hotel or hospital mode.
– Child lock or parental lock (manual or via V-chip).
– Skipping, blanking of “Not favourite”, “Skipped” or
“Locked” presets/channels.
– Automatic storing of Personal Preset or Last Status
settings.
– Automatic user menu time-out (menu switches back/
OFF automatically.
– Auto Volume levelling (AVL).
475.25 PAL B/G
EN 15LC8.2A LA 5.
SDM
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Figure 5-2 Service jumper (SSB component side)
On Screen Menu
After activating SDM, the following screen is visible, with SDM
in the upper right corner of the screen to indicate that the
television is in Service Default Mode.
HHHHH A A A A B CD - X. Y Y
ERR XX XX XX XX XX
O P X X X X X X X X X X X X X X X X X X
Figure 5-3 SDM menu
SDM
G_16860_030.ep
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How to Activate
To activate SDM, use one of the following methods:
• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the MENU button
(do not allow the display to time out between entries while
keying the sequence).
• Short one of the “Service” jumpers on the TV board during
cold start (see Figures “Service jumper”). Then press the
mains button (remove the short after start-up).
Caution: Activating SDM by shorting “Service” jumpers will
override the DC speaker protection (error 1), the General
I2C error (error 4), and the Trident video processor error
(error 5). When doing this, the service-technician must
know exactly what he is doing, as it could damage the
television set.
Menu explanation:
• HHHHH: Are the operating hours (in decimal).
• AAAABCD-X.YY: See paragraph “Service Modes” ->
“General” -> “Software Identification, Version, and Cluster”
for the SW name definition.
• SDM: The character “SDM” to indicate that the TV set is in
Service mode.
• ERR: Shows all errors detected since the last time the
buffer was erased. Five errors possible.
• OP: Used to read-out the option bytes. See “Options” in the
Alignments section for a detailed description. Seven codes
are possible.
How to Navigate
As this mode is read only, there is not much to navigate. To
switch to other modes, use one of the following methods:
• Command MENU from the user remote will enter the
normal user menu (brightness, contrast, colour, etc...) with
“SDM” OSD remaining, and pressing MENU key again will
return to the last status of SDM again.
• To prevent the OSD from interfering with measurements in
SDM, command “OSD” (“STATUS” for NAFTA and
LATAM) from the user remote will toggle the OSD “on/off”
with “SDM” OSD remaining always “on”.
• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the OSD/
STATUS/INFO/i+
button to switch to SAM (do not allow the
display to time out between entries while keying the
sequence).
EN 16 LC8.2A LA5.
Service Modes, Error Codes, and Fault Finding
How to Exit
Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or on the television set.
If you switch the television set “off” by removing the mains (i.e.,
unplugging the television), the television set will remain in SDM
when mains is re-applied, and the error buffer is not cleared.
The error buffer will only be cleared when the “clear” command
is used in the SAM menu.
Note:
• If the TV is switched “off” by a power interrupt while in SDM,
the TV will show up in the last status of SDM menu as soon
as the power is supplied again. The error buffer will not be
cleared.
• In case the set is in Factory mode by accident (with “F”
displayed on screen), by pressing and hold “VOL-” and
“CH-” together should leave Factory mode.
5.2.3 Service Alignment Mode (SAM)
Purpose
• To change option settings.
• To display / clear the error code buffer.
• To perform alignments.
Specifications
• Operation hours counter (maximum five digits displayed).
• Software version, error codes, and option settings display.
• Error buffer clearing.
• Option settings.
• Software alignments (Tuner, White Tone, and Audio).
• NVM Editor.
• ComPair Mode switching.
• Set the screen mode to full screen (all contents on screen
are viewable).
How to Activate
To activate SAM, use one of the following methods:
• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the OSD/
STATUS/INFO/i+ button (it depends on region which
button is present on the RC). Do not allow the display to
time out between entries while keying the sequence.
• Or via ComPair.
After entering SAM, the following screen is visible, with SAM in
the upper right corner of the screen to indicate that the
television is in Service Alignment Mode.
LLLL L A AAABCD- X. YY
ERR XX XX XX XX XX
O P X X X X X X X X X X X X X X X X X X
C l e a r > Y e s
O p t i o n s >
T u n e r >
R G B A l i g n >
N V M E d i t o r >
C o m p a i r >
S W E V E N T S >
Figure 5-4 SAM menu
Menu explanation:
1. LLLLL. This represents the run timer. The run timer counts
normal operation hours, but does not count Stand-by
hours.
2. AAAABCD-X.YY. See paragraph “Service Modes” ->
“General” -> “Software Identification, Version, and Cluster”
for the SW name definition.
3. SAM. Indication of the Service Alignment Mode.
4. ERR (ERRor buffer). Shows all errors detected since the
last time the buffer was erased. Five errors possible.
SAM
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260107
5. OP (Option Bytes). Used to read-out the option bytes. See
“Options” in the Alignments section for a detailed
description. Seven codes are possible.
6. Clear. Erases the contents of the error buffer. Select the
CLEAR menu item and press the MENU RIGHT key. The
content of the error buffer is cleared.
7. Options. Used to set the option bits. See “Options” in the
“Alignments” chapter for a detailed description.
8. Tuner. Used to align the tuner. See “Tuner” in the
“Alignments” chapter for a detailed description.
9. RGB Align. Used to align the White Tone. See “White
Tone” in the “Alignments” chapter for a detailed
description.
10. NVM Editor. Can be used to change the NVM data in the
television set. See also paragraph “Fault Finding and
Repair Tips” further on.
11. ComPaIr. Can be used to switch the television to “In
Application Programming” mode (IAP), for software
uploading via ComPair. Read paragraph “Service Tools” > “ComPair”.
Caution: When this mode is selected without ComPair
connected, the TV will be blocked. Remove the AC power
to reset the TV.
12. SW Events. Only to be used by development to monitor
SW behaviour during stress test.
How to Navigate
• In the SAM menu, select menu items with the MENU UP/
DOWN keys on the remote control transmitter. The
selected item will be indicated. When not all menu items fit
on the screen, use the MENU UP/DOWN keys to display
the next / previous menu items.
• With the MENU LEFT/RIGHT keys, it is possible to:
– Activate the selected menu item.
– Change the value of the selected menu item.
– Activate the selected sub menu.
• When you press the MENU button twice while in top level
SAM, the set will switch to the normal user menu (with the
SAM mode still active in the background). To return to the
SAM menu press the MENU button.
• Command OSD/STATUS/INFO/i+ button from the user
remote will toggle the OSD “on/off” with “SAM” OSD
remaining always “on”.
• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the MENU button
to switch to SDM (do not allow the display to time out
between entries while keying the sequence).
How to Store SAM Settings
To store the settings changed in SAM mode (except the
OPTIONS settings), leave the top level SAM menu by using the
POWER button on the remote control transmitter or the
television set.
How to Exit
Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or the television set.
Note:
• When the TV is switched “off” by a power interrupt while in
SAM, the TV will show up in “normal operation mode” as
soon as the power is supplied again. The error buffer will
not be cleared.
• In case the set is in Factory mode by accident (with “F”
displayed on screen), by pressing and hold “VOL-” and
“CH-” together should leave Factory mode.
Service Modes, Error Codes, and Fault Finding
EN 17LC8.2A LA 5.
5.2.4 Customer Service Mode (CSM)
Purpose
The Customer Service Mode shows error codes and
information on the TV’s operation settings. A call centre can
instruct the customer (by telephone) to enter CSM in order to
identify the status of the set. This helps them to diagnose
problems and failures in the TV before making a service call.
The CSM is a read-only mode; therefore, modifications are not
possible in this mode.
Specifications
• Ignore “Service unfriendly modes”.
• Line number for every line (to make CSM language
independent).
• Set the screen mode to full screen (all contents on screen
are viewable).
• After leaving the Customer Service Mode, the original
settings are restored.
• Possibility to use “CH+” or “CH-” for channel surfing, or
enter the specific channel number on the RC.
How to Activate
To activate CSM, press the following key sequence on the
remote control transmitter: “123654” (do not allow the display
to time out between entries while keying the sequence).
Upon entering the Customer Service Mode, the following
screen will appear:
1 M O D E L : 4 2 P F L 7 4 0 3 / 9 3
2 P R O D S / N : AG1A0812123456
3 S W I D : L C 8 2 A L 1 - 1 . x x
4 O P : X X X X X X X X X X X X X X X X X X X X X
5 C O D E S : X X XX XX XX XX
6 S S B : 3 1 39 123 63491
7 N V M : X X X X X X X X
8 F l a s h D a t a : X X . X X . X X . X X
9 D I S P L A Y : xxxx xxx xxxxx
P A G E D O W N
B
y
Figure 5-5 CSM menu -1- (example)
CS M
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Menu Explanation
1. MODEL. Type number, e.g. 32PFL7762D/05. (*)
2. PROD S/N. Product serial no., e.g. AG1A0712123456. (*)
3. SW ID. Software cluster and version is displayed.
4. OP. Option code information.
5. CODES. Error buffer contents.
6. SSB. Indication of the SSB factory ID (= 12nc). (*)
7. NVM. The NVM software version no.
8. Flash Data. PQ (picture quality) and AQ (audio quality)
data version. This is a sub set of the main SW.
9. DISPLAY. Indication of the display ID (=12 nc).
10. TUNER. Indicates the tuner signal condition: “Weak” when
signal falls below threshold value, “Medium” when signal is
at mid-range, and “Strong” when signal falls above
threshold value.
11. SYSTEM. Gives information about the video system of the
selected transmitter (PAL/SECAM/NTSC).
12. SOUND. Gives information about the audio system of the
selected transmitter (MONO/STEREO/NICAM).
13. HDAU. HDMI audio stream detection. “YES” means audio
stream detected. “NO” means no audio stream present.
Only displayed when HDMI source is selected.
14. FORMAT. Gives information about the video format of the
selected transmitter (480i/480p/720p/1080i).
15. DFR SW ID. Referring to bolt-on SW ID.
16. FPGA FW. Only applicable to sets with an FPGA.
17. Reserved.
18. Reserved.
(*) If an NVM IC is replaced or initialised, the Model Number,
Serial Number, and SSB Code Number must be re-written to
the NVM. ComPair will foresee in a possibility to do this.
How to Exit
To exit CSM, use one of the following methods:
• Press the MENU button twice, or POWER button on the
remote control transmitter.
• Press the POWER button on the television set.
5.2.5 Digital Customer Service Mode (DCSM)
1 0 T U N E R : W E A K / G O O D / S T R O N G
1 1 S Y S T E M : P A L / N T S C / S E C A M
1 2 S O U N D : M O N O / S T E R E O / N I C A M
1 3 H D A U : Y E S / N O
1 4 F O R M A T : X X X X X X X X
1 5 DFR SW ID : (*)
1 6 F P G A F W : xx.xx.xx
1 7 :
1 8 :
P A G E U P :
(*) referring to bolt-on DFI SW ID
B
y
Figure 5-6 CSM menu -2- (example)
CS M
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120208
This section only applies to sets where the Digital bolt-on
Module is mounted (China: CTNs ending with “D/93”).
Detailed information will be published when these sets are
actually on the market (not during this release of the Service
Manual).
Purpose
The Digital Customer Service Mode shows how the Digital
Module performs.
How to Activate
To activate DCSM:
1. Put the set in “digital mode”.
2. Press “digital MENU” key on RC.
3. Press “123654” key sequence on RC (do not allow the
display to time out between entries while keying the
sequence).
How to Exit
To exit DCSM, press “digital MENU” key on RC.
EN 18 LC8.2A LA5.
Service Modes, Error Codes, and Fault Finding
5.3 Service Tools
5.3.1 ComPair
Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. You do not
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box
and the TV communicate via a bi-directional cable via the
service connector(s).
How to Connect
This is described in the ComPair chassis fault finding database.
TO TV
TO
UART SERVICE
I2C SERVICE
CONNECTOR
CONNECTOR
2
C
I
PC
ComPair II Developed by Philips Brugge
Optional power
5V DC
TO
RS232 /UART
E_06532_036.eps
150208
TO
UART SERVICE
CONNECTOR
ComPair II
RC in
Optional
Switch
Power ModeLink/
Activity
HDMI
I
2
C only
RC out
Multi
function
Figure 5-7 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!
How to Order
ComPair II order codes:
• ComPair II interface: 3122 785 91020.
• ComPair32 CD (update): 3122 785 60160.
• ComPair UART interface cable: 3122 785 90630 (to be
used for upgrading the MT8280 software) (applicable to
sets where the DFI panel has been replaced by the onboard MT8280).
•ComPair I
2
C interface cable: 9965 100 07325 (to be used
for upgrading the Main software).
Note: If you encounter any problems, contact your local
support desk.
5.4 Error Codes
5.4.1 Introduction
Error codes are required to indicate failures in the TV set. In
principle a unique error code is available for every:
• Activated protection.
• Failing I2C device.
• General I2C error.
• SDRAM failure.
The last errors, stored in the NVM, are shown in the Service
menu’s. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code may never lead to a
deadlock situation. This means that it must always be
diagnosable (e.g. error buffer via OSD or blinking LED
procedure, ComPair to read from the NVM).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.
Example: In case of a failure of the I2C bus (CAUSE), the error
code for a “General I2C failure” and “Protection errors” is
displayed. The error codes for the single devices (EFFECT) is
not displayed. All error codes are stored in the same error
buffer (TV’s NVM) except when the NVM itself is defective.
5.4.2 How to Read the Error Buffer
You can read the error buffer in 3 ways:
• On screen via the SAM/SDM/CSM (if you have a picture).
Example:
– ERROR: 0 0 0 0 0: No errors detected
– ERROR: 6 0 0 0 0: Error code 6 is the last and only
detected error
– ERROR: 9 6 0 0 0: Error code 6 was detected first and
error code 9 is the last detected (newest) error
• Via the blinking LED procedure (when you have no
picture). See “The Blinking LED Procedure”.
•Via ComPair.
5.4.3 Error Codes
In case of non-intermittent faults, write down the errors present
in the error buffer and clear the error buffer before you begin
the repair. This ensures that old error codes are no longer
present.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
and not the actual cause of the problem (for example, a fault in
the protection detection circuitry can also lead to a protection).
5.3.2 LVDS Tool
Support of the LVDS Tool has been discontinued.
Service Modes, Error Codes, and Fault Finding
EN 19LC8.2A LA 5.
Table 5-2 Error code overview
Error
1)
code
0 No error.
1 DC Protection of speakers.
2 +12V protection error. 12V missing or “low”.
3 Reserved.
4 General I2C error. note 2
5 Trident Video Processor
6 I2C error while communicating
7 I2C error while communicating
8 I2C error while communicating
9 I2C error communicating with
10 SDRAM defective. 7D01
11 I2C error while communicating
12 Brazil/China/Hong Kong
13 Reserved
14 SDRAM defective. 7D02
15 Reserved
16 Reserved
17 I2C error while communicating
18 Reserved (iTV) (iTV)
19 I2C error while communicating
20 Reserved
21 I2C error while communicating
22 Reserved.
23 Reserved.
Description
communication error.
with the NVM.
with the Tuner.
with the IF Demodulator.
the Sound Processor.
with the HDMI IC.
ISDTV digital bolt-on module
communication failure
with FPGA
with bolt-on DFI
with the HDMI mux IC
Item
no. Remarks
7C01 When Trident IC is
defective, error 10 and 14
might also be reported.
Trident communicates via
parallel bus, not via the I2C
bus. The I2C bus of Trident
is only used in ComPair
mode.
7L23 The TV will not start-up due
to critical data not availabl e
from the NVM, but the LED
will blink the error code.
1101
7113
7411
7N01
7700 or
external
1080p 100Hz sets only
7M07
Notes
1. Some of the error codes reported are depending on the
option code configurations.
2. This error means: no I2C device is responding to the
particular I2C bus. Possible causes: SCL/SDA shorted to
GND, SCL shorted to SDA, or SCL/SDA open (at uP pin).
The internal bus of the Trident platform should not cause
the entire system to halt as such an error can be reported.
5.4.4 How to Clear the Error Buffer
The error code buffer is cleared in the following cases:
• By using the CLEAR command in the SAM menu:
– To enter SAM, press the following key sequence on the
remote control transmitter: “062596” directly followed
by the OSD/STATUS/INFO/i+ button (do not allow the
display to time out between entries while keying the
sequence).
– Make sure the menu item CLEAR is selected. Use the
MENU UP/DOWN buttons, if necessary.
– Press the MENU RIGHT button to clear the error
buffer. The text on the right side of the “CLEAR” line will
change from “CLEAR?” to “CLEARED”
• If the contents of the error buffer have not changed for 50
hours, the error buffer resets automatically.
Note: If you exit SAM by disconnecting the mains from the
television set, the error buffer is not reset.
5.5 The Blinking LED Procedure
5.5.1 Introduction
The software is capable of identifying different kinds of errors.
Because it is possible that more than one error can occur over
time, an error buffer is available, which is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.
Errors can also be displayed by the blinking LED procedure.
The method is to repeatedly let the front LED pulse with as
many pulses as the error code number, followed by a period of
1.5 seconds in which the LED is “off”. Then this sequence is
repeated.
Example (1): error code 4 will result in four times the sequence
LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After
this sequence, the LED will be “off” for 1.5 seconds. Any RC5
command terminates the sequence. Error code LED blinking is
in red colour.
Example (2): the content of the error buffer is “129600”
After entering SDM, the following occurs:
• 1 long blink of 5 seconds to start the sequence,
• 12 short blinks followed by a pause of 1.5 seconds,
• 9 short blinks followed by a pause of 1.5 seconds,
• 6 short blinks followed by a pause of 1.5 seconds,
• 1 long blink of 1.5 seconds to finish the sequence,
• The sequence starts again with 12 short blinks.
5.5.2 Displaying the Entire Error Buffer
Additionally, the entire error buffer is displayed when Service
Mode “SDM” is entered. In case the TV set is in protection or
Stand-by: The blinking LED procedure sequence (as in SDMmode in normal operation) must be triggered by the following
RC sequence: “MUTE” “062500” “OK”.
In order to avoid confusion with RC5 signal reception blinking,
this blinking procedure is terminated when a RC5 command is
received.
To erase the error buffer, the RC command “MUTE” “062599
“OK” can be used.
5.6 Software Upgrading
In this chassis, the following SW “stacks” are used:
• TV main SW (processor and processor NVM).
• MT8280 software (sets where the DFI panel has been
replaced by on-board MT8280).
• Digital Module software; only applies to sets where the
Digital bolt-on Module is mounted (China: CTNs ending
with “D/93”, Hong Kong: CTNs ending with “D/30”).
5.6.1 TV Main SW Upgrade
For instructions on how to upgrade the TV Main software, refer
to ComPair.
5.6.2 MT8280 SW Upgrade
This paragraph only applies to sets where the DFI panel has
been replaced by the on-board MT8280. The software for the
MT8280 has to be flashed via a separate cable and -connector.
See paragraph “Service Tools > ComPair” for the correct order
number of this cable. For the location of the connector on the
SSB, see figure “SSB top view” in chapter 9 “Circuit
Descriptions, Abbreviation List, and IC Data Sheets”. Before
the cable can be connected, a hatch in the backcover has to be
removed (no need to remove the entire backcover).
EN 20 LC8.2A LA5.
For instructions on how to upgrade the MT8280 software, refer
to ComPair.
5.6.3 Digital Module SW Upgrade
Performing Digital Software upgrade via the USB port
It is recommended that only qualified Service personnel
perform this task. As any interruption occurs during the
software upgrade process, the Digital Module will be
malfunctioning. Then a special fixture is needed to recover the
Digital Module. To perform this operation, the following needs
to be prepared:
• A USB stick (preferable from a well known brand).
• The software must be downloaded from the service
website.
• The software should be stored in the root directory of the
USB stick.
The digital module has it’s own USB port. This USB port is
covered by a protective tape. Remove the tape for the USB
software upgrade and should be covered back when the job is
done. The following steps should be performed for upgrading
the set:
• Put the set in digital mode.
• Using the remote control, select the digital user menu.
• Scroll to the “Information” item as shown in figure
“Information menu”.
Service Modes, Error Codes, and Fault Finding
I_17764_001.eps
Figure 5-8 Information menu
• Select “New Software” item as shown in figure “New
Software menu”.
170908
I_17764_003.eps
170908
Figure 5-10 USB available menu
• Select “the software for the update and confirm as shown
in figure “Update menu”.
I_17764_004.eps
170908
Figure 5-11 Update menu
• The update progress is shown as in figure “Software
upgrade Application menu”.
I_17764_002.eps
Figure 5-9 New Software menu
• Select “USB available” item as shown in figure “New
Software menu”.
170908
Service Modes, Error Codes, and Fault Finding
I_17764_005.eps
170908
Figure 5-12 Software upgrade Application menu
• When software flashing is completed, the TV will go into a
black screen.
• Wait untill the “No Channel Available (TV)”below screen reappear to indicate successful completion of SW flashing as
shown in figure “No Channel Available (TV)”.
EN 21LC8.2A LA 5.
I_17764_006.eps
170908
Figure 5-13 No Channel Available (TV)
Digital Customer Service Mode
This mode gives an overview of how thele performs under
various digital signal sources.:
How to activate
• Put the set in digital mode
• Press the Digital Menu button on the remote control
• Press the key sequence “1 2 3654”.
The following figures show the self explanatory Digital
Customer Service Mode screens.
Figure 5-14 Digital Customer Service Mode
5.7 Fault Finding and Repair Tips
Notes:
• It is assumed that the components are mounted correctly
with correct values and no bad solder joints.
• Before any fault finding actions, check if the correct options
are set.
5.7.1 NVM Editor
In some cases, it can be convenient if one directly can change
the NVM contents. This can be done with the “NVM Editor” in
SAM mode. With this option, single bytes can be changed.
Caution:
• Do not change the NVM settings without
understanding the function of each setting, because
incorrect NVM settings may seriously hamper the
correct functioning of the TV set!
• Always write down the existing NVM settings, before
changing the settings. This will enable you to return to the
original settings, if the new settings turn out to be incorrect.
I_17764_007.eps
170908
Table 5-3 NVM editor overview
Hex Dec Description
.ADR 0x000A 10 Existing value
.VAL 0x0000 0 New value
.Store Store?
5.7.2 Load Default NVM Values
It is possible to download default values automatically into the
NVM in case a blank NVM is placed or when the NVM first 20
address contents are “FF”. After the default values are
EN 22 LC8.2A LA5.
downloaded, it is possible to start-up and to start aligning the
TV set. To initiate a forced default download the following
action has to be performed:
1. Switch “off” the TV set with the mains cord disconnected
from the wall outlet (it does not matter if this is from
“Stand-by” or “Off” situation).
2. Short-circuit the SDM jumpers on the SSB (keep short
circuited).
3. Press “P+” or “CH+” on the local keyboard (and keep it
pressed).
4. Reconnect the mains supply to the wall outlet.
5. Release the “P+” or “CH+” when the set is “on” or blue LED
is blinking.
When the downloading has completed successfully, the set
should be into Stand-by, i.e. red LED on.
Alternative method (1):
1. Go to SAM.
2. Select NVM Editor.
3. Select ADR (address) to 1 (dec).
4. Change the VAL (value) to 170 (dec).
5. Store the value.
6. Do a hard reset to make sure new default values took
place.
Alternative method (2):
It is also possible to upload the default values to the NVM with
ComPair in case the SW is changed, the NVM is replaced with
a new (empty) one, or when the NVM content is corrupted.
After replacing an EEPROM (or with a defective/no EEPROM),
default settings should be used to enable the set to start-up and
allow the Service Default Mode and Service Alignment Mode to
be accessed.
Service Modes, Error Codes, and Fault Finding
5.7.3 Start-up/Shut-down Flowcharts
On the next pages you will find start-up and shut-down
flowcharts, followed by a trouble shooting flowchart, which
might be helpful during fault finding.
Please note that some events are only related to PDP sets, and
therefore not applicable to this LCD chassis.
Service Modes, Error Codes, and Fault Finding
EN 23LC8.2A LA 5.
LC08R
Start Up
No
Disable Audio Mute
Standby Soft Mode
(NO LED)
Port Assignment in STANDBY
Wait for Power Local Key
Notes:
---------
1.Initialise HDMI MUX IIC address ( EDID,CEC)
2. Enable Mute mean ANTI_PLOP= LOW, MUTEn=HIGH
3. Disable Mute mean ANTI_PLOP = HIGH, MUTEn=LOW
Standby Normal
Error 2
[Protection]
300ms
V1.0
21 Aug 2007
Mode
Standby Normal Mode
(RED LED)
Disable Audio Mute
Port Assignment in STANDBY
Wait for RC key or
Wake up event
Wait for 100ms
Time out = 2000ms
Error 6 - N VM
[Protection]
No
Yes
AC ON
+3V3STBY Available
160ms
Yes
100ms
300ms
300ms
1700ms
Error 7
M16C POR by +3VSTBY
STANDBY = HIGH
InitCold Component:
1. Check SDM port.
- If SDM pin = LOW and NVM first 20Byte = 0xFF,
reload Software default NVM value.
2. Check Panel port.
- If Panel Pin = LOW and check slave address
0x65 = 0xA5, Enter Panel Mode.
Last status is ON?
Yes
Read NVM completed.
STOP I²C activities.
LED = WHITE for Normal mode
LED = RED for Recording mode
BLOCK RC Key
(SVP_Trident) SVPWX_ RST = LOW
HDMI_RX_BUF_ RST = LOW
HDMI_MUX_RST =LOW
AUD_RST = LOW
Enable Audio Mute
Wait for 50ms
LCD_PWR_ON = LOW
SDI PDP => CTRL_DISP1 = LOW
BL_On_Off = HIGH (PDP only)
STANDBY = LOW
Wait for 100ms
Is Power Down
No
KMNPLL Latch data need 50us setup time
BL_ADJ = HIGH (100% Duty Cycle) first!!
= HIGH?
Wait for 300ms
(SVP_Trident) SVPWX_RST = HIGH
DTV_RESET_N = LOW
PRST = LOW
PWN = HIGH
Wait for 300ms
(SVP_Trident) M16C SVPWX_RST = LOW
HDMI_RX_BUF_RST= HIGH
HDMI_MUX_RST = HIGH
AUD_RST = HIGH
DTV_RESET_N = HIGH
PRST = HIGH
Enable Power Down INT
Enable DC_PROT INT
Initialise Trident WX
DPTVInit( )
Initialise Tuner
(Same function as CTRL-DISP2)
SDI PDP => CTRL_DISP1 = LOW
20ms
1000m s to
1500ms
For LCD:
BL_ON_OFF = HIGH
* BL_ADJ keep 100% for 3000ms
before dimming.
Picture Mode Setup & Detection
No
Error 5 - Trident
[Protection]
Error 10 – SDRAM 7C04
[Protection]
Error 14 – SDRAM 7C05
[Protection]
User wake up the sets
in DVB recording mode
LCD_PWR_ON = HIGH
BL_On_ Off=HIGH (PD P only)
Wait for 20 ms
Switch ON LVDS Signal
Init. Warm Component
(For software)
Blank Picture
unBlank Picture &
UnMute Audio
End
For PDP:
3000ms delay
For DVB Sets only (Semistandby)
Recording mode
SDI PDP => CTRL_DISP1 = HIGH
FHP PDP => CTRL _DISP4 = LOW
BL_On_Off=LOW (PDP only)
Recording Mode finished
Software Shutdown:
WP for NVM
Port Assignment in STANDB Y
STANDBY = LOW
Standby
Normal Mode
Initialise IF Demodulator, Afric
Initialise HDMI Receiver, Sil 9125
Initialise HDMI Mux, Sil 9185
Initialise FHP Panel (Pr ovision)
* For FHP PDP Sets only
MT8280 or 100Hz Bolt on
Yes
Error 8
Error 9
Error 11
Error 21
Error 3
[Protection]
Error 19
Figure 5-15 Start-up flowchart
TDA9886T
Initialise Micronas
Mute Audio
AmbiLight Set Only
Initialise AmbiLight
Initialise
Enable RC Key
DVB recording mode
Error 17 – AmbiLight
Error 18 – iTV
I_17760_047.eps
030308
EN 24 LC8.2A LA5.
STANDBY / TACT SWITCH STANDBY
Service Modes, Error Codes, and Fault Finding
Start
Send Standby command to Digital Module
Wait for 2s
Ack received from
For DVB Sets only (Semistandby)
Digital Module or > 2s
LED = RED No
Wait for 3000ms
Except power tact switch
SDI PDP => CTRL_DISP1 = HIGH
FHP PDP => CTRL_DISP4 = LOW
Off Air Downloading/ Recording Mode
IBOZ send shut down command
300ms
20ms
Mute Audio
BL_ADJ
(PWM duty cycle 100%)
BL_ON_OFF = LOW
Wait 300ms
Switch OFF LVDS
Wait 20ms
LCD_PWR_ON = LOW
Software Shutdown:
Standby using
“power key”
Yes
LED = NO LED
for Standby soft mode
Disable Power Down INT &
DC_PROT_INT
BL_ADJ = LOW
(PWM duty cycle 0%)
WP for NVM
(ANTI_PLOP=LOW)
(MUTEn =HIGH)
Enable Audio Mute
Port Assignment in STANDBY
40ms
Total = 360ms
STANDBY = HIGH
Wait for 3000ms
Disable Audio Mute
End
Figure 5-16 Stand-by / Tact Switch Stand-by flowchart
(ANTI_PLOP =HIGH)
(MUTEn = LOW)
Sets go to standby here
Blocking for the next start up to ensure
power supply discard properly.
(ANTI_PLOP =HIGH)
(MUTEn = LOW)
I_17760_048.eps
030308
Service Modes, Error Codes, and Fault Finding
EN 25LC8.2A LA 5.
Power Down INT:
AC OFF or Transient INT
Avoid fal se trigger
No
End
Notes:
1. Power Down INT will based on fall edge triggering
2. +3V3STBY will stay for 15ms, software must perform WP for NVM within 15ms.
Start
Poll the Power Do wn
INT for 5 times
Yes
Mute Audio & VIdeo
WP for NVM
STANDBY = HIGH
Wait 5000 ms
Re-start: Start up
End
DC_PROT INT
Avoid false trigger
No
End
Error 1
[Protection]
Figure 5-17 Power Down & DC_PROT flowchart
Start
is DC_PROT = LOW
for 3 sec?
Yes
Mute Audio & VIdeo
Log Error Code
WP for NVM
STANDBY=HIGH
End
I_17760_027.eps
180908
EN 26 LC8.2A LA5.
Service Modes, Error Codes, and Fault Finding
Code
Figure 5-18 Troubleshooting flowchart
I_17760_049.eps
030308
Block Diagrams, Test Point Overview, and Waveforms
6. Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram 32" 50Hz (ME8)
WIRING 32"
(STYLING ME8)
27LC8.2A LA 6.
KEYBOARD CONTROL
(0025)
E
J1
1. GND
2. KEYBOARD
3. +3V3STBY
4. INTERRUPT
INVERTER
8M01
8418
14P
CN2 / 1319
14. PDIM_Select
13. PWM
12. On/Off
11. Vbri
10. GND3
9. GND3
8. GN D3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24 Vin v
2. 24Vinv
1. 24Vinv
LCD DISPLAY
LVD S INPUT
30P
MAIN POWER SUPPLY
A
(1005)
CN6 / 1M95
1. 3V3Vstdby
2. Standby
3. GN D1
4. GND1
5. GND1
6. +12V
7. +12V
8. +1 2V
9. +12V (audio)
10. GND2
11. -12V (audio)
CN7 / 1M99
1. +12V
2. +12V
3. GN D1
4. GND1
5. BL_ON_OFF
6. DIM
7. Boost
CN1 / 1308
2. L
1. N
8308
8. ANALOG/PWM
dimming
INLET
8320
8P01
8P02
8A35
(1004)
8R01
SSB
(1150)
B
1P01
(B01A)
11. -12VAudio
10. GNDSND
9. +12VAudio
7. +12VS
6. +12VS
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3STBY
1P02
(B01A)
8. ANA-DIG_DIM_SELECT
7. BACKLIGHT_BOOST
6. PWM_DIMMING
5. BACKLIGHT_ON_OFF
4. GND
3. GND
2. +12Vdisp
1. +12Vdisp
1320
(B03)
9. KEYBOARD
8. +5V_SW
7. KEYBOARD
6. LED1
5. +3V3STBY
4. LED2
3. IR
2. GND
1. LIGHT_SENSOR
1A35
(B05B)
4. RIGHT+
3. GND
2. GND
1. LEFT-
(B04E)
1R01
1. ITV_I2C_SDA
2. TV_I2C_SDA
..40. +VDISP
41. +VDISP
1P11
1. GND
2. KEYBOARD
IR LED PANEL
J
(1112)
3. +3V3STBY
4. TACT_SWITCH_INT
1P10
1. LIGHT-SENSOR
+ -
2. GNDSND
3. RC
4. LED2
5. +3V3-STANDBY
6. LED1
7. KEYBOARD
8. +5V
9. KEYBOARD
RIGHT SPEAKER
(5211) ME8 IN BACK COVER
(5212) ME8 IN BACK COVER
+ -
LEFT SPEAKER
I_17762_001.eps
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Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram 42" 50Hz (ME8)
WIRING DIAGRAM 42” 50Hz (STYLING ME8)
LCD DISPLAY (1004)
LVD S INPUT
30P FOR 768P
OR
28LC8.2A LA 6.
LVD S INPUT
51P FOR 1080P
J2
7. GND
6. 3.3V
5. I2C SEL2
4. I2C SEL1
3. S-SDA
2. GND
1. S-SCL
J4
8. I2C SEL2
7. 3.3V
6. GND
5. S-SDA
4. S-SCL
3. GND
2. +24V
1. +24V
J1
4. GND
3. +24V
2. GND
1. +24V
*AMBI-LIGHT UNIT (IN BACK COVER)
(1175)
KEYBOARD CONTROL
(0025)
E
J1
3P
1M01
1. GND
2. KEYBOARD
3. +3V3STBY
4. INTERRUPT
8M82
TO BACKLIGHT
8M01
8401
DANGE ROUS
HIGH VOLTAGE
CN2
1. HV1
2. N.C.
DANGE ROUS
HIGH VOLTAGE
3. HV1
CN3
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY
(1005)
8320
8402
CN4
1. 24Vamb
2. GND
3. 24Vamb
4. GND
5. 24Vamb
6. GND
CN8
1. +12Vb
2. +12Vb
3. GND
4. GND
CN6
1. 3V3ST
2. Standby
3. GND
4. GND
5. GND
6. 12Vssb
7. 12Vssb
8. 12Vssb
9. +12Vaud
10. GND_aud
11. -12Vaud
CN7
1. 12Vssb
2. 12Vssb
3. GND
4. GND
5. INV_ON
6. DIM
7. BOOST
8. GND
CN1
1. N
2. L
8308
INLET
8P01
8P02
8206
8R01
1202 (B04C)
7. GND
6. +3V3_SW
5. +3V3_FPGA
4. GND
3. AMBI_SDA
2. GND
1. AMBI_SCL
1205 (B04C)
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1206 (B04C)
6. GND_24V
5. +24V_BOLT-ON
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1P01 (B01A)
11. -12VAudio
10. GNDSND
9. +12VAudio
7. +12VS
6. +12VS
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3STBY
1P02 (B01A)
8. ANA-DIG_DIM_SELECT
7. BACKLIGHT_BOOST
6. PWM_DIMMING
5. BACKLIGHT_ON_OFF
4. GND
3. GND
2. +12Vdisp
1. +12Vdisp
1320 (B03)
9. KEYBOARD
8. +5V_SW
7. KEYBOARD
6. LED1
5. +3V3STBY
4. LED2
3. IR
2. GND
1. LIGHT_SENSOR
1A35 (B05B)
4. RIGHT+
3. GND
2. GND
1. LEFT-
8A35
8202
8205
1R01(B04E)
41. +VDISP
1. ITV_I2C_SDA
2. TV_I2C_SDA..
40. +VDISP
*AMBI-LIGHT UNIT (IN BACK COVER)
(1175)
SSB
(1150)
B
J1
1. +24V
TO BACKLIGHT
2. GND
3. +24V
4. GND
J4
1. +24V
2. +24V
3. GND
4. S-SCL
5. S-SDA
6. GND
7. 3.3V
8. I2C SEL2
J2
1. S-SCL
2. GND
3. S-SDA
4. I2C SEL1
5. I2C SEL2
6. 3.3V
7. GND
TUNER
* AMBI-LIGHT UNITS ARE OPTIONAL
1P11
J
1. GND
2. KEYBOARD
3. +3V3STBY
4. TACT_SWITCH_INT
IR LED PANEL
(1112)
1P10
+ -
1. LIGHT-SENSOR
2. GNDSND
3. RC
4. LED2
5. +3V3-STANDBY
6. LED1
7. KEYBOARD
8. +5V
9. KEYBOARD
RIGHT SPEAKER
(5215) TWEETER
(5211) WOOFER IN BACK COVER
(5215) TWEETER
(5212) WOOFER IN BACK COVER
+ -
LEFT SPEAKER
I_17762_002.eps
250608
Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram 42" 100Hz (ME8)
WIRING DIAGRAM 42” 100Hz (STYLING ME8)
J2
7. GND
6. 3.3V
5. I2C SEL2
4. I2C SEL1
3. S-SDA
2. GND
1. S-SCL
J4
8. I2C SEL2
7. 3.3V
6. GND
5. S-SDA
4. S-SCL
3. GND
2. +24V
1. +24V
J1
4. GND
3. +24V
2. GND
1. +24V
*AMBI-LIGHT UNIT (IN BACK COVER)
(1175)
KEYBOARD CONTROL
(0025)
E
J1
3P
1M01
1. GND
2. KEYBOARD
3. +3V3STBY
4. INTERRUPT
8M82
TO BACKLIGHT
8M01
8401 8402
DANGEROUS
HIGH VOLTAGE
CN2
DANGEROUS
HIGH VOLTAGE
1. HV1
2. N.C.
3. HV1
CN3
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY
(1005)
8320
CN4
1. 24Vamb
2. GND
3. 24Vamb
4. GND
5. 24Vamb
6. GND
CN8
1. +12Vb
2. +12Vb
3. GND
4. GND
CN5
1. +12Vb
2. +12Vb
3. GND
4. GND
CN6
1. 3V3ST
2. Standby
3. GND
4. GND
5. GND
6. 12Vssb
7. 12Vssb
8. 12Vssb
9. +12Vaud
10. GND_aud
11. -12Vaud
CN7
1. 12Vssb
2. 12Vssb
3. GND
4. GND
5. INV_ON
6. DIM
7. BOOST
8. GND
CN1
1. N
2. L
LCD DISPLAY (1004)
LVD S INPUT
51P
8F52
8F51
8308
1F52 (AB02)
41P
AB
INLET
1F51 (AB02)
51P
DFI MODULE
(1130)
8M90
8P01
8P02
LVD S INPUT
41P
1M90 (AB01)
8206
29LC8.2A LA 6.
1F50 (AB02)
41P
1. +12VS
2. +12VS
3. +12VS
4. GND
8R01
5. GND
6. GND
1202 (B04C)
7. GND
6. +3V3_SW
5. +3V3_FPGA
4. GND
3. AMBI_SDA
2. GND
1. AMBI_SCL
1205 (B04C)
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1206 (B04C)
6. GND_24V
5. +24V_BOLT-ON
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1P01 (B01A)
11. -12VAudio
10. GNDSND
9. +12VAudio
7. +12VS
6. +12VS
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3STBY
1P02 (B01A)
8. ANA-DIG_DIM_SELECT
7. BACKLIGHT_BOOST
6. PWM_DIMMING
5. BACKLIGHT_ON_OFF
4. GND
3. GND
2. +12Vdisp
1. +12Vdisp
1320 (B03)
9. KEYBOARD
8. +5V_SW
7. KEYBOARD
6. LED1
5. +3V3STBY
4. LED2
3. IR
2. GND
1. LIGHT_SENSOR
1A35 (B05B)
4. RIGHT+
3. GND
2. GND
1. LEFT-
8A35
8CN5
8101
TUNER
CON_AV_HD
21P
CON_CTRL_V
14P
CON_PWR
4P
8202
1R01(B04E)
1. ITV_I2C_SDA
2. TV_I2C_SDA..
B
40. +VDISP
41. +VDISP
SSB
(1150)
8205
TUNER
DIGITAL MODULE
(1128)
(OPTIONAL )
8621
1. DTV_IRQ
1621 (B06A)
2. BOLT_ON_UART_RXD
3. BOLT_ON_UART_TXD
4. GND
8M04
5. SPDIF_IN
6. GND
7. SC1_AUDIO_IN_L
8. SC1_AUDIO_IN_R
9. GND
1M04 (B07A)
10. CVBS_IN_DTV
11. GND
12. HD_PR_IN_ITV
21. RX2_B+
20. RX2_B-
19. GND
13. HD_Y_IN_ITV
14. HD_PB_IN_ITV
18. RX1_B+
17. RX1_B-
16. GND
15. RX0_B+
14. RX0_B-
13. GND
12. RXC_B+
11. RXC_B-
10. GND
*AMBI-LIGHT UNIT (IN BACK COVER)
(1175)
9. N.C.
8. GND
7. GND
6. DDC_SCLB
5. DDC_SDAB
4. GND
3. +5VHDMI_B
2. HPD_RST_B
1. GND
J1
1. +24V
TO BACKLIGHT
2. GND
3. +24V
4. GND
J4
1. +24V
2. +24V
3. GND
4. S-SCL
5. S-SDA
6. GND
7. 3.3V
8. I2C SEL2
J2
1. S-SCL
2. GND
3. S-SDA
4. I2C SEL1
5. I2C SEL2
6. 3.3V
7. GND
* AMBI-LIGHT UNITS ARE OPTIONAL
1P11
1. GND
2. KEYBOARD
IR LED PANEL
J
(1112)
3. +3V3STBY
4. TACT_SWITCH_INT
1P10
1. LIGHT-SENSOR
+ -
2. GNDSND
3. RC
4. LED2
5. +3V3-STANDBY
6. LED1
7. KEYBOARD
8. +5V
9. KEYBOARD
RIGHT SPEAKER
(5215) TWEETER
(5211) WOOFER IN BACK COVER
(5215) TWEETER
(5212) WOOFER IN BACK COVER
+ -
LEFT SPEAKER
I_17762_003.eps
160908
Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram 47" 50Hz (ME8)
WIRING DIAGRAM 47” 50Hz
(STYLING ME8)
30LC8.2A LA 6.
KEYBOARD CONTROL
(0025)
E
J1
3P
1M01
1. GND
2. KEYBOARD
3. +3V3STBY
4. INTERRUPT
TO BACKLIGHT
8M01
8401
DANGEROUS
HIGH VOLTAGE
CN2
1. HV1
2. N.C.
DANGEROUS
HIGH VOLTAGE
3. HV1
CN3
1. HV2
2. N.C.
3. HV2
MAIN POWER SUPPLY
(1005)
8320
8402
CN6
1. 3V3ST
2. Standby
3. GND
4. GND
5. GND
6. 12Vssb
7. 12Vssb
8. 12Vssb
9. +12Vaud
10. GND_aud
11. -12Vaud
CN7
1. 12Vssb
2. 12Vssb
3. GND
4. GND
5. INV_ON
6. DIM
7. BOOST
8. GND
CN1
1. N
2. L
LCD DISPLAY
LVD S INPUT
51P
8P01
8P02
8308
INLET
(1004)
8R01
1202
7. GND
6. +3V3_SW
5. +3V3_FPGA
4. GND
3. AMBI_SDA
2. GND
1. AMBI_SCL
1205
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1206
6. GND_24V
5. +24V_BOLT-ON
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1P01
11. -12VAudio
10. GNDSND
9. +12VAudio
7. +12VS
6. +12VS
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3STBY
1P02
8. ANA-DIG_DIM_SELECT
7. BACKLIGHT_BOOST
6. PWM_DIMMING
5. BACKLIGHT_ON_OFF
4. GND
3. GND
2. +12Vdisp
1. +12Vdisp
1320
9. KEYBOARD
8. +5V_SW
7. KEYBOARD
6. LED1
5. +3V3STBY
4. LED2
3. IR
2. GND
1. LIGHT_SENSOR
1A35
4. RIGHT+
3. GND
2. GND
1. LEFT-
8A35
(B04C)
(B04C)
(B04C)
(B01A)
(B01A)
(B03)
(B05B)
(B04E)
1R01
1. ITV_I2C_SDA
2. TV_I2C_SDA..
B
41. +VDISP
40. +VDISP
SSB
(1150)
TO BACKLIGHT
TUNER
1P11
1. GND
2. KEYBOARD
IR LED PANEL
J
(1112)
4. TACT_SWITCH_INT
3. +3V3STBY
1P10
1. LIGHT-SENSOR
+ -
6. LED1
7. KEYBOARD
8. +5V
4. LED2
5. +3V3-STANDBY
9. KEYBOARD
2. GNDSND
3. RC
RIGHT SPEAKER
(5215) TWEETER
(5211) WOOFER IN BACK COVER
(5215) TWEETER
(5212) WOOFER IN BACK COVER
+ -
LEFT SPEAKER
I_17762_004.eps
250608
Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram 52" 50Hz (ME8)
WIRING DIAGRAM 52” 50Hz (STYLING ME8)
INVERTER INVERTER
CN2 / 1319
14. PDIM_Select
13. PWM
12. On/Off
11. Vbri
10. GND3
9. GND3
8. GND3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24Vinv
2. 24Vinv
1. 24Vinv
CN3 / 1316
12. N.C.
11. N.C.
10. GND3
9. GND3
8. GND3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24Vinv
2. 24Vinv
1. 24Vinv
KEYBOARD CONTROL
(0025)
E
J1
1. GND
2. KEYBOARD
3. +3V3STBY
4. INTERRUPT
8418
14P
8M01
8419
MAIN POWER SUPPLY
(1005)
8320
31LC8.2A LA 6.
LCD DISPLAY (1004)
LVD S INPUT
51P
8R01
CN5
1. +12Vb
2. +12Vb
3. GND
CN5A
1. +12Vb
2. +12Vb
3. GND
4. GND
F2
1A 250V
4. GND
CN4
1. 24Vamb
2. GND
3. 24Vamb
4. GND
5. 24Vamb
6. GND
CN6
1. 3V3ST
2. Standby
3. GND
4. GND
5. GND
6. 12Vssb
7. 12Vssb
8. 12V ssb
9. +12Vaud
10. GND_aud
11. -12Vaud
CN7
1. 12Vssb
2. 12Vssb
3. GND
4. GND
5. INV_ON
6. DIM
7. BOOST
8. GND
F1
CN1
1. N
2. L
8A 250V
8308
INLET
8P01
8P02
1202 (B04C)
7. GND
6. +3V3_SW
5. +3V3_FPGA
4. GND
3. AMBI_SDA
2. GND
1. AMBI_SCL
1205 (B04C)
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1206 (B04C)
6. GND_24V
5. +24V_BOLT-ON
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1P01 (B01A)
11. -12VAudio
10. GNDSND
9. +12VAudio
7. +12VS
6. +12VS
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3STBY
1P02 (B01A)
8. ANA-DIG_DIM_SELECT
7. BACKLIGHT_BOOST
6. PWM_DIMMING
5. BACKLIGHT_ON_OFF
4. GND
3. GND
2. +12Vdisp
1. +12Vdisp
1320 (B03)
9. KEYBOARD
8. +5V_SW
7. KEYBOARD
6. LED1
5. +3V3STBY
4. LED2
3. IR
2. GND
1. LIGHT_SENSOR
1A35 (B05B)
4. RIGHT+
3. GND
2. GND
1. LEFT-
8A35
..40. +VDISP
1R01(B04E)
41. +VDISP
1. ITV_I2C_SDA
2. TV_I2C_SDA
SSB
(1150)
B
12P
TUNER
1P11
1. GND
2. KEYBOARD
IR LED PANEL
J
(1112)
4. TACT_SWITCH_INT
3. +3V3STBY
1P10
1. LIGHT-SENSOR
+ -
6. LED1
7. KEYBOARD
8. +5V
4. LED2
5. +3V3-STANDBY
9. KEYBOARD
2. GNDSND
3. RC
RIGHT SPEAKER
(5215) TWEETER
(5211) WOOFER IN BACK COVER
(5215) TWEETER
(5212) WOOFER IN BACK COVER
+ -
LEFT SPEAKER
I_17762_005.eps
250608
Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram 52" 100Hz (ME8)
WIRING DIAGRAM 52” 100Hz
(STYLING ME8)
32LC8.2A LA 6.
INVERTER INVERTER
J2
7. GND
6. 3.3V
5. I2C SEL2
4. I2C SEL1
3. S-SDA
2. GND
1. S-SCL
J4
8. I2C SEL2
7. 3.3V
6. GND
5. S-SDA
4. S-SCL
3. GND
2. +24V
1. +24V
J1
4. GND
3. +24V
2. GND
1. +24V
(IN BACK COVER)
KEYBOARD CONTROL
(0025)
E
AMBI-LIGHT UNIT
(1175)
J1
1. GND
2. KEYBOARD
3. +3V3STBY
4. INTERRUPT
8M82
1M01
3P
8418
14P
8M01
CN2 / 1319
14. PDIM_Select
13. PWM
12. On/Off
11. Vbri
10. GND3
9. GND3
8. GND3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24Vinv
2. 24Vinv
1. 24Vinv
CN3 / 1316
12. N.C.
11. N.C.
10. GND3
9. GND3
8. GND3
7. GND3
6. GND3
5. 24Vinv
4. 24Vinv
3. 24Vinv
2. 24Vinv
1. 24Vinv
8419
MAIN POWER SUPPLY
(1005)
8320
LCD DISPLAY
(1004)
8101
DIGITAL MODULE
(1128)
TUNER
51P
LVD S INPUT
LVD S INPUT
41P
8F51
CN5
1. +12Vb
2. +12Vb
3. GND
CN5A
1. +12Vb
2. +12Vb
3. GND
4. GND
F2
1A 250V
4. GND
CN4
1. 24Vamb
2. GND
3. 24Vamb
4. GND
5. 24Vamb
6. GND
CN6
1. 3V3ST
2. Standby
3. GND
4. GND
5. GND
6. 12Vssb
7. 12Vssb
8. 12Vssb
9. +12Vaud
10. GND_aud
11. -12Vaud
CN7
1. 12Vssb
2. 12Vssb
3. GND
4. GND
5. INV_ON
6. DIM
7. BOOST
8. GND
F1
CN1
1. N
2. L
8A 250V
8308
1F52
41P
AB
INLET
8P01
(AB02)
DFI MODULE
(1130)
8P02
8M90
1F51
51P
8F52
(AB02)
8206
1F50
41P
(AB01)
1. +12VS
1M90
8R01
(AB02)
2. +12VS
3. +12VS
4. GND
5. GND
6. GND
8CN5
1202
7. GND
6. +3V3_SW
5. +3V3_FPGA
4. GND
3. AMBI_SDA
2. GND
1. AMBI_SCL
1205
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1206
6. GND_24V
5. +24V_BOLT-ON
4. GND_24V
3. +24V_BOLT-ON
2. GND_24V
1. +24V_BOLT-ON
1P01
11. -12VAudio
10. GNDSND
9. +12VAudio
7. +12VS
6. +12VS
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3STBY
1P02
8. ANA-DIG_DIM_SELECT
7. BACKLIGHT_BOOST
6. PWM_DIMMING
5. BACKLIGHT_ON_OFF
4. GND
3. GND
2. +12Vdisp
1. +12Vdisp
1320
9. KEYBOARD
8. +5V_SW
7. KEYBOARD
6. LED1
5. +3V3STBY
4. LED2
3. IR
2. GND
1. LIGHT_SENSOR
1A35
4. RIGHT+
3. GND
2. GND
1. LEFT-
8A35
(B04C)
(B04C)
(B04C)
(B01A)
(B01A)
(B03)
(B05B)
CON_AV_HD
21P
CON_CTRL_V
14P
CON_PWR
4P
8202
(B04E)
1. ITV_I2C_SDA
1R01
2. TV_I2C_SDA..
B
41. +VDISP
40. +VDISP
SSB
(1150)
TUNER
8205
(OPTIONAL)
8621
(B06A)
1. DTV_IRQ
1621
2. BOLT_ON_UART_RXD
3. BOLT_ON_UART_TXD
4. GND
8M04
6. GND
5. SPDIF_IN
9. GND
8. SC1_AUDIO_IN_R
7. SC1_AUDIO_IN_L
(B07A)
1M04
11. GND
12. HD_PR_IN_ITV
10. CVBS_IN_DTV
21. RX2_B+
20. RX2_B-
19. GND
13. HD_Y_IN_ITV
14. HD_PB_IN_ITV
18. RX1_B+
17. RX1_B-
16. GND
15. RX0_B+
14. RX0_B-
13. GND
12. RXC_B+
11. RXC_B-
10. GND
(IN BACK COVER)
AMBI-LIGHT UNIT
(1175)
4. GND
3. +5VHDMI_B
2. HPD_RST_B
1. GND
5. DDC_SDAB
9. N.C.
8. GND
7. GND
6. DDC_SCLB
12P
J1
1. +24V
2. GND
3. +24V
4. GND
J4
1. +24V
2. +24V
3. GND
4. S-SCL
5. S-SDA
6. GND
7. 3.3V
8. I2C SEL2
J2
1. S-SCL
2. GND
3. S-SDA
4. I2C SEL1
5. I2C SEL2
6. 3.3V
7. GND
1P11
J
1. GND
2. KEYBOARD
4. TACT_SWITCH_INT
3. +3V3STBY
IR LED PANEL
(1112)
1P10
1. LIGHT-SENSOR
+ -
6. LED1
7. KEYBOARD
8. +5V
4. LED2
5. +3V3-STANDBY
9. KEYBOARD
2. GNDSND
3. RC
RIGHT SPEAKER
(5215) TWEETER
(5211) WOOFER IN BACK COVER
(5215) TWEETER
(5212) WOOFER IN BACK COVER
+ -
LEFT SPEAKER
I_17762_006.eps
160908
Block Diagrams, Test Point Overview, and Waveforms
Block Diagram Video
VIDEO
TUNER IF & DEMODULATOR
B2
B03
(CONTROL)
B07A
SAW_SW
1101
UV1316E/ABH
*UV1356/ABHN
TUNER
HDMI SWITCH
RX2_C+
RX2_C-
RX1_C+
RX1_C-
RX0_C+
RX0_C-
RXC_C+
RXC_C-
RX2_B+
RX2_B-
RX1_B+
RX1_B-
RX0_B+
RX0_B-
RXC_B+
RXC_B-
IF_OUT3
DC_PWR
1
18 2
19
HDMI B
CONNECTOR
(Optional)
1
18 2
19
HDMI C
CONNECTOR
1
18 2
19
HDMI (SIDE)
CONNECTOR
28
27
25
24
22
21
19
18
48
47
45
44
42
41
39
38
1
18 2
19
HDMI A
CONNECTOR
7109
SAW_SW
IF_ATV
11
1
1M02
1
3
4
6
7
9
10
12
1M03
1
3
4
6
7
9
10
12
1M01
1
3
4
6
7
9
10
12
7M07
SII9185ACTU
R0X R2X
SWITCH
R1X
1N03
1
3
4
6
7
9
10
12
RF_AGC
HDMI
*1105
10
1
1102
2
1
1
1103
RX2_B+
RX2_BRX1_B+
RX1_B-
RX0_B+
RX0_B-
RXC_B+
RXC_B-
TX
38MH
38MHz9
38MHz9
*38MHz
5
7113
TDA9886T/V4
4
1
VIF1
5
2
VIF2
4
5
SIF1
4
SIF2
TAG C
1M04
1M06
1M07
1M08
1M09
RX2_B+
RX1_B+
RX0_B+
RXC_B+
RXC_B-
RX2_C+
RX2_C-
RX1_C+
RX1_C-
RX0_C+
RX0_C-
RXC_C+
RXC_C-
HDMI_SIDE_RX2+
HDMI_SIDE_RX2-
HDMI_SIDE_RX1+
HDMI_SIDE_RX1-
HDMI_SIDE_RX0+
HDMI_SIDE_RX0-
HDMI_SIDE_RXC+
HDMI_SIDE_RXC-
HDMI_SIDE_RX2+
68
HDMI_SIDE_RX2-
67
HDMI_SIDE_RX1+
65
HDMI_SIDE_RX1-
64
HDMI_SIDE_RX0+
62
HDMI_SIDE_RX0-
61
HDMI_SIDE_RXC+
59
HDMI_SIDE_RXC-
58
10
11
7
8
4
5
1
2
HDMI_MUX_RST
13
21
20
18
17
15
14
12
11
RX2_B-
RX1_B-
RX0_B-
+5VS
20
SUPPLY
VIF-PLL
DEMODULATOR
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER AND
SIF AGC
TUNER AGC
AM-DEMODULATOR
VIF AGC
TUNER
DIGITAL MODULE
ONY FOR DTV
CVI-1
SIDE
I/O
I/O - CINCH 1 & 2
B06B
CVI-2
VGA & PC AUDIO & COMPAIR & UART
B06C
HDMI MAIN
B07B
HDMI_MUX_TXC+
HDMI_MUX_TXC-
HDMI_MUX_TX0+
HDMI_MUX_TX0-
HDMI_MUX_TX1+
HDMI_MUX_TX1-
HDMI_MUX_TX2+
HDMI_MUX_TX2-
B4C
TX2_A+
TX2_A-
TX1_A+
TX1_A-
TX0_A+
TX0_A-
TXC_A+
TXC_A-
DIDITAL VCO COTROLRC VCO
SOUND TRAPS
4.5 to 6.5 Mhz
I2C-BUS TRANSCEIVER
SCL
(I2C)
B06A
1621
10
12
13
14
1615
Pr
Y
Pb
1602
VIDEO
1601
1
5
SVHS
2
1502
VIDEO
IN
1504
Pr
Y
Pb
1E01
10
15
5
13
1
6
11
14
VGA
CONNECTOR
58
57
62
61
66
65
70
69
52
51
48
47
44
43
40
39
15
REF
MAD
SDA
7
12
9
2
3
4
15
15
11
7
1
2
3
7N01
SII9125CTU
1104
4M0
CVBS
17
YPBPR & SVHS
CVBS_IN_DTV
SVHS_Y_CVBS_IN
SC2_Y_CVBS_IN
HDMI
MAIN
7114
EF
HD_PR_IN
HD_Y_IN
HD_PB_IN
SVHS_C_IN
SC1_R_IN
SC1_G_IN
SC1_G_IN
VGA_R_IN
VGA_G_IN
VGA_B_IN
VGA_H
VGA_V
20
21
19
5
CVBS_RF
*ONLY FOR CHINA
1
5
HDMI_CR(0-9)
HDMI_Y(0-9)
HDMI_CB(0-9)
HDMI_H
HDMI_V
HDMI_DE
HDMI_VCLK
7C03
B04A
W10
4
8
V10
U10
W20
Y4
V8
Y8
V6
W9
Y6
V9
W6
W4
V4
Y9
U8
Y7
V20
Y19
Y20
TRIDENT - WX69
7C01
WX69-7569-LF
CVBS1
ANALOG
VIDEO
PR_R3
PR_R1
Y_G1
PB_B1
Y_G3
C
Y_G1
FS2
FS1
PB_B2
PC_R
PC_G
PC_B
AIN_H
AIN_V
DIGITAL
VIDEO
DPA_HS
DPA_VS
DPB_DE
DPA_CLK
33LC8.2A LA 6.
WX69
VIDEO PROCESSOR
LVD S OUT
XTALO
SUPPLY
MEMORY
XTALI
B14
A14
B15
A15
B16
A16
B17
A17
B18
A18
B19
A19
B20
A20
D19
C20
E19
D20
F19
E20
G19
F20
H19
G20
W1
Y1
C14
+1V2_CORE
B4
+2V5_VDDMQ
L16
+3V3_SW
D18
+1V2_PLL
K3
DDR_VREF
WX_MD
WX_MA
1C24
24MHz
LVD S CONNECTOR
B04E
10 BIT DUAL LVDS
TXFPGAe_0n
TXFPGAe_0p
TXFPGAe_1n
TXFPGAe_1p
TXFPGAe_2n
TXFPGAe_2p
TXFPGAe_CLKn
TXFPGAe_CLKp
TXFPGAe_3n
TXFPGAe_3p
TXFPGAe_4n
TXFPGAe_4p
TXFPGAo_0n
LTXFPGAo_0p
TXFPGAo_1n
TXFPGAo_1p
TXFPGAo_2n
TXFPGAo_2p
TXFPGAo_CLKn
TXFPGAo_CLKp
TXFPGAo_TXo3n
TXFPGAo_TXo3p
TXFPGAo_TXo4n
TXFPGAo_TXo4p
DYNAMIC FRAME INSERTION
VIDEO FLOW
AB02
1F50
1
2
3
4
10
11
12
13
14
15
17
18
20
21
22
23
25
26
27
28
39
30
32
33
35
36
37
38
40
41
DDR INTERFACE
B04B
7D01
EDD1216AJTA
(0-11)
SDRAM
(0-15)
7D02
EDD1216AJTA
(0-11)
SDRAM
(16-31)
VDISP
1R02
1R03
1R04
1R05
1R06
1R07
1R08
1R09
1R10
1R11
1R12
1R13
AMBI-LIGHT
(CONTROL)
+12V-SSB
RXEA+
RXEB+
RXEC+
RXECLK-
RXECLK+
RXED+
RXEE+
RXOA+
RXOB-
RXOB+
RXOC-
RXOC+
RXOCLK-
RXOCLK+
RXOD-
RXOD+
RXOE-
RXOE+
SCL-I2C4-SSB
SDA-I2C4-SSB
AB07
7CA2
EDD1216AJTA
7CA3
EDD1216AJTA
TO 7700
B04D
FPGA
RXEA-
RXEB-
RXEC-
RXED-
RXEE-
RXOA-
DDR A
DDR
SDRAM
2Mx16
DDR
SDRAM
2Mx16
1R01
41
40
39
38
32
31
30
29
28
27
25
24
22
21
20
19
17
16
15
14
13
12
10
CONNECTOR
9
7
6
5
4
LVD S
TO DISPLAY
OR
(0-11)
DQ1(0-15)
MM1-A(0-11)
(16-31)
(100Hz)
AB06
7F18
EP2C35F484C7N
C2
C1
D4
D3
D2
D1
E2
E1
E4
E3
F2
F1
G5
G6
H4
G3
H2
H1
L2
L1
J2
J1
H6
H5
FPGA DFI
CYCLONE II
FPGA
DFI
C3
L6
C4
W4
B12
MM2-A(0-11)
AB02
AB05
nSCO
DCLK
ASDO
AB03
SS-OFF
CLK-SYSTEM-SS
AB08
(0-12)
DQ2(0-15)
(16-31)
VIDEO FLOW
FPGA: POWER +
CONTROL
7F30
EPCS16SI16N
7
SCD
16
15
CLOCK
7F51
1
EOH
3
OUT
50M
DDR B
7CA0
EDD1216AJTA
DDR
SDRAM 1
2Mx16
7CA1
EDD1216AJTA
DDR
SDRAM 2
H_17740_057.eps
2Mx16
250108
1F52
41
32
LVD S
CONNECTOR
TO DISPLAY
1
QUAD LVDS
1920x1080P
100/120Hz
1F51
51
SCL-I2C4-DISP
SDA-I2C4-DISP
VDISP
50
49
40
9
5
4
3
2
1
LVD S
CONNECTOR
TO DISPLAY
Only for 100Hz Dynamic Frame Insertion
I_17762_007.eps
160908
Block Diagrams, Test Point Overview, and Waveforms
Block Diagram Audio
AUDIO
TUNER IF & DEMODULATOR
B02
1101
UV1316E/ABH
*UV1356/ABHN
+VTUN
9
11
IF1
TUNER
1
DC_PWR
TUNER
DIGITAL MODULE
ONY FOR DTV
IF-ATV
2117
3111
34LC8.2A LA 6.
B05A
7113
TDA9886T/V4
1102
1
1103
1
5
4
5
4
RF_AGC
B06A
YPBPR & SVHS
I0 - CINCH 1& 2
B06B
VIF1
VIF2
SIF1
SIF2
AUDI O
L/R IN
CVI
AUDI O
L/R IN
AV I N
AUDI O
L/R IN
VIF1
1
2
VIF2
23
SIF1
24
SIF2
TAG C
14
1621
5
7
8
1602
1615
1502
SIF AGC
TUNER AGC
5
8
5
3
6
2
+5VS
20
SUPPLY
VIF-PLL
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER AND
VIF AGC
DEMODULATOR
SOUND TRAPS
4.5 to 6.5 Mhz
AM-DEMODULATOR
I2C-BUS TRANSCEIVER
SCL
(I2C)
4605
RES
4606
RES
3623
3621
3607
3611
3512
3506
MAD
CVBS
SIOMAD
SDA
SC1_AUDIO_IN_L
SC1_AUDIO_IN_R
SIDE_AUDIO_IN_L
SIDE_AUDIO_IN_R
COMP_AUDIO_IN_L
COMP_AUDIO_IN_R
SC2_AUDIO_IN_L
SC2_AUDIO_IN_R
SIF
12
15
SPDIF_IN
1104
4M0
AUDIO PROCESSOR - MICRONAS
7411
MSP4450P-VK-E8 000 Y
63
ANA-IN1+
67
XTALIN
68
XTALOUT
1411
18M432
SOUND
PROCESSOR
71
54
SC1-IN-L
55
SC1-IN-R
48
SC4-IN-L
49
SC4-IN-R
50
SC3-IN-L
51
SC3-IN-R
52
SC2-IN-L
53
SC2-IN-R
DACM-L
DACM- R
SUPPLY
DACA-L
DACA-R
27
26
12
13
39
61
62
24
23
AUDIO - CLASS D
B05B
AUDIO_LS_R
SUP_D
+8V
SUP_A
B03
(CONTROL)
HP_AUDIO_OUT_L
HP_AUDIO_OUT_R
AUDIO_LS_L
MUTEn
2
6
7A51
1
7
MUTE
ENGAGE
YPBPR & SVHS
B06A
HP_LOUT
HP_ROUT
3A03
3A11
14
3A26
B03
(CONTROL)
(CONTROL)
7A01
TDA8932BTW/N2
2
CLASS D
POWER
AMPLIFIER
5
DC_PROT
B03
27
22
7A05÷7A07
DC-DETECTION
HP_DETECT
5A03
5A04
160
1A35
1
2
3
4
3
2
3
4
LEFT
SPEAKER
RIGHT
SPEAKER
HEADPHONE
B07A
HDMI SWITCH
HDMI C
HDMI B
or
DIGITAL MODULE
SEE VIDEO
HDMI SIDE
1M03
1
19
1M02
1
19
1M01
1
19
1504
AV OUT
AUDI O
L/R OUT
B06C
VGA & PC AUDIO & COMPAIR & UART
CVI-1
AUDI O
L/R IN
PC / DVI AUDIO
6
2
1E02
2
1E07
2
B07B
7M07
SII9185ACTU
+
RXx_C
18 2
RX0
-
HDMI
SWITCH
+
TX
-
18 2
RXx_SIDE
18 2
RXx_B
+
R1X
-
+
R2X
-
HDMI MAIN
1N03
1
TXx_A
18 2
19
HDMI A
HDMI_MUX_TX
3507
3503
3E21
3E23
7N01
SII9125CTU
HDMI
MAIN
SC1_AUDIO _MUTE_L
SC1_AUDIO _OUT_L
SC1_AUDIO _OUT_R
SC1_AUDIO _MUTE_R
VGA_AUDIO_IN_L
VGA_AUDIO_IN_R
86
SCK
WS
SD0
HDMI_I2S_SCK
85
81
B03
(CONTROL)
HDNI_I2S_WS
HDMI_I2S_SD
AUD_ RST
B05B
B05B
37
SC1-OUT-L
36
SC1-OUT-R
57
SC5-IN-L
58
SC5-IN-R
17
CL3
18
WS3
20
DA-3
19
DA-3
B03
(CONTROL)
ANTI_PLOP
ANTI_PLOP
SC1_AUDIO _MUTE_R
SC1_AUDIO _MUTE_L
B06B
I_17762_008.eps
160908
Block Diagrams, Test Point Overview, and Waveforms
Block Diagram Control & Clock Signals
CONTROL & CLOCK SIGNALS
B04B
DDR INTERFACE
7D01
EDD1216AJTA
SDRAM
WX_MD(0-31)
44
7D02
EDD1216AJTA
44
WX_MA(0-11)
WX_MCLK
SDRAM
B04A
TRIDENT - WX69
7C01
WX69-7569-LF
PROCESSOR
B12
VIDEO
G17
W1
Y1
B17
A17
F19
E20
7C02
7C04
CONTROL
1C24
24MHZ
B03
MICROPROCESSOR
AD(0-7)
BL_ADJUST_PWM
TxFPGAe_CLKn
TxFPGAe_CLKp
TxFPGAo_CLKn
TxFPGAo_CLKp
DUAL LVDS
B01A
B04D
TxFPGAe_CLKn
TxFPGAe_CLKp
TxFPGAo_CLKn
TxFPGAo_CLKp
B04E
7311
M30300SAGP
35LC8.2A LA 6.
FPGA I/O BANKS
J16
J15
H15
H16
LV DS CONNECTOR
7700
EP2C5F256C7N
FPGA
CYCLONE II
AMBI-LIGHT
TxLVDSe_CLKn
TxLVDSe_CLKp
TxLVDSo_CLKn
TxLVDSo_CLKp
70
71
H2
F4
H4
C3
F1
B04C
FPGA INTERGACE
(ONLY FOR AMBI-LIGHT)
SDA
TO AMBI-LIGHT
SCL
(I2C)
CLK_OSC1
7201
EPCS4SI8
nCSO
1
DCLK
6
ASDO
5
DATA 0
2
1R01
SCD
25
24
10
9
1204
TO DISPLAY
(LVDS)
27M
B07A
HDMI SWITCH
1
RXx_SIDE
18 2
19
HPD_RST_SIDE
1
RXx_B
18 2
19
HPD_RST_B
1
RXx_C
18 2
19
HPD_RST_C
HDMI
CONNECTOR
E
KEYBOARD CONTROL
J
IR LED PANEL
7M07
SII9185ACTU
+
R0X
-
SWITCH
56
+
R1X
-
36
+
R2X
-
16
HDMI
B07B
CONNECTOR
HDMI_MUX_TX
13
35
HDMI MAIN
1
RXx_B
18 2
19
HDMI
TO HDMI A
CONNECTOR
CHANNEL +
CHANNEL -
MENU
VOLUM E VOLUME +
ON / OFF
+5V_SW
7N01
SII9125CTU
HDMI
MAIN
3P11
6P11
LED1
WHITE
HDMI_VCLK
5
HDMI_Cb(0-7)
HDMI_Y(0-7)
HDMI_Cr(0-7)
95
94
76
100
1N02
28M322
W20
TAC T _SWITCH_INT
7P11
KEYBOARD
LED1
J17
J19
J20
J18
F18
J1
2
4
1P11
2
4
1P10
9
7
66
7310
M29W800DT
EPROM
1Mx8
512Kx16
11
1320
9
7
A(0-7)
26
12
28
+3V3_STBY
7312
BD45275G
5
HDMI_HOTPLUG_RST
HDMI_RX_BUF_RST
HDMI_MUX_RST
HDMI_INT_MUX
B06A
AUDIO
B05B
AUDIO
TACT_SWITCH_INT
AD(0-7)
CE
4
VOUT
2,3
HP_DETECT
DC_PROT
KEYB
LED1
A(0-19)
CPU_RST
(3V3)
CS
WR
RD
ALE_EMU
SVPWX_RST
48
10
PROCESSOR
45
44
42
38
4
89
5
36
73
35
31
71
93
95
MICRO
3L56
1301
10M
LCD_PWR_ON
ANTI_PLOP
BL_ON_OFF
BL_BOOST
+3V3_STBY
3L79
AUD_ RST
MUTEn
DDC_RST
SAW_SW
4301
B04E
B05A
B05B
B05B
AUDIO
B01A
B01A
SUPPLY
B07B
B07A
HDMI
CONNECTORS
B02
VIDEO
SDM
99
13
11
88
78
74
75
22
19
23
25
+5V_SW
+3V3STBY
+5V_SW
3P10
3P16
7P12
6P10
7P14
LED2
RED
IR
SENSOR
+5V_SW
7P13
7P10
LED2
LIGHT_SENSOR
IR
44
33
11
LED2
REMOTE
LIGHT_SENSOR
87
18
92
I_17760_064.eps
120608
Block Diagrams, Test Point Overview, and Waveforms
8
8
7
7
8
7
8
7
8
7
8
8
7
7
8
7
7
7
7
7
8
8
7
6
6
7
7
7
7
7
7
6
7
7
6
6
7
6
6
7
6
6
6
6
6
6
6
7
6
6
7
6
6
6
6
6
7
7
6
6
6
6
6
6
7
36LC8.2A LA 6.
SSB: Test Points (Overview Bottom Side)
A115 D4
A116 D3
A124 E4
A125 D4
F101 D5
F112 D5
F114 D4
F115 E5
F116 E4
F117 E5
F118 E5
F119 E5
F120 E4
F121 D4
F128 D4
F129 D4
F130 D4
F131 D4
F133 E4
F134 E5
F140 D4
F142 D5
F143 D4
F146 E5
F201 A5
F202 A6
F203 A5
F204 A6
F205 A5
F207 A5
F208 C3
F210 C8
Part 1
I_17760_022a.eps
Part 3
I_17760_022c.eps
3139 123 6349.1
F211 B8
F222 A5
F223 A6
F224 A6
F225 A5
F227 A6
F228 A5
F229 A5
F236 A5
F237 A5
F238 E7
F239 B8
F240 B8
F302 A3
F303 A2
F305 A5
F309 A4
F310 B4
F311 B4
F312 B3
F313 B4
F314 B3
F315 A4
F316 B3
F317 B4
F318 B3
F319 B4
F320 B3
F321 B4
F322 B3
F323 A3
F324 B4
F325 B3
F326 B4
F327 B3
F328 B4
F329 B4
F330 A3
F331 B4
F332 B4
F333 B4
F334 B4
F335 B4
F336 B4
F337 B4
F338 B4
F339 B4
F340 B4
Part 2
I_17760_022b.eps
Part 4
I_17760_022d.eps
F341 B4
F345 C2
F346 A8
F347 A2
F348 A4
F349 A4
F350 C3
F351 F8
F352 A4
F353 A4
F354 A7
F356 C3
F357 E8
F360 E7
F361 A4
F362 A4
F363 A4
F364 A5
F365 A5
F366 B4
F367 A4
F368 B3
F369 B3
F380 A4
F381 A3
F385 A4
F382 E8
F386 A4
F383 E8
F387 A4
F384 E8
F388 B4
I_17760_022.eps
300708
F401 E4
F402 F3
F403 E4
F404 F5
F510 E1
F511 F2
F512 E2
F513 E2
F514 E1
F515 E2
F516 D2
F517 D3
F518 E2
F519 E2
F520 E3
F521 E2
F522 E2
F523 E1
F524 E2
F525 D3
F526 D2
F527 D2
F528 D2
F529 D1
F530 D2
F531 E2
F532 E2
F534 A3
F535 A3
F536 E2
F537 E2
F538 E2
F539 E2
F540 E2
F541 E2
F542 D2
F543 E1
F544 E1
F601 E1
F602 E1
F604 D3
F605 E3
F607 E3
F608 E3
F609 E3
F610 D1
F611 D1
F612 C1
F613 C3
F614 D6
F615 E2
F616 C1
F617 C1
F618 B2
F619 C2
F620 A2
F701 A5
F702 A5
F703 A5
F704 A5
F705 A5
F706 A5
F733 A5
F734 A5
F901 D2
F904 D2
FA04 F6
FA05 F6
FA06 D2
FA07 F8
FA0 8 F8
FA09 E6
FA10 F7
FA11 F7
FA12 F5
F6
FA1 3
FA32 F7
FB10 B7
FB11 B7
FB12 B7
FB13 B7
FB14 C7
FB15 B7
FB16 B7
FB17 B7
FC01 C4
FC02 C4
FC03 C4
FC04 C4
FC05 B5
FC06 B4
FC07 C4
FC08 C4
FC09 B5
FC10 C4
FC11 C4
FD01 B6
FD02 C5
FE10 C2
FE11 C2
FE12 C2
FE13 C5
FE14 C5
FE15 C6
FE16 D6
FE17 D6
FE18 C2
FE19 C2
FE20 D6
FE21 D6
FE22 C1
FE23 C1
FE24 C5
FE25 C1
FE26 C5
FE27 C1
FE28 C5
FE29 D2
FE30 C2
FE31 C3
FE32 C3
FE33 C3
FE34 C3
FF10 D7
FF11 D7
FF12 D7
FF13 C7
FF14 C7
FG10 B8
FG11 B7
FG12 C8
FG13 C8
FG14 B7
FG15 B7
FG16 B7
FG17 B7
FG18 C7
FG19 B7
FG20 B7
FG21 B7
FG22 B7
FG23 B7
FG24 B7
FG25 B7
FG26 B7
FG27 B7
FG28 B6
FG29 C6
FM01 B1
FM02 B1
FM05 B1
FM06 C3
FM07 B1
FM08 B1
FM09 A3
FM10 B1
FM11 B2
FM12 B2
FM13 B2
FM15 B2
FM17 A2
FM18 B2
FM19 B2
FM24 B1
FM25 B2
FM26 C1
FN10 B3
FN11 B3
FN12 C2
FN13 B3
FN14 B2
FN15 B3
FN16 E3
FN17 B3
FN18 B2
FP10 E8
FP11 D8
FP12 A6
FP13 F8
FP14 D8
FP15 F8
FP16 F7
FP17 D8
FP18 E8
FP19 B5
FP20 D8
FP21 C6
FP22 E8
FP23 E8
FP24 E7
FP26 E7
FP27 C8
FP28 D6
FP29 A6
FP30 E6
FQ03 D6
FQ05 E5
FQ06 D6
FQ08 E7
FQ35 E6
FQ40 E6
FR10 A8
FR11 B8
FR12 B8
FR13 A7
FR14 B8
FR15 A7
FR16 B8
FR17 A7
FR18 B8
FR19 A7
FR20 B8
FR21 A7
FR22 B8
FR23 A7
FR24 B8
FR25 A7
FR26 B8
FR27 A7
FR28 B8
FR29 A7
FR30 A8
FR31 A7
FR32 A8
FR33 A8
FR34 A7
FR35 A8
FR36 A7
FR37 A7
A7
FR38
FR39 A8
FR40 A7
FR41 A8
FR42 A7
FR43 A8
FR44 A7
FR45 A8
FR46 A7
FR47 A7
FR48 A8
FR49 A8
FR50 A7
FR51 A7
FR52 A7
FR53 A8
FR54 A8
FR55 A7
FR56 A8
FR57 A7
FR58 A8
FR59 A7
FR60 A8
FR61 A7
FR62 A8
FR63 A7
FR64 A7
FR65 A8
FR66 A7
FR67 B8
FR68 A7
FR69 A8
I102 E4
I103 E4
I104 D4
I111 E5
I113 D4
I114 E4
I118 E4
I120 E4
I121 E5
I123 E5
I124 D4
I125 D4
I126 D4
I127 D4
I128 D3
I129 D4
I130 D3
I131 D3
I133 D4
I135 D4
I136 D3
I138 D4
I139 D4
I141 E4
I142 D4
I143 D4
I144 D4
I145 E5
I146 D5
I147 D5
I148 D4
I149 D4
I150 D4
I151 E5
I201 A6
I205 A6
I206 B8
I207 B8
I209 B8
I212 B
I213 B8
I232 A6
I233 B8
I234 B8
I301 A4
I302 A4
I303 A4
I306 A4
I307 A4
I308 A4
I309 A4
I310 A4
I311 A4
I312 A4
I313 A4
I315 A4
I316 A4
I318 A5
I319 A4
I320 A4
I321 A4
I322 A4
I323 A4
I324 A4
I326 A4
I327 F5
I328 A4
I329 A4
330 A7
I
I331 A4
I332 A8
I333 A4
I335 A4
I336 A4
I337 A4
I338 B4
I339 A4
I340 A3
I341 A4
I342 A4
I344 A4
I345 A4
I347 C3
I349 A4
I350 A4
I351 A4
I352 A4
I353 A3
I354 A4
I356 A4
I357 A3
I358 A4
I359 A4
I360 C4
I361 D4
I362 A4
I363 E5
I364 A4
365 A4
I
I366 A4
I367 A4
I368 A4
I369 C3
I370 C3
I372 A5
I373 E8
I374 E8
I375 F8
I376 E8
I380 B3
I384 A4
I387 A4
I390 A4
I393 B3
I396 A4
I397 A4
I398 A4
I412 F4
I413 F4
I414 E4
I415 E4
I416 E4
I417 E4
I418 E4
I419 E4
I420 F3
I421 F3
I422 F3
I423 F4
I424 F3
I425 E3
I429 E4
I430 E4
I432 E4
I436 F4
37 F4
I4
I438 F4
I439 F4
8
I440 F4
I441 F4
I442 E4
I443 E4
I444 E4
I445 E4
I446 F4
I510 E4
I512 E1
I517 E1
I520 E1
I528 D1
I530 D1
I533 E1
I541 E2
I543 D1
I544 D1
I545 E1
I548 E1
I549 E1
I550 E1
I551 D1
I552 D1
I553 E1
I554 D1
I556 A3
I557 E1
I558 D1
I563 E2
I564 F1
I565 A3
I567 A3
I568 A3
I570 A3
I571 A3
I572 A4
I573 A4
I574 A4
I575 A2
I576 A2
I577 E1
I578 D1
I610 E3
I611 F3
I615 E1
I616 E3
I620 E3
I621 E1
I622 E3
I623 E3
I624 E1
I627 E3
I631 E1
I632 E3
I634 E2
I635 E2
I705 C8
I712 B8
I713 B8
I728 B8
I729 A5
I730 A5
IA10 F
IA11 D8
IA12 F7
IA13 F6
IA14 F7
IA15 F7
IA16 F7
IA17 D2
IA18 D1
IA19 F5
IA20 D2
IA21 D2
IA22 D2
IA23 F8
IA24 F7
IA25 D2
IA26 D2
IA27 F6
IA28 F6
IA29 F7
IA30 F5
IA31 C1
IA32 F7
IA33 D2
IA34 D2
IA35 F6
IA36 F6
IA37 F7
IA38 E6
IA39 F7
IA40 E6
IA41 E6
IA42 E6
IA43 F6
IA44 F6
IA45 F6
IA46 F7
IA47 F7
IA48 F5
IA49 F7
IA50 F7
IA51 F6
IA52 F8
IA53 F7
IA54 F5
IA55 F7
IA56 F6
IA57 F5
IA58 F8
IA59 F5
IA60 F6
IA61 F8
IA62 F7
IA63 F5
IA64 F5
IA65 F5
IA66 F5
IA67 F5
IA68 F5
IA69 A4
IA70 F5
IA71 F5
IA72 F5
IA73 F5
IA74 F5
IA75 F5
IA76 F5
IC10 C4
IC11 B4
IC13 B4
IC14 B4
8
IC15 B5
IC16 C4
IC17 B4
IC18 C4
IC19 B5
IC20 B5
IC21 B4
IC22 B4
IC23 C4
IC24 C4
IC25 B4
IC26 C6
IC27 C6
IC28 C4
IC29 C5
IC30 C5
IC31 C6
IC32 C4
IC33 C4
IC35 C4
IC36 C4
ID01 C5
ID05 B5
ID06 C6
ID07 C6
IE10 C2
IE11 C6
IE12 C6
IE13 C2
IE14 D6
IE15 C3
IE16 D5
IE17 C2
IE18 C1
IE19 C1
IE20 D2
IE21 D2
IE22 D2
IE23 D2
IE24 D3
IE25 D3
IE26 D3
IE27 D3
IE28 C3
IE29 D3
IE30 F3
IE31 D3
IE32 F3
IF01 D7
IG10 B7
IG11 B6
IG12 C7
IG13 B7
IG14 C6
IG15 C7
IL25 A4
IL30 A4
IL32 A4
IL33 A4
IL34 E8
IL35 E8
IL37 F8
IL38 A3
IL39 A3
IL40 A4
IL41 B3
IL42 A4
IL43 F8
IM01 B1
IM02 B1
IM03 B1
IM04 B1
IM07 C1
IM08 B1
IM09 B2
IM10 B2
IM12 A2
IM13 A1
IM14 A2
IM15 A2
IM27 A2
IM35 A1
IM36 A2
IM37 B1
IM38 C1
9 C1
IM3
IM40 B1
IM41 B1
IM42 C1
IM43 B2
IM44 B2
IM45 C2
IM46 A2
IM47 A1
IM48 A1
IM49 A1
IM50 A1
IN10 A3
IN11 B3
IN12 A3
IN13 A3
IN14 A3
IN15 A2
IN16 A3
IN17 B3
IN18 A2
IN19 B3
IN20 B3
IN21 A3
IN22 B3
IN23 B2
IN24 A3
IN25 A3
IN26 A3
IN27 A3
IN28 B3
IN29 B2
IN30 B2
IN31 B2
IP01 E7
IP02 E7
IP04 E8
IP05 E8
IP06 E8
IP07 E8
IP08 E8
IP09 E7
IP10 E8
IP11 E8
IP12 E7
IP14 D8
IP15 D8
IP16 E7
IP17 E
IP25 E
IP26 E
IP27 E
IP28 E
IP29 E
IP31 E
IP32 E
IP33 E
IP36 E
IP37 E
IP38 E
IP39 E
IP40 E
IP41 E
IP42 E
IP43 E
IP44 E
IP45 E
IP55 E
IP56 E
IP57 E
IP59 E
IQ01 E
IQ02 E
IQ03 E
IQ04 E
IQ05 E
IQ06 E
IQ07 D
IQ08 D
IQ09 D
IQ10 E
IQ11 E
IQ12 E
IQ16 E
IQ17 E
IQ23 D
IQ24 D
IQ25 E
IQ26 E
IQ27 E
IQ28 D
IQ29 D
IQ31 E
IQ32 E
IQ36 E
IQ37 E
IQ39 E
IQ40 E
IQ41 D
IQ42 E
IQ43 D
IQ44 D
IQ45 E
IQ55 E
IQ56 E
IQ57 D
IQ59 E
IR01 A
IR02 A
IR04 A
IR06 A
IR08 A
IR10 A
Block Diagrams, Test Point Overview, and Waveforms
SSB: Test Points (Part 1 Bottom Side)
37LC8.2A LA 6.
Part 1
I_17760_022a.eps
300708
Block Diagrams, Test Point Overview, and Waveforms
SSB: Test Points (Part 2 Bottom Side)
38LC8.2A LA 6.
Part 2
I_17760_022b.eps
300708
Block Diagrams, Test Point Overview, and Waveforms
SSB: Test Points (Part 3 Bottom Side)
39LC8.2A LA 6.
Part 3
I_17760_022c.eps
300708
Block Diagrams, Test Point Overview, and Waveforms
SSB: Test Points (Part 4 Bottom Side)
40LC8.2A LA 6.
Part 4
I_17760_022d.eps
300708
I2C IC Overview
I²C
MICROPROCESSOR
B03
7311
M30300SAGP
SDA2
SCL2
MICRO
PROCESSOR
Block Diagrams, Test Point Overview, and Waveforms
FPGA INTERFACE
B04C
+3V3_STBY
3L75
28
27
100
AD(0-7)
A(0-19)
ERR
04
3L76
7310
M29W800DT
IIC_SDA_up
IIC_SCL_up
+3V3_STBY
3353
NVM_WC
EPROM
1Mx8
512Kx16
VGA & PC AUDIO & COMPAIR & UART
B06C
1E04
COMPAIR
SERVICE
CONNECTOR
1E01
10
15
5
1
VGA
CONNECTOR
12
15
6
11
3L54
56
7L23
M24C64
7
NVM
EEPROM
ERR
06
3E70
2
3E71
3
DC_5V
3E11
3E10
3355
SDA_VGA
SCL_VGA
7E01
M24C02
5
6
3202
3201
EEPROM
256x8
B04D
EP2C5F256C7N
CYCLONE II
AMBI-LIGHT
FPGA I/O BANKS
MAIN_SDA
MAIN_SCL
PE H1
7700
FPGA
F4
H4
C3
ERR
17
F1
N2
P3
nCSO
DCLK
ASDO
DATA 0
AMBI_SDA
AMBI_SCL
MICROPROCESSOR
B03
FPGA INTERFACE
B04C
7201
EPCS4SI8N
1
SCD
6
5
2
3206
3205
41LC8.2A LA 6.
7302
PCA9515ADP
3
2
7303
PCA9515ADP
3
2
+3V3_FPGA
3204
3203
6
7
6
7
S_SDA
S_SCL
+3V3_SW
3359
+3V3_SW
3362
+3V3_FPGA
1202
3360
3361
3
1
5
6
4
7
IIC_SDA
IIC_SCL
IIC_SDA_SIDE
IIC_SCL_SIDE
B04B
7D01
EDD1216AJTA
DRAM
7D02
EDD1216AJTA
DRAM
TO
AMBI-LIGHT
MODULE
(OPTIONAL)
ERR
ERR
TUNER IF & DEMODULATOR
B02
5121
5120
54
1101
UV1316E/ABH
UV1356/ABHN
TUNER
ERR
07
TRIDENT - WX69
B04A
3152
3151
10 11
7113
TDA9886T/V4
IF
DEMODULATOR
ERR
08
HDMI SWITCH
B07A
AUDIO PROCESSOR - MICRONAS
B05A
3411
3410
3 2
7411
MSP4450L
AUDI O
PROCESSOR
ERR
09
HDMI MAIN
B07B
IIC_SDA_SIDE
IIC_SCL_SIDE
+5V_SW
3C09
3C08
H17 H18
7C01
WX69-7569
10
VIDEO
PROCESSOR
ERR
05
3M20
3M21
14 15
7M07
SII9185ACTU
HDMI
SWITCH
ERR
21
3N39
3N40
26 27
7N01
SII9125CTU
HDMI
MAIN
ERR
11
3N43
33
34
3N42
DDC_SDAA
DDC_SCLA
56
7N40
M24C02
EEPROM
1N03
16
15
HDMI A
BACK
1
18 2
19
HDMI
CONNECTOR
28
14
29
+5V_SW
3M15
77
3M14
78
3M88
3M87
HDMI_MUX_TSDA
HDMI_MUX_TSCL
XCIN
XCOUT
RXD1
TXD1
LVD S CONNECTOR
B04E
DYNAMIC FRAME INSERTION (100Hz)
AB02
VIDEO-FLOW
AB09
DISPLAY
INTERFACING
AB07
DDR A
AB06
+3V3_STBY
ONLY FOR AMBILIGHT
1R01
3L97
8
3L98
9
ERR
19
ITV_I2C_SDA
ITV_I2C_SDA
YPBPR & SVHS
B06A
3R26
3R25
1
2
CONNECTOR
TO DISPLAY OR TO
LVD S
DFI PANEL
+3V3_STBY
1621
3L22
30
3L20
29
BOLT_ON_UART_RXD
BOLT_ON_UART_TXD
2
TO DIGITAL MODULE
FOR DTV ONLY
3
(CHINA)
1F50
41
40
SDA-I2C4-SSB
SCL-I2C4-SSB
3F19
3F20
SDA-I2C4
SCL-I2C4
7CA2
EDD1216AJTA
7CA3
EDD1216AJTA
DDR
SDRAM
2Mx16
DQ1
MM1-A
ONLY FOR AMBILIGHT
FPGA DFI
3F49
3FA0
P2 P1
7F18
EP2C35F484C7N
CYCLONE II
(FPGA)
AB08
DQ2
MM2-A
DDR B
7CA0
EDD1216AJTA
7CA1
EDD1216AJTA
DDR
SDRAM
2Mx16
70
71
30
31
50
51
+5V_SW
3M63
3M62
56
7M16
M24C02
EEPROM
+5V_SW
3M72
3M73
56
7M18
M24C02
EEPROM
+5V_SW
3M67
3M68
56
7M17
M24C02
EEPROM
DDC_SDA_SIDE
DDC_SCL_SIDE
DDC_SDAC
DDC_SCLC
DDC_SDAB
DDC_SCLB
1M01
16
15
1M03
16
15
1M02
16
15
HDMI
SIDE
HDMI C
BACK
HDMI B
BACK
(Optional)
1
18 2
19
1
18 2
19
1
18 2
19
HDMI
CONNECTOR
I_17760_065.eps
190608
Block Diagrams, Test Point Overview, and Waveforms
Supply Lines Overview
SUPPLY LINES OVERVIEW
A
CN7
12V
12V
SGND1
SGND1
BL-ON
MAIN
POWER SUPPLY
BL-DIM
BOOST
SGND1
3.3VSB
PSON
SGND1
SGND1
SGND1
12V
12V
12V
12VA
SGND2
-12VA
24VA
SGND3
24VA
SGND3
24VA
SGND3
+12Vb
SGND3
+12Vb
SGND3
CN5A/CN
+12Vb
+12Vb
GND
GND
CN6
CN4
CN5
1 1
2
3
4
5
6
7
8
1 1
2
3
4
5
6
7
8
9
10
11
1
2
3
TO 1206
4
B04C
SSB
5
6
1
2
TO 1m90
AB01
3
DFI
4
8
1
2
TO POWER
DIGITAL
3
MODULE
4
DC / DC +3V3 & +1V2 & +VTUN
B01A
1P02
2
3
4
5
6
7
8
1P01
2
3
4
5
6
7
8
9
GNDSND
10
11
5P02
7P11
3P20
NCP5422
15
Dual
Out-of-Phase
Synchronous
Buck Controller
BL_ON_OFF
BL_ADJUST_PWM
BL_BOOST
STANDBY
6P03
5P06
7P14
ONLY FOR ANALOG TUNER
7P06-1
1
7P06-2
2
7P07-1
16
7P07-2
15
(CONTROL)
5P01
7P08
5Q01
B03
B04A
B03
(CONTROL)
+3V3_STBY
B04A
+12V_DISP
+12V_AUDIO
-12V_AUDIO
+VTUN
+3V3_SW
+3V3_SW
+2V5_SW
+1V2_SW
7P09
STAB .
42LC8.2A LA 6.
DC/DC - 5V &1V8 & 2V5
B01B
B01a
B4a,B05b,B06c,b
B01a,B02,
B03,B04e,B05a
B05b
B05b
B02
B02,B03,
B04a,d,e,B06c,
B07a,b,B08a,c
B04d
2V5
B04a,d,B08c
B01b
B01a
B01a
B01a
B01a
B01a
B01b
B01a
B01a
B01a
B01a
B01b
B04b
B04b
RES
B01b
B04d
B01a
B01a
B01a
RES
RES
+12V_DISP
5Q02
7Q11
3Q20
NCP5422
Dual
Out-of-Phase
Synchronous
Buck Controller
TUNER IF & DEMODULATOR
B02
+5V_SW
3134
+3V3_SW
+VTUN
+12V_DISP
MICROPROCESSOR
B03
+3V3_SW
+3V3_STBY
+5V_SW
+12V_DISP
TRIDENT - WX69
B04A
+1V2_SW
5C09
5C10
5C11
+3V3_SW
+3V3_STBY
+5V_SW
+2V5_VDDMQ
DDR_VREF
FPGA_BL_DIMMING
DDR INTERFACE
B04B
+2V6_SW
5D03
FPGA INTERFACE
B04C
1206
1
+3V3_FPGA
FPGA I/O BANKS
B04D
+1V2_SW
5703
5704
+2V5_SW
+3V3_SW
FPGA_BL_DIMMING
FPGA_BL_BOOST
7Q06-1
15
1
7Q06-2
2
7Q07-1
16
7Q07-2
15
3133
3141
3D15
5704
5701
5702
5700
+12V_DISP
+5V_SW
5P09
+2V6_SW
5Q09
+1V8_SW
7Q09
+5V_SW
5114
+5V_IF
5115
+5VS
5122
+5V_TUN
+3V3_SW
+VTUN
+12V_DISP
+3V3_SW
+3V3_STBY
+5V_SW
+12V_DISP
+1V2_SW
+1V2_ADC
+1V2_PLL
+1V2_CORE
+3V3_SW
+3V3_STBY
+5V_SW
+2V5_VDDMQ
DDR_VREF
FPGA_BL_DIMMING
+2V6_SW
+2V5_VDDMQ
DDR_VREF
+24V
+3V3_FPGA
+1V2_SW
+1V2-FPGA
+1V2-PLL
+2V5_SW
+2V5out_FPGA
+2V5_in-FPGA
+3V3_SW
+3V3_FPGA
FPGA_BL_DIMMING
FPGA_BL_BOOST
7Q08
1V8
STAB .
1320
1205
8
5
1
AMBI-LIGHT
UNIT
TO
B01a
B01a
B01A
B01b
B01a
B01a
B01a
B01b
B01a
B01b
B01b
B01a
B01a
B01a
B01b
B01b
B01a
B01b
B01b
B07a
B02,B03,B04a,
B05a,b,B06b,c,
B07b
B4b
B07a,b,B08b,c
TO 1P10
J
I/R LED
B04a
B04a
B04a
LVD S CONNECTOR
B04E
5R02
7R05
+3V3_SW
AUDIO PROCESSOR - MICRONAS
B05A
+12V_DISP
+5V_SW
B05B
+12V_AUDIO
-12V_AUDIO
+3V3_STBY
B06B
+3V3_STBY
+5V_SW
B06C
VGA
CONNECTOR
+3V3_STBY
B07A
+3V3_SW
+1V8_SW
HDMI
CONNECTOR
HDMI
CONNECTOR
(Optional)
HDMI
CONNECTOR
B07B
+3V3_SW
+1V8_SW
+5V_SW
+5VHDMI_MUX_TPWR
HDMI
CONNECTOR
7410
IN OUT
COM
3402
5401
5402
AUDIO - CLASS D
5A07
5A05
5A08
5A06
I/0 - CINCH 1 & 2
VGA & PC AUDIO & COMPAIR & UART
1E01
3E07
9
HDMI SWITCH
5M01
5M02
5M03
1M01
18
1M02
18
1M03
18
3M18
HDMI MAIN
5N02
5N03
5N07
5N08
5N09
5N01
5N04
5N05
1N03
18
6E04
3A01
3A02
5E01
+12V_DISP+12V_DISP
VDISP
1R01
+3V3_SW
+12V_DISP
+8V
+5V_SW
SUP_D
SUP_A
+12V_AUDIO
VDDA
VDD
-12V_AUDIO
VSSA
VSS
+3V3_STBY
+5V_SW+5V_SW
+3V3_STBY
+5V_SW
DC_5V
+5V_SW+5V_SW
+3V3_STBY
+3V3_SW+3V3_SW
+3V3_SW
+3V3_ANA_MUX
+1V8_SW
+1V8_ANA-MUX
+1V8_DIG-MUX
+5VHDMI_SIDE
+5VHDMI_B
+5VHDMI_C
+5V_SW+5V_SW
+5VHDMI_MUX_TPWR
+3V3_SW
+3V3SWA
+3V3SWB
+3V3SWC
+3V3SWD
+3V3SWE
+1V8_SW
+1V8SWA
+1V8SWB
+1V8SWC
+5V_SW
+5VHDMI_MUX_TPWR
+5VHDMI_A
B01a
B01a
B01a
B01b
TO 1320
B03
SSB
TO CN5
SUPPLY
TO 1R01
B04E
SSB
AB01
B01b
AB09
AB01
AB01
AB01
TO 1F50
AB02
DFI
B07b
41
MJC MT8280 - LVDS
B08A
+3V3_SW
MJC MT8280 - DDR
B08B
+1V8_SW
5F01
MJC MT8280 - POWER
B08C
+3V3_SW
+1V2_SW
+1V8_SW
IR & LED PANEL
J
1P10
5
8
DC/DC
AB01
1M90
1
5U04
5U05
5U06
5U07
7U00
NCP5422
Dual
Out-of-Phase
Synchronous
Buck Controller
7U08
IN OUT
COM
VIDEO-FLOW
AB02
1F50
1
+VDISP
CLOCK
AB03
+3V3
FPGA: POWER + CONTROL
AB05
+1V2
5F54
5F55
+2V5
5F23
5F24
5F25
+3V3
FPGA DFI
AB09
AB05,AB10
AB05,AB07,
AB08,AB10
AB03,AB05,
AB06,AB09,
AB10
AB06
AB06
AB06
AB06
AB06
AB06
2V5-DDR2
+2V5out-FPGA
+Vin-FPGA
+1V2-FPGA
+1V2-PLL
+2V5-DDR1
+2V5in-FPGA
VREF-FPGA2
+3V3
DDR A
AB07
+2V5
DDR B
AB08
+2V5
DISPLAY-INTERFACING
AB09
FPGA AMBILIGHT
AB10
+3V3
+2V5
+1V2
9F52
5F31
5F34
5F27
5F28
5V01
5V02
7F07
3F48
5F33
3F4B
3F4D
3CD6
3CD8
5F0K
5F0L
5F0M
(RESERVED)
2V5-DDR2
+2V5out-FPGA
+Vin-FPGA
+1V2-FPGA
+1V2-PLL
+2V5-DDR1
+2V5in-FPGA
VREF-FPGA1VREF-FPGA1
VREF-FPGA2
+3V3
+2V5
+2V5-DDR1
VREF-DDR1
VREF-FPGA1
+2V5
+2V5-DDR2
VREF-DDR2
VREF-FPGA2
+12V+12V
+VDISP
+5V
+3V3+3V3
+3V3
+3V3M
+2V5
+2V5M
+1V2
+1V2-PF
+1V2M
RESERVED
AB06
AB06
AB06
AB06
AB02
I_17760_066.eps
230608
+3V3_SW
5U00
5U02
5U01
+1V8_SW
+0V9_VTT
+3V3_SW
+1V2_SW
+1V
+1V8_SW
+3V3STBY
+5V_SW
+12VS
+12V
+12V-DC
+1V2
+2V5
+3V3
+12V-SSB
+VDISP
+3V3
+1V2
+1V2-FPGA
+1V2-PLL
+2V5
+Vin-FPGA
+2V5out-FPGA
+2V5in-FPGA
+3V3
7F03
IN UT
COM
7G04
IN OUT
COM
1U01
3.0AT
1U02
3.0AT
7U03-1
3U01
14
15
7U03-2
16
7U01-1
1
7U01-2
2
7U09
IN OUT
COM
5F53
1F51
1
TO
DISPLAY
AB08
AB05
AB05
AB05
AB05
AB06
AB05
AB07
AB08
AB01
AB01
AB01
AB01
AB01
AB01
AB01
AB01
Circuit Diagrams and PWB Layouts
7. Circuit Diagrams and PWB Layouts
Main Power Supply (42"): Part 1
43LC8.2A LA 7.
A1 A1
CN1
DISPLAY SUPPLY (37” & 42”): PART 1
75/1206
PE
L
N
T5AH/250V
F1
CY1
L802
100P/250V
CR-20-LP2048
CY2
100P/250V
1M/1206
R820 R821
10
R601
R607
25.5K
CY5
1.5KP/250V
1K
C107
R101
PC601
PC123
1/2
1K
R633
1KP
R616
C601
Z1
TVR14681
1M/1206
0.1U
R603
402K/1206
10K
4.7M
R39
NTC1 NTC2
SCK201R0
1K
R102
R602
402K/1206
R604
402K/1206
R608
3.83K
4.7M
R40
SCK201R0
C108
C602
D716BAV70
1M/1206
R822
0.1U
D602
BAS316
1Kp
R609
R704
HFV-DP722
FL1
R632
200
100
C603
1KP
75/1206
470P/250V
R819
18.7K
C610
CT601
100:1
R703
C703
835-1A-B-C
RL701
CY4
1M 1M
0.1u
C804
1kp
C806
0.1u
8.06K
2K
1/2
1u/0805
R5
R6
R628
R629
C803
R817
C805
75/1206
R701
CY3
0.47u
15K
1.2kp
DSP-210M
GT1
OTC28
FL2
CX1
0.33u/275V
DSP-210M
GT2
470P/250V
750K/0805
*
R818
C807
P0102BL
SCR211
1Kp
C611
R611
15K
R806
100p
2M/1206
R908
NCP1606B
IC801
100
R630
2.2u
C605
R909
2M/1206
750K/0805
R631
511
1Kp
R612
1.5M
2M/1206
R910
BD1
D15XB60
R805
C612
R613
3.01K
ZD905
100
R815
BAS316
D905
7.5B
C809
1u/450V
R804
750K/0805
10
R814
0.1u
C801
C606
0.47u
1M
R912
1u
C910
CR-18-LP3009
L801
Z2
C810
1u/450V
TVR10511
750K/0805
R803
22
R813
R812
*
51.1K/0805
C802
DDA001B
IC601
R614
19.6K
402K
R913
R918
4401
Q902
C811
1u/450V
51.1K/0805
BAS316
D802
R810
100
1M
R914
1M
R808
R809
22
C911
0.01u
10K
R811
C607
1u/0805
R627
0.1u
C608
PQ3220
51.1k
R615
2N7002
Q906
Q903
2N7002
L800B PQ 3220
L800A
BAS316
D801
R801
100
Q802
SPA15N60C3
121K
STTH1R06
D605
15
CX2
0.1u/275V
T1AL/250V
R626
R816
FB801
FB802
R802
R618
15
R621
F2
0.056/3W
R7
MUR460
220P/1KV
C812
3.5X6
3.5X6
10K
15
0.47u
C609
FL4
HFV-CE5085
D803
MUR460
D805
C813
3.5X6
FB803
3.5X6
FB804
Q801
SPA15N60C3
BAS316
D603
100
R617
BAS316
D604
100
R620
220P/1KV
0.1 FUSIBLE
10K
10K
C808
2SK3569
R619
R622
4401
Q601
180u/450V
0.22u
C903
R634
Q602
Q603
2SK3569
R624
ZD601
BD2
S1NB80
C904
BAS316
D907
2K/0805
18A
1N4007
D910
0.1U
C907
CT601
100:1
1/2
1Kp
Z3
C918 220p
220p
C917
4401
Q901
C625
220P/1KV
C626
1K /1W
R904
C902
33u/450V
TVR10511
20A
ZD900
200K/1W
220P/1KV
D606
BAV103
100u/50v
D911
1N4007
ICE3AS02
20A
ZD906
4401
Q904
R605
C614
R901
1 FUSIBLE
06J05
R902
IC901
4
3
R917
C613
0.022u/630V
100/0805
R623
2K/0805
PC901
1/2
0.01U
T1
ER39L
PC123
C905
1K
R919
40.2K
R915
R927
1.5K
0.22u
C901
STPS10H100CFP
C921
0.047u/450V
22
R926
BAS316
D908
100
R923
10K
R924
R928
1
R922
40.2K
D904 BAS316
CR201
CR202STPS10L60CFP
D201
SB560
SB560
D204
4403
Q900
C201
D909
BYV26E
3.5x6
FB902
Q905
FQPF3N80C
R903
2/1W
R905
5.1K
4
10D
ZD901
3
470u/35V
C204
1Ku/16V
D202
SB560
D203
SB560
ZD908
47P/1KV
PC902
1/2
R201A
7.5k/1206
R202A
R204A
R205A
P6KE300A
C916
10K
R906
PC123
R201B
7.5k/1206
R202B
3.01K/1206
R204B
3.01K/1206
R205B
3.01K/1206
0.1u
C914
C906
R201C
7.5k/1206
3.01K/1206
3.01K/1206
3.01K/1206
C920
20A
ZD902
D903
EGP10D
100U/50V
R201D
7.5k/1206
R202C
3.01K/1206
R204C
3.01K/1206
R205C
3.01K/1206
5.1/1206
R916
R201E
CB-3.0-01
R202D
3.01K/1206
R204D
3.01K/1206
R205D
3.01K/1206
EF12.6
D906
BAV103
C912
47u/63V
R201F
7.5k/1206
L202
C208
470u/25V
C207
470u/25V
5.1/1206
T901
R201G
7.5k/1206
R950
SB340
D950
1
2
100
R512
BAS316
D608
R201H
7.5k/1206
R203A
3.01K/1206
CB-3.0-01
L203
CB-3.0-01
L204
1KP/1206
C950
ZD951
1N5917B
1/2
PC901
PC123
2.2u
3.3B C956
ZD602
D607
BAS316
R201I
7.5k/1206
R203B
2k
R952
10K
R953
IC951
APL431 1.25V
1U
C505
1K
R511
1K
R502
CB-3.0-01
L201
R201J
7.5k/1206
7.5k/1206
3.01K/1206
T5A/125V
F201
0.1u
C210
0.1u
C211
F200
T5A/125V
C955
R503
R504
0.1u
C205
CB-3.0-01
C951
1Ku/10V
750
R951
0.47u
C954
3.83K
2K
220u/35V
L951
R201K
C206
R509
5.11K
2K
R510
R506
1K
C504
1Kp
R201L
7.5k/1206
3.5X6
FB202
3.5X6
FB203
0.1u
C952
1Ku/10V
2k
R954
R955
1.13K
1
2
C502
0.047u
C202
220u/35V
7.5k/1206
H_16750_068.eps
3.5X6
FB901
3.5X6
FB201
C203
0.1u
C953
1/2
PC601
IC501
APL431 2.5V
0.1u
110108
PC123
C506
1u
Circuit Diagrams and PWB Layouts
Main Power Supply (42"): Part 2
44LC8.2A LA 7.
A2 A2
DISPLAY SUPPLY (37” & 42”): PART 2
0.1/FUSE RES
R317
R335
CN4
4403
Q303
0.1U
R302
10K
C303
10K
R303
1/2
PC123
PC302
1K
R306
750
R334
1/2
2K
PC123
PC301
BAS316
D701
C212
0.022u
BAS316
D702
0.1u
C706
ZD301
4.7kp
C701
5.1A
LM324
IC701
1/4
1/4
IC701
LM324
100K
C321
R702
1u
R323
5.11K
3.24K
C722
0.47u
100K
R713
CN5_2
30.1K
R761
R768
887
R714
R715
1M/1206
C307
R705
10K
6.49K
0.1u
C213
1KP
R328
R329
R330
R312
C707
10
R301
1M/1206
1M/1206
8.87K
R716
Q708
0.1u
CN3
R212
100/1206
C329
22p /6KV
1u
C725
R343
22
D708
BAS316
R711
CN2
BAS316
R213
100/1206
C325
3M
D304
BAS316
220p
BAV99
2N7002
Q707
2K
R738
D305
D317
C330
33p /6KV
22
R339
PC123
D307
2K
R220
R221
C326
R304
1/2
PC302
BAV99
1K
10K
220p
R321
R219
R214
27/2W
10K
2K
D314
BAV99
R327
27/2W
SCR210
P0102BL
1u
C957
BAS316
D705
D707
LL4148
10K
R746
0.1u
C723
R218
R747
200
4403
Q701
BAS316
D212
LM324
IC703
1/4
LM324
IC703
1/4
10K
BAS316
D306
1
2
2K
R744
2K
R745
4401
Q703
1u
R216
D210
D211
PC902
1/2
0.47u
0.1u
0.47u
C726
Q604
4403
100
BAS316
BAS316
C710
C715
C714
*
*
R342D312
1K
R340
1K
R341
C319
0.01u
60.4K
R344
1u
R963
100K
C958
R964
5.11K
1K
R217
PC123
LL4148
D704
R730
4.7M
10K10K
R729
10K
R734
R733
2.55K
R732
4.7M
4401/DIP
Q702
3.01K
1u
C720
1K
R749
R750
LL4148
D706
2K
511
R731
R748
R757
IC705
APL431 2.5V
BAS316
22
R313
22
R314
D302
100
R315
BAS316
D303
100
R316
BAS316
D717
LM324
IC703
3.01K
R736
30.1K
R333
1/4
D308
BAV99
BAS316
D713
STP11NM60
Q301
10K
R318
STP11NM60
Q302
10K
R319
C309
0.22u
10K
51.1K
R743
BAS316
0.1u
R325
D710
C717
C333
33p/6kV
0.015u
1/2
IC702
LM358
C312
C310
C311
C313
1Kp
100K
C716
R755
330P/1KV
330P/1KV
10K
R326
R756
2K/1206
2K
R735
R742
2K
C315
C314
0.47u/450V
0.47u/450V
0.015u
C713
Q304
2N7002
40.2
C327
0.1u
R320
33p/6kV
D311
BAV99
C317
20K
R737
2K
R741
10K
0.01u/1206
R740
10K
T301
UU35
13C
ZD210
D703
BAS316
1/4
R728
1Kp
C718
LM324
IC703
D313
BAV99
1K
R215
10K
R739
C316
R332
R769
R766
2K
D709
D309
STTH1R06
R765
4.22K
BAS316
0.1u
C219
0.1u/630V
R720
30.1K
R338
22
D715
BAS316
D310
19.6K
20K
R708
0.1u
C217
0.1u
C215
IC301
DDA 001A
BAS316
D711
R717
30.1K
C704
0.1u
C218
BAS316
R709
R712
0.1u
0.1u
C216
100K
20K
60.4K
R753
R718
1K
R719
0.47u/0805
0.1u
C727
4.02K
C302
R710
C705
R721 200K
C709
1u
C308
1K
0.1U
17.4K
13K
0.01u
CN7
PC123
PC301
1/2
2K
R337
20K
R336
20K
R309
1KP
1KP
C318
C305
10K
R706
*
*
C724
2N7002
Q706
*
*
R723
CN5_1
R307
C304
0.1u
C214
1KP
1.3K
C301
R308
5.11K
R310
R311
5.11K
1M
4.7u/0805
D712
BAS316
BAS316
D714
20K
R726
R722
C711
10K
0.01u
R707
LM324
IC701
1/4
C306
LM324
IC701
1/4
34K
CN6
2.2u
LM358
IC702
1KP
1/2
R331
C708
H_16750_069.eps
110108
Circuit Diagrams and PWB Layouts
Layout Main Power Supply (42") (Top Side)
45LC8.2A LA 7.
H_16750_070.eps
110108
Circuit Diagrams and PWB Layouts
Layout Main Power Supply (42") (Bottom Side)
46LC8.2A LA 7.
H_16750_071.eps
110108
Circuit Diagrams and PWB Layouts
47LC8.2A LA 7.
DFI Panel: DC - DC
IU06
2U13 C7
2U14 D10
2U15 C6
2U16 C7
2U17 D3
2U18 D6
2U19 D4
2U20 D5
2U21 D9
2U22 D11
2U23 E8
2U24 E8
2U25 B9
2U26 E7
2U27 E8
2U28 F8
2U29 F6
2U30 F10
2U31 D3
2U32 H10
2U33 F11
2U34 G2
2U35 H11
2U36 H2
2U37 H2
2U38 H13
2U39 C12
2U40 E9
34567
10K
100n
2U00
3U00
IU05
IU11
6
7U13-1
BC847BPN
1
3U30
6U00
BAS316
3U07
100R
10K
IU07
SCL-I2C4
22K
10K
3U13
3U14
IU38
1u0
100n
2U31
2U17
5
2
3U05
3U12
BC847BPN
7U13-2
10K
10K
4
3
IU12
*
GND-SIG
GND-SIG
10K
IU70
3U04
100R
7U05
*
BC847BW
10K
SDA-I2C4
*
GND-SIG
NCP5422ADR2G
FU03
IU28
IU31
IU09
IU39
100n
2U19
GND-SIG
2U05
GND-SIG
3U32
2U41 A8
3U00 B3
3U01 B4
3U03 A5
3U04 D2
3U05 B2
3U06 B5
1u0
7U00
4
7
10
8
9
39K
BST
1
2
1
2
ROSC
3U01
VFB
COMP
IU03
14
VCC
GND-SIG
3U07 B3
3U08 B7
3U09 B5
3U10 C6
3U11 B7
3U12 C2
3U13 C3
3U14 C3
3U15 B5
3U16 E8
3U17 B7
3U18 E7
3U19 C6
3U20 C5
3U21 B5
3U22 C6
3U23 C6
3U24 C7
3U25 F10
3U26 D6
3U27 D7
3U28 F11
3U30 B3
3U31 D6
3U32 D4
3U33 D5
3U34 D1
3U35 E1
3U36 D6 7U05 E2
3U37 D6
3U40 D6
3U41 E10
3U43 E5
3U44 E10
3U45 E7
3U46 E8
3U47 E9
3U48 E7
3U50 E10
3U55 E8
3U58 E9
3U59 E10
3U62 F7
3U63 F8
3U64 F10
3U68 F8
3U69 F9
3U70 F10
3U72 D9
3U73 G10
3U74 H1
3U75 H1
5U00 A10
5U01 B8
5U02 E8
5U04 C12
5U05 C12
5U06 C12
5U07 C12
6U00 B3
6U01 F11
6U02 F11
6U04 E7
6U06 E7
6U08 F7
7U00 C4
7U01-1 A5
7U01-2 B6
7U03-1 C6
7U03-2 B6
7U07 F7
7U08 G11
7U09 G12
7U13-1 C3
7U13-2 B2
7U15-1 E10
7U15-2 E10
9U01 F13
9U02 F14
9U03 H9
FU00 A12
FU01 B7
FU02 C12
FU03 C4
FU04 D13
FU05 D6
FU06 D9
FU07 E11
FU10 D14
FU11 G13
FU12 C11
IU00 A10
IU01 A7
IU02 A5
IU03 B4
IU04 E9
IU05 B3
IU06 B2
IU07 B3
IU08 B6
IU09 D4
IU11 B3
IU12 B2
IU13 B5
IU16 B6
IU17 C7
IU18 C7
IU20 C6
IU21 C5
IU26 C5
IU27 C7
8 9 10 11 12
2U14
IU00
2U11
+12V-DC
+12V
FU00
1u0
5U04
220R
3.0A T
1U01
1U02
IU35
T3.0A
5U05
220R
5U06
5U07
220R
220R
FU12
FU02
2U39
+12V-DC
+12VS
1u0
TO
SUPPLY
1M90
1
2
3
+1V2
2U33
2U22
330u 6.3V
*
6.3V330u
6U01
6U02
BZG05C3V3
*
+2V5
BZG05C3V3
47u
6
1
IU59
3U64
100R
3U41
2
IU51
1K0
3U50
FU07
3U59
2K7
2K2
2U30
1%
1u0
3U25
220R
4
5
6
7
B6B-PH-SM4-TBT(LF)
TO
SUPPLY
1M09
1
2
3
4
56
B4B-PH-SM4-TBT(LF)
*
IU65
3U28
220R
1%
SENSE+2V5
SENSE+1V2-FPGA
3U70
470R
3U73
100R
1%
1%
IU01
7U01-1
8
3U03
IU30
7
2
SI4936ADY
1
2U04
IU08
10R
3n3
7U01-2
6
5
4
SI4936ADY
3
IU34
IU20
7U03-1
SI4936ADY
2
3U26
3K3
100n
IU43
3U40
7U03-2
56
SI4936ADY
4
3
2U15
3n3
78
1
3U27
IU37
6K8
6K8
3U31
3U37
6K8
FU05
6K8
1u0
2U29
BC817-25W
IU40
IU46
4R7
IU33
3U20
3U33
3U21
6K8
2U20
22R
3U22
3U23
4R7
IU16
4R7
100n
3U10
3U19
10R
22R
4R7
IU36
2U18
3U36
3K3
BOOSTER
12V/3V3 CONVERSION
FU01
22R
3U11
22R
3U08
IU17
1n0
2U13
1n0
2U16
BAS316
6U04
3U45
IU50
68R
3U48
68R
2U26
IU54
100n
3U18
6U06
470R
BAS316
3U62
IU63
470R
7U07
6U08
6K8
3U17
IU18
100n
2U07
IU27
1K0
3U24
12V/1V2 CONVERSION
3U16
22R
3U46
2U27
2U28
IU64
BZX384-C18
5U01
10u
22R
IU52
1n0
2U23
IU60
1n0
3U68
*
GND-SIG
3U55
IU53
3U63
2U41
2U08
5U02
10u
6K8
100n
1K0
4K7
IU02
22u
2U01
10R
Φ
3
GATE
GATE
GND
22R
22R
3U09
3U06
IU13
3U15
1
H1
IU21
2
L1
IU26
16
H2
15
L2
5
+1
6
-1
IS
1213
+2
11
-2
3U43
IU48
3K3
2U24
35V22u
3n3
3n3
GND-SIG
*
*
22u
2U09
22u
2U02
2U06
*
22u
47u
2U25
FU06
47u
2U21
3U72
100R
2U03
*
1u0
2U40
IU04
3U58
3U47
3U69
100R
1%
1K0
1%
10K
BC847BS
22u
*
7U15-2
2U10
IU57
3U44
10K
5U00
10u
*
22u
22u
2U12
IU47
7U15-1
BC847BS
3
5
4
1M09 E13
1M12 E14
1M90 D13
1U01 C11
1U02 C11
1U11 D13
1U12 D14
1U13 D14
2U00 B2
2U01 A5
2U02 A9
2U03 A9
2U04 A6
2U05 B4
2U06 A9
2U07 C7
2U08 B8
2U09 B9
2U10 D9
2U11 A11
2U12 D10
12
AB01 AB01
DC / DC
A
B
C
D
*
3U34
IU69
*
3U35
E
F
IU28 C4
IU30 C5
IU31 C4
IU33 C5
IU34 C6
IU35 C12
IU36 D6
IU37 D6
IU38 D4
IU39 D4
IU40 D5
IU43 D6
IU46 D5
IU47 E10
IU48 E5
IU50 E7
IU51 E10
IU52 E8
IU53 E8
IU54 E7
IU57 E10
IU59 E10
IU60 E8
IU61 E13
IU62 E13
IU63 F7
IU64 F7
IU65 F11
13 14 15
+12VS
1U13
1U12
IU62
IU61
+12VAL
+12VAL
9U01
GNDAL
GNDAL
1U11
9U02
FU10FU04
TO
AMBILIGHT
1M12
1
2
3
4
56
B4B-PH-SM4-TBT(LF)
8
IU68 H2
IU69 E1
IU70 D2
A
B
C
D
E
F
G
H
GND-SIG GND-SIG GND-SIG
3139 123 6188.2
12345678910111213
3U74
470R
1%
3U75
G
7U08
100p
2U34
2U36
IU68
100p
6K8
2U37
100n
+12V-DC
L78M08CDT
13
OUTIN
COM
2U32
2
22u 35V
2U35
35V22u
7U09
LD1117DT33C
32
COM
FU11
OUTIN
1
2U38
22u 35V
+3V3
H
9U03
GND-SIG
H_16800_010.eps
180407
14 15
Circuit Diagrams and PWB Layouts
48LC8.2A LA 7.
DFI Panel: Video Flow
FF48 F1
2F1J F12
2F0F C6
2F0P B12
1F50 C1
2F06 F6
1F51 F15
1F52 F9
2F00 E6
2F01 E6
2F02 E6
2F03 E6
2F04 F6
2F05 F6
AB02 AB02
2F0G C6
2F07 F6
2F0H C6
2F08 G6
2F0I D6
2F09 G6
2F0J D6
2F0A G6
2F0K D6
2F0B G6
2F0L D6
2F0C B6
2F0D B6
2F0M B6
2F0E C6
2F0N B6
12345678
VIDEO-FLOW
2F0Q B12
2F0R B12
2F0S B12
2F0T C12
2F0U C12
2F0V C12
2F0W C12
2F0Y D12
2F0Z D12
2F1A D12
2F1B D12
2F1C E12
2F1D E12
2F1E E12
2F1F E12
2F1G F12
2F1H F12
2F1K F12
2F1L G12
2F1M G12
2F1N G12
2F1P G12
2F1Q H12
2F1R H12
2F1S H12
2F1T H12
2F47 F3
2F48 G3
2F49 G3
2F4A G3
2F4B G3
2F79 H6
2F80 H6
2F81 H6
2F82 H6
2F83 E3
2F84 E3
2F85 E3
2F86 E3
2F87 F3
2F88 F3
2F89 F3
2F9A B3
2F9B B3
2F9C B3
2F9D B3
2F9E C3
2F9F C3
2F9G C3
2F9H C3
2F9I D3
2F9J D3
2FGK D3
2FGL D3
3F50 D5
3F51 E5
3F52 E5
3F53 E5
3F54 E5
3F55 E5
3F56 F5
3F57 F5
3F58 F5
3F59 F5
3F5U A5
3F5V B5
3F5W B5
3F5Y B5
3F5Z B5
3F60 B5
3F61 B5
3F62 C5
3F63 G5
3F64 G5
3F65 C5
3F66 C5
3F67 C5
3F68 D5
3F69 D5
3F6A D5
3F6B D5
3F6C D5
3F70 C5
3F71 C5
3F7J G11
3F7K G11
3F7L H11
3F7M H11
3F7N H11
3F8C B11 3F9U F11
3F7P H11
3F8D B11
3F7Q H11
3F8E B11
3F7R H11
3F8F B11
3F87 C3
3F8G B11
3F88 E3
3F8H C11
3F89 E3
3F8J C11
3F8A A11
3F8K C11
3F8B B11
3F8L C11
3F8M C11
3F8N C11
3F8P D11
3F8Q D11
3F8R D11
3F8S D11
3F8T D11
3F8U D11
3F8V E11
3F8W E11
3F8Y E11
3F8Z E11
3F91 D3
3F92 F5
3F93 G5
3F94 F5
3F95 G5
3F96 D3
3F97 F3
3F98 F3
3F9N E11
3F9P F11
3F9Q F11
3F9R F11
3F9T F11
3F9V G11
3F9W G11
3F9Y G11
3F9Z G11
3FH7 B3
3FH8 B3
3FH9 C3
3FHI G3
3FHJ G5
3FHK G5
3FHL H5
3FHM H5
3FHN H5
3FHP H5
3FHR H5
3FHS H5
5F00 E6
5F01 E6
5F0A D6
5F02 F6
5F0B B6
5F03 F6
5F59 B11
5F04 G63F90 G3
5F60 B11
5F05 G6
5F61 C11
5F06 B6
5F62 C11
5F07 C6
5F63 D11
5F08 C6
5F64 D113F9S F11
5F09 D6
5F65 E11
9 101112131415
5F66 E11
5F67 F11
5F68 F11
5F69 G11
5F70 G11
5F71 H11
5F72 H11
5F78 H6
5F79 H6
FF00 D8
FF01 E8
FF02 E8
FF03 E8
FF04 E8
FF05 E9
FF0A E9
FF0B E9
FF0C E9
FF0D E9
FF0E E9
FF0F E8
FF0G C9
FF0H D8
FF0I D8
FF0J D9
FF0K D8
FF0L D9
FF0M D8
FF0N D9
FF0P D8
FF0Q D9
FF0R D8
FF0S D9
FF0T C14
FF0U C14
FF10 D1
FF11 D1
FF14 F1
FF15 F14
FF16 C1
FF1C C14
FF1D D14
FF1E D14
FF1F D14
FF1Q D14
FF1R D14
FF1S D14
FF1T D14
FF1U D14
FF1V D14
FF1W D14
FF1Y D14
FF1Z D14
FF20 D1
FF21 D2
FF22 D1
FF23 D2
FF24 D1
FF25 D2
FF26 E2
FF27 E2
FF28 E2
FF29 F2
FF2R F8
FF2A E14
FF2B E14
FF2S F8
FF2C E14
FF2T E8
FF2D E14
FF2U F8
FF2E E14
FF30 E2
FF31 E2
FF2F E14
FF32 E1 FF44 E2
FF2G E14
FF2H E14
FF33 E2
FF2Q E14
FF34 E3
A
B
C
D
E
F
G
H
+12V-SSB
1F50
FF16
1
2
3
4
FF49
5
FF20
6
FF10
7
FF11
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
FI-RE41S-HF
FF22
FF24
FF42
FF32
FF14
FF47
FF48
425143
4445
47
46
4849
50
FROM SSB
CTRL-SSB2
CTRL-SSB1
CTRL-SSB3
CTRL-SSB4
FF23
FF30
SCL-I2C4-SSB
SDA-I2C4-SSB
FF21
FF26
FF28
FF27
FF25
FF29
FF39
FF40
FF44
FF43
FF38
FF33
FF35
FF41
FF31
FF37
FF34
FF36
RES
10p
10p 2F9B
RES
RES
10p
RES
RES
10p
10p
RES
RES
10p
RES
RES
10p
10p
RES
RES
10p
10p
RES
RES
10p
RES
RES
10p
RES
RES
10p
10p 2F88
RES
RES
10p
RES
RES
10p
10p 2F49
RES
RES
10p
10p 2F4B
RES
2F9A
2F9C
2F9D10p
2F9E
2F9F
2F9G
2F9H10p
2F9I
2F9J
2FGK
2FGL
2F83
2F8410p
2F85
2F8610p
2F87
2F89
2F4710p
2F48
2F4A
100R
100R
100R
100R
100R
100R
100R
100R
100R
100R
100R
100R
3FH7
3FH8
3FH9
3F87
3F91
3F96
3F88
3F89
3F97
3F98
3F90
3FHI
RXEA-
RXEA+
RXEB-
RXEB+
RXEC-
RXEC+
RXECLK-
RXECLK+
RXED-
RXED+
RXEE-
RXEE+
RXOA-
RXOA+
RXOB-
RXOB+
RXOC-
RXOC+
RXOCLK-
RXOCLK+
RXOD-
RXOD+
RXOE-
RXOE+
TX1A-
TX1A+
TX1B-
TX1B+
TX1C-
TX1C+
TX1CLK-
TX1CLK+
TX1D-
TX1D+
TX1E-
TX1E+
TX1F-
TX1F+
TX2A-
TX2A+
TX2B-
TX2B+
TX2C-
TX2C+
TX2CLK-
TX2CLK+
TX2D-
TX2D+
TX2E-
TX2E+
TX2F-
TX2F+
3F5U
120R
3F5V
120R
3F5Y
120R
3F5Z
120R
3F61
120R
3F62
120R
3F65
120R
3F71
120R
3F67
120R
3F68
120R
3F6A
120R
3F6B
120R
3F50
120R
3F52
120R
3F53
120R
3F55
120R
3F56
120R
3F58
120R
3F92
120R
3F59
120R
3F93
120R
3F63
120R
3F95
120R
3FHJ
120R
3FHL
120R
3FHM
120R
3FHP
120R
3FHR
120R
3F5W
3F60
3F70
3F66
3F69
3F6C
3F51
3F54
3F57
3F94
3F64
3FHK
3FHN
3FHS
180R
180R
180R
180R
180R
180R
180R
180R
180R
180R
180R
180R
180R
180R
4
5F06
1
4
5F0B1
4
5F07
1
4
5F08
1
4
5F09
1
4
5F0A
1
4
5F00
1
4
5F01
1
4
5F02
1
4
5F031
4
5F04
1
4
5F051
4
5F78
1
4
5F79
1
3
RES
2F0C
10p
10p2F0D
DLW21S
RES
2
3
RES
2F0M
10p
10p2F0N
DLW21S
RES
2
3
RES
2F0E
10p
2F0F
10p
DLW21S
RES
2
3
RES
2F0G
10p
10p2F0H
DLW21S
RES
2
3
RES
2F0I
10p
10p2F0J
DLW21S
RES
2
3
RES
2F0K
10p
2F0L
10p
DLW21S
RES
2
3
RES
2F00
10p
10p
2F01
DLW21S
RES
2
3
RES
2F02
10p
10p2F03
DLW21S
RES
2
3
RES
2F04
10p
2F05
10p
DLW21S
RES
2
3
RES
2F06
10p
2F07 10p
DLW21S
RES
2
3
RES
2F08
10p
2F09
10p
DLW21S
RES
2
3
RES
2F0A
10p
2F0B
10p
DLW21S
RES
2
3
RES
2F79
10p
10p
2F80
DLW21S
RES
2
3
RES
2F81
10p
2F82 10p
DLW21S
RES
2
TXPAN1A-
TXPAN1A+
TXPAN1B-
TXPAN1B+
TXPAN1C-
TXPAN1C+
TXPAN1CLK-
TXPAN1CLK+
TXPAN1D-
TXPAN1D+
TXPAN1E-
TXPAN1E+
TXPAN1F-
TXPAN1F+
TXPAN2A-
TXPAN2A+
TXPAN2B-
TXPAN2B+
TXPAN2C-
TXPAN2C+
TXPAN2CLK-
TXPAN2CLK+
TXPAN2D-
TXPAN2D+
TXPAN2E-
TXPAN2E+
TXPAN2F-
TXPAN2F+
TXPAN1ATXPAN1A+
TXPAN1BTXPAN1B+
TXPAN1CTXPAN1C+
TXPAN1CLKTXPAN1CLK+
TXPAN1DTXPAN1D+
TXPAN1ETXPAN1E+
TXPAN1FTXPAN1F+
TXPAN2ATXPAN2A+
TXPAN2BTXPAN2B+
TXPAN2CTXPAN2C+
TXPAN2CLKTXPAN2CLK+
TXPAN2DTXPAN2D+
TXPAN2ETXPAN2E+
TXPAN2FTXPAN2F+
FF02
FF04
FF0F
FF2R
FF2S
FF00
FF0H
FF0I
FF0K
FF0R
FF2T
FF2U
FF01
FF03
FF0M
FF0P
FF0C
FF0E
FF05
FF0G
FF0J
FF0L
FF0N
FF0Q
FF0S
FF0A
FI-RE41S-HF
50
48 49
46 47
44 45
425143
41
FF46
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
FF0B
11
10
1F52
9
8
7
6
5
4
3
2
1
FF0D
TO DISPLAY
TX3A-
TX3A+
TX3B-
TX3B+
TX3C-
TX3C+
TX3CLK-
TX3CLK+
TX3D-
TX3D+
TX3E-
TX3E+
TX3F-
TX3F+
TX4A-
TX4A+
TX4B-
TX4B+
TX4C-
TX4C+
TX4CLK-
TX4CLK+
TX4D-
TX4D+
TX4E-
TX4E+
TX4F-
TX4F+
3F8A
120R
3F8B
120R
3F8D
120R
3F8E
120R
3F8G
120R
3F8H
120R
3F8K
120R
3F8M
120R
3F8N
120R
3F8P
120R
3F8R
120R
3F8S
120R
3F8U
120R
3F8V
120R
3F8Y
120R
3F8Z
120R
3F9P
120R
3F9Q
120R
3F9S
120R
3F9T
120R
3F9V
120R
3F9W
120R
3F9Z
120R
3F7J
120R
3F7L
120R
3F7M
120R
3F7P
120R
3F7R
120R
4
3
RES
2F0P
10p
10p
5F59
180R
3F8C
4
5F60
3F8F
180R
1
4
3F8J
5F6111
180R
4
3F8L
5F62
180R
1
4
5F63
180R
3F8Q
1
4
5F641
3F8T
4
5F65
180R
3F8W
1
4
5F66
180R
3F9N
1
4
5F67
180R
3F9R
1
4
5F68
180R 180R
3F9U
1
4
5F691
180R
3F9Y
4
5F70
3F7K
180R
1
4
5F71
180R
3F7N
1
4
5F72
180R
3F7Q
1
2F0Q
DLW21S
RES
2
3
RES
2F0R
10p
10p
2F0S
DLW21S
RES
2
3
RES
2F0T
10p
10p
2F0U
DLW21S
RES
2
3
RES
2F0V
10p
2F0W 10p
DLW21S
RES
2
3
RES
2F0Y
10p
10p
2F0Z
DLW21S
RES
2
3
RES
2F1A
10p
2F1B
10p
DLW21S
RES
2
3
RES
2F1C
10p
2F1D 10p
DLW21S
RES
2
3
RES
2F1E
10p
2F1F 10p
DLW21S
RES
2
3
RES
2F1G
10p
10p
2F1H
DLW21S
RES
2
3
RES
2F1J
10p
10p2F1K
DLW21S
RES
2
3
RES
2F1L
10p
10p
2F1M
DLW21S
RES
2
3
RES
2F1N
10p
2F1P 10p
DLW21S
RES
2
3
RES
2F1Q
10p
2F1R
10p
DLW21S
RES
2
3
RES
2F1S
10p
2F1T
10p
DLW21S
RES
2
TXPAN3A-
TXPAN3A+
TXPAN3B-
TXPAN3B+
TXPAN3C-
TXPAN3C+
TXPAN3CLK-
TXPAN3CLK+
TXPAN3D-
TXPAN3D+
TXPAN3E-
TXPAN3E+
TXPAN3F-
TXPAN3F+
TXPAN4A-
TXPAN4A+
TXPAN4B-
TXPAN4B+
TXPAN4C-
TXPAN4C+
TXPAN4CLK-
TXPAN4CLK+
TXPAN4D-
TXPAN4D+
TXPAN4E-
TXPAN4E+
TXPAN4F-
TXPAN4F+
TXPAN3ATXPAN3A+
TXPAN3BTXPAN3B+
TXPAN3CTXPAN3C+
TXPAN3CLKTXPAN3CLK+
TXPAN3DTXPAN3D+
TXPAN3ETXPAN3E+
TXPAN3FTXPAN3F+
TXPAN4ATXPAN4A+
TXPAN4BTXPAN4B+
TXPAN4CTXPAN4C+
TXPAN4CLKTXPAN4CLK+
TXPAN4DTXPAN4D+
TXPAN4ETXPAN4E+
TXPAN4FTXPAN4F+
SDA-I2C4-DISP
SCL-I2C4-DISP
CTRL-DISP4
CTRL-DISP3
CTRL-DISP2
CTRL-DISP1
FF3B
FF3D
FF3F
3139 123 6188.2
1
234567891011
12 13 14 15
FF35 F2
FF36 F3
FF37 F2
FF38 F2
FF39 F2
FF3A E14
FF3B E14
FF3C E14
FF3D F14
FF1C
FF1S
FF1Z
FF2B
FF3C
FF3E
FF1E
FF1Q
FF1W
FF2D
FF2F
FF3E F14
FF3F F14
FF40 F2
FF41 F2
FF42 E1
FF43 E2
FF46 C9
FF47 F1
FF1U
FF2H
FF3A
+VDISP
FF0T
FF15
FF0U
FF1F
FF1R
FF1T
FF1V
FF1Y
FF2C
FF2E
FF2G
FF49 D1
FI-RE51S-HF
60
58 59
56 57
54 55
526153
FF1D
FF2A
FF2Q
1F51
TO DISPLAY
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
H_16800_011.eps
A
B
C
D
E
F
G
H
180407
Circuit Diagrams and PWB Layouts
49LC8.2A LA 7.
DFI Panel: Clock
1234567891011
12
CLOCK
AB03 AB03
A
Video-clock RESERVED
B
C
2FD1
IF29
7F85
DSO751SV
1
100n
27M0
+3V3
5F80
30R
4
IFC0
3FH0
3
100R
IFC1
2
3FH1
100R
3F26
100R
3FA9
100R
RES
IFC2
IFD8
CLK-OSC1A
CLK-OSC1B
CLK-OSC1C
CLK-OSC1D
2FD2
IFC3
7F86
DSO751SV
1
100n
27M0
+3V3
5F20
30R
4
IFC5
3FHV
3
2
100R
3FHY
100R
RES
RES
IFC6
CLK-OSC2B
CLK-OSC2C
A
B
C
2FD1 C3
2FD2 C6
2FD3 F3
2FD4 G5
3F26 C4
3FA9 D4
3FH0 C4
3FH1 C4
3FHV C7
3FHY C7
3FJA F2
3FJB G3
3FJC F6
5F20 B6
5F21 E3
5F22 F6
5F80 B3
7F50 G3
7F51 G6
7F85 C3
7F86 C6
9F08 G3
9F09 G3
IF13 F3
IF14 F2
IF29 B3
IFC0 C4
IFC1 C4
IFC2 C4
IFC3 B6
IFC5 C7
IFC6 C7
IFC7 G3
IFC8 G3
IFC9 F3
IFD1 G6
IFD8 D4
D
G
D
+3V3
E
30R
5F21
3FJA
IF14
F
IF13
1K0
IFC9
6
5
1
CS_
ASDI
DCLK
4
GND
DATA
SCD
2
Φ
VCC
100n
7F50
EPCS4SI8
8
7
3
2FD3
IFC7
RESERVED
3FJB
33R
9F09
IFC8
RES9F08
SS-OFF
CLK-VIDEO-SS
CLK-OSC1C
CLK-VIDEO
+3V3
30R
2FD4
5F22
100n
IFD1
3FJC
33R
E
4
OUT
VDD
GND
EOH
2
7F51
1
CLK-SYSTEM-SS
SS-OFF
F
50M
3
G
H
3139 123 6188.2
1F30
1F31
1F32
1F33
1F34
1F35
1F40
1F41
1F42
1F43
1F44
1F45
1F46
1F47
1F48
1F49
H
H_16800_012.eps
180407
1
234567
8 9 10 11 12
Circuit Diagrams and PWB Layouts
DFI Panel: Supply
2F17 B3 2F18 B4 2F19 B3 2F21 B3 7F35 A3 7F36 B3 9F13 A2 IF10 A2 IF1U A3
1234
50LC8.2A LA 7.
5
Personal Notes:
AB04 AB04
SUPPLY
A
B
C
+3V3
+12V
9F13
RES
IF10
1
RES
3
100n
2F17
32
RES
100n
2F21
7F35
LD3985M25
OUTIN
INH BP
COM
2
7F36
LD1117DT25
OUTIN
COM
1
RES
RES
5
IF1U
4
RES2F19
100n
2F18
RES
+2V5-STAB
1u0
A
B
C
D
3139 123 6188.2
D
H_16800_013.eps
1
2345
180407
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts
51LC8.2A LA 7.
DFI Panel: FPGA: Power & Control
12345678910
11 12 13 14
FPGA: POWER + CONTROL
AB05 AB05
RES
5F51
A
B
C
+2V5-STAB
D
+2V5-STAB
E
F
G
H
I
3139 123 6188.2
123
+1V2
+1V2
+2V5
+3V3
+2V5
+2V5
IFA1
30R
30R
5F55
30R
5F54
30R
47u
RES
5F23
30R
5F57
30R
1u0
5F24
30R
RES
IFA5
5F58
30R
2FJ8
5F25
30R
RES
5F26
30R
2FLC
5F53
2FHM
2FHN
4u7
4u7
1u0
100u 4V
10n
2FJ9
2FLD
2FH1
2FHL
2FHP
10n
10n
FF3J
2FLE
4u7
330u 6.3V
10n
2FJA
FF3G
2FHA
2FHT
2FHQ
10n
10n
FF58
2FLF
10n
4u7
10n
2FJB
2FH2
2FJP
2FHR
10n
10n
FF3H
1u0
10n
2FJC
+1V2-PLL
10n
2FH3
10n
2FJD
2FHC
10n
10n
2FJE
2FH4
2FHD
10n
10n
10n
2FJF
2FH5
2FHE
10n
SENSE+1V2-FPGA
cF01
+1V2-FPGA
10n
10n
2FHF
2FHG
10n
10n
2FHH
10n
2FHJ
2FHK
2FGF
10n
10n
10n
10n
2FGG
2FGJ
2FGH
+Vin-FPGA
+2V5out-FPGA
+2V5in-FPGA
2FGN
10n
10n
10n
2FGP
2FGM
IFA2
RES
RES
7F31
EPCS4SI8
3
7
8
10n
VCC
2FJJ
2
SCD
DATA
GND
1
CS_
Φ
DCLK
ASDI
4
nCSO
6
DCLK
5
ASDO
DATA0
nCSO
DCLK
ASDO
DATA0
EPCS16SI16N
IFA3
IFB1
IFB2
IFA4
+3V3
30R
5F52
7F30
7
15
CS
DCLK
ASDI
9
VCC
Φ
SCD
GND
1
2
DATA
10
10n
2FJK
10n
2FJL
ACTIVE SERIAL DEBUG-CONNECTOR
1F05
1
2
3
4
5
6
7
8
9
10
5-147279-2
+2V5
3F14
CONF-DONE
nCONFIG
DATA0
10K
DCLK
nCE
nCSO
ASDO
3
4
NC
5
6
816
11
12
13
NC
14
10n
2FHB
2FHS
FF3K
10n
RESERVED
MP-LED5
MP-LED4
MP-LED3
MP-LED2
MP-LED1
IFB6
IFB5
IFB4
IFB3
470R
SML-310
6F33
3F06
470R
SML-310
3F08
6F34
6F31
3F02
470R
SML-310
3F04
6F32
4567
470R
SML-310
IFB7
6F35
3F10
470R
SML-310
+3V3
3F11
3F83
+2V5 +2V5
+2V5 +2V5
RESERVED
6
7F34-1
1
+3V3
3F81
FF3P
10K
nCONFIG
1u0
10K
3F76
100K
2FJM
FF59
33K
IFA9
IFA7
3
5
7F34-2
BC847BS
4
2FJN
BC847BS
2
1u0
+2V5
1K0
RES
3F05
3F79
TCK
TDO
TMS
TDI
+3V3 +3V3
CONF-DONE
10K
IFA6
1K0
3F73
1K0
3F74
100K
3F78
3F86
1K0
3F82 100R
3F84
3F85
100R
3F75
100K
100R3F80
100R
FF3L
FF3M
FF3N
FF3Q
3K3
SML-310
7F32
BC847BW
3F72
6F30
FF69
2FLG
100p
2FLH
8 9 10 11 12
100p
2FLJ
100p
RES
2FLK
5F49
30R
30R
5F50
10n
2FJ7
1F00
1
2
FOR
3
4
5
DEBUG
6
7
8
9
10
5-147279-2
10n
100p
2FLL
13 14
H_16800_014.eps
180407
1F00 F13
1F05 C12
2FGF B5
2FGG B5
2FGH B5
2FGJ B6
2FGM B6
2FGN B6
2FGP B6
2FH1 A2
2FH2 A3
A
2FH3 A3
2FH4 A3
2FH5 A4
2FHA A3
2FHB B3
2FHC B3
2FHD B4
2FHE B4
2FHF B4
2FHG B4
2FHH B4
B
2FHJ B5
2FHK B5
2FHL B2
2FHM B2
2FHN C2
2FHP C2
2FHQ C3
2FHR C3
2FHS C3
2FHT B3
2FJ7 F13
2FJ8 C2
C
2FJ9 C2
2FJA C3
2FJB C3
2FJC C3
2FJD C3
2FJE C3
2FJF C4
2FJJ C8
2FJK C11
2FJL C11
2FJM F7
2FJN G8
D
2FJP B3
2FLC D2
2FLD D2
2FLE D2
2FLF D3
2FLG H12
2FLH H12
2FLJ H12
2FLK H12
2FLL H12
3F02 G4
E
3F04 G4
3F05 F10
3F06 G5
3F08 G6
3F10 G6
3F11 F7
3F14 D13
3F72 H11
3F73 I10
3F74 I10
3F75 I11
3F76 F7
F
3F78 F10
3F79 F10
3F80 G11
3F81 G9
3F82 G11
3F83 G7
3F84 G11
3F85 G11
3F86 G10
5F23 B2
5F24 C2
5F25 D2
G
5F26 D2
5F49 F12
5F50 F13
5F51 A2
5F52 B10
5F53 A2
5F54 B2
5F55 A2
5F57 B2
5F58 C2
6F30 I11
H
6F31 G4
6F32 G4
6F33 G5
6F34 G6
6F35 G6
7F30 B10
7F31 C8
7F32 I11
7F34-1 G9
7F34-2 G7
FF3G A3
FF3H B3
I
FF3J B3
FF3K C3
FF3L G11
FF3M G11
FF3N G11
FF3P G9
FF3Q G11
FF58 D3
FF59 G7
FF69 G11
IFA1 A1
IFA2 B9
IFA3 C9
IFA4 D9
IFA5 C1
IFA6 I10
IFA7 G8
IFA9 G7
IFB1 C9
IFB2 C9
IFB3 F4
IFB4 F4
IFB5 F5
IFB6 E6
IFB7 E6
cF01 B5
Circuit Diagrams and PWB Layouts
52LC8.2A LA 7.
DFI Panel: FPGA: DFI
1234567891011121314
AB06 AB06
A
B
C
D
CLK-OSC1B
E
F
CLK-OSC2B
MP-LED1
MM1-CKE
CTRL1-IN
CTRL2-IN
SCL-I2C4
SDA-I2C4
MP-LED4
MP-LED2
MP-LED3
COLOR-CLK
MP-LED5
COLOR6
COLOR7
COLOR2
COLOR3
FPGA DFI
1K0
RES
EP2C35F484C7N
3F40
3F49 47R
47R3FA0
7F18-3
M1
M2
M5
M6
N1
N2
P1
P2
N6
N5
N3
N4
P3
P5
P6
R1
R2
T1
T2
P4
R4
CLK2|LVDSCLK1p
CLK3|LVDSCLK1n
IO1|LVDS25p
IO2|LVDS25n
IO3|LVDS24p
IO4|LVDS24n
IO5|LVDS23p
IO6|LVDS23n
IO7|LVDS22p
IO8|LVDS22n
IO9|LVDS20p
IO10|LVDS20n
IO11|VREFB1N0
IO12|LVDS18p
IO13|LVDS18n
IO14|LVDS17p
IO15|LVDS17n
IO16|LVDS14p
IO17|LVDS14n
IO18|LVDS13p
IO19|LVDS13n
BANK1
IO39|PLL1_OUTp
IO40|PLL1_OUTn
IO20|LVDS12p
IO21|LVDS12n
IO22|LVDS10p
IO23|LVDS10n
IO24|LVDS8p
IO25|LVDS8n
IO26|LVDS7p
IO27|LVDS7n
IO28
IO29|VREFB1N1
IO30|LVDS6p
IO31|LVDS6n
IO32|LVDS5p
IO33|LVDS5n
IO34|LVDS2p
IO35|LVDS2n
IO36|LVDS0p
IO37|LVDS0n
IO38
+1V2-FPGA
U1
U2
R5
R6
V1
V2
3FA2 100R
T5
T6
T3
U3
W1
100R
W2
100R 3FA5
Y1
Y2
W3
W4
3FA4 100R
Y3
Y4
W5
U4
V4
IF06
IF01
+2V5-DDR2
+1V2-PLL
7F18-1
EP2C35F484C7N
G7
G8
G12
G16
H7
H8
H12
H13
H16
J10
J11
J12
J13
K8
K9
K14
L7
L8
L9
L14
L16
1K0
RES
3FA8
100R3FA1
3FA6
3FAA
33R
VCCINT1
VCCINT2
VCCINT3
VCCINT4
VCCINT5
VCCINT6
VCCINT7
VCCINT8
VCCINT9
VCCINT10
VCCINT11
VCCINT12
VCCINT13
VCCINT14
VCCINT15
VCCINT16
VCCINT17
VCCINT18
VCCINT19
VCCINT20
VCCINT21
+1V2-FPGA
IF15
IF16
SCL-AMBI-3V3
SDA-AMBI-3V3
CTRL1-FPGA
CTRL2-FPGA
CTRL3-FPGA
CTRL4-FPGA
LCD-PWR-ON
CLK-VIDEO-PLL
E5
U17
VCCD_PLL4
VCCINT22
M9
M14
COLOR0
COLOR1
COLOR8
COLOR9
SS-S0
SS-S1
COLOR5
MM2-CKE
COLOR4
SS-OFF
CLK-VIDEO
U6
F17
U16
VCCA_PLL4
VCCD_PLL1
VCCD_PLL2
VCCD_PLL3
VCCINT24N9VCCINT25
VCCINT26
VCCINT23
M15
N14
E6
U7
F16
VCCA_PLL2
VCCA_PLL3
VCCINT27
VCCINT28
N15
P10
P11
W6
V10
Y11
VCCIO8_4
VCCIO8_5
VCCA_PLL1
VCC
VCCINT30
VCCINT31
VCCINT29
P12
P13
P14
ASDO
nCSO
RXEB+
RXEB-
RXED+
RXEDRXEA+
RXEA-
RXOA+
RXOA-
RXEC+
RXECRXOB+
RXOBRXOE+
RXOERXECLK+
RXECLK-
T9
Y12
AB2
VCCIO8_2
VCCIO8_3
VCCIO7_5
VCCIO8_1
VCCINT32
VCCINT33
VCCINT34
VCCINT35
R7
R8
R10
EP2C35F484C7N
IF02
V13
W17
VCCIO7_3
VCCIO7_4
VCCINT36
VCCINT37
R12
R15
7F18-4
T14
T19
AB21
VCCIO7_1
VCCIO7_2
VCCIO6_4
VCCINT38T7VCCINT39
VCCINT40
R16
T8
C4
IO1|ASDO
C3
IO2|nCSO
D3
IO3|LVDS48p
D4
IO4|LVDS48n
D5
IO5|PLL3_OUTp
D6
IO6|PLL3_OUTn
E3
IO7|LVDS47p
E4
IO8|LVDS47n
C1
IO9|LVDS46p
C2
IO10|LVDS46n
F4
IO11|VREFB2N0
G6
IO12|LVDS43p
G5
IO13|LVDS43n
F3
IO14
D1
IO15|LVDS39p
D2
IO16|LVDS39n
G3
IO17|LVDS38p
H4
IO18|LVDS38n
H5
IO19|LVDS37p
H6
IO20|LVDS37n
E1
IO21|LVDS36p
E2
IO22|LVDS36n
P16
M20
VCCIO6_2
VCCIO6_3
VCCINT41
VCCINT42
T12
T15
VCCIO6_1
VCCIO5_4
VCCIO5_3
VCCIO5_2
VCCIO5_1
VCCIO4_5
VCCIO4_4
VCCIO4_3
VCCIO4_2
VCCIO4_1
VCCIO3_5
VCCIO3_4
VCCIO3_3
VCCIO3_2
VCCIO3_1
VCCIO2_3
VCCIO2_2
VCCIO2_1
VCCIO1_4
VCCIO1_3
VCCIO1_2
VCCIO1_1
BANK2
+2V5-DDR2
+2V5out-FPGA
AA22
L20
J16
G19
B22
G14
E13
D17
C12
A21
G9
E10
C11
C6
A2
L3
J7
B1
T4
P7
M3
AA1
IO23|LVDS35p
IO24|LVDS35n
IO25|VREFB2N1
IO26|LVDS30p
IO27|LVDS30n
IO28|LVDS29p
IO29|LVDS29n
IO30|LVDS28p
IO31|LVDS28n
IO32|LVDS27p
IO33|LVDS27n
IO34|LVDS26p
IO35|LVDS26n
DCLK|DCLK
DATA0|DATA0
CLK0|LVDSCLK0p
CLK1|LVDSCLK0n
nCONFIG
TMS
TDO
F6
GND31
N11
N12
IO23
V5
U5
GNDD_PLL3
GNDG_PLL1
GND
GND32
GND33P8GND34P9GND35
N13
B7
A7
F9
E8
D8
C9
D7
F8
E7
C7
B6
A6
B5
A5
B4
A4
A3
B3
Y8
Y15
W19
GND80
GND81
GND79
GNDD_PLL1
GND37
GND38
GND36
R9
R11
P15
2F37
V17
W10
W13
GND77
GND78
GND39
GND40
R13
R14
T11
VREF-FPGA1
IF41
1n0
GND76
GND41
GND42
T16
V3
T20
GND74V6GND75
GND43
A1
A22
MM1-D17
MM1-D18
MM1-D23
MM1-D21
MM1-D19
MM1-D22
MM1-D16
MM1-A0
MM1-BA1
MM1-A10
MM1-BA0
MM1-RAS
MM1-CS0
MM1-CAS
MM1-WE
T13
GND72
GND73
GND44
GND45
AA2
T10
GND71
GND46
AA21
GND70
GND69
GND68
GND67
GND66
GND65
GND64
GND63
GND62
GND61
GND60
GND59
GND58
GND57
GND56
GND55
GND54
GND53
GND52
GND51
GND50
GND49
GND48
GND47
AB22
R3
N19
N16
N7
M4
K19
K16
K7
K3
H20
G13
G10
G4
F19
D18
D13
D10
C15
C8
C5
B21
B2
AB1
7F18-6
MM1-CLK-
MM1-CLK+
MM1-D13
MM1-D14
MM1-D15
MM1-D12
MM1-A11
MM1-A12
VREF-FPGA1
MM1-D11
MM1-D10
MM1-D9
MM1-D8
MM1-A8
MM1-A9
MM1-DQS1
EP2C35F484C7N
C18
C17
B20
A20
B19
A19
B18
A18
C16
D16
E15
D15
C14
F15
B17
A17
1n0
2F38
IO1|LVDS94n
IO2|LVDS94p
IO3|LVDS93n
IO4|LVDS93p
IO5|LVDS92n
IO6|LVDS92p
IO7|LVDS91n
IO8|LVDS91p
IO9|VREFB4N0
IO10|LVDS89n
IO11|LVDS89p
IO12|LVDS85n
IO13|LVDS85p
IO14|LVDS84p
IO15|LVDS82n
IO16|LVDS82p
BANK4
IO25|VREFB4N1
CLK8|LVDSCLK4n
CLK9|LVDSCLK4p
IO17|LVDS80n
IO18|LVDS80p
IO19|LVDS79n
IO20|LVDS79p
IO21|LVDS78n
IO22|LVDS78p
IO23|LVDS77n
IO24|LVDS77p
IO26|LVDS75n
IO27|LVDS73n
IO28|LVDS73p
IO29|LVDS71n
IO30|LVDS71p
E14
D14
F14
F13
B16
A16
B15
A15
C13
F12
B14
A14
B13
A13
B12
A12
2F39
IF03
1n0
IF38
VREF-FPGA1
CLK-SYSTEM-SS
MM1-D4
MM1-D5
MM1-D6
MM1-D0
MM1-D1
MM1-D2
MM1-D3
MM1-D7
MM1-A6
MM1-A7
MM1-A5
MM1-DQS0
CLK-OSC1A
G11
GND1
G15
GND2
H9
GND3
H10
GND4
H11
GND5
H14
GND6
H15
GND7
J8
GND8
J9
GND9
J14
GND10
J15
GND11
K10
GND12
K11
GND13
K12
GND14
K13
GND15
K15
GND16
L10
GND17
L11
GND18
L12
GND19
L13
GND20
L15
GND21
M7
GND22
M8
GND23
D12
CLK10|LVDSCLK5n
E12
CLK11|LVDSCLK5p
B11
IO1|LVDS70n
A11
IO2|LVDS70p
E11
IO3|LVDS69n
D11
IO4|LVDS69p
B10
IO5|LVDS68n
A10
IO6|LVDS68p
F11
IO7|LVDS67n
F10
IO8|LVDS67p
C10
IO9|VREFB3N0
B9
IO10|LVDS65n
A9
IO11|LVDS65p
E9
IO12|LVDS62n
D9
IO13|LVDS62p
B8
IO14|LVDS60n
A8
IO15|LVDS60p
V7
GNDA_PLL1
GND24
M10
T17
V16
V18
GNDA_PLL4
GNDD_PLL4
GND26
GND25
M12
M13
M11
BANK3
F18
E16
E17
GNDA_PLL2F7GNDA_PLL3
GNDD_PLL2
GNDG_PLL2F5GNDG_PLL3
GNDG_PLL4
GND27
GND28N8GND29
GND30
M16
N10
IO16|LVDS59n
IO17|LVDS59p
IO18|LVDS58n
IO19|LVDS58p
IO20|LVDS57n
IO21|LVDS57p
IO22|LVDS56p
IO24|LVDS54p
IO25|VREFB3N1
IO26|LVDS52n
IO27|LVDS52p
IO28|LVDS51n
IO29|LVDS51p
IO30|LVDS50n
IO31|LVDS50p
IO32|LVDS49p
IO33|LVDS49n
7F18-2
EP2C35F484C7N
+2V5out-FPGA
+2V5-DDR1
+2V5in-FPGA
+Vin-FPGA
7F18-5
VREF-FPGA1
EP2C35F484C7N
9F02
1n0
2F36
F1
RXEE+
F2
RXEEH3
G1
G2
J6
J5
H1
RXOC+
H2
RXOC-
J3
J4
J1
RXOD+
J2
RXOD-
K5
TDI
K2
TCK
K6
L5
L6
K4
K1
nCE
L1
L2
L4
TDI
TCK
TMS
TDO
DCLK
DATA0
RXOCLK+
RXOCLKnCONFIG
nCE
PLL2-OUT
MM1-A4
MM1-DQS3
MM1-D29
MM1-D27 MM1-D20
MM1-D28
MM1-D25
MM1-D26
MM1-D24
MM1-D31
MM1-D30
MM1-A3
MM1-A2
MM1-A1
MM1-DQS2
A
B
C
D
E
F
2F36 F8
2F37 F10
2F38 F12
2F39 F13
2F40 I8
2F41 I10
2F42 I12
2F43 I13
3F40 E1
3F49 E1
3FA0 E1
3FA1 E3
3FA2 E3
3FA4 F3
3FA5 F3
3FA6 F3
3FA7 H7
3FA8 E3
3FAA F4
7F18-1 A4
7F18-10 G12
7F18-2 A8
7F18-3 E2
7F18-4 E5
7F18-5 E8
7F18-6 E12
7F18-7 G2
7F18-8 G5
7F18-9 G8
9F00 H14
9F01 G1
9F02 E8
9F03 G1
9F04 H7
9F05 I7
9F06 I7
9F07 H14
IF01 F3
IF02 E5
IF03 F13
IF04 I3
IF05 H5
IF06 F3
IF15 E4
IF16 E4
IF26 H5
IF27 I5
IF31 I7
IF36 G8
IF38 E14
IF39 G14
IF40 H8
IF41 F10
G
PLL2-OUT
CLK-VIDEO-SS
TX3F-
TX3F+
TX2D-
TX2D+ TX1CLK+
TX2CLKTX2CLK+
H
TX2F-
TX2F+
TX2E-
TX2E+
TX2C-
TX2C+
I
3139 123 6188.2
7F18-7
EP2C35F484C7N
L21
9F03
L22
9F01
RES
L19
L18
K21
K22
J21
J22
L17
K17
H21
H22
K18
J20
H19
K20
J19
J18
J17
G21
G22
BANK5
CLK5|LVDSCLK2n
CLK4|LVDSCLK2p
IO1|LVDS120n
IO2|LVDS120p
IO3|LVDS119n
IO4|LVDS119p
IO5|LVDS118n
IO6|LVDS118p
IO7|LVDS117n
IO8|LVDS117p
IO9|LVDS116n
IO10|LVDS116p
IO11
IO12|LVDS114n
IO13|LVDS114p
IO14|VREFB5N1
IO15|LVDS111n
IO16|LVDS111p
IO17
IO18|LVDS109n
IO19|LVDS109p
IO20|LVDS107n
IO21|LVDS107p
IO22|LVDS106n
IO23|LVDS106p
IO24|LVDS104n
IO25|LVDS104p
IO26|LVDS103n
IO27|LVDS103p
IO28|LVDS102n
IO29|LVDS102p
IO30|VREFB5N0
IO31|LVDS100n
IO32|LVDS100p
IO33|LVDS99n
IO34|LVDS99p
IO35|LVDS96n
IO36|LVDS96p
IO37|LVDS95n
IO38|LVDS95p
IO39|PLL2_OUTp
IO40|PLL2_OUTn
F21
F22
H18
H17
E21
E22
D21
D22
G17
G18
G20
E20
F20
C21
C22
C19
C20
D19
D20
E19
E18
TX2B-
TX2B+
TX1F-
TX1F+
TX1CLK-
TX1C-
TX1C+
TX1E-
TX1E+
TX2A-
TX2A+
TX1A-
TX1A+
TX1B-
TX1B+
TX1D-
TX1D+
PLL2-OUT
IF04
TX4FTX4F+
TX4ETX4E+
TX4BTX4B+
TX4CLK-
TX4CLK+
TX4DTX4D+
TX4CTX4C+
TX4A-
TX4A+
TX3E-
EP2C35F484C7N
IF05
IF26
IF27
1234
7F18-10
MM2-A11
MM2-CLK+
MM2-CLK-
MM2-A7
MM2-A6
MM2-A8
MM2-A9
VREF-FPGA2
MM2-A5
MM2-D14
MM2-D13
MM2-D10
MM2-D11
MM2-D9MM2-D17
MM2-D8
MM2-D12
MM2-D15
EP2C35F484C7N
AA3
AB3
AB4
AA4
Y5
Y6
AB5
AA5
Y7
U8
AB6
AA6
V8
W7
W8
V9
AB7
AA7
100n
2F42
IO1|LVDS188n
IO2|LVDS188p
IO3|LVDS187p
IO4|LVDS187n
IO5|LVDS186p
IO6|LVDS186n
IO7|LVDS185p
IO8|LVDS185n
IO9|VREFB8N1
IO10|LVDS183p
IO11|LVDS181p
IO12|LVDS181n
IO13|LVDS180p
IO14|LVDS180n
IO15|LVDS179p
IO16|LVDS179n
IO17|LVDS178p
IO18|LVDS178n
BANK8
IO19|LVDS177p
IO20|LVDS177n
IO21|LVDS175p
IO22|LVDS175n
IO23|LVDS172p
IO24|LVDS172n
IO25|VREFB8N0
IO26|LVDS170p
IO27|LVDS170n
IO28|LVDS169p
IO29|LVDS169n
IO30|LVDS168p
IO31|LVDS168n
IO32|LVDS167p
IO33|LVDS167n
CLK15|LVDSCLK7p
CLK14|LVDSCLK7n
AB10
AA10
AB11
AA11
Y9
W9
U9
2F43
IF39
VREF-FPGA2
9F07
9F00
100n
U10
AB8
AA8
Y10
AB9
AA9
W11
V11
U11
U12
MM2-DQS1MM2-A12
MM2-A4
MM2-A3
MM2-D1
MM2-D0
MM2-D3
MM2-D2
MM2-D6
MM2-D7
MM2-D4
MM2-D5
MM2-DQS0
MM2-A2
CLK-VIDEO-PLL
CLK-VIDEO-SS
H_16800_015.eps
180407
7F18-8
Y18
V19
W20
Y19
Y20
W18
U18
T18
U19
V20
U20
W21
W22
R17
Y21
Y22
V21
V22
U21
U22
R18
M22
BANK6
IO1
IO2|LVDS142n
IO3|LVDS142p
IO4|LVDS141n
IO5|LVDS141p
IO6
IO7|PLL4_OUTn
IO8|PLL4_OUTp
IO9|LVDS140n
IO10|LVDS140p
IO11|VREFB6N1
IO12|LVDS137n
IO13|LVDS137p
IO14|LVDS135p
IO15|LVDS133n
IO16|LVDS133p
IO17|LVDS132n
IO18|LVDS132p
IO19|LVDS131n
IO20|LVDS131p
IO21|LVDS130n
CLK6|LVDSCLK3p
IO22|LVDS130p
IO23|LVDS129n
IO24|LVDS129p
IO25|LVDS127n
IO26|LVDS127p
IO27|LVDS126n
IO28|LVDS126p
IO29|VREFB6N0
IO30|LVDS124n
IO31|LVDS124p
IO32|LVDS123n
IO33|LVDS123p
nSTATUS
CONF_DONE
MSEL1
MSEL0
IO34|LVDS122n
IO35|LVDS122p
IO36|LVDS121n
IO37|LVDS121p
CLK7|LVDSCLK3n
7F18-9
MM2-DQS3
MM2-A1
MM2-A0
MM2-D26
VREF-FPGA2
MM2-D24
MM2-D27
MM2-D25
MM2-D28
MM2-D30
MM2-D31
MM2-D29
MM2-A10
EP2C35F484C7N
IF36
IF40
2F40
100n
W12
V12
AB12
AA12
AB13
AA13
U13
Y13
AB14
AA14
AB15
AA15
AB16
AA16
W14
V14
BANK7
CLK13|LVDSCLK6p
CLK12|LVDSCLK6n
IO1|LVDS166p
IO2|LVDS166n
IO3|LVDS164p
IO4|LVDS164n
IO5|LVDS162n
IO6|VREFB7N1
IO7|LVDS160p
IO8|LVDS160n
IO9|LVDS159p
IO10|LVDS159n
IO11|LVDS158p
IO12|LVDS158n
IO13|LVDS157p
IO14|LVDS157n
IO15|LVDS155p
IO16|LVDS155n
IO17|LVDS153p
IO18|LVDS152p
IO19|LVDS152n
IO20|LVDS148p
IO21|LVDS148n
IO22|VREFB7N0
IO23|LVDS146p
IO24|LVDS146n
IO25|LVDS145p
IO26|LVDS145n
IO27|LVDS144p
IO28|LVDS144n
IO29|LVDS143p
IO30|LVDS143n
AB17
AA17
AB18
AA18
AB19
AA19
AB20
AA20
MM2-DQS2
2F41
MM2-RAS
MM2-BA1
MM2-D23
MM2-D22
MM2-D19
MM2-D18
VREF-FPGA2
MM2-CS0
MM2-BA0
MM2-D21
MM2-D20
MM2-D16
MM2-CAS
MM2-WE
100n
U14
Y14
W15
Y16
U15
V15
Y17
W16
R19
P17
P18
T21
T22
R21
R22
R20
P20
P19
P21
P22
N20
N18
N17
M17
N21
N22
M19
M18
M21
IF31
9F04
3FA7
10K
TX3E+
TX3D-
TX3D+
TX3CLKTX3CLK+
TX3C-
TX3C+
nSTATUS
CONF-DONE
MSEL1
TX3B+
TX3A+
RES
9F05
9F06
+3V3
+3V3
TX3B-
TX3A-
5 6 7 8 9 1011121314
G
H
I
Circuit Diagrams and PWB Layouts
53LC8.2A LA 7.
DFI Panel: DDR A
123
456789101112
DDR A
AB07 AB07
A
9
15
Φ
DDR
SDRAM
2Mx16
12
52
+2V5-DDR1
+2V5-DDR1
33
3
VDD
VSS
6
66
7CA3
EDD1216AATA-5B-E
1
18
0
1
2
3
4
5
6
A
7
8
9
10
11
AP
0
BA
L
DM
U
VREF
CLK
CLK
CKE
CS
RAS
CAS
WE
34
48
10n
10n
2F5L
2F5M
29
30
31
32
35
36
37
38
39
40
28
41
26
27
47
49
46
45
44
24
23
22
21
100n2F5N
VREF-DDR1
3F4F
220R
MM1-CLK+
MM1-A0
MM1-A1
MM1-A2
MM1-A3
MM1-A4
MM1-A5
MM1-A6
MM1-A7
MM1-A8
MM1-A9
MM1-A10
MM1-A11
MM1-BA0
MM1-BA1
MM1-CLK-
MM1-CKE
MM1-CS0
MM1-RAS
MM1-CAS
MM1-WE
G
10n
10n
2F5B
2F5A
B
C
D
MM1-A0
MM1-A1
MM1-A2
MM1-A3
MM1-A4
MM1-A5
MM1-A6
MM1-A7
MM1-A8
MM1-A9
MM1-A10
MM1-A11
MM1-BA0
MM1-BA1
VREF-DDR1
MM1-CLK-
MM1-CLK+
MM1-CKE
MM1-CS0
MM1-RAS
MM1-CAS
MM1-WE
EDD1216AATA-5B-E
2F5P
100n
3F4A
220R
+2V5-DDR1
7CA2
11833391555
VDD
29
0
30
1
31
2
32
3
35
4
36
5
37
6
A
38
7
39
8
40
9
28
10
41
11
AP
26
0
BA
27
L
DM
47
U
49
VREF
46
CLK
45
CLK
44
CKE
24
CS
23
RAS
22
CAS
21
WE
VSS
344866612
Φ
DDR
SDRAM
2Mx16
+2V5-DDR1
VDDQ
VSSQ
52
+2V5-DDR1
10n
10n
10n
2F5H
10n
61
14
17
19
25
NC
43
50
53
42
2
0
4
1
5
2
7
3
8
4
10
5
11
6
13
D
71
54
8
5620
9
57
10
59
11
60
12
62
13
63
14
65
15
16
L
51
DQS
U
58
64
10n
2F5D
2F5C
DQ1(0)
DQ1(1)
DQ1(2)
DQ1(3)
DQ1(4)
DQ1(5)
DQ1(6)
DQ1(7)
DQ1(8)
DQ1(9)
DQ1(10)
DQ1(11)
DQ1(12)
DQ1(13)
DQ1(14)
DQ1(15)
DQS10 DQS10
DQS11
2F5E
10n
DQ1(0)
DQ1(1)
DQ1(2)
DQ1(3)
DQ1(4)
DQ1(5)
DQ1(6)
DQ1(7)
DQ1(8)
DQ1(9)
DQ1(10)
DQ1(11)
DQ1(12)
DQ1(13)
DQ1(14)
DQ1(15)
DQS11
2F5F
10u
3F4G
22R
3F4H
22R
3F4J
22R
3F4K
22R
3F4L
22R
3F4M
22R
3F4N
22R
3F4P
22R
3F4Q
22R
3F4R
22R
3F4S
22R
3F4T
22R 22R
3F4U
22R
3F4V
22R
3F4W
22R
3F4Y
22R
3F4Z
22R
3F5A
MM1-DQS0
22R
MM1-DQS1
MM1-D3
MM1-D2
MM1-D1
MM1-D0
MM1-D4
MM1-D5
MM1-D6
MM1-D7
MM1-D8
MM1-D9
MM1-D10
MM1-D11
MM1-D12
MM1-D13
MM1-D14
MM1-D15
MM1-A12MM1-A12
MM1-D17
MM1-D20
MM1-D23
MM1-D26
MM1-D29
2F5G
3F5B
3F5C
3F5D
3F5E
3F5F
3F5G
3F5H
3F5J
3F5K
3F5L
3F5M
3F5N
3F5P
3F5Q
3F5R
3F5S
3F6D 22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R3F5T
2F5J
2F5K
DQ1(16)MM1-D16
DQ1(17)
DQ1(18)MM1-D18
DQ1(19)MM1-D19
DQ1(20)
DQ1(21)MM1-D21
DQ1(22)MM1-D22
DQ1(23)
DQ1(24)MM1-D24
DQ1(25)MM1-D25
DQ1(26)
DQ1(27)MM1-D27
DQ1(28)MM1-D28
DQ1(29)
DQ1(30)MM1-D31
DQ1(31)MM1-D30
DQS12MM1-DQS2
DQS13MM1-DQS3
10u
55
61
DQ1(16)
DQ1(17)
DQ1(18)
DQ1(19)
DQ1(20)
DQ1(21)
DQ1(22)
DQ1(23)
DQ1(24)
DQ1(25)
DQ1(26)
DQ1(27)
DQ1(28)
DQ1(29)
DQ1(30)
DQ1(31)
DQS12
DQS13
14
17
19
25
43
50
53
42
2
4
5
7
8
10
11
13
54
56 20
57
59
60
62
63
65
16
51
VDDQ
NC
0
1
2
3
4
5
6
D
71
8
9
10
11
12
13
14
15
L
DQS
U
VSSQ
58
64
E
F
+2V5-DDR1
3F4B
560R560R
2F5U
100n
2F5Q
RES
100p
5F27
220R
5F28
220R
2F5R
3F4C
+2V5
H
SENSE+2V5
cF02
2F5T
6.3V330u
100n
2F5S
IFD5
2F5W
IFD4
1u0
10n
2F5Y
VREF-DDR1
2F5Z
10n
16V22u
2F6A
+2V5-DDR1
560R
3F4D
FF56
1u0
2F6E
2F6C
10n
10n
2F6D
10n
10n
2F6B
2F6F
100n
2F6G
2FLM
100p
3F4E
10n
2FLN
560R
10n
VREF-FPGA1
10n
2FLP
2FLR
10n
2FLS
2FLT
2FLU
2FLV
10n
10n
10n
10n
A
B
C
D
E
F
G
H
2F5A B2
2F5B B2
2F5C B5
2F5D B5
2F5E B5
2F5F B5
2F5G B7
2F5H B7
2F5J B7
2F5K B8
2F5L B10
2F5M B11
2F5N C10
2F5P C2
2F5Q G4
2F5R G4
2F5S G4
2F5T H3
2F5U H3
2F5W H4
2F5Y H4
2F5Z H5
2F6A H5
2F6B H5
2F6C H6
2F6D H6
2F6E G6
2F6F G6
2F6G G6
2FLM H6
2FLN H7
2FLP H7
2FLR H7
2FLS H8
2FLT H8
2FLU H8
2FLV H8
3F4A D2
3F4B F3
3F4C G3
3F4D F7
3F4E G7
3F4F D10
3F4G C5
3F4H C5
3F4J C5
3F4K C5
3F4L C5
3F4M C5
3F4N C5
3F4P C5
3F4Q C5
3F4R C5
3F4S C5
3F4T C5
3F4U D5
3F4V D5
3F4W D5
3F4Y D5
3F4Z D5
3F5A D5
3F5B C7
3F5C C7
3F5D C7
3F5E C7
3F5F C7
3F5G C7
3F5H C7
3F5J C7
3F5K C7
3F5L C7
3F5M C7
3F5N C7
3F5P D7
3F5Q D7
3F5R D7
3F5S D7
3F5T D7
3F6D D7
5F27 H4
5F28 H4
7CA2 B3
7CA3 B10
FF56 F6
IFD4 F4
IFD5 H4
cF02 H2
I
3139 123 6188.2
12
345678910
11 12
H_16800_016.eps
180407
I
Circuit Diagrams and PWB Layouts
54LC8.2A LA 7.
DFI Panel: DDR B
123456
AB08 AB08
DDR B
A
7CA0
29
30
31
32
35
36
37
38
39
40
28
41
26
27
47
49
46
45
44
24
23
22
21
+2V5-DDR2
1
18333915
VDD
0
1
2
3
4
5
A
6
7
8
9
10
11
AP
0
BA
L
DM
U
VREF
CLK
CLK
CKE
CS
RAS
CAS
WE
VSS
344866
10n
10n
2V39
2V42
EDD1216AATA-5B-E
B
C
D
MM2-A0
MM2-A1
MM2-A2
MM2-A3
MM2-A4
MM2-A5
MM2-A6
MM2-A7
MM2-A9
MM2-A10
MM2-A11
MM2-BA0
MM2-BA1
VREF-DDR2
MM2-CLK-
MM2-CLK+
MM2-CKE
MM2-CS0
MM2-RAS
MM2-CAS
MM2-WE
2V00 100n
3CE2
220R
Φ
DDR
SDRAM
2Mx16
6
+2V5-DDR2
VDDQ
VSSQ
125258
2V41
10n
10n
2CBD
2CBC
DQ2(0)
DQ2(1)
DQ2(2)
DQ2(3)
DQ2(4)
DQ2(5)
DQ2(6)
DQ2(7)
DQ2(8)
DQ2(9)
DQ2(10)
DQ2(11)
DQ2(12)
DQ2(13)
DQ2(14)
DQ2(15)
DQS20
DQS21
3CA0
3CA1
3CA2
3CA3
3CA4
3CA5
3CA6
3CA7
3CA8
3CA9
3CB0
3CB1
3CB2
3CB3
3CB4
3CB5
3CB6
3CB7
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
MM2-A12 MM2-A12
MM2-D3
MM2-D16
MM2-D2
MM2-D17
MM2-D1
MM2-D18
MM2-D0
MM2-D19
MM2-D4
MM2-D20
MM2-D5
MM2-D21
MM2-D6
MM2-D22
MM2-D7
MM2-D23
MM2-D8
MM2-D24
MM2-D9
MM2-D10
MM2-D11
MM2-D12
MM2-D13
MM2-D14
MM2-D15
MM2-DQS1
MM2-D25
MM2-D26
MM2-D27
MM2-D28
MM2-D29
MM2-D31
MM2-D30
MM2-DQS2MM2-DQS0
MM2-DQS3
55
61
14
17
19
25
NC
43
50
53
42
2
0
4
1
5
2
7
3
8
4
10
5
11
6
13
D
71
54
8
5620
9
57
10
59
11
60
12
62
13
63
14
65
15
16
L
51
DQS
U
64
2V40
10n
DQ2(0)
DQ2(1)
DQ2(2)
DQ2(3)
DQ2(4)
DQ2(5)
DQ2(6)
DQ2(7)
DQ2(8)
DQ2(9)
DQ2(10)
DQ2(11)
DQ2(12)
DQ2(13)
DQ2(14)
DQ2(15)
DQS20
DQS21
10u
E
+2V5-DDR2
F
560R
3CD6
3CD7
560R
2V45
100p
2V33
100n
2V46
FF91
1u0
VREF-DDR2
G
ICA0
100n
RES
5V01
220R
5V02
220R
2V04
16V22u
2V34
1n0
100p
2V05
2V52
10n
10n
2V53
2V54
10n
10n
2V55
10n
2FLY
2FLW
+2V5
6.3V
2V03
2V35
H
330u
7 8 9 10 11 12
9
15
Φ
DDR
SDRAM
2Mx16
12
52
+2V5-DDR2
3
33
VDD
VSS
6
66
+2V5-DDR2
7CA1
EDD1216AATA-5B-E
1
18
0
1
2
3
4
5
A
6
7
8
9
10
11
AP
0
BA
L
DM
U
VREF
CLK
CLK
CKE
CS
RAS
CAS
WE
34
48
10n
10n
2V50
2V51
29
30
31
32
35
36
37
38
39
40
28
41
26
27
47
49
46
45
44
24
23
22
21
3CD8
100n2V01
VREF-DDR2
3CE1
560R
FF92
MM2-A0
MM2-A1
MM2-A2
MM2-A3
MM2-A4
MM2-A5
MM2-A6
MM2-A7
MM2-A8
MM2-A9
MM2-A10
MM2-A11
MM2-BA0
MM2-BA1
MM2-CLK-
220R
MM2-CLK+
MM2-CKE
MM2-CS0
MM2-RAS
MM2-CAS
MM2-WE
VREF-FPGA2
+2V5-DDR2
22R3CD4
22R3CD5
2V44
10n
2CBH
2FGB
2CBK
DQ2(16)MM2-A8
DQ2(17)
DQ2(18)
DQ2(19)
DQ2(20)
DQ2(21)
DQ2(22)
DQ2(23)
DQ2(24)
DQ2(25)
DQ2(26)
DQ2(27)
DQ2(28)
DQ2(29)
DQ2(30)
DQ2(31)
DQS22
DQS23
10n
2FGC
10u
55
61
DQ2(16)
DQ2(17)
DQ2(18)
DQ2(19)
DQ2(20)
DQ2(21)
DQ2(22)
DQ2(23)
DQ2(24)
DQ2(25)
DQ2(26)
DQ2(27)
DQ2(28)
DQ2(29)
DQ2(30)
DQ2(31)
DQS22
DQS23
10n
14
17
19
25
43
50
53
42
2
4
5
7
8
10
11
13
54
56 20
57
59
60
62
63
65
16
51
10n
10n
2FGE
2FGD
VDDQ
NC
0
1
2
3
4
5
6
D
71
8
9
10
11
12
13
14
15
L
DQS
U
VSSQ
58
64
+2V5-DDR2
10n
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
10n
10n
2V43
3CB8
3CB9
3CC0
3CC1
3CC2
3CC3
3CC4
3CC5
3CC6
3CC7
3CC8
3CC9
3CD0
3CD1
3CD2
3CD3
10n
10n
2FLZ
2FGA
A
B
C
D
E
F
G
H
2CBC B5
2CBD B5
2CBH B7
2CBK B7
2FGA H7
2FGB H7
2FGC H8
2FGD H8
2FGE H8
2FLW H6
2FLY H6
2FLZ H7
2V00 C2
2V01 C10
2V03 H3
2V04 H4
2V05 H4
2V33 G4
2V34 H4
2V35 H3
2V39 B2
2V40 B4
2V41 B5
2V42 B2
2V43 B7
2V44 B7
2V45 G3
2V46 G4
2V50 B10
2V51 B10
2V52 H5
2V53 H5
2V54 H6
2V55 H6
3CA0 C5
3CA1 C5
3CA2 C5
3CA3 C5
3CA4 C5
3CA5 C5
3CA6 C5
3CA7 C5
3CA8 C5
3CA9 C5
3CB0 C5
3CB1 C5
3CB2 C5
3CB3 D5
3CB4 D5
3CB5 D5
3CB6 D5
3CB7 D5
3CB8 C7
3CB9 C7
3CC0 C7
3CC1 C7
3CC2 C7
3CC3 C7
3CC4 C7
3CC5 C7
3CC6 C7
3CC7 C7
3CC8 C7
3CC9 C7
3CD0 C7
3CD1 D7
3CD2 D7
3CD3 D7
3CD4 D7
3CD5 D7
3CD6 F3
3CD7 G3
3CD8 H10
3CD9 H10
3CE1 D10
3CE2 D2
5V01 G4
5V02 H4
7CA0 B3
7CA1 B10
FF91 F4
FF92 H10
ICA0 G4
I
3139 123 6188.2
560R
3CD9
1 34567891011
2
H_16800_017.eps
12
I
180407
Circuit Diagrams and PWB Layouts
55LC8.2A LA 7.
DFI Panel: Display Interfacing
1F04 D11
1F80 G13
1F81 G14
1F82 G14
1F83 G14
1M59 F15
2F2A D5
2F2B D3
2F2C B11
2F2D A12
2F2E F5
2F2F F6
2F2G F6
2F2H F5
2F2I B6
2F2K C13
2F2L C14
2F2P E11
2F2Q F11
2F30 G12
2F32 H9
2F33 F9
2F34 B8
2F35 C8
2F45 F12
2F46 D2
2F53 G2
2F78 F2
2F95 B1
3F13 G10
3F15 H12
3F16 H12
3F17 F10
3F18 B2
3F19 B8
3F1W C3
3F1Y D4
3F1Z D6
3F20 C8
3F21 D5
3F22 D3
3F23 B12
3F24 B11
3F25 E6
3F27 F5
3F28 F5
3F29 F5
3F2A E5
3F2B E5
3F2C E6
3F2D B6
3F2F E5
3F2S B13
3F2T B13
123456789101112131415
AB09 AB09
DISPLAY-INTERFACING
A
+12V
+12V-SSB
B
C
+5V
D
100n
2F95
6F09
BZX384-C4V7
LCD-PWR-ON
5F10
220R
5F11 RES
220R
5F12
220R
1u0
FF2P
2F46
RES
RES
9F2I
7F07
RES
330R
3F48
6F10
3F18
4K7
SML-310
SI4835BDY
*
7F05
*
3F1W
*
47K
6F02
*
BZX384-C5V6
IF0H
2F2B
1u0
*
SI3441BDV
IF07
IF93
3F22
47R
*
VDISP-SWITCH
*
3F31
47R
3F1Y
47K
IF08
7F08
*
IF0F
2
3
BC847BW
IF0A
1
*
IF0G
E
CTRL1-FPGA
CTRL2-FPGA
CTRL3-FPGA
F
G
H
CTRL4-FPGA
CTRL-SSB1
CTRL-SSB2
CTRL2-IN
CTRL1-IN
SCL-AMBI-3V3
SDA-AMBI-3V3
IF0K
IF0L
IF0M
IF0N
IFD7
RES
3FJD
47R
100p
2F78
RES
3FLB
RES
47R
100p
2F53
RES
IF0P
9F2R
9F2S
9F24
9F2T
*
*
*
3F2F
47R
3F27
47R
3F28
47R
3F29
47R
*
*
*
*
3139 123 6188.2
12345
3F2V
3F21
3F2V E5
3F31 E3
3F37 G11
3F38 F11
3F39 F11
3F3A G11
5F0K
220R
5F0L
220R
5F0M
220R
3F2D
2K2
IF09
*
10K
100n
2F2A
*
3F3B F11
3F3C G11
3F44 F12
3F45 G12
3F48 D2
3FH4 D10
3FH5 D11
3FJD F2
3FLB G2
5F0I B10
5F0J A10
5F0K B6
5F0L B6
5F0M B6
5F10 B2
5F11 B2
5F12 B2
5F13 F13
5F14 F13
5F15 F13
5F16 G13
5F17 G13
6F02 C3
6F04 B13
6F05 B12
6F07 B6
6F09 D1
6F10 B2
7F05 C4
7F07 B4
7F08 C5
7F09-1 F11 FF08 F13
7F09-2 G11
7F10 B10
9F16 H12
9F24 H3
*
*
3F1Z
10K
*
FF1B
2F2I
*
100n
SML-310
6F07
+VDISP
+3V3
SDA-I2C4-SSB
SCL-I2C4-SSB
*
2F34
2F35
3F19
SDA-I2C4
47R
10p
3F20
SCL-I2C4
47R
10p
*
10K
+3V3
+3V3
SDA-I2C4
SCL-I2C4
9F26 H12
9F27 E13
9F28 F13
9F29 F13
9F2F C11
9F2G D11
+3V3
+5V
9F2H B11
9F2I B4
9F2N F11
9F2P G11
9F2R F3
9F2S G3
IF0S
RES
RES
IF0T
5F0J
120R
5F0I
120R
7F10
PCA9515ADP
RES
3SDA0 6SDA1
2SCL0 7SCL1
5EN
3FH4
9F2T H3
9F2U D11
9F2V E11
9F30 G13
9F31 G13
FF06 F12
RES
47R
3FH5
+5V
+3V3
IF0B
VCC
GND
9F2F
9F2G
47R
8
NC
4
RES
FF07 F12
FF09 H12
FF13 H13
FF17 E6
FF18 F6
FF19 F6
FF1A F6
FF1B B6
FF2P C2
IF07 D4
IF08 B4
I2C-BUFFER
9F2H
RES
100n
3F24
2F2C
RES
RES
1
IF0C
1F04
9F2U
9F2V
RES
56
RES
2F2D
RES
4K7
4K7
3F23
RES
1
FOR
2
3
DEBUG
4
*
100n
IF09 D5
IF0A D5
IF0B B11
IF0C C11
IF0D B12
IF0E B13
6F05
BAV99 COL
IF0D
IF0F C4
IF0G E4
IF0H D3
IF0K E2
IF0L F2
IF0M F2
RES
IF0E
3F2T
47R
IF0N F2
IF0P G2
IF0S B10
IF0T B10
IF18 F11
IF19 F11
BAV99 COL
2F2K
6F04
IF1A F11
IF1B G11
IF1C G11
IF1D G11
IF93 C3
IFD7 F2
RES
3F2S
47R
10p
2F2L
SDA-I2C4-DISP
SCL-I2C4-DISP
10p
AMBI-LIGHT BUFFER *
3F2A
2F2E
47R
3F2B
*
*
100p
2F2H
*
*
4K7
47R
47R
3F25
100p
3F2C
2F2G
FF17
*
*
FF18
FF19
FF1A
100p
100p
2F2F
*
*
6
CTRL-DISP1
CTRL-DISP2
CTRL-DISP3
CTRL-DISP4
7
2F2P
470p
3F39
10K
7F09-1
BC847BS
4K7
3F3B
IF19
2F2Q
470p
3F3A
10K
7F09-2
BC847BS
4K7
3F3C
IF1C
CTRL-SSB3
SCL-AMBI-3V3
CTRL-SSB4
SDA-AMBI-3V3
2F33
2F32
+3V3
3F17
47R
RES
100p
RES
3F13
RES
100p
RES
+3V3
47R
8 9 10 11
9F27
+5V
IF18
2
2K2
3F38
6
1
9F2N
12
RES
IF1B
5
4
9F2P
RES
3F44
FF06
IF1A
100R
+5V
2K2
3F37
3F45
3
100R
IF1D
+5V
+5V
2F45
100p
3F15
100R
9F16
3F16
100R
9F26
FF07
FF08
100p
2F30
RES
FF09
RES
FF13
5F13
120R
9F28
5F14
120R
9F29
5F15
120R
9F30
5F16
120R
9F31
5F17
120R
1F80
1F81
1F82
1F83
1M59
1
2
3
4
5
7
6
B5B-PH-SM4-TBT(LF)
12 13 14 15
TO
AMBI
LIGHT
H_16800_018.eps
180407
A
B
C
D
E
F
G
H
Circuit Diagrams and PWB Layouts
56LC8.2A LA 7.
DFI Panel: FPGA Ambilight
1234567
7F65-2
A7
A12
B4
D9
A14
B14
A13
B13
E11
D11
B11
C11
E10
D10
F9
E9
A9
A10
D8
C8
F8
E8
D7
E7
D6
C6
XC3S250E-4FTG256C
BANK0
IO
IO
VREF_0
IO_L01N_0
IO_L01P_0
IO_L03N_0
VREF_0
IO_L03P_0
IO_L04N_0
IO_L04P_0
IO_L05N_0
VREF_0
IO_L05P_0
IO_L06N_0
IO_L06P_0
IO_L08N_0
GCLK5
IO_L08P_0
GCLK4
IO_L09N_0
GCLK7
IO_L09P_0
GCLK6
IO_L11N_0
GCLK11
IO_L11P_0
GCLK10
IO_L12N_0
IO_L12P_0
IO_L14N_0
VREF0
IO_L14P_0
IO_L15N_0
IO_L15P_0
Φ
IO_L17N_0
VREF_0
IO_L17P_0
IO_L18N_0
IO_L18P_0
IO_L19N_0
HSWAP
IO_L19P_0
IP_L02N_0
IP_L02P_0
IP_L07N_0
IP_L07P_0
IP_L10N_0
GCLK9
IP_L10P_0
GCLK8
IP_L16N_0
IP_L16P_0
V CCO_0
A4
*
A5
C4
C5
B3
C3
C12
D12
C9
C10
B8
A8
E6
D5
A3
B6
B10
IP
C13
B7
C7
NC
B5
B12
F7
F10
AB10 AB10
A
B
C
FPGA AMBILIGHT
+2V5
+1V2
+3V3
+2V5
5F31
120R
10n
100n
2F61
2F60
5F34
120R
5F32
RES
120R
100n
2F74
2F75
5F33
120R
100n
2F31
2F29
9F52
IF12
9F53
9F54
RES
RES
LD1117DT12
32
10n
RES
2F22
10n
2F20
2F62
7F01
COM
2F25
RES
2F63
10n
10n
2F26
10n
4u7
2F72
2F55
OUTIN
2F23
1
4u7
4u7
4V47u
+3V3
+2V5-STAB
+1V2-PF
FF62
2F73
FF60
FF61
IF61
10n
2F27
10n
2F64
10n
2F54
10n
2F77
10n
2F65
2F28
10n
2F16
+1V2-PF
4u7
IF52
SDA-AMBI-3V3 SCL-AMBI-3V3
+3V3M
10n
10n
10n
10n
2F66
10n
2F93
10n
2F10
2F67
10n
10n
2F11
2F94
2F69
10n
10n
2F12
2F90
2F96
10n
2F13
10n
10n
10n
2F92
2F91
+2V5M
10n
10n
2F97
+1V2M
10n
3F6J
*
100R
IF74
D
XCF flash- RESERVED
+3V3M
3F6T
FF52
FF51
100R
3F9A
330R
3F9B
2F68
3F6Z
FF55
100R
330R
3F6R
47R
3F6Q
10K
3F6S
100R
10p
2F59
E
MISO
CCLK
INIT
F
6F62
3F6U
+3V3M
470R
SML-310
G
FPGA-TDI
FPGA-TDO
H
I
FPGA-TMS
FPGA-TCK
LED1B
LED2B
LED3B
LED4B
LED5B
IF53
3F32
1K0
IF54
3F33
1K0
IF55
3F34
1K0
IF56
3F35
1K0
IF57
3F36
1K0
3F7D
RES
100R
6F63
SML-310
6F64
SML-310
6F65
SML-310
6F66
SML-310
6F67
SML-310
7F62
BC847BW
100R
100R
3F6V
3F6W
100K
100K
RES3F7C
3F7E RES
3F7F
100R
RES
9F55
+3V3M
1
8
10
5
6
4
17
3FKV
+3V3M
+2V5M
2F57
3FKY
10n
100R
7F60
XCF02SVOG20C
CF
13
CEO
12
14
NC
15
16
+2V5M
+2V5M
IF69
3FKZ
73
2
9
3F7B
1F03
9
10n
3F9J
47R
+2V5M
7F65-1
XC3S250E-4FTG256C
MAIN
DONE
PROG_B
TCK
TDI
TDO
TMS
VCCAUX
VCCINT
Φ
GND
10K
3F7H
8
3F7G
FF53
1
2
3
4
5
6
7
47R
330R
FOR
DEBUG
10K
3F9C
IF48
RES
nCONFIG DONE
9F40
10n
RES
2F70
DONE
+2V5M
+2V5M
+2V5M
+2V5M
+2V5M
+2V5M
+2V5M
+2V5M
+1V2M
+1V2M
+1V2M
+1V2M
+1V2M
+1V2M
+1V2M
+1V2M
PROG-B
T15
D3
A15
A2
C14
B15
A6
A11
F1
F16
L1
L16
T6
T11
D4
D13
E5
E12
M5
M12
N4
N13
10n
182019
OJ
INT
VCC
D0
CLK
RESET
OE
CE
TMS
TCK
TDI
TDO
GND
11
47R
3F7A
10K
FF54
100R
100R
3FKW
2F76
3139 123 6188.2
1234
56789
8 9 10 11 12 13 14
3F9E
100R
9F41
IF77
IF78
IF79
IF71
IF72
IF73
10R
3F9G
3F9H
M14
D16
R15
R16
P15
P16
M16
N16
L15
L14
K12
K13
K14
K15
J16
K16
J13
J14
H14
H15
H11
H12
G16
G15
G14
G13
T8
IO
D5
T10
IO
M1
P13
IO
VREF_2
R4
IO
VREF_2
P4
IO_L01N_2
INIT_B
P3
IO_L01P_2
CSO_B
N5
IO_L03N_2
MOSI
CSI_B
P5
IO_L03P_2
DOUT
BUSY
T5
IO_L04N_2
T4
IO_L04P_2
N6
IO_L05N_2
M6
IO_L05P_2
P6
IO_L06N_2
R6
IO_L06P_2
L8
IO_L09N_2
D6
GCLK13
M8
IO_L09P_2
D7
GCLK12
P8
IO_L10N_2
D3
GCLK15
N8
IO_L10P_2
D4
GCLK14
N9
IO_L12N_2
D1
GCLK3
P9
IO_L12P_2
D2
GCLK2
M9
IO_L13N_2
DIN
IF49
D0
L9
IO_L13P_2
M0
M10
IO_L15N_2
N10
IO_L15P_2
P11
IO_L16N_2
A22
R11
IO_L16P_2
A23
COLOR7
COLOR9
COLOR-CLK
COLOR6
COLOR9
COLOR4
COLOR5
COLOR3
+3V3M
+3V3M
+3V3M
+3V3M
LED5B
INIT
CSO-B
MOSI
A1
A16
B9
F6
F11
G7
G8
G9
G10
H2
H7
H8
H9
H10
J7
J8
J9
J10
J15
K7
K8
K9
K10
L6
L11
R8
T1
T16
LED2B
LED1B
CLK-OSC2C
CLK-OSC1D
MISO
HIGH=SPI flash
LOW=XCF flash
+3V3
LED3B
LED4B
SDA-I2C4
SCL-I2C4
COLOR2 COLOR8
COLOR1
COLOR0
9F42
3F30
10R
33p
2F14
3F9F
3F03
100R
1K0
3F9M
RES
9F43
47R
47R
7F65-3
XC3S250E-4FTG256C
Φ
BANK1
IO
IO
VREF_1
IO_L01N_1
A15
IO_L01P_1
A16
IO_L02N_1
A13
IO_L02P_1
A14
IO_L04N_1
VREF_1
IO_L04P_1
IO_L06N_1
IO_L06P_1
IO_L07N_1
A11
IO_L07P_1
A12
IO_L08N_1
VREF_1
IO_L08P_1
IO_L09N_1
A9
RHCLK1
IO_L09P_1
A10
RHCLK0
IO_L10N_1
A7
|RHCLK3
TRDY1
IO_L10P_1
A8
RHCLK2
IO_L11N_1
A5
RHCLK5
IO_L11P_1
A6
RHCLK4
IRDY1
IO_L12N_1
A3
RHCLK7
IO_L12P_1
A4
RHCLK6
IO_L13N_1
A1
IO_L13P_1
A2
IO_L14N_1
A0
IO_L14P_1
7F65-4
XC3S250E-4FTG256C
Φ
BANK2
IO_L18N_2
IO_L18P_2
IO_L19N_2
IO_L19P_2
IO_L20N_2
IO_L20P_2
IP_L02N_2
IP_L02P_2
IP_L08N_2
IP_L08P_2
IP_L11N_2
IP_L11P_2
RDWR_B
IP_L17N_2
IP_L17P_2
VCCO_2
CCLK
VREF_2
GCLK1
GCLK0
IO_L15N_1
IO_L15P_1
IO_L16N_1
IO_L16P_1
IO_L18N_1
IO_L18P_1
IO_L19N_1
IO_L19P_1
VREF_1
VCCO_1
A20
A21
VS1
A18
VS2
A19
VS0
A17
M2
IP
NC
LDC0
HDC
LDC2
LDC1
F15
F14
F12
F13
D14
D15
C15
C16
H13
IP
B16
E14
G12
H16
IP
J11
J12
M13
E13
E16
L12
NC
L13
N14
N15
E15
G11
K11
M15
+3V3M
+3V3M
+3V3M
+3V3M
FACTORY
N12
P12
R13
3F07
3F09
T13
R14
9F44
P14
1K0
R3
3F12
T3
T7
R7
9F51
R9
T9
IF75
M11
N11
M7
T2
T12
T14
N7
P7
P10
R10
L7
+3V3M
L10
+3V3M
R5
+3V3M
R12
+3V3M
10p
2F58
RES
9F46
RES1K0
RES1K0
9F45
3F7S
10R
+3V3
CSO-B
WRITE
HOLD
MOSI
CCLK
CSO-B
WRITE
HOLD
CCLK
+3V3
+3V3
1
2
3
4
5
6
7
FF63
FF64
FF65
FF66
FF67
1F02
8
3F9K
9F36
9F37
FOR
USE
4K7
F5
N2
B2
B1
C2
C1
E4
E3
E1
D1
G4
G5
G2
G3
H6
H5
H4
H3
J3
J2
J4
J5
K1
J1
K3
K2
100R
FF85
9
2F71
M25P20-VMN
3F6K
100R
3F6L
100R
3F99
100R
100R
3F41
FF80
30R 5F29
10n
7F61
5
6
1
3
7
IO
IO
VREF_3
IO_L01N_3
IO_L01P_3
IO_L02N_3
VREF_3
IO_L02P_3
IO_L03N_3
IO_L03P_3
IO_L05N_3
IO_L05P_3
IO_L06N_3
IO_L06P_3
IO_L07N_3
IO_L07P_3
IO_L08N_3
LHCLK1
IO_L08P_3
LHCLK0
IO_L09N_3
LHCLK3
IRDY2
IO_L09P_3
LHCLK2
IO_L10N_3
LHCLK5
IO_L10P_3
LHCLK4
TRDY2
IO_L11N_3
LHCLK7
IO_L11P_3
LHCLK6
IO_L12N_3
IO_L12P_3
IO_L13N_3
IO_L13P_3
100R
3F42
D
C
S
W
HOLD
7F65-5
XC3S250E-4FTG256C
Φ
BANK3
IO_L15N_3
IO_L15P_3
IO_L16N_3
IO_L16P_3
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
CSO-B
MOSI
MISO
CCLK
100R
3F46
3F43
FPGA-TMS
FPGA-TDI
FPGA-TDO
FPGA-TCK
+3V3M
+3V3
30R
5F30
IF76
84
VCC
Φ
Q
2
2M
FLASH
VSS
10 11 12 13
VREF_3
VCCO
2F24
IP
IP
NC
FPGA-TDI
FPGA-TDO
FPGA-TMS
FPGA-TCK
PROG-B
100n
2F15
L5
K5
N1
M1
P1
P2
R1
R2
G1
D2
F2
H1
J6
K4
M3
N3
F3
F4
L2
L3
L4
M4
E2
G6
K6
M2
FF81
FF82
FF83
FF84
3F47
100R
FF50
3F6M
10R
FF68
33p
14
+3V3M
+3V3M
+3V3M
+3V3M
2F44
10p
2F50
10p
2F51
10p
2F52
10p
100p
2F56
MISO
H_16800_019.eps
180407
1F02 E12
7F01 C2
1F03 I5
7F60 E5
2F10 B3
7F61 H13
2F11 B4
7F62 G3
2F12 B4
7F65-1 F7
2F13 B4
7F65-2 A7
2F14 G9
7F65-3 A10
2F15 I13
7F65-4 E10
2F16 B3
7F65-5 A13
2F20 A2
9F36 H12
2F22 D2
2F23 D3
2F24 H13
2F25 B2
2F26 B3
2F27 B3
2F28 B3
2F29 B2
2F31 B2
2F44 E14
2F50 F14
2F51 F14
2F52 F14
2F54 D3
2F55 B2
2F56 F14
2F57 E5
2F58 F11
2F59 F3
2F60 A2
2F61 A2
2F62 A3
2F63 A3
2F64 A3
2F65 A3
2F66 A3
2F67 A4
2F68 E4
2F69 A4
2F70 G5
2F71 F12
2F72 B3
2F73 B3
2F74 B2
2F75 B2
2F76 I4
2F77 B3
2F90 A4
2F91 A4
2F92 A4
2F93 B3
2F94 B4
2F96 B4
2F97 B4
3F03 H9
3F07 F11
3F09 F11
3F12 G11
3F30 F8
3F32 H2
3F33 I2
3F34 I2
3F35 I2
3F36 I2
3F41 E12
3F42 E13
3F43 E13
3F46 E13
3F47 F14
3F6J A6
3F6K H12
3F6L I12
3F6M H14
3F6Q E2
3F6R E2
3F6S E3
3F6T E3
3F6U G2
3F6V G3
3F6W G3
3F6Z F4
3F7A F4
3F7B G4
3F7C H3
3F7D H2
3F7E H3
3F7F H3
3F7G H5
3F7H H5
3F7S F11
3F99 I12
3F9A I3
3F9B I3
3F9C F5
3F9E A8
3F9F H9
3F9G I9
3F9H I9
3F9J F5
3F9K H12
3F9M I9
3FKV H4
3FKW H4
3FKY H4
3FKZ H4
5F29 F13
5F30 H13
5F31 A2
5F32 B2
5F33 B2
5F34 A2
6F62 G2
6F63 H2
6F64 I2
6F65 I2
6F66 I2
6F67 I2
9F37 H12
9F40 G5
9F41 B8
9F42 F9
9F43 I9
9F44 F11
9F45 F11
9F46 F11
9F51 G11
9F52 C2
9F53 C2
9F54 C2
9F55 G4
FF50 F14
FF51 I3
FF52 H3
FF53 H5
FF54 H4
FF55 H4
FF60 A3
FF61 B3
FF62 B3
FF63 H12
FF64 I12
FF65 I12
FF66 I12
FF67 I12
FF68 I14
FF80 F13
FF81 E14
FF82 F14
FF83 F14
FF84 F14
FF85 F12
IF12 C2
IF48 F5
IF49 I9
IF52 A6
IF53 H2
IF54 I2
IF55 I2
IF56 I2
IF57 I2
IF61 C3
IF69 H4
IF71 G9
IF72 G9
IF73 H9
IF74 B6
IF75 G11
IF76 H13
IF77 A9
IF78 A9
IF79 B9
A
B
C
D
E
F
G
H
I
Circuit Diagrams and PWB Layouts
Layout DFI Panel (Top Side)
57LC8.2A LA 7.
3101 313 6188.2
H_16800_020.eps
180407
1F00 C1
1F02 C2
1F03 A1
1F04 A4
1F05 C3
1F13 C4
1F50 A4
1F51 A3
1F52 A1
1M09 C4
1M12 C3
1M59 C3
1M90 C4
2F15 C1
2F22 C4
2F23 C4
2F24 C1
2F29 C2
2F2B A4
2F2C A4
2F2D A4
2F2E A2
2F2F A2
2F2G A2
2F2H A2
2F2I A3
2F2K A2
2F2L A2
2F30 C3
2F34 A4
2F35 A4
2F45 C2
2F46 A4
2F54 C4
2F57 C1
2F59 C1
2F5P A1
2F5Z B1
2F68 C1
2F76 A1
2F95 A4
2FD1 C2
2FD2 C2
2FHL C4
2FJ7 C1
2FJJ C3
2FJK C3
2FJL C3
2FLG C1
2FLH C1
2FLJ C1
2FLK C1
2FLL C1
2U01 B4
2U02 C4
2U03 B4
2U06 B4
2U09 C4
2U10 B4
2U12 B4
2U13 C4
2U14 B4
2U16 C4
2U21 B4
2U22 B4
2U25 C4
2U32 B4
2U35 B4
2U38 A4
2U41 B4
2V34 B3
3CA0 B3
3CA1 B3
3CA2 B3
3CA3 B3
3CA4 B3
3CA5 B3
3CA6 B3
3CA7 B3
3CA8 B3
3CA9 B3
3CB0 B3
3CB1 B3
3CB2 B3
3CB3 B3
3CB4 B3
3CB5 B3
3CB6 B3
3CB7 B3
3CB8 A3
3CB9 A3
3CC0 A3
3CC1 A3
3CC2 A3
3CC3 A3
3CC4 A3
3CC5 A3
3CC6 A3
3CC7 A3
3CC8 A3
3CC9 A3
3CD0 A3
3CD1 A3
3CD2 A3
3CD3 A3
3CD4 A3
3CD5 A3
3CE1 A3
3CE2 B3
3F05 C1
3F14 C3
3F15 C3
3F16 C3
3F18 A4
3F19 A4
3F1W A4
3F20 A4
3F22 A4
3F23 A4
3F24 A4
3F25 A2
3F26 C2
3F27 A2
3F28 A2
3F29 A2
3F2A A2
3F2B A2
3F2C A2
3F2D A4
3F2F A2
3F2S A2
3F2T A2
3F44 C2
3F45 C3
3F48 A4
3F4A A1
3F4F B1
3F4G A2
3F4H A1
3F4J A1
3F4K A1
3F4L A1
3F4M A1
3F4N A1
3F4P A1
3F4Q A1
3F4R A1
3F4S A1
3F4T A1
3F4U A1
3F4V A1
3F4W A1
3F4Y A1
3F4Z A1
3F50 A2
3F51 A2
3F52 A2
3F53 A2
3F54 A2
3F55 A2
3F56 A2
3F57 A2
3F58 A2
3F59 A2
3F5A A1
3F5B B2
3F5C B1
3F5D B1
3F5E B1
3F5F B1
3F5G B1
3F5H B1
3F5J B1
3F5K B1
3F5L B1
3F5M B1
3F5N B1
3F5P B1
3F5Q B1
3F5R B1
3F5S B2
3F5T B1
3F5U A2
3F5V A2
3F5W A2
3F5Y A2
3F5Z A2
3F60 A2
3F61 A2
3F62 A2
3F63 A2
3F64 A2
3F65 A2
3F66 A2
3F67 A2
3F68 A2
3F69 A2
3F6A A2
3F6B A2
3F6C A2
3F6D B1
3F6K C1
3F6L C1
3F6M C1
3F6Q B1
3F6R B1
3F6S C1
3F6T C1
3F6U C1
3F6V C1
3F6W C1
3F6Z B1
3F70 A2
3F71 A2
3F78 C1
3F79 C1
3F7A B1
3F7B C1
3F7G C1
3F7H C1
3F7J A3
3F7K A3
3F7L A3
3F7M A3
3F7N A3
3F7P A3
3F7Q A3
3F7R A3
3F80 C1
3F82 C1
3F84 C1
3F85 C1
3F86 C1
3F87 B2
3F88 B2
3F89 B2
3F8A A2
3F8B A2
3F8C A2
3F8D A2
3F8E A2
3F8F A2
3F8G A2
3F8H A2
3F8J A2
3F8K A2
3F8L A2
3F8M A2
3F8N A2
3F8P A2
3F8Q A2
3F8R A2
3F8S A2
3F8T A2
3F8U A2
3F8V A3
3F8W A2
3F8Y A3
3F8Z A3
3F90 B2
3F91 B2
3F92 A2
3F93 A2
3F94 A2
3F95 A2
3F96 B2
3F97 B2
3F98 B2
3F99 C1
3F9A C1
3F9B B1
3F9J C1
3F9K C1
3F9N A3
3F9P A3
3F9Q A3
3F9R A3
3F9S A3
3F9T A3
3F9U A3
3F9V A3
3F9W A3
3F9Y A3
3F9Z A3
3FA9 C2
3FH0 C2
3FH1 C2
3FH4 A4
3FH5 A4
3FH7 B2
3FH8 B2
3FH9 B2
3FHI B2
3FHJ A2
3FHK A2
3FHL A2
3FHM A2
3FHN A2
3FHP A2
3FHR A2
3FHS A2
3FHV C2
3FHY C2
3FKV B1
3FKW B1
3FKY B1
3FKZ B1
3U08 C4
3U11 C4
3U17 C4
3U27 C4
5F00 A1
5F01 A1
5F02 A2
5F03 A2
5F04 A2
5F05 A2
5F06 A1
5F07 A1
5F08 A1
5F09 A1
5F0A A1
5F0B A1
5F0I A4
5F0J A4
5F0K A3
5F0L A3
5F0M A3
5F10 A4
5F11 A4
5F12 A4
5F13 C3
5F14 C3
5F15 C3
5F16 C3
5F17 C3
5F20 C3
5F30 C1
5F49 C1
5F50 C1
5F52 C3
5F59 A2
5F60 A3
5F61 A3
5F62 A3
5F63 A3
5F64 A3
5F65 A3
5F66 A3
5F67 A3
5F68 A3
5F69 A3
5F70 A3
5F71 A3
5F72 A3
5F78 A2
5F79 A2
5F80 C2
5U00 B4
5U01 C4
5U02 B4
6F02 A4
6F04 A3
6F05 A4
6F07 A4
6F09 A4
6F10 A4
6F62 C1
7F01 C4
7F05 A4
7F07 A4
7F10 A4
7F18 A2
7F30 C3
7F31 C3
7F60 C1
7F61 C1
7F62 C1
7F65 B2
7F85 C2
7F86 C3
7U01 B4
7U03 B4
9F16 C3
9F24 A2
9F26 C3
9F27 C2
9F28 C3
9F29 C3
9F2F A4
9F2G A4
9F2H A4
9F2I A4
9F2R A2
9F2S A2
9F2T A2
9F2U A3
9F2V A4
9F30 C3
9F31 C3
9F36 C1
9F37 C1
9F52 C4
9F53 C4
9F54 C4
9F55 B1
Circuit Diagrams and PWB Layouts
Layout DFI Panel (Bottom Side)
58LC8.2A LA 7.
3101 313 6188.2
H_16800_021.eps
180407
1U01 C1
1U02 C1
2CBC B2
2CBD B2
2CBH A2
2CBK A2
2F00 A4
2F01 A4
2F02 A4
2F03 A4
2F04 A4
2F05 A3
2F06 A3
2F07 A3
2F08 A3
2F09 A3
2F0A A3
2F0B A3
2F0C A4
2F0D A4
2F0E A4
2F0F A4
2F0G A4
2F0H A4
2F0I A4
2F0J A4
2F0K A4
2F0L A4
2F0M A4
2F0N A4
2F0P A3
2F0Q A2
2F0R A2
2F0S A2
2F0T A2
2F0U A2
2F0V A2
2F0W A2
2F0Y A2
2F0Z A2
2F10 C3
2F11 C3
2F12 C3
2F13 C3
2F14 C3
2F16 C3
2F17 A1
2F18 A1
2F19 A1
2F1A A2
2F1B A2
2F1C A2
2F1D A2
2F1E A2
2F1F A2
2F1G A2
2F1H A2
2F1J A2
2F1K A2
2F1L A2
2F1M A2
2F1N A2
2F1P A2
2F1Q A2
2F1R A2
2F1S A2
2F1T A2
2F20 B3
2F21 A1
2F25 B3
2F26 C3
2F27 C3
2F28 C3
2F2A A1
2F2P A1
2F2Q A1
2F31 C3
2F32 A1
2F33 A1
2F36 B3
2F37 B3
2F38 B3
2F39 B3
2F40 B2
2F41 B2
2F42 B2
2F43 B3
2F44 C4
2F47 A1
2F48 A1
2F49 A1
2F4A A1
2F4B A1
2F50 C3
2F51 C4
2F52 C3
2F53 A1
2F55 C3
2F56 C3
2F58 B3
2F5A A4
2F5B A4
2F5C A4
2F5D A4
2F5E A4
2F5F A4
2F5G B4
2F5H B4
2F5J B4
2F5K B4
2F5L B4
2F5M B3
2F5N B4
2F5Q A4
2F5R A4
2F5S A4
2F5T A4
2F5U B4
2F5W A4
2F5Y B4
2F60 C3
2F61 C3
2F62 C3
2F63 C3
2F64 C3
2F65 B3
2F66 C3
2F67 C3
2F69 C3
2F6A A3
2F6B A4
2F6C A4
2F6D B4
2F6E B3
2F6F B3
2F6G B3
2F70 C4
2F71 C3
2F72 C3
2F73 C3
2F74 B3
2F75 B3
2F77 C3
2F78 A1
2F79 A3
2F80 A3
2F81 A3
2F82 A3
2F83 A1
2F84 A1
2F85 A1
2F86 A1
2F87 A1
2F88 A1
2F89 A1
2F90 C3
2F91 C3
2F92 C3
2F93 C3
2F94 C3
2F96 C3
2F97 C3
2F9A A1
2F9B A1
2F9C A1
2F9D A1
2F9E A1
2F9F A1
2F9G A1
2F9H A1
2F9I A1
2F9J A1
2FD3 C2
2FD4 C3
2FGA B3
2FGB B3
2FGC B2
2FGD B3
2FGE A2
2FGF B3
2FGG B3
2FGH B3
2FGJ B3
2FGK A1
2FGL A1
2FGM B3
2FGN B3
2FGP B3
2FH1 B2
2FH2 B3
2FH3 B3
2FH4 B3
2FH5 B3
2FHA B2
2FHB B2
2FHC B3
2FHD B3
2FHE B3
2FHF B3
2FHG B3
2FHH B3
2FHJ B3
2FHK B3
2FHM B2
2FHN B3
2FHP B3
2FHQ B3
2FHR B3
2FHS B2
2FHT B3
2FJ8 A2
2FJ9 B3
2FJA A3
2FJB B3
2FJC A3
2FJD A3
2FJE A2
2FJF A3
2FJM C4
2FJN C4
2FJP B3
2FLC B3
2FLD B3
2FLE B3
2FLF B3
2FLM B3
2FLN B3
2FLP B3
2FLR B3
2FLS A3
2FLT B3
2FLU B3
2FLV B3
2FLW B3
2FLY B3
2FLZ B3
2U00 C1
2U04 B1
2U05 B1
2U07 C1
2U08 C1
2U11 B1
2U15 B1
2U17 C1
2U18 B1
2U19 C1
2U20 B1
2U23 C1
2U24 C1
2U26 B1
2U27 B1
2U28 B1
2U29 B1
2U30 C1
2U31 C1
2U33 B1
2U34 C1
2U36 C1
2U37 C1
2U39 C1
2U40 C1
2V00 B2
2V01 A2
2V03 B1
2V04 B1
2V05 B1
2V33 A2
2V35 B1
2V39 B2
2V40 B2
2V41 B2
2V42 B2
2V43 A2
2V44 A2
2V45 B2
2V46 B2
2V50 A1
2V51 A2
2V52 B1
2V53 B2
2V54 B2
2V55 A2
3CD6 A2
3CD7 A2
3CD8 B3
3CD9 B2
3F02 B3
3F03 C3
3F04 B3
3F06 B3
3F07 C3
3F08 B3
3F09 C3
3F10 B3
3F11 C4
3F12 B3
3F13 A1
3F17 A1
3F1Y A1
3F1Z A1
3F21 A1
3F2V A1
3F30 C3
3F31 A1
3F32 C3
3F33 C3
3F34 C3
3F35 C3
3F36 C3
3F37 A1
3F38 A1
3F39 A1
3F3A A1
3F3B A1
3F3C A1
3F40 B3
3F41 C4
3F42 C4
3F43 C3
3F46 C3
3F47 C3
3F49 B3
3F4B A4
3F4C A4
3F4D B3
3F4E B3
3F6J C3
3F72 A3
3F73 A3
3F74 A3
3F75 A3
3F76 C4
3F7C C4
3F7D C4
3F7E C4
3F7F C3
3F7S B3
3F81 C4
3F83 C4
3F9C C4
3F9E C3
3F9F C3
3F9G B3
3F9H B3
3F9M C3
3FA0 B3
3FA1 B3
3FA2 B3
3FA4 B2
3FA5 B3
3FA6 B3
3FA7 A3
3FA8 B2
3FAA B3
3FJA C2
3FJB C2
3FJC C3
3FJD A1
3FLB A1
3U00 C1
3U01 B1
3U03 B1
3U04 C1
3U05 C1
3U06 B1
3U07 C1
3U09 B1
3U10 B1
3U12 C1
3U13 C1
3U14 C1
3U15 B1
3U16 B1
3U18 B1
3U19 B1
3U20 B1
3U21 B1
3U22 B1
3U23 B1
3U24 C1
3U25 C1
3U26 B1
3U28 C1
3U30 C1
3U31 B1
3U32 B1
3U33 B1
3U34 C1
3U35 C1
3U36 B1
3U37 B1
3U40 B1
3U41 C1
3U43 B1
3U44 C1
3U45 B1
3U46 B1
3U47 C1
3U48 B1
3U50 C1
3U55 B1
3U58 C1
3U59 C1
3U62 B1
3U63 C1
3U64 C1
3U68 B1
3U69 C1
3U70 C1
3U72 C1
3U73 C1
3U74 C1
3U75 C1
5F21 B2
5F22 C3
5F23 B3
5F24 A2
5F25 B3
5F26 B3
5F27 B4
5F28 B4
5F29 C3
5F31 C3
5F32 B3
5F33 C3
5F34 B3
5F51 B2
5F53 B2
5F54 B2
5F55 B2
5F57 B3
5F58 A2
5U04 C1
5U05 C1
5U06 C1
5U07 C1
5V01 B1
5V02 B1
6F30 A3
6F31 B3
6F32 B3
6F33 B3
6F34 B3
6F35 B3
6F63 C3
6F64 C3
6F65 C3
6F66 C3
6F67 C3
6U00 C1
6U01 C1
6U02 C1
6U04 B1
6U06 B1
6U08 B1
7CA0 B2
7CA1 A2
7CA2 A4
7CA3 B4
7F08 A1
7F09 A1
7F32 A3
7F34 C4
7F35 A1
7F36 A1
7F50 C2
7F51 C3
7U00 B1
7U05 C1
7U07 B1
7U08 A1
7U09 A1
7U13 C1
7U15 C1
9F00 B3
9F01 B3
9F02 B3
9F03 A3
9F04 B3
9F05 A3
9F06 A3
9F07 B3
9F08 B2
9F09 B2
9F13 A1
9F2N A1
9F2P A1
9F40 C4
9F41 C3
9F42 C3
9F43 C3
9F44 B3
9F45 B3
9F46 C3
9F51 C3
9U01 C1
9U02 C1
9U03 B1
Circuit Diagrams and PWB Layouts
59LC8.2A LA 7.
SSB: DC/DC +3V3, +1V2, & +VTUN
2 3 45
B01A B01A
DC/DC +3V3 & +1V2 & +VTUN
6
A
2P78
1u0
6P14
BAS316
1K03P49
IP06
IP05
GNDDC1
7P05
BC817-25W
BZX384-C18
6P15
IP37
B
10R
3P20
IP01
1u0
2P31
C
+3V3_SW
3P51
1K0 1%
D
E
F
3P53
GNDDC1
IP08
IP09
2P40 100n
GNDDC1
1%
470R
FP23
IP28
3P52
GNDDC1
4K7
GNDDC1
7P11
NCP5422ADR2G
4
7
10
8
9
IP29
IP55
100n2P41
39K
3P40
GNDDC1
GNDDC1
100p
2P49
IP45
GNDDC1
BST
1
VFB
2
1
COMP
2
ROSC
14
VCC
GNDDC1
Φ
3
GATE
GATE
GND
IP38
3P23
1
H1
IP25
2
L1
16
H2
15
L2
5
+1
6
-1
IS
1213
+2
11
-2
IP32
10R
IP39
IP04
2
2R2
3P26
IP26
IP27
IP16
IP31
3P41
3K3
3K3
3P72
3P48
7
7P06-1
SI4936BDY
1
2P32
3n3
4
IP17
2P39
2P42
8
3P32
100n2P07
5
6
7P06-2
SI4936BDY
3
3P34
2K2
100n
3Q34
1K8
100n
68R3P47
68R
2P38 1n0
10R3P13
2R2
RES
IP40
IP41
3P74
IP43
3Q74
IP56
6P13
BAS316
22u
22u
22u
RES
2P29
RES
3P25
RES
2P35
3P68
6K8
1K2
3P69
6K8
1K8
IP10
IP11
10R
1n0
RES
2P28
2P30
7
8
FP26
2
5
7P07-2
SI4936BDY
3
6
7P07-1
SI4936BDY
1
+3V3_SW
+1V2_SW
RES
2P53
1n0
RES
RES
IP42
2P37
3n3
4
3P61
1n0
2P52
6P16
BZX384-C4V7
FP18
10R
IP36
IP12
IP14
100p
2P48
GNDDC1
3P67
3P15
6K8
3P37
2P36
3P38
3P45
2P54
3P50
RES
GNDDC1
2K2
3Q52
220R
1
1K0
IP44
IP57
IP59
5P01
100n
1K0
5Q01
6K8
100n
1K0
5P06
3
2
GNDTUN
22u
10u
220u
7P14
2N7002
ONLY FOR ANALOG TUNER
12
3n3
2P34
2P33
IP07
3n3
3Q51
2P43
3Q53
GNDDC1
GNDDC1
G
H
3139 123 6349.1
1
2
3
4
5 12
6
7
8
IP02
IP15
6P03
BAV99
100p
2P20
FP20
22u
RES
2P59
100u 16V
1%
22u
2P61
180R
1%
680R
2P46
+3V3_SW
FP24
+1V2_SW
16V
RES
100u
5P02
10u
2P19
FP11
35V
22u
+12V_DISP
971
IP33
+3V3_SW
6P02
PDZ33-B
+12V_DISP
+VTUN
34V
7P08
PHD38N02LT
3P75
8K2
2
RES
3
1
3P79
10
STAN D B Y
+12V_DISP
+12V_AUDIO
GNDSND
-12V_AUDIO
BL_ON_OFF
BL_ADJUST_PWM
BL_BOOST
BL_ADJUST_ANA
6P17
K
1K0
A
5 3
+3V3_STBY
BZX384-C4V7
1
NCNC
REF
2
GNDSND
4
7P09
TS431AILT
2P91
2P80100n
2P851n0
11
1P01
FP10
FP30
2P79100n
2P82100n
100n 2P81
100n 2P83
1n02P88
1n02P86
2P871n0
1%
3P76
470R
22n
3K9
3P77
FP27
FP12
FP13
FP14
FP15
1735446-8
100n
2P84
2P89
100u 16V
2P90 1u0
1%
3P78
470R
1P02
1-1735446-1
1
2
FP16
3
4
FP17
5
FP19
6
FP21
7
8
FP22
+2V5_SW
1
2
3
4
5
6
7
8
9
10
11
1735446-9
RES FOR 5V TCON
1P04
+12V_DISP
+5V_TCON
8
91011
FP28
FP29
1735446-5
1
2
3
4
5
12
1P03
1
2
3
4
5
6
7
8
9
RES FOR ANALOG DIMMING
I_17760_001.eps
180208
A
B
C
D
E
F
G
H
1P01 A12
1P02 B11
1P03 B12
1P04 F11
2P07 B4
2P19 A9
2P20 B8
2P28 B5
2P29 B4
2P30 B5
2P31 C2
2P32 C4
2P33 C7
2P34 C8
2P35 C5
2P36 C7
2P37 D5
2P38 C4
2P39 E4
2P40 E2
2P41 E2
2P42 E4
2P43 D7
2P46 D8
2P48 F7
2P49 F2
2P52 D6
2P53 D6
2P54 E7
2P59 C8
2P61 D8
2P78 A4
2P79 B11
2P80 B11
2P81 B11
2P82 B11
2P83 B11
2P84 C11
2P85 C11
2P86 C11
2P87 C11
2P88 C11
2P89 D11
2P90 D11
2P91 D11
3P13 D4
3P15 B7
3P20 B3
3P23 C3
3P25 C5
3P26 D3
3P32 D4
3P34 D4
3P37 C7
3P38 D7
3P40 E2
3P41 E4
3P45 D7
3P47 A4
3P48 A4
3P49 B3
3P50 E7
3P51 D2
3P52 F2
3P53 F2
3P61 D6
3P67 A7
3P68 D5
3P69 E5
3P72 E4
3P74 E4
3P75 D10
3P76 D11
3P77 E11
3P78 E11
3P79 E10
3Q34 E4
3Q51 D7
3Q52 F7
3Q53 E7
3Q74 E4
4P16 B6
5P01 B7
5P02 A9
5P06 A7
5Q01 D7
6P02 A9
6P03 B8
6P13 A5
6P14 A4
6P15 B3
6P16 B6
6P17 D10
7P05 A3
7P06-1 B4
7P06-2 C4
7P07-1 C5
7P07-2 D5
7P08 C10
7P09 E11
7P11 D2
7P14 B7
FP10 A11
FP11 A9
FP12 A11
FP13 A11
FP14 B11
FP15 B11
FP16 B12
FP17 B12
FP18 B6
FP19 B12
FP20 B8
FP21 B12
FP22 C12
FP23 D2
FP24 D8
FP26 E5
FP27 A11
FP28 F10
FP29 F10
FP30 A11
IP01 C3
IP02 A8
IP04 C3
IP05 B4
IP06 B4
IP07 C7
IP08 D2
IP09 D2
IP10 C5
IP11 C5
IP12 D6
IP14 A7
IP15 A8
IP16 D4
IP17 D4
IP25 D3
IP26 D4
IP27 D4
IP28 D2
IP29 E2
IP31 D4
IP32 F3
IP33 A9
IP36 D6
IP37 B3
IP38 B3
IP39 E3
IP40 D4
IP41 D4
IP42 C5
IP43 E4
IP44 E7
IP45 F2
IP55 E2
IP56 A5
IP57 C7
IP59 D7
Circuit Diagrams and PWB Layouts
60LC8.2A LA 7.
SSB: DC/DC +5V, +1V8, & +2V5
1
B01B B01B
DC/DC - 5V & 1V8 & 2V5
2
3
4
5
6
A
2Q78
1u0
6Q14
BAS316
2
3Q41
3K3
IQ03
7Q06-2
SI4936BDY
3K33Q72
3Q47 68R
3Q48
68R
100n
2Q07
IQ06
7
8
7Q06-1
SI4936BDY
1
2Q32
3n3
5
6
4
RES
3
2Q38
3Q13 10R
3Q32
IQ17 IQ41
3P70
2K2
100n
2Q39
3Q70
1K8
100n
2Q42
2R2
IQ40
3P71
IQ43
3Q71
IQ56
6Q13
BAS316
IQ02
22u
IQ42
2Q37
3n3
FQ35
RES
2Q28
2
+5V_SW
+2V6_SW
5
7Q07-2
3
6
22u
7
8
7Q07-1
SI4936BDY
1
RES
2Q53
1n0
FQ08
5P09
6K8
3Q37
IQ57
2Q36
3Q38
10R
3Q61
RES
IQ36
1n0
RES
2Q52
IQ12
22u
RES
1n0
2Q29
RES
RES
2Q30
10R
3Q25
IQ10
1n0
2Q35
IQ11
4
SI4936BDY
3Q68
6K8
1K2
3Q69
6K8
1K8
B
C
D
E
F
+5V_SW
1%
3P64
470R
IQ08
IQ09
IQ28
100n2Q40
GNDDC2
1%
3P54
3P56
120R
GNDDC2 GNDDC2
GNDDC2
NCP5422ADR2G
FQ40
IQ29
IQ55
3Q40
2Q41 100n
GNDDC2
2K2
100p
2Q49
IQ45
GNDDC2
GNDDC2
1u0
2Q31
7Q11
4
7
10
8
9
39K
GNDDC2
7Q05
BC817-25W
BZX384-C18
6Q15
3Q20
14
VCC
BST
1
VFB
2
1
COMP
2
ROSC
GNDDC2
10R
IQ01
Φ
3
IQ37
GATE
GATE
IS
GND
3Q49 1K0
3Q23
1
H1
IQ25
2
L1
16
H2
15
L2
5
+1
6
-1
1213
+2
11
-2
IQ32
10R
IQ39
IQ04
3Q26
2R2
IQ05
IQ26
IQ27
IQ16
IQ31
G
H
3139 123 6349.1
1
2 9
45
6
7 8 9
12
22u
3n3
2Q33
100n
IQ07
1K0
5Q09
12
10u
3n3
3Q45
IQ59
2Q54
IQ44
3Q50
100p
3Q54
2Q48
GNDDC2
GNDDC2 GNDDC2
+2V6_SW
+12V_DISP
7
6K8
100n
1K0
10K
3Q64
680R 1%
2Q43
1%
3Q56
470R
GNDDC2
7Q09
PHD38N02LT
3
2
1
8K23Q78
IQ23
1K0
K
3Q79
A
RES
5 3
8
NC
12
NCNC
REF
7Q08
TS431AILT
NC
10 11
5Q02
10u
FQ05
16V100u
22u
RES
2Q34
2Q59
FQ03
22u
RES
2Q46
2Q61
6Q05
BZX384-C4V7
1%
470R
22n
2Q73
3Q59
4
1%
3Q77
1K0
IQ24
100u 16V
FQ06
16V100u
2Q55
1u0
2Q58
10
+12V_DISP
+5V_SW
+2V6_SW
+1V8_SW
113
12
I_17760_002.eps
12
180208
2Q07 B4
2Q28 B5
2Q29 B5
2Q30 B5
2Q31 C2
2Q32 C4 IQ40 D5
2Q33 C7
2Q34 C9
2Q35 C5
2Q36 C6
2Q37 D5
A
2Q38 C4
2Q39 E4
2Q40 E2
2Q41 E2
2Q42 E4
2Q43 D7
2Q46 D9
2Q48 F7
2Q49 F2
2Q52 D6
2Q53 D6
2Q54 E7
B
2Q55 F9
2Q58 G9
2Q59 C9
2Q61 D9
2Q73 G8
2Q78 A4
3P54 F2
3P56 F2
3P64 D2
3P70 D4
3P71 E4
3Q13 D4
C
3Q20 B3
3Q23 C3
3Q25 C5
3Q26 D4
3Q32 D4
3Q37 C6
3Q38 D6
3Q40 E2
3Q41 E4
3Q45 D7
3Q47 A4
D
3Q48 A4
3Q49 B3
3Q50 E7
3Q54 E7
3Q56 E8
3Q59 G9
3Q61 D6
3Q64 D8
3Q68 D5
3Q69 E5
3Q70 E4
3Q71 E4
E
3Q72 E4
3Q77 G9
3Q78 F8
3Q79 G8
5P09 B7
5Q02 A9
5Q09 D7
6Q05 F8
6Q13 A5
6Q14 A4
6Q15 B3
7Q05 A3
F
7Q06-1 B4
7Q06-2 C4
7Q07-1 C5
7Q07-2 D5
7Q08 G9
7Q09 F8
7Q11 D3
FQ03 D10
FQ05 B10
FQ06 F10
FQ08 B6
G
FQ35 E5
FQ40 D2
IQ01 C3
IQ02 B5
IQ03 C4
IQ04 C4
IQ05 B4
IQ06 B4
IQ07 C7
IQ08 D2
IQ09 D2
IQ10 C5
H
IQ11 C5
IQ12 D6
IQ16 D4
IQ17 D4
IQ23 F8
IQ24 G9
IQ25 D3
IQ26 D4
IQ27 D4
IQ28 D2
IQ29 E2
IQ31 D4
IQ32 F3
IQ36 D6
IQ37 B3
IQ39 E4
IQ41 D5
IQ42 C5
IQ43 E5
IQ44 E7
IQ45 F2
IQ55 E2
IQ56 A5
IQ57 C7
IQ59 D7
Circuit Diagrams and PWB Layouts
61LC8.2A LA 7.
SSB: Tuner IF & Demodulator
1
B02 B02
2
3
TUNER IF & DEMODULATOR
4
5
6
7
8
9
10
11
12
13
A
RES
I146
3136
47R
1 3
330n
2147
+VTUN
I147
7133
L78M05CDT
COM
3192
1K0
2119
100n
3137
47R
I145
4V9
100n
5112
33R
2120
22u
+5V_TUN
F133
2118
10n
OUTIN
2148
2
2142
10u
50V
+5V
F120
VV1316
F121
10
F142
5118
33R
F134
13
16
MTMT
12
IF_OUT3
11
F143
B
PEND NEW 12NC FOR TD1316AF/BHPN-5
1101
F112
*
C
+12V_DISP
TUNER
TUNER
TD1316AF/IHP-2
14
17
15
RF_AGC2SCL
SDA
CS
XTAL_OUT
DC_PWR1IF_AGC9IF_OUT18IF_OUT2
4
7
5
6
3
F115
F116
F117
F118
F119
D
5120 120R
2122
15p
E
F
DEMODULATOR
RF_AGC
RES
7113
TDA9886T/V4
3124
100R
2124
F128
22n
9TOP
14TAG C
G
TUNER AGC VIF AGC
2V
VIF2
VIF1
SIF2
H
I
J
SIF1
IIC_SCL
IIC_SDA
S
IF
+5VS
2 VIF2
2V
1 VIF1
24 SIF2
2V
2V
23SIF1
SUPPLY
20 Vp
18 AGND
13
10n
2138
5121 120R
2121
15p
I124
2125
470n
220n
2126
I126
I127
19VPLL
VAGC 16
VIF-PLL
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER AND
AM-DEMODULATOR
SIF
AGC
NC
RC VCO
I143
3123
330R
2123
1n5
OUTPUT
PORTS
1n0
2145
OP1
3
3151
2140
3152
2141
I125
22 OP2
I144
*
2144
DIGITAL VCO CONTROL
MAD
2
I C-BUS TRANSCEIVER
11 SCL
10 SDA
100R
I133
RES
100R
RES
I135
I136
1104
4M0
7 DGND
I121
I123
22p
2127
2143
0V
21AFC
15REF
AFC DETECTOR
SOUND TRAPS
4.5 to 6.5 Mhz
AUDIO PROCESSING
AND SWITCHES
NARROW-BAND FM-PLL
DEMODULATOR
12 SIOMAD
+5VS
2V1
3193
22K
3194
22K
4121
+5V_IF
RES
RES
7131
3190
BSH111
4K7
4122
+5V_IF
RES
RES
7132
3191
BSH111
4K7
1n0
I142
17CVBS
8AUD
I128
5DEEM
I129
AFD
6
4 FMPLL
I130
2137
2V3
I131
3195
3127
5K6
10n
2139
390p
I113
7134
BC847B
18K
F130
3111
2112
22u
2V1
2133
10n
2136
470n
FOR EUROPE ONLY
BAS316
2149
+3V3_SW
+3V3_SW
+5VS
6110
2u2
5K6
3135
7114
BC847B
1V5
3125
3126
RF_AGC
+5V_IF
3110
8K2
I111
3115
39K
IF_ATV
IIC_SDA
IIC_SCL
15R
I104
10n
2128
4124
I138
150R
5116
I139
5u6
15p
15p
2135
2134
180R
RES
I148
3140
150R
F140
CVBS_RF
SAW FILTERS
IF_ATV
5111
390n
I141
SAW_SW
3119
22K
5119
390n
RES
F101
2117
10n
+5V_IF
3113
6K8
I114
+5V_IF
3118
2K2
I120
7109
BC847B
3188
18K
2K2
6103
3117
1SS356
4101
EUROPE
+5V_SW
+5V_SW
+5V_SW
UV1316E
K3953
K9656M
-
Y
-
Y
-
22K
22K
18K
150R
BC847B
3133
F114
1R0
3134
1R0
3141
1R0
1101
1102
1103
1105
4101
4102
4103
4104
2144
3193
3194
3195
3140
7134
K
L
3139 123 6349.1
1
24
3
5
6
7 8
9
10
11
12
13
14
4102
I102
I118
AP
UV1316E
K7257M
K9362
-
-
Y
-
Y
10n
-
-
-
-
-
I149
5114
10u
2129
22u
I150
5115
10u
2131
22u
I151
5122
10u
2151
F146
2152
22u
10n
14
4103
2130
10n
2132
22u
F129
F131
15
1
2
3
1
IN
10
ISWI
2
IGND
3
8
GND
1
2
I103
3
4104
CHINA
UV1356
K9352
K6274k
Y
-
-
Y
10n
-
-
-
-
-
15
1102
I
GND
OFWK3953M
38M9
1105
OFWK6274K
38M
1103
I
GND
OFWK9656M
38M9
+5V_IF
+5VS
+5V_TUN
O1
O2IGND
NC
O1
O2ISWI
5
4
O1
O2
5
4
LATAM
UV1336
M1971M
4
5
6
7
10n
16
A115
A116
RES
5117
A125
A124
-
-
Y
-
-
-
-
-
-
-
-
16
VIF1
VIF2
SIF1
SIF2
17
I_17760_003.eps
180208
17
1101 B3
I143 I4
1102 B15
I144 I4
I145 B5
1103 D15
1104 F5
I146 B4
I147 B5
1105 C15
I148 I8
2112 C8
2117 B11
I149 H14
I150 I14
2118 D6
A
2119 D5
I151 J14
2120 D6
2121 E4
2122 D4
2123 F4
2124 F3
2125 F3
2126 F4
2127 F5
2128 G8
2129 I14
2130 I14
B
2131 I14
2132 I14
2133 H7
2134 H8
2135 H9
2136 H7
2137 I6
2138 I3
2139 I6
2140 J4
2141 J4
2142 D5
C
2143 F6
2144 I4
2145 I4
2147 B4
2148 B5
2149 C8
2151 J14
2152 J14
3110 B9
3111 B8
3113 C12
D
3115 C9
3117 D12
3118 D11
3119 D10
3123 F4
3124 F3
3125 H8
3126 H8
3127 I7
3133 H13
3134 I13
3135 G8
E
3136 B5
3137 B5
3140 J9
3141 J13
3151 J4
3152 J4
3188 D11
3190 E7
3191 E7
3192 C5
3193 I6
3194 J6
F
3195 J6
4101 C13
4102 C14
4103 D14
4104 D15
4121 D7
4122 E7
4124 H8
5111 B10
5112 C6
5114 H14
G
5115 I14
5116 H8
5117 B16
5118 B4
5119 B10
5120 D4
5121 E4
5122 J14
6103 D12
6110 B8
7109 D11
7113 G3
H
7114 G8
7131 E7
7132 E7
7133 B5
7134 J7
A115 B16
A116 B16
A124 D16
A125 D16
F101 B11
F112 C2
F114 H13
I
F115 C3
F116 C3
F117 C3
F118 C3
F119 C3
F120 C4
F121 C4
F128 F3
F129 H15
F130 G7
F131 I15
J
F133 C6
F134 B4
F140 H9
F142 C4
F143 C4
F146 J14
I102 C14
I103 D15
I104 G8
I111 B8
I113 J6
I114 C12
K
I118 D14
I120 D10
I121 D6
I123 E6
I124 F4
I125 F5
I126 G3
I127 G4
I128 H7
I129 H7
I130 I7
I131 I6
L
I133 J5
I135 J5
I136 J5
I137 C5
I138 H8
I139 H8
I141 D10
I142 G6
Circuit Diagrams and PWB Layouts
62LC8.2A LA 7.
SSB: Micro Processor
123
B03 B03
A
MICROPROCESSOR
4
B
CPU_RST
+3V3_STBY
10K3319
2315
100n
32
VOUT
BAS3166301
+3V3_STBY
4
2317
3V3
100n
3316 10K
F330
3325
7312
BD45275G
1
10K
VDD
Φ
SUBERGND
5
C
CNVSS
F380
+3V3_STBY
RES
2314
2316
3321
15p
15p
3318
2318
+3V3_STBY
D
27K
3308
+3V3_SW
3393
I380
7308
3L15
330R
100n
2323
NL27WZ08USG
I353
I330
I332
I327
I328
+3V3_STBY
15K
0V8
RES
7323-2
NL27WZ08USG
7
7323-1
I393
3395
2338
220n
4323
IL25
3
I345
MUTEn
CTRL_DISP1_up
CTRL_DISP4_up
BL_ON_OFF
ANTI_PLOP
CEC_INT
312
E
7301
BSH111
POWER_DOWN
3L86
6317
22K
RES
BZX384-C3V3
F
7317
BC847BW
BC847BW
TAC T _SWITCH_IN T
G
CE
CS
H
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
owner.
WR
RD
ALE_EMU
+3V3_STBY
3L04
1K5
1K5
+3V3_STBY
1
2
4 8
IL41
BZX384-C8V2
8
5
6
4
+3V3_STBY
+3V3_STBY
+3V3_STBY
1K23300
3305
10K
+12V_DISP
6318
3L57 100R
3338
3339 100R
3L17 100R
3L71
3384
3L94 4K7
3L73 47K
3L95 4K7
22R
22R
100n
100R
100R
100R3340
100R3302
100R3331
10K3314
1K0
AD(0:7)
4K73341
A(0:7)
A(8:19)
100R3386
1301
I352
I331
I333
I335
I338
F385
I301
F361
F387
10M
M30300SAGP
1V5
1V5
I312
I387
F381
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)
A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
A(18)
A(19)
I365
I368
I384
I306
I337
I302
I303
3V3
NC
I329
NC
I
1320
+5V_SW
1307
F388
1308
6310
6309
RES
RES
BZX384-C6V8
BZX384-C6V8
9
8
J
7
6
5
4
3
2
1
BM09B-SRSS-TBT
F360
K
RES
6313
1312
1310
1309
6312
6311
RES
RES
BZX384-C6V8
BZX384-C6V8
TO / FROM IR/ LED & KEYBOARD
F357
EMC
2342
10n
BZX384-C6V8
1313
6319
RES
1306
F382
I373
F383
F384
I375
1n0
1n0
EMC
EMC
2328
2329
BZX384-C6V8
1n0
RES
2330
6308
EMC
1n0
2331
BZX384-C6V8
3389 47R
3391 47R
2333 1n0
IL34
4310
RES
2340 1n0
EMC
2327
10n
220R5304
47R3390
47R3394
5678
+3V3_STBY
+3V3_STBY
+3V3_STBY
+3V3_SW
KEYB
LED1
LED2
3L67
3388
I311
I307
I308
I309
I310
I313
F362
IL42
F386
I326
I357
I364
I315
I342
I316
I344
I367
I366
I351
I319
I354
I320
I359
I321
I336
I339
I324
I349
I350
10K
3350
3350
+3V3_SW
3349 10K
3313
3315
3317
3320
3322
3303
3L05
3324
3357
3329
3L59
3380
3387
3346 100R
3332
3348 47R
3L18 100R
+3V3_STBY
47K3397
100R
100R
3382
3L62
3L56
3L58
3L55 10K
3L63 100R
3L53
I322
I323
3354
3L02 100R
7311
13
11
6
7
10
96
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
61
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
1n0
2334
5301
2313
100n
2312
14
60
VCC
IN
XTAL
OUT
BYTE
CNVSS
RESET
VREF
0
1
2
3
DATA
4
6
7
P0<0:7> SOUT3
AN0<0:7>
8
9
10
11
DATA
12
13
14
15
P1<0:7>
INT<3:5>
0
1
2
3
ADDR
4
5
6
7
D<0:7>
D<0:7>
A<0:7>
AN2<0:7>
P2<0:7>
8
9
10
11
ADDR
12
13
14
15
<0:7>
P3
16
17
ADDR
18
19
0
1
CS
2
3
P4<0:7>
WRL
WR
WRH
BHE
RD
BCLK
HLDA
HOLD
ALE
RDY
CLKOUT
P5<0:7>
VSS
12
62
+3V3_STBY
1R0
RES
3L10
I374
1n02336
EMC
2337 1n0
2335 1n0
1n0
RES
2339
60R
100n
2310
100n
97
AVCC
Φ
95
0
93
1
92
2
91
3
AN
90
4
89
5
88
6
87
7
P10<0:7>
KI<0:3>
TBIN<0:4>5
5
CLK3
4
SIN3
3
I390
2
DA0
1
DA1
100
CLK4
ANEX0
99
SOUT4
ANEX1
98
SIN4
ADTRG
AVSS
94
P9<0:7>
TA4 OU T
XCOUT
P8<0:7>
TA0 OU T
TA1 OU T
TA2 OU T
TA3OU T
P7<0:7>
P6<0:7>
TA4 IN
INT
TXD2
SDA2
TB5IN
TA0 IN
RXD2
SCL2
CLK2
TA1 IN
CTS2
RTS2
TA2 IN
TA3IN
CTS0
RTS0
CLK0
SCL1
RXD0
TXD0
SDA0
CTS0
CTS1
RTS1
CLKS1
CLK1
SCL1
RXD1
TXD1
SDA1
ZP
NMI
XCIN
20
U
19
U
18
0
17
1
16
2
15
28
27
26
V
25
V
V
24
W
23
W
22
21
36
35
34
33
32
31
30
29
I341
I396
I397
9
I398
8
0V6
TAC T _SWITCH_IN T
3V2
4303
I376
IL43
2332 1n0
IL35
REMOTE
LIGHT_SENSOR
4309
330R
100R
330R
100R
100R
100R
100R
330R
100R
100R
100R
100R
100R
100R
100R
100R3L61
100R
100R
100R3L23
100R3L24
100R
100R
100R
+3V3_SW
10K
3330
RES
RES
F323
IL38
F302
I340
IL30
2346
RES
2345
RES
234333p
RES
2344
RES
100K
3L96
33p
33p
33p
IL37
F305
IL33
F303
F309
+3V3_STBY
+3V3_STBY
+3V3_SW
+3V3_STBY
+3V3_STBY
+3V3_SW
+3V3_SW
3K3
4K7
3K33L12
10K
680R
3L64
3310
I362
IL39
3L01
3L133K3
3352 3K3
3351
RES
RES
RES FOR BDS
RES FOR BDS
L
3139 123 6349.1
12
3
4
5
678 9
91011
+3V3_SW
10K
3399
+3V3_STBY
+3V3_STBY
+3V3_STBY
10K
2K2
2K2
4301
3L79
RES SDM
3L75
3L76
4313
RES PAN EL
+3V3_SW
1K0
3L19
3L20
PRST
PWN
INTO
2348
+3V3_STBY
10K3347
1K0
100p
7314
BC847BW
1
3358
2K2
+3V3_STBY
RES
RES
RES
7L10
BC847BW
3L72
IL32
3
2
3306
PDTC114ET
+3V3_STBY
3L97
3301 100R
+3V3_SW+3V3_STBY+3V3_STBY
1K0
3L21
100p
2349
RES
IL40
47K
RES
RES
1K0
FOR PDP
RES
7322
4K7
3398
3L93 4K7
2324 1u0
3307
+3V3_STBY
4K7
3L98
1K0
3L22
RES
100K
1K03L16
10
12
13 14 15 16
DC_PROT
+3V3_SW
+5V_SW
BL_BOOST
LED1
KEYB
LIGHT_SENSOR
3356
RES
3396 1K0
RES
SC1_STATU S
SC2_STATU S
HDMI_HOTPLUG_RST
HDMI_RX_BUF_RST
10K
+3V3_SW
SVPWX_RST
+3V3_SW
LCD_PWR_ON
3333 10K
RES
I358
F356
F350
I356
SVPWX_INT
ITV_I2C_SCL
ITV_I2C_SDA
IIC_SDA_up
IIC_SCL_up
HPD_RST_A
FPGA_BL_BOOST
AUD_R ST
LED2
STANDBYn
STAN D BY
NVM_WC
+3V3_STBY
DDC_RST
REMOTE
DTV_IRQ
SAW_SW
CPU_RST
WR
RD
CE
IIC_SDA_up
IIC_SCL_up
+3V3_SW
5307
HDMI_MUX_RST
HP_DETECT
MJCMT8280 B5P
UART_0R X
UART_0T X
4326
4325
UART_1R X
UART_1TX
UART_1RX
UART_1TX
MT8280_EN
BOLT_ON_UART_TXD
BOLT_ON_UART_RXD
UART_0RX
UART_0TX
4317
4318
11 12 13
I347
30R
2347
100n
+3V3_STBY
10K3L14
RES
I318
4316
+3V3_STBY
A(1:7)
A(8:19)
RES
3326
2319 100n
RES
5306
I360
2341
100n
3SDA0 6
2 SCL0 7SCL1
NC
5EN
NC
RES
+3V3_STBY
2320
EEPROM
1
0
2
ADR
1
3
2 SDA
5302
60R
F310
A(1)
F311
A(2)
F313
A(3)
F315
A(4)
F317
A(5)
F319
A(6)
F321
A(7)
F324
A(8)
F326
A(9)
F328
A(10)
F329
A(11)
F331
A(12)
F332
A(13)
F333
A(14)
F334
A(15)
F335
A(16)
F336
A(17)
F338
A(18)
F339
A(19)
100R
100R3336
F340
F341
F366
F367
F369
30R
8
7302
PCA9515A
VCC
SDA1
EN5
NC
GND
4
7303
8
PCA9515A
VCC
SDA03SDA1 6
SCL02 SCL1 7
NC
GND
4
RES
4304
4305
100n
7L23
8
M24C64-WMN6
Φ
(8Kx8)
WC
3V3
SCL
4
F345
14
F368
2311
10u
M29W800DT-70N6
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
15
12
11
28
26
47
+3V3_SW
1
NC
+3V3_SW
3362 3K3
1
NC
+3V3_STBY
F363
7
F364
3355
6
F365
100R
5
3L54
100R
7310
EPROM
1Mx8/512Kx16
0
1
2
3
4
5
6
7
8
0
9
A
8M-1
10
11
12
13
14
15
16
17
18
RB
RP
WE
OE
CE
BYTE
37
27
46
+3V3_SW
4K73359
4K73360
I361
I363
3K3
4307
4306
I369
3361
RES
RES
IIC_SDA_SIDE
I370
IIC_SCL_SIDE
10K
3353
I372
15 16
D
NC
IIC_SDA
IIC_SCL
NVM_WC
IIC_SCL_up
IIC_SDA_up
1301 C4
1306 J3
1307 K1
1308 K1
1309 K2
1310 K2
1312 J2
1313 K3
A
1320 J1
2310 B5
2311 A15
2312 B5
2313 B5
2314 C3
B
C
D
E
F
G
H
I
J
K
L
2315 C2
2316 C3
2317 C2
2318 D3
2319 C13
2320 I14
2323 G2
2324 B10
2327 J4
2328 K3
2329 K3
2330 K4
2331 K4
2332 K5
2333 K4
2334 K4
2335 K5
2336 K5
2337 K5
2338 F2
2339 K5
2340 K4
2341 F13
2342 J3
2343 F7
2344 F7
2345 F7
2346 F7
2347 G13
2348 I9
2349 I10
3300 D3
3301 G10
3302 E3
3303 C7
3305 E3
3306 B10
3307 B10
3308 D2
3310 C8
3313 C7
3314 C3
3315 C7
3316 C3
3317 C7
3318 C3
3319 C2
3320 C7
3321 C3
3322 C7
3324 C7
3325 D1
3326 C13
3329 D7
3330 C7
3331 E3
3332 E7
3333 E12
3336 C13
3338 E3
3339 E3
3340 E3
3341 E3
3346 E7
3347 C9
3348 E7
3349 C7
3350 C6
3351 C8
3352 C8
3353 I15
3354 H7
3355 I15
3356 D11
3357 D7
3358 D10
3359 F15
3360 F15
3361 G15
3362 G15
3380 E7
3382 F7
3384 H3
3386 I3
3387 E7
3388 F6
3389 J4
3390 J4
3391 J4
3393 F2
3394 J4
3395 F2
3396 D11
3397 F6
3398 B10
3399 A9
3L01 C8
3L02 H7
3L04 F3
3L05 C7
3L10 J5
3L12 C8
3L13 C8
3L14 I13
3L15 G2
3L16 B10
3L17 E3
3L18 F7
3L19 I9
3L20 I9
3L21 I10
3L22 I10
3L23 I7
3L24 I7
3L53 H7
3L54 I15
3L55 G7
3L56 G7
3L57 E3
3L58 G7
3L59 D7
3L61 H7
3L62 F7
3L63 H7
3L64 B8
3L67 F6 I331 E4
3L71 H3
3L72 B10
AD(0:7)
F312
29
F314
31
F316
33
F318
35
38
F320
40
F322
42
F325
44
F327
30
32
34
36
39
41
43
F337
45
9
10
13
14
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)
A(0)
I_17760_004.eps
180208
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
A-1
3L73 I3
3L75 C9
3L76 C9
3L79 B9
3L86 E1
3L93 B10
3L94 I4
3L95 I3
3L96 C7
3L97 E10
3L98 E10
4301 B9
4303 J5
4304 H14
4305 H14
4306 G15
4307 G15
4309 K5
4310 K4
4313 C8
4316 J13
4317 H11
4318 I11
4323 G2
4325 I12
4326 I12
5301 B5
5302 A14
5304 J4
5306 E14
5307 G13
6301 C2
6308 J4
6309 K1
6310 K2
6311 K2
6312 K2
6313 J2
6317 E1
6318 F3
6319 K3
7301 E1
7302 F14
7303 G14
7308 F2
7310 B15
7311 C5
7312 C1
7314 B9
7317 F1
7322 D10
7323-1 H2
7323-2 G2
7L10 A10
7L23 I14
F302 C7
F303 H8
F305 G8
F309 H8
F310 B14
F311 B14
F312 B16
F313 B14
F314 B16
F315 B14
F316 B16
F317 B14
F318 B16
F319 B14
F320 B16
F321 B14
F322 B16
F323 C7
F324 B14
F325 B16
F326 B14
F327 B16
F328 C14
F329 C14
F330 C1
F331 C14
F332 C14
F333 C14
F334 C14
F335 C14
F336 C14
F337 C16
F338 C14
F339 C14
F340 C14
F341 C14
F345 J14
F350 F11
F356 F11
F357 J3
F360 J1
F361 E4
F362 C6
F363 I14
F364 I14
F365 I14
F366 C14
F367 C14
F368 A15
F369 D14
F380 C3
F381 C4
F382 J3
F383 J3
F384 J3
F385 E4
F386 D6
F387 H4
F388 J2
I301 E4
I302 H4
I303 H4
I306 I4
I307 C6
I308 C6
I309 C6
I310 C6
I311 C6
I312 C4
I313 C6
I315 E6
I316 E6
I318 I13
I319 G6
I320 G6
I321 H6
I322 H6
I323 H6
I324 I6
I326 D6
I327 E2
I328 E2
I329 H4
I330 E2
I332 E2
I333 E4
I335 E4
I336 H6
I337 I4
I338 E4
I339 H6
I340 D7
I341 E6
42 E6
I3
I344 E6
I345 I2
I347 G13
I349 I11
I350 I11
I351 G6
I352 D4
I353 D2
I354 G6
I356 G11
I357 D6
I358 E11
I359 H6
I360 E13
I361 F15
I362 D8
I363 F15
I364 D6
I365 H4
I366 F6
I367 F6
I368 H4
I369 G15
I370 G15
I372 I15
I373 J3
I374 J5
I375 J3
I376 J5
I380 F2
I384 I4
I387 C4
I390 D6
I393 F2
I396 F6
I397 F6
I398 F6
IL25 G2
IL30 D7
IL32 B10
IL33 G8
IL34 K4
IL35 K5
IL37 C8
IL38 C7
IL39 E8
IL40 B10
IL41 F3
IL42 C6
IL43 J5
Circuit Diagrams and PWB Layouts
63LC8.2A LA 7.
SSB: Trident WX69
94 10 11
0(LOW)
7C01-1
IXXX
IXXX
IXXX
2C91
2C93
IXXX
2C95
IXXX
2C97
2C99
2C60
2C62
2C64
33p
2V05
W1
U2
R4
L17
L18
L19
L20
K17
K18
K19
K20
N17
N18
N19
N20
M20
M19
M18
M17
J18
J19
J20
H17
H18
J17
RES
IXXX
10u 6.3V
10u 6.3V
10u
10u 6.3V
10u 6.3V 6.3V
10u 6.3V
10u 6.3V
10u 6.3V
SVP WX68
CVBS1
XTALI
XTALOY1Y_G1
MLF1
Y_G2
PLF2
Y_G3
CVBS_OUT1
AD0
CVBS_OUT2
AD1
AD2
PB_B1
AD3
PB_B2
AD4
PB_B3
AD5
PR_R1
AD6
PR_R2
AD7
PR_R3
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
AIN_H
ADDR6
AIN_V
ADDR7
PC_R
PC_G
ALE
PC_B
WR_
RD_
TESTMODE
V5SF
SDA
PWM0
SCL
CPU_CS
INTN
RESET
Pin Name
DP_HS P19 MPU in A/D Multiplix Mode MPU in A/D Separate Mode(*)
+3V3_SW
5C17
33R
+3V3_SW
5C18
33R
+3V3_SW
3C46
22R
3C48
22R
+1V2_ADC
5C19
33R
+1V2_ADC
5C20
33R
+1V2_ADC
5C21
33R
+1V2_ADC
5C22
33R
3C02
2n72C81
2n72C82
100R
100R
22R
33R
5
100R
100R
100R
100R
100R
100R18
100R
100R3C04-4
100R18
100R
100R
100R3C05-4
RES
2C90
2C92
2C94
2C96
2C98
2V01
2V02
2V03
33p2V04
100n
IC03
100n
100n
100n
IC04
100n
100n
IC05
100n
100n
3C23
220R
DPB_HS
DPB_VS
DPA_HS
DPA_VS
DPB_DE
DPA23
DPA22
DPA21
DPA20
DPA19
DPA18
DPA17
DPA16
DPA15
DPA14
DPA13
DPA12
DPA11
DPA10
DPA9
DPA8
DPA7
DPA6
DPA5
DPA4
DPA3
DPA2
DPA1
DPA0
DPB15
DPB14
DPB13
DPB12
DPB11
DPB10
DPB9
DPB8
1413
RES
3C24
100R
RES
2C74
22u
3V04
100R
NC
VS
P17
HS
P19
NC
V19
NC
V20
Y19
HDMI_DE
Y20
HDMI_VCLK
W20
Y15
NC
HDMI_Cr(9)
T19
HDMI_Cr(8)
Y12
HDMI_Cr(7)
U13
HDMI_Cr(6)
V13
HDMI_Cr(5)
W13
HDMI_Cr(4)
Y13
HDMI_Cr(3)
Y14
HDMI_Cr(2)
W14
HDMI_Cb(9)
V14
HDMI_Cb(8)
U14
HDMI_Cb(7)
U15
HDMI_Cb(6)
V15
HDMI_Cb(5)
W15
HDMI_Cb(4)
Y16
HDMI_Cb(3)
W16
HDMI_Cb(2)
V16
U16
U17
V17
W17
Y17
Y18
W18
V18
W19
NC
U18
NC
HDMI_Cb(1)
U19
HDMI_Cb(0)
U20
HDMI_Cr(1)
T20
HDMI_Cr(0)
T18
T17
R19
R20
14
BL_ADJUST_ANA
BL_ADJUST_PWM
DP_HS
HDMI_H
HDMI_V
HDMI_Y(9)
HDMI_Y(8)
HDMI_Y(7)
HDMI_Y(6)
HDMI_Y(5)
HDMI_Y(4)
HDMI_Y(3)
HDMI_Y(2)
HDMI_Y(1)
HDMI_Y(0)
15 16
+5V_SW
RES
IC18
+5V_SW
RES
+3V3_SW
RES
3C45
3C47
3C293C32
4K7
4K7
VGA_H
VGA_V
DP_HS
15 16
74LCX14T
1
4K7
3C31
22R
7C03-2
74LCX14T
3
7C03-3
74LCX14T
4K7
3C33
5
22R
7C03-4
74LCX14T
9
2
714
4
714
6
714
8
714
+3V3_SW
7C03-1
179
12
100n
Y4
2C03
V6
100n
2C04
100n2C05
W6
100n2C06
Y6
W2
V2
V9
C
FS1
FS2
FB1
FB2
10
100n2C07
W9
100n2C08
Y9
100n2C09
Y10
100n2C10
Y8
100n2C11
W8
100n2C12
V8
100n
2C13
V4
100n
C?
W4
100n
2C15
Y5
U4
NC
V10
U10
W10
F17
F16
G17
G18
100n
U8
2C17
Y7
100n2C18
100n
2C19
470R
3C19
F18
4C07
100n
2C21
Pin No
IC17
1(HIGH)
DDR_VREF
WX_BA1
WX_BA0
WX_DQS3
WX_DQS2
WX_DQS1
WX_DQS0
WX_CLKE
WX_DQM3
WX_DQM2
WX_DQM1
WX_DQM0
WX_MCK0#
WX_MCK0
WX_CS0#
WX_WE#
WX_CAS#
WX_RAS#
WX_MD31
WX_MD30
WX_MD29
WX_MD28
WX_MD27
WX_MD26
WX_MD25
WX_MD24
WX_MD23
WX_MD22
WX_MD21
WX_MD20
WX_MD19
WX_MD18
WX_MD17
WX_MD16
WX_MD15
WX_MD14
WX_MD13
WX_MD12
WX_MD11
WX_MD10
WX_MD9
WX_MD8
WX_MD7
WX_MD6
WX_MD5
WX_MD4
WX_MD3
WX_MD2
WX_MD1
WX_MD0
WX_MA11
WX_MA10
WX_MA9
WX_MA8
WX_MA7
WX_MA6
WX_MA5
WX_MA4
WX_MA3
WX_MA2
WX_MA1
WX_MA0
3C20 1K0
100n2C20
IXXX
2C30 100n
3C25
11
CVBS_RF
HD_Y_IN
SC2_Y_CVBS_IN
SVHS_Y_CVBS_IN
SC1_RF_OUT_CVBS
SC2_CVBS_MON_OUT
SVHS_C_IN
HD_PB_IN
SC1_B_IN
SC1_CVBS_IN
HD_PR_IN
SC2_C_IN
CVBS_IN_DTV
SC1_G_IN
SC1_R_IN
SC1_FBL_IN
PC_VGA_H
PC_VGA_V
VGA_R_IN
VGA_G_IN
VGA_B_IN
+3V3_STBY
SVPWX_INT
SVPWX_RST
FPGA_BL_DIMMING
RES
3C07
100R
10K
RES
2C73
10u
0(LOW)
IC09
IC10
IC11
IC12
IC13
IC01
+3V3_SW
3C22
4K7
7C04
IC02
BC847BW
IXXX
7C02
BC847BW
RES
4C08
7C01-2
SVP WX68
BA1
K4
BA0
K3
MVREF
E3
DQS3
B2
DQS2
B6
DQS1
B9
DQS0
B12
CLKE
K2
DQM3
B1
DQM2
A6
DQM1
A9
DQM0
A12
MCK0_
E1
MCK0
D1
CS1_
J3
CS0_
J4
WE_
K1
CAS_
J1
RAS_
J2
MD31
D3
MD30
C3
MD29
C2
MD28
C1
MD27
A1
MD26
A2
MD25
A3
MD24
C5
MD23
A4
MD22
B5
MD21
A5
MD20
D6
MD19
A7
MD18
B7
MD17
C7
MD16
D7
MD15
D8
MD14
C8
MD13
B8
MD12
A8
MD11
D9
MD10
D10
MD9
C10
MD8
B10
MD7
A10
MD6
A11
MD5
B11
MD4
C11
MD3
D12
MD2
A13
MD1
B13
MD0
C13
MA11
F1
MA10
F2
MA9
F3
MA8
F4
MA7
G4
MA6
G3
MA5
G2
MA4
G1
MA3
H1
MA2
H2
MA1
H3
MA0
H4
DPA_CLK
DPB_CLK
13126
3C30
22R
3C34
22R
2C33
100n
18
RES
RES
3C36
22R
3C37
22R
18
19
PC_VGA_H
PC_VGA_V
7C03-5
74LCX14T
11
10
714
"C00-"C99" & "V00 - V99"
MULTI 12NC : 3139_123_63481
SINGLE 12NC : 3139_123_63491
7C03-6
74LCX14T
13
I_17760_005.eps
20
14
12
7
180208
2019
5C06
33R
5C07
33R
5C08
33R
2
TRIDENT - WX69
FC01
6.3V
2C22
10u
2C27
2C29
10u 6.3V
10u 6.3V
FC02
2C26
FC03
2C28
100n
100n
100n
100n
2C25
WX_REGVCC
+3V3_SW
2C23
+3V3_SW
1
A
B04A B04A
+3V3_SW
B
+3V3_SW
C
+3V3_SW
D
E
4K7
RES
3C39
3C42
4K7
3C40
IC14 IC15
RES
3C43
WX_PVCC
WX_AVCC
100n
2C24
4K7
4K7
+3V3_SW
3C41
RES
3C44
3
4K7
4K7
WX_PVCC
WX_AVCC
WX_REGVCC
IC16
L4
PVCC
IC07
M5
ANTSTO
M4
AVCC1
N4
AVCC2
N5
AVCC3
P4
AVCC4
L2
RXC-
NC
L1
RXC+
NC
L3
TMDS_GND1
M3
TMDS_GND2
N3
TMDS_GND3
P3
TMDS_GND4
R1
TMDS_GND5
M2
RX0-
M1
RX0+
N2
RX1-
NC
N1
RX1+
P2
RX2-
P1
RX2+
R5
REGVCC
P5
DGND
T10
PWR5V
NC
T11
DSCL
NC
U11
DSDA
NC
U12
WS
V11
SCDT
NC
V12
SD0
W11
AUDIO CLK
NC
W12
SPDIF
NC
Y11
SCK
7C01-3
SVP WX68
TCLK1M
TCLK1P
TCLK2M
TCLK2P
TA1 P
TA1 M
TB1P
TB1M
TC1P
TC1M
TD1P
TD1M
TE1P
TE1M
TE2M
TE2P
TD2M
TD2P
TC2M
TC2P
TA2 M
TA2 P
TB2M
TB2P
5
A14
B14
A15
B15
A16
B16
A18
B18
A19
B19
B17
A17
F19
E20
H19
G20
G19
F20
E19
D20
B20
A20
D19
C20
6 17
TxFPGAe_0p
TxFPGAe_0n
TxFPGAe_1p
TxFPGAe_1n
TxFPGAe_2p
TxFPGAe_2n
TxFPGAe_3p
TxFPGAe_3n
TxFPGAe_4p
TxFPGAe_4n
TxFPGAe_CLKn
TxFPGAe_CLKp
TxFPGAo_CLKn
TxFPGAo_CLKp
TxFPGAo_4n
TxFPGAo_4p
TxFPGAo_3n
TxFPGAo_3p
TxFPGAo_2n
TxFPGAo_2p
TxFPGAo_0n
TxFPGAo_0p
TxFPGAo_1n
TxFPGAo_1p
7
Pin No
Pin Name
WS U12 Use ALE to latch Address Use Falling Edges of WR#&RD# to latch Address(*)
SD0 V12 Use Rising Edge of WR# to latch data(*) Use Falling Edge of WR# to latch data
SCK Y11 I2C Slave Address=0x7E/7F(*) I2C Slave Address=0x7C/7D
2C02
WX_PAVDD 1
AD(0:7)
WX_PAVDD 2
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
A(0:7)
AD(7)
A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
ALE_EMU
WR
RD
IIC_SDA_SIDE
TO FPGA / TO LVDS CONNECTOR
IIC_SCL_SIDE
CS
1(HIGH)
18p2C01
1M0
3C01
18p
3C04-1
3C04-2 100R
3C04-3
3C05-1
3C05-2
3C05-3
3C06-1 100R
3C06-2
3C06-3
3C06-4
3C03-4 100R
3C03-3 100R
3C03-2
3C03-1
3C08
3C09
3C10
8
1C24
27
36
4
27
36
45
18
27
36
45
45
36
27
18
24M0
F
+1V2_SW
5C09
FC04
G
H
I
J
33R
5C10
33R
5C11
33R
FC05
FC06
+1V2_CORE
2C45
+2V5_VDDMQ
2C34
2C41
2C43
10u 6.3V
K
+3V3_SW
5C12
+3V3_SW
+3V3_SW
5C14
33R
+1V2_PLL
+1V2_PLL
5C13
2C72
5C15
5C16
33R
33R
6.3V
10u
33R
33R
L
M M
N
O
P
22u 6.3V
2C46
2C56
FC07
FC08
FC09
2C75
FC10
FC11
22u 6.3V
6.3V
22u
2C35
2C42
2C44
10u 6.3V
10u 6.3V
2C67
2C70
100n
2C78
2C80
2C84
+1V2_ADC
100n
+1V2_PLL
100n
+1V2_CORE
100n
100n2C47
100n
100n
2C57
2C58
WX_AVDD3_ADC1
2C68
10u 6.3V
WX_AVSS_ADC1
WX_AVDD3_ADC2
2C71
10u 6.3V
WX_AVSS_ADC2
WX_LVDS_VDD
100n
2C76
2C77
WX_LVDS_VSS
WX_AVDDAPLL
2C79
10u 6.3V
WX_AVSSAPLL
WX_AVDDLLPLL
6.3V
2C83
10u
WX_AVSSLLPLL
100p
100p2C85
100p2C87
100p2C89
100n2C48
100n2C59
100n
100n
100n
100n
100n
100n2C49
100n
2C16
100n2C50
100n
2C61
+3V3_SW
2C36
100n
100n2C53
100n2C52
2C51
100n
100n
100n
2C63
2C31
2C32
+2V5_VDDMQ
0R
3C49
WX_AVDD3_ADC1
WX_AVDD3_ADC2
WX_AVDD3_OUTBUF
WX_AVDD3_BG_ASS
WX_PAVDD 1
WX_PAVDD 2
WX_AVDD_ADC1
WX_AVDD_ADC2
WX_AVDD_ADC3
WX_AVDD_ADC4
+1V2_PLL
WX_LVDS_VDD
WX_AVDDAPLL
WX_AVDDLLPLL
100p2C86
100p2C88
10u 6.3V
RES
2C69
10u
100n2C54
2C65
IXXX
470p
100n2C38
100n2C55
470p
2C66
+3V3_SW
100n2C39
100n
2C40
NC
100n2C37
C14
C15
D13
D14
D15
E13
E14
E15
G16
H5
H16
J5
J16
K5
K16
R16
T14
T15
B4
C4
D4
D5
D11
E5
E6
E9
E10
E11
E12
F5
G5
L16
M16
N16
P16
T12
T13
R17
R18
P20
Y3
U9
U3
E2
E8
T3
T4
U5
U7
T8
U6
D18
E17
D16
C17
D17
U1
R2
V5
W5
V7
W7
7C01-4
SVP WX68
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8
VDDC9
VDDC10
VDDC11
VDDC12
VDDC13
VDDC14
VDDC15
VDDC16
VDDC17
VDDC18
VDDM1
VDDM2
VDDM3
VDDM4
VDDM5
VDDM6
VDDM7
VDDM8
VDDM9
VDDM10
VDDM11
VDDM12
VDDM13
VDDH1
VDDH2
VDDH3
VDDH4
VDDH5
VDDH6
VDDH7
VDDH8
NC
AVDD3_ADC1
AVDD3_ADC2
AVDD3_OUTBUF
VDDR1
VDDR2
AVDD3_BG_ASS
PAVDD1
PAVDD2
AVDD_ADC1
AVDD_ADC2
AVDD_ADC3
AVDD_ADC4
LVDS_VDDP
LVDS_VDDA
LVDS_VDDD
LVDS_VDDO1
LVDS_VDDO2
AVDDAPLL
AVDDLLPLL
VREFN_1
VREFP_1
VREFN_2
VREFP_2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
AVSS_OUTBUF
VSSR1
VSSR2
AVSS_BG_ASS
PAV SS 1
PAV SS 2
AVSS_ADC1
AVSS_ADC2
AVSS_ADC3
AVSS_ADC4
LVDS_VSSP
LVDS_VSSA
LVDS_VSSD
LVDS_VSSO1
LVDS_VSSO2
AVSSAPLL
AVSSLLPLL
M10
M11
M12
M13
B3
C6
C9
C12
D2
H8
H9
H10
H11
H12
H13
J8
J9
J10
J11
J12
J13
K8
K9
K10
K11
K12
K13
L5
L8
L9
L10
L11
L12
L13
M8
M9
N8
N9
N10
N11
N12
N13
P18
T16
H20
Y2V3
E4
E7
W3
T2
R3
T5
T7
T9
T6
E18
E16
C16
C18
C19
V1
T1
WX_AVSS_OUTBUF
WX_AVSS_BG_ASS
WX_PAVSS1
WX_PAVSS2
WX_AVSS_ADC1
WX_AVSS_ADC2
WX_AVSS_ADC3
WX_AVSS_ADC4
WX_LVDS_VSS
WX_AVSSAPLL
WX_AVSSLLPLL
WX_AVDD3_OUTBUF
WX_AVSS_OUTBUF
WX_AVDD3_BG_ASS
WX_AVSS_BG_ASS
WX_PAVDD 1
WX_PAVSS1
WX_PAVDD 2
WX_PAVSS2
WX_AVDD_ADC1
WX_AVSS_ADC1
WX_AVDD_ADC2
WX_AVSS_ADC2
WX_AVDD_ADC3
WX_AVSS_ADC3
WX_AVDD_ADC4
WX_AVSS_ADC4
3139 123 6349.1
1
2
3
4
5
7
8
3C44 D3
1C24 B7
3C45 G13
2C01 A6
2C02 B6
3C46 H8
2C03 B9
3C47 H13
2C04 B9
2C05 C9
2C06 B9
2C07 B9
2C08 B9
2C09 B9
2C10 B9
2C11 B9
2C12 C9
2C13 B9
2C15 C9
2C16 H3
2C17 C9
2C18 C9
2C19 C9
2C20 D9
2C21 D9
2C22 B2
2C23 B2
2C24 B2
2C25 B2
2C26 B2
2C27 B2
2C28 C2
2C29 C2
2C30 D9
2C31 H3
2C32 H3
2C33 B15
2C34 E2
2C35 E2
2C36 F3
2C37 F4
2C38 F4
2C39 F4
2C40 F4
2C41 F2
2C42 F2
2C43 F2
2C44 F2
2C45 G2
2C46 G2
2C47 G2
2C48 G3
2C49 G3
2C50 G3
2C51 G3
2C52 G3
2C53 G3
2C54 G3
2C55 G4
2C56 H2
2C57 H2
2C58 H3
2C59 H3
2C60 I8
2C61 H3
2C62 J8
2C63 H3
2C64 K8
2C65 H4
2C66 H4
2C67 I2
2C68 I2
2C69 I4
2C70 I2
2C71 I2
2C72 J2
2C73 E10
2C74 D12
2C75 J2
2C76 J2
2C77 J3
2C78 K2
2C79 K2
2C80 K2
2C81 B7
2C82 B7
2C83 K2
2C84 K2
2C85 K2
2C86 K3
2C87 L2
2C88 L3
2C89 L2
2C90 G7
2C91 G8
2C92 G7
2C93 G8
2C94 H7
2C95 H8
2C96 H7
2C97 H8
2C98 I7
2C99 I8
2V01 I7
2V02 J7
2V03 K7
2V04 D7
2V05 D8
2V06 C9
3C01 B7
3C02 B7
3C03-1 C7
3C03-2 C7
3C03-3 C7
3C03-4 C7
3C04-1 B7
3C04-2 B7
3C04-3 B7
3C04-4 B7
3C05-1 B7
3C05-2 B7
3C05-3 B7
3C05-4 C7
3C06-1 C7
3C06-2 C7
3C06-3 C7
3C06-4 C7
3C07 D10
3C08 C7
3C09 C7
3C10 D7
3C19 C9
3C20 C9
3C22 D11
3C23 D11
3C24 D12
3C25 D9
3C29 A13
3C30 A15
3C31 A13
3C32 B13
3C33 B13
3C34 B15
3C36 B15
3C37 C15
3C39 D2
3C40 D2
3C41 D3
3C42 D2
3C43 D2
3C48 H8
3C49 I3
3V04 E12
4C07 D9
4C08 E11
5C06 B2
5C07 B2
5C08 C2
5C09 E2
5C10 F2
5C11 F2
5C12 I2
5C13 I2
5C14 J2
5C15 J2
5C16 K2
5C17 G8
5C18 G8
5C19 I8
5C20 I8
5C21 J8
5C22 J8
7C01-1 B8
7C01-2 F11
7C01-3 B4
7C01-4 F5
7C02 E11
7C03-1 A14
7C03-2 B14
7C03-3 B14
7C03-4 C14
7C03-5 C16
7C03-6 C16
7C04 D11
FC01 B2
FC02 B2
FC03 C2
FC04 E2
FC05 F2
FC06 F2
FC07 I2
FC08 I2
FC09 J2
FC10 J2
FC11 K2
IC10 B4
IC11 C8
IC13 C8
IC14 D8
IC15 D9
IC16 D2
IC17 D3
IC18 D3
IC19 D11
IC20 D11
IC21 D10
IC22 E9
IC23 G8
IC24 G8
IC25 G13
IC26 H10
IC27 H10
IC28 H8
IC29 H10
IC30 H10
IC31 H10
IC32 H8
IC33 I8
IC35 J4
IC36 J8
A
B
C
D
E
F
G
H
I
J
K
L
N
O
P
Circuit Diagrams and PWB Layouts
64LC8.2A LA 7.
SSB: DDR Interface
1
B04B B04B
DDR INTERFACE
2 3
45
76
A
100n
10
11
13
54
56
57
59
60
62
63
65
14
17
25
43
53
42
19
50
2D33
2D34
2
4
5
7
8
+2V5_VDDMQ
100n
100n
1_DQ0
1_DQ1
1_DQ2
1_DQ3
1_DQ4
1_DQ5
1_DQ6
1_DQ7
1_DQ8
1_DQ9
1_DQ10
1_DQ11
1_DQ12
1_DQ13
1_DQ14
1_DQ15
NC
1K0
3D15
DDR_VREF
1K0
3D16
3D06-1 22R
3D06-3 22R
3D06-4 22R4
3D05-3 22R
3D02-33 22R
3D02-2
3D02-1 22R
3D01-2 2 7
3D01-4
1 8
273D06-2 22R
3 6
5
53D05-4 22R4
3 6
273D05-2 22R
83D05-1 22R1
6
22R
27
1 8
1 8
22R3D01-1
22R
22R3D01-33 6
4 5 22R
WX_MD4
WX_MD5
WX_MD6
WX_MD7
WX_MD3
WX_MD2
WX_MD1
WX_MD0
WX_MD15
WX_MD14
WX_MD12
WX_MD13
WX_MD9
WX_MD8
WX_MD10
WX_MD11
WX_MA0
WX_MA1
WX_MA2
WX_MA3
WX_MA4
WX_MA5
WX_MA6
WX_MA7
WX_MA8
WX_MA9
WX_MA10
WX_MA11
DDR_VREF
WX_MCK0
WX_MCK0#
WX_CLKE
WX_BA0
WX_BA1
WX_DQM2
WX_DQM3
WX_DQS2
WX_DQS3
WX_WE#
WX_CAS#
WX_RAS#
3D38
+2V5_VDDMQ
FD02
100n
2D32
2D31
RES
470p2D12
100n2D03
15
55
61
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
NC1
NC2
NC3
NC4
NC5
NC6
DNU1
DNU2
64
+2V6_SW
5D03
33R
2D71
FD01
+2V5_VDDMQ
6.3V
10n
2D72
22u
B
10n
10n2D04
100n2D02
C
WX_MA0
WX_MA1
WX_MA2
D
E
F
G
WX_MA3
WX_MA4
WX_MA5
WX_MA6
WX_MA7
WX_MA8
WX_MA9
WX_MA10
WX_MA11
DDR_VREF
WX_CS0# WX_CS0#
WX_MCK0
WX_MCK0#
WX_CLKE
WX_BA0
WX_BA1
WX_DQM0
WX_DQM1
WX_DQS0
WX_DQS1
WX_WE#
WX_CAS#
WX_RAS#
3D10
2D14
51R 1%
10n
3D11 15R
3D09 15R
ID07
3D14 51R 1%
K4D261638K
1_DDQ
1_DDQS1
2D18
S0
470p
10u
2D11
1
18
VDD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10|AP
A11
VREF
CS_
CK
CK_
CKE
BA0
BA1
LDM
UDM
LDQS
UDQS
WE_
CAS_
RAS_
3448666125258
ID01
29
30
31
32
35
36
37
38
39
40
28
41
49
24
45
46
44
26
27
20
47
16
51
21
22
23
7D01
VSS VSSQ
10n2D09
100n2D10
2D08
3
33
9
8 9
+2V5_VDDMQ+2V5_VDDMQ
10u
2D46
7D02
K4D261638K
29
30
31
32
35
36
37
38
39
40
28
41
49
24
2_DDQS2
2_DDQS3
45
46
44
26
27
20
47
16
51
21
22
23
ID06
15R
15R3D40
470p
100n
2D43
2D37
1
18
VDDVDDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10|AP
A11
VREF
CS_
CK
CK_
CKE
BA0
BA1
LDM
UDM
LDQS
UDQS
WE_
CAS_
RAS_
VSS VSSQ
34
ID05
2D57 10n
33
48
2D58 10n
3
66612
2D59 10n
9
470p
100n
2D60
2D38
155561
VDDQ
525864
10 11
22n
2_DQ16
2
2_DQ17
4
2_DQ18
5
2_DQ19
7
2_DQ20
8
2_DQ21
2_DQ22
2_DQ23
2_DQ24
2_DQ25
2_DQ26
2_DQ27
2_DQ28
2_DQ29
2_DQ30
2_DQ31
NC
RES FOR EMC
2D78
+2V5_VDDMQ
100n
2D39
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
NC1
NC2
NC3
NC4
NC5
NC6
DNU1
DNU2
2D73
10
11
13
54
56
57
59
60
62
63
65
14
17
25
43
53
42
19
50
22n
1 8
3D43-1
27
3D43-2
3 6
3D43-3
3D43-4
4522R
3D44-4
3 6
3D44-3
27
3D44-2
3D44-1 1 8
4545 22R22R3D02-4
3D47-4
3D47-3 22R3 6
273D47-2
3D47-1
1 8
3D48-1
27
3D48-2
3 6
3D48-3
45
3D48-4
22R
22R
22R
22R45
22R
22R
22R
22R
22R1 8
22R
22R
22R
22R
WX_MD20
WX_MD21
WX_MD22
WX_MD23
WX_MD18
WX_MD16
WX_MD17
WX_MD19
WX_MD31
WX_MD30
WX_MD28
WX_MD29
WX_MD24
WX_MD25
WX_MD26
WX_MD27
12
A
B
C
D
E
F
G
2D02 C3
2D03 C4
2D04 C3
2D08 C4
2D09 C4
2D10 C4
2D11 C3
2D12 C4
2D14 G2
2D18 C3
2D31 B4
2D32 B4
2D33 B5
2D34 B5
2D37 C9
2D38 C9
2D39 C10
2D43 C9
2D46 C8
2D57 C9
2D58 C9
2D59 C9
2D60 C10
2D71 B2
2D72 B3
2D73 B10
2D78 B11
3D01-1 E5
3D01-2 E5
3D01-3 E5
3D01-4 E5
3D02-1 E5
3D02-2 E5
3D02-3 D5
3D02-4 D5
3D05-1 D5
3D05-2 D5
3D05-3 D5
3D05-4 D5
3D06-1 D5
3D06-2 D5
3D06-3 D5
3D06-4 D5
3D09 F2
3D10 G2
3D11 F2
3D14 G2
3D15 B5
3D16 B5
3D38 F7
3D40 F7
3D43-1 D11
3D43-2 D11
3D43-3 D11
3D43-4 D11
3D44-1 D11
3D44-2 D11
3D44-3 D11
3D44-4 D11
3D47-1 E11
3D47-2 E11
3D47-3 D11
3D47-4 D11
3D48-1 E11
3D48-2 E11
3D48-3 E11
3D48-4 E11
5D03 B2
7D01 D3
7D02 D9
FD01 B3
FD02 B4
ID01 G3
ID05 G9
ID06 E8
ID07 G2
H
3139 123 6349.1
12
3 4
H
I_17760_006.eps
180208
5
67
8
912
10
11
SSB: FPGA Interface
Circuit Diagrams and PWB Layouts
65LC8.2A LA 7.
654321
B04C B04C
A
A
B
B
C
C
+3V3_FPGA
5201
30R
I205
2211
10n
2
FPGA INTERFACE
7201
EPCS4SI8
7
8
F222
1
CS_
Φ
DCLK
ASDI
4
F223
6
F224
5
F227
DATA
3
VCC
SCD
GND
nCSO
DCLK
ASDO
DATA 0
TMS_FPGA
TDI_FPGA
TDO_FPGA
TCK_FPGA
+3V3_FPGA
+3V3_FPGA
3231
1K0
RES
3232
F204
F228
F202
F225
I201
DSO751SV
1
2214
10u
3240 100R
3235 100R
RES
3238
+3V3_FPGA
1204
4
27M0
2
100R3246
100R3234
1K0
5202
30R
+3V3_FPGA
I232
3
3236
47R
F203
F236
F205
F201
F229
F237
JTAG_TMS
JTAG_TD I
JTAG_TD O
JTAG_TC K
F238
CLK_OSC1
1735446-6
1203
1
2
3
4
5
6
7
7654321
8
8
(FOR DEVELOPMENT)
SOFTWARE DEBUGGER
FOR PROGRAMMING FPGA
1205
1
2
3
4
1735446-4
GNDDC24V
F210
+24V
1735446-6
GNDDC24V
1206
1
2
3
4
5
6
D
D
E
E
F
F
IIC_SCL_up
IIC_SDA_u p
AMBI_SCL
AMBI_SDA
I209
F211
3204
1K5
3205 100R
3206
100R
2204
+3V3_FPGA
3203
2203
1n01n0
+3V3_FPGA
4202
RES
I2S_SEL1
I207
4205
TO DRIVE IC AL DRIVERS
1K5
S_SCL
S_SDA
+3V3_FPGA
4201
I2S_SEL2
I206
2217
2215
100n
2216
100n
RES
4203
100n
2218
100n
+3V3_FPGA
4206
2219
1735446-7
4204
100n
1202
2 CONNECTORS
OVERLAPPING 7PIN
1
2
3
4
5
6
7
F239
F240
I212
I213
2205 1n0
2206 1n0
2207 1n0
2208 1n0
1n0
2209
1n0
2210
3201
100R
100R3202
RES
2201
RES
FOR PWM AL DRIVER
3247 100R
3222
3225
3207
3248
100R
100R3224
100R
100R
100R
I233
I234
RES
2202
100p100p
F207
F208
MAIN_SCL
MAIN_SDA
ambi_pwm(0)
ambi_pwm(1)
ambi_pwm(2)
ambi_pwm(3)
ambi_pwm(4)
ambi_pwm(5)
AMBILIGHT ONLY
3139 123 6349.1
654321
654321
7
87
8
I_17760_007.eps
180208
A
A
B
B
C
C
D
D
E
E
F
F
1202 E3
1202 E3
1203 C6
1203 C6
1204 B5
1204 B5
1205 E7
1205 E7
1206 E8
1206 E8
2201 D5
2201 D5
2202 D6
2202 D6
2203 E2
220
3 E2
2204 E1
2204 E1
2205 F4
2205 F4
2206 F4
2206 F4
2207 F4
2207 F4
2208 F4
2208 F4
2209 F4
2209 F4
2210 F5
2210 F5
2211 B1
2211 B1
2214 B4
2214 B4
2215 F2
2215 F2
2216 F2
2216 F2
2217 F2
2217 F2
2218 F2
2218 F2
2219 F3
2219 F3
3201 C5
3201 C5
3202 D5
3202 D5
3203 D2
3203 D2
3204 D1
3204 D1
3205 D1
3205 D1
3206 D1
3206 D1
3207 F5
3207 F5
3222 E5
3222 E5
3224 E5
3224 E5
3225 E5
3225 E5
3231 B4
3231 B4
3232 B4
3232 B4
3234 C4
3234 C4
3235 C4
3235 C4
3236 B5
3236 B5
3238 C4
3238 C4
3240 C4
3240 C4
3246 C4
3246 C4
3247 E5
3247 E5
3248 F5
3248 F5
4201 E2
4201 E2
4202 E1
4202 E1
4203 F2
4203 F2
4204 F3
4204 F3
4205 F1
4205 F1
4206 E3
4206 E3
5201 A1
5201 A1
5202 A5
5202 A5
7201 B1
7201 B1
F201 C6
F201 C6
F202 C4
F202 C4
F203 C6
F203 C6
F204 C4
F204 C4
F205 C6
F205 C6
F207 C6
F207 C6
F208 D6
F208 D6
F210 E7
F210 E7
F211 D1
F211 D1
F222 B2
F222 B2
F223 B2
F223 B2
F224 B2
F224 B2
F225 C4
F225 C4
F227 C2
F227 C2
F228 C4
F228 C4
F229 C6
F229 C6
F236 C6
F236 C6
F237 B6
F237 B6
F238 E4
F238 E4
F238 C6
F238 C6
F239 E4
F239 E4
I201 A4
I201 A4
I205 B1
I205 B1
I206 F2
I206 F2
I207 F2
I207 F2
I209 D1
I209 D1
I212 E4
I212 E4
I213 F4
I213 F4
I232 B5
I232 B5
I233 E5
I233 E5
I234 F5
I234 F5
Circuit Diagrams and PWB Layouts
66LC8.2A LA 7.
SSB: FPGA I/O Banks
1
2
3
456
7
8
9
10
11
12
13
14
15
16
FPGA I/O BANKS
B04D B04D
A
TxFPGAo_3p
TxFPGAo_3n
TxFPGAo_1p
TxFPGAo_1n
TxFPGAo_0p
TxFPGAo_0n
TxFPGAo_2p
TxFPGAo_2n
TxFPGAo_4p
TxFPGAo_4n
2715
10n
+3V3_FPGA
+2V5out-FPGA
+2V5in-FPGA
B
C
+3V3_SW
+2V5_SW
30R
5701
30R
5702
30R
F702
F703
2706
4u7
4u7
2701
1u0
2717
2707
10n
2718
10n
2708 2709
10n
10n
2720
2719
10n
10n
2710
10n
2721
10n
2711
10n
2702
10n
2703
2712
10n
2704
2713
10n
2705
10n
10n
2714
10n
10n
F701
5700
D
+1V2_SW
5703
30R
4V
2724
47u
2725
10n
2726
10n
+1V2-FPGA
E
5704
30R
F705
5705
30R
F704
2729
1u0
2730
10n
+1V2-PLL
F
TxFPGAo_CLKp
TxFPGAo_CLKn
G
ASDO
nCSO
MAIN_SDA
AMBI_S
H
ambi_pwm(5)
ambi_pwm(2)
ambi_pwm(3)
DA
RES
2700
1n0
FPGA_BL_BOOST
FPGA_BL_DIMMING
C3
F4
P1
P2
N1
N2
L1
L2
K4
K5
K1
K2
E1
E2
D3
I728
D4
I713
EP2C5F256C7N
IO_C3|ASDO
IO_F4|CSO_
IO_P1|LVDS0p
IO_P2|LVDS0n
IO_N1|LVDS1p
IO_N2|LVDS1n
IO_L1|LVDS2p
IO_L2|LVDS2n
IO_K4|LVDS3p
IO_K5|LVDS3n
IO_K1|LVDS4n
IO_K2|LVDS4p
IO_E1|LVDS5p
IO_E2|LVDS5n
IO_D3|LVDS6p
IO_D4|LVDS6n
7700-2
Φ
BANK1
IO_E3|LVDS
IO_E4|LVDS7n
IO_D5|LVDS8p
IO_E5|LVDS8n
IO_C1|LVDS9p
IO_C2|LVDS9n
IO_L4|PLL1_OUTp
IO_M4|PLL1_OUTn
IO_F3|VREFB1N0
IO_J4|VREFB1N1
IO_L3
IO_M1
IO_M2
IO_M3
IO_P3
E3
7p
E4
NC
D5
I712
E5
C1
C2
L4
M4
F3
J4
L3
M1
M2
M3
P3
ambi_pwm(4)
I705
ambi_pwm(0)
ambi_pwm(1)
NC
AMBI_SCL
TxFPGAe_CLKp
TxFPGAe_CLKn
I
J
3747
22R
3749
22R
3738
22R
3740
22R
3735
22R
3737
22R
3741
22R
3743
22R
3744
22R
3746
22R
3750
3751
3752
3753
3748
180R
3739
180R
3736
180R
3742
180R
3745
180R
3720
TxFPGAe_3p
22R
3721
180R
3722
TxFPGAe_3n
22R
3723
INPUT BANK
7700-5
EP2C5F256C7N
Φ
IO_M11|LVDS43p
IO_L11|LVDS43n
IO_T14|LVDS44p
IO_R14|LVDS44n
IO_T13|LVDS45p
IO_R13|LVDS45n
IO_T12|LVDS46p
IO_R12|LVDS46n
IO_P12|LVDS47p
IO_P13|LVDS47n
IO_K11|LVDS48p
IO_K10|LVDS
IO_R10|LVDS49p
IO_T10|LVDS49n
IO_L9|LVDS50p
IO_L10|LVDS50n
IO_T11|LVDS51p
IO_R11|LVDS51n
IO_T9|LVDS52p
IO_R9|LVDS52n
IO_T8|LVDS53p
IO_R8|LVDS53n
EP2C5F256C7N
0
H1
1
J2
2
J1
3
H16
CLK
4
H15
5
J15
6
J16
7
F1
DATA0
H4
DCLK
BANK4
IO_T7|LVDS54p
IO_R7|LVDS54n
IO_T5|LVDS55p
IO_R5|LVD
IO_T4|LVDS56p
IO_R4|LVDS56n
IO_P5|LVDS57p
IO_P4|LVDS57n
IO_T3|LVDS58p
IO_R3|LVDS58n
IO_N9|LVDS59p
IO_N10|LVDS59n
48n
IO_L7|LVDS60p
IO_L8|LVDS60n
IO_N11|VREFB4N0
IO_N8|VREFB4N1
IO_L12
IO_P11
IO_T6
7700-1
Φ
CONTROL
STATU S
CONFIG
CONF_DONE
MSEL
TMS
TDO
TCK
S55n
CE
TDI
T7
R7
T5
R5
T4
R4
P5
P4
T3
R3
N9
N10
L7
L8
N11
N8
L12
P11
T6
G5H2
F706
M13
J5
L13
J13
0
K12
1
F2
G1
G2
H5
M11
L11
T14
R14
T13
R13
T12
R12
P12
P13
K11
K10
R10
T10
L9
L10
T11
R11
T9
R9
T8
R8
CLK_OSC1
22R
22R
22R
22R
MAIN_SCL
DATA0
DCLK
RES
2734
1n0
NC
3714
180R
3713
180R
+3V3_FPGA
3703
10K
F734
F733
TCK_FPGA
TMS_FPGA
TDO_FPGA
TDI_FPGA
I729
3700
3724
180R
3727
180R
3730
180R
3733
180R
+3V3_FPGA
3701
10K
10K
NC
TxFPGAe_2p
22R
3725
TxFPGAe_2n
22R
3726
TxFPGAe_1p
22R
3728
TxFPGAe_1n
22R
3729
TxFPGAe_0p
22R
3731
TxFPGAe_0n
22R
3732
TxFPGAe_4p
22R
3734
TxFPGAe_4n
22R
4700
I730
4701
3702
RES
10K
OUTPUT BANK
C4
IO_C4|LVDS10p
C5
IO_C5|LVDS10n
G7
IO_G7|LVDS11p
G6
IO_G6|LVDS11n
F9
IO_F9|LVDS12p
F10
IO_F10|LVDS12n
E6
IO_E6|LVDS13p
F6
IO_F6|LVDS13n
A3
IO_A3|LVDS14p
B3
IO_B3|LVDS14n
A4
IO_A4|LVDS15p
B4
IO_B4|LVDS15n
A5
IO_A5|LVDS16p
B5
IO_B5|LVDS16n
C6
IO_C6|LVDS17p
D6
IO_D6|LVDS17n
A6
IO_A6|LVDS18p
B6
IO_B6|LVDS18n
F8
IO_F8|LVDS19p
F7
IO_F7|LVDS19n
B7
IO_B7|LVDS20p
A7
IO_A7|LVDS20n
7700-3
EP2C5F256C7N
Φ
BANK2
IO_B9|LVDS21p
IO_A9|LVDS21n
IO_D10|LVDS22p
IO_D11|LVDS22n
IO_A10|LVDS23p
IO_B10|LVDS23n
IO_G11|LVDS24p
IO_G10|LVDS24n
IO_A12|LVDS25p
IO_B12|LVDS25n
IO_A13|LVDS26p
IO_B13|LVDS26n
IO_C12|LVDS27p
IO_C13|LVDS27n
IO_A14|LVDS28p
IO_B14|LVDS28n
IO_D8|VREFB2N1
IO_C11|VREFB2N0
IO_A8
IO_A11
IO_B11
7700-6
+3V3_FPGA
+2V5out-FPGA
+2V5in-FPGA
+1V2-FPGA
+1V2-PLL
B9
A9
D10
D11
A10
B10
G11
G10
A12
B12
A13
NC
B13
C12
C13
A14
B14
D8
C11
A8
A11
B11
D13
C14
D16
D15
G13
G12
H11
J11
NC
F16
F15
G15
G16
J12
H12
K15
K16
L16
L15
7700-4
EP2C5F256C7N
BANK3
IO_D13|LVDS
IO_C14|LVDS29n
IO_D16|LVDS30p
IO_D15|LVDS30n
IO_G13|LVDS31p
IO_G12|LVDS31n
IO_H11|LVDS32p
IO_J11|LVDS32n
IO_F16|LVDS33p
IO_F15|LVDS33n
IO_G15|LVDS34p
IO_M14|VREFB3N1
IO_H13|VREFB3N0
IO_G16|LVDS34n
IO_E14|PLL2_OUTp
IO_J12|LVDS35p
IO_D14|PLL2_OUTn
IO_H12|LVDS35n
IO_K15|LVDS36p
IO_K16|LVDS36n
IO_L16|LVDS37p
IO_L15|LVDS37n
Φ
29p
IO_M16|LVD
IO_M15|LVDS38n
IO_N16|LVDS39p
IO_N15|LVDS39n
IO_P16|LVDS40p
IO_P15|LVDS40n
IO_N14|LVDS41p
IO_N13|LVDS41n
IO_M12|LVDS42p
IO_N12|LVDS42n
IO_E16
IO_L14
IO_P14
S38p
EP2C5F256C7N
Φ
POWER
B1
G3
VCCIO1
K3
R1
A15
A2
C10
VCCIO2
C7
E10
E7
B16
G14
VCCIO3
K14
R16
M10
M7
P10
VCCIO4
P7
T15
T2
G9
H10
VCCINT
H7
J7
M5
1
VCCA_PLL
E12
2
L6
1
VCCD_PLL
F11
2
M16
M15
N16
N15
P16
P15
N14
N13
NC
M12
N12
M14
H13
E14
D14
E16
L14
P14
NC
GND_PLL1
GND_PLL2
GNDA_PLL
B8
C15
C16
D1
D2
D7
D9
E13
E15
F13
F14
F5
G4
A1
A16
B15
B2
C8
GND
C9
E8
E9
G8
H14
H3
H8
H9
J14
GND
J3
J8
J9
K9
M8
M9
P8
P9
GND
R15
R2
T1
T16
L5
N5
D12
F12
M6
1
E11
2
7700-7
EP2C5F256C7N
Φ
NC
H6
J10
J6
K13
K6
K7
K8
NC
NCNC
N3
N4
N6
N7
P6
R6
17
2700 I2
2701 B2
2702 B4
2703 B4
2704 B5
2705 B5
2706 C2
2707 C3
2708 C3
A
2709 C3
2710 C4
2711 C4
2712 C4
2713 C5
2714 C5
2715 C5
2717 D2
2718 D3
2719 D3
2720 D3
B
2721 D4
2724 E3
2725 E3
2726 E4
2729 F3
2730 F3
2734 H8
3700 F10
3701 F11
3702 G11
3703 F10
3713 G7
C
3714 G7
3720 B11
3721 B11
3722 B11
3723 C11
3724 C11
3725 C11
3726 C11
3727 C11
3728 D11
3729 D11
3730 D11
D
3731 D11
3732 E11
3733 E11
3734 E11
3735 C7
3736 C7
3737 C7
3738 B7
3739 C7
3740 C7
3741 D7
E
3742 D7
3743 D7
3744 D7
3745 D7
3746 D7
3747 B7
3748 B7
3749 B7
3750 G7
3751 G7
3752 G7
3753 G7
F
4700 F11
4701 G11
5700 B2
5701 C2
5702 D2
5703 D2
5704 E2
5705 E3
7700-1 F9
7700-2 G4
7700-3 H12
7700-4 I14
G
7700-5 C9
7700-6 E15
7700-7 I16
F701 B2
F702 C2
F703 D2
F704 E3
F705 F2
F706 G10
F733 G10
F734 G10
H
I705 H5
I712 H5
I713 H3
I728 H3
I729 G10
I730 G11
I
J
K
L
3139 123 6349.1
12
478
53
6
913
10
11
12
14 15
I_17760_008.eps
16 17
K
L
180208
Circuit Diagrams and PWB Layouts
67LC8.2A LA 7.
SSB: LVDS Connector
5R01
RES
33R
5R02
33R
5R03
33R
2R11
+12V_DISP
4R02
4R03
4R04
4R10
4R11
4R12
RES
RES
RES
RES
4K7
4K7
4K7
4K7
FR46
3R50
3R51
3R49
3R57
FR51
FR56
FR63
FR67
100p
100p
100p
100p
4R07
4R08
*
*
*
2R21
2R24
2R23
2R29
16 17
FR10
+VDISP
12V1
25V220u
100n
2R12
+5V_TCON
Y
-
Y
-
Y
-
-
Y
-
Y
-
Y
LCD
CTRL_DISP1
CTRL_DISP2
CTRL_DISP3
CTRL_DISP4
LVD S_SEL
4R43
*
PDP
16
1
B04E B04E
LVD S CONNECTOR
678 9
112 3 45 10
12 13 14
15
A
B
RES FOR DISPLAY I2C CONTROL
6R04
BZX384-C6V8
6R05
BZX384-C6V8
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
2R25
2R26
3R55 22R
CTRL_DISP1
LVD S_SEL
CTRL_DISP2
CTRL_DISP3
CTRL_DISP4
C
ITV_I2C_SDA
ITV_I2C_SCL
LVD S_A_TXo0n
D
E
F
G
H
LVD S_A_TXo0p
LVD S_A_TXo1n
LVD S_A_TXo1p
LVD S_A_TXo2n
LVD S_A_TXo2p
LVD S_A_TXoCLKn
LVD S_A_TXoCLKp
LVD S_A_TXo3n
LVD S_A_TXo3p
LVD S_A_TXo4n
LVD S_A_TXo4p
LVD S_A_TXe0n
LVD S_A_TXe0p
LVD S_A_TXe1n
LVD S_A_TXe1p
LVD S_A_TXe2n
LVD S_A_TXe2p
LVD S_A_TXeCLKn
LVD S_A_TXeCLKp
LVD S_A_TXe3n
LVD S_A_TXe3p
LVD S_A_TXe4n
LVD S_A_TXe4p
1R14
1R15
1R16
1R17
1R25 1R18
1R20 1R19
1R21
1R23 1R22
1R24
FR11
FR12
10p
10p
LVSD3_SDA_DISP
LVD S3_SCL_DISP
22R3R56
FR14
FR16
FR18
FR20
FR22
FR24
FR26
FR28
FR30
FR32
FR33
FR35
FR39
FR41
FR43
FR45
FR48
FR49
FR53
FR54
FR58
FR60
FR62
FR65
+VDISP
FR69
2R28 100n
1108
60
61
58 59
56 57
54 55
53
52
FI-RE51S-HF
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
FROM MJC-LVDS 8280
LVD S_B_TXe0n
LVD S_B_TXe0p
LVD S_B_TXe1n
LVD S_B_TXe1p
LVD S_B_TXe2n
LVD S_B_TXe2p
LVD S_B_TXeCLKn
LVD S_B_TXeCLKp
LVD S_B_TXe3n
LVD S_B_TXe3p
LVD S_B_TXe4n
LVD S_B_TXe4p
LVD S_B_TXo0n
LVD S_B_TXo0p
LVD S_B_TXo1n
LVD S_B_TXo1p
LVD S_B_TXo2n
LVD S_B_TXo2p
LVD S_B_TXoCLKn
LVD S_B_TXoCLKp
LVD S_B_TXo3n
LVD S_B_TXo3p
LVD S_B_TXo4n
LVD S_B_TXo4p
FROM FPGA
TxFPGAe_0n
TxFPGAe_0p
TxFPGAe_1n
TxFPGAe_1p
TxFPGAe_2n
TxFPGAe_2p
TxFPGAe_CLKn
TxFPGAe_CLKp
TxFPGAe_3n
TxFPGAe_3p
TxFPGAe_4n
TxFPGAe_4p
TxFPGAo_0n
TxFPGAo_0p
TxFPGAo_1n
TxFPGAo_1p
TxFPGAo_2n
TxFPGAo_2p
TxFPGAo_CLKn
TxFPGAo_CLKp
TxFPGAo_3n
TxFPGAo_3p
TxFPGAo_4n
TxFPGAo_4p
4R31-1
1
4R31-2
2
4R31-3
3
4R31-4
4
4R32-1
4R32-2
4R32-3
4R32-4
4R34-1
4R34-2
4R34-3
4R34-4
4R35-1
4R35-2
4R35-3
4R35-4
4R36-1
4R36-2
4R36-3
4R36-4
4R33-1
4R33-2
4R33-3
4R33-4
45
8
1R02
7
6
1R03
5
1R04
1R05
1R06
1R07
1R08
1R09
1R10
1R11
1R12
1R13
LVD Se_0n
DLW21S
LVD Se_0p
LVD Se_1n
DLW21S
LVD Se_1p
LVD Se_2n
DLW21S
LVD Se_2p
LVD Se_CLKn
DLW21S
LVD Se_CLKp
LVD Se_3n
DLW21S
LVD Se_3p
LVD Se_4n
DLW21S
LVD Se_4p
LVD So_0n
DLW21S
LVD So_0p
LVD So_1n
LVD So_1p
DLW21S
LVD So_2n
DLW21S
LVD So_2p
So_CLKn
LVD
DLW21S
LVD So_CLKp
LVD So_3n
LVD So_3p
DLW21S
LVD So_4n
DLW21S
LVD So_4p
ITV_I2C_SCL
ITV_I2C_SDA
CTRL_DISP1
CTRL_DISP2
CTRL_DISP3
CTRL_DISP4
FR13
FR15
FR17
FR19
FR21
FR23
FR25
FR27
FR29
FR31
FR34
FR36
FR37
FR38
FR40
FR42
FR44
FR47
FR50
FR52
FR55
FR57
FR59
FR61
3R25
3R26
+VDISP
1R01
FX15SC-41S-0.5SH
48
46 47
44 45
42 43
41
40
39
4R22
4R24
4R26
4R27
FR64
100R
FR66
100R
FR68
100p
RES
2R02
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
100p
RES
2R01
+5V_TCON
VDISP-SWITCH
SINGLE
LVD S
4R11
4R10
4R02
4R12
BZX384-C5V6
3R12
47R
CTRL_DISP1_up
LCD_PWR_ON
STANDBY
CTRL_DISP4_up
3R35
3R52
3R53
3R54
4R05
4R06
4R07
4R08
+12V_DISP
4R03
3R10
47K
6R02
IR02
PDTC114ET
*
LCD PDP
--
--
--
-Y
Y
Y
Y
IR08
7R05
SI4835BDY
4R04
IR01
2R10
IR06
1u0
7R07
3R13
47K
IR04
0V
3V2
+3V3_SW
RES
4K7
3R35
*
3R48
100R
3R52
*
IR10
100R
3R53
*
100R
3R54
*
100R
100R
100R
100R
100R
--
--
--
--
100p
4R05
4R06
*
2R20
I
J
LGE
CTRL-DISP1
K
CTRL-DISP2(LCD_PWR_on)
DISPEN
On time : H
Off time : Don’t care
SDI
RESET
Semi standby : H
Normal and off : L
CTRL-DISP3(Rev_Standby)
CTRL-DISP4
FHP
CPU-GO
On time : H
Off time : Don’t care
PDWIN
On time : H
Off time : Don’t care
PDP-GO
On time : H
Semi standby : L
Off time : Don’t care
1080p
MAIN_RESET
10 Bit Single
LVD S
--
--
--
--
--
Y
Y
Y
Y
Y
Y
8 Bit Dual
LVD S
LVD S
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
---Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
--
Y
8 Bit Single
*
LVD S
--
1R02
--
1R03
--
1R04
--
1R05
1R06
--
1R07
--
1R08
Y
1R09
Y
1R10
Y
1R11
Y
1R12
Y
1R13
--
10 Bit Dual
L
3139 123 6349.1
12
3 456
7 8
9
10 11 12
13 14 15
I_17760_009.eps
180208
17
1108 C6
FR53 F5
FR54 F5
1R01 E13
FR55 H12
1R02 D10
FR56 H16
1R03 D10
FR57 H12
1R04 E10
1R05 E10
FR58 F5
FR59 H12
1R06 F10
FR60 F5
1R07 F10
FR61 H12
1R08 G10
A
B
C
D
E
F
G
H
I
J
K
L
1R09 G10
1R10 G10
1R11 H10
1R12 H10
1R13 I10
1R14 D3
1R15 D3
1R16 E3
1R17 E3
1R18 E3
1R19 F3
1R20 F3
1R21 G3
1R22 G3
1R23 H3
1R24 H3
1R25 F3
2R01 I13
2R02 I13
2R10 F15
2R11 E16
2R12 E16
2R20 I15
2R21 I15
2R23 I16
2R24 I16
2R25 C3
2R26 C3
2R28 G6
2R29 I16
3R10 E14
3R12 F14
3R13 F15
3R25 H12
3R26 H12
3R35 G15
3R48 G15
3R49 G15
3R50 G16
3R51 G16
3R52 H15
3R53 H15
3R54 H15
3R55 C3
3R56 C3
3R57 G16
4R02 D14
4R03 D14
4R04 D14
4R05 H15
4R06 H15
4R07 H15
4R08 H16
4R10 D14
4R11 D14
4R12 D14
4R22 F13
4R24 F13
4R26 F13
4R27 F13
4R31-1 D9
4R31-2 D9
4R31-3 D9
4R31-4 E9
4R32-1 E9
4R32-2 E9
4R32-3 E9
4R32-4 E9
4R33-1 H9
4R33-2 H9
4R33-3 I9
4R33-4 I9
4R34-1 F9
4R34-2 F9
4R34-3 F9
4R34-4 F9
4R35-1 F9
4R35-2 G9
4R35-3 G9
4R35-4 G9
4R36-1 G9
4R36-2 H9
4R36-3 H9
4R36-4 H9
4R43 H16
5R01 D16
5R02 D16
5R03 E16
6R02 E14
6R04 C3
6R05 C3
7R05 D15
7R07 F15
FR10 D16
FR11 C4
FR12 C4
FR13 F12
FR14 D5
FR15 F12
FR16 D5
FR17 F12
FR18 D5
FR19 F12
FR20 D5
FR21 F12
FR22 D5
FR23 F12
FR24 D5
FR25 F12
FR26 D5
FR27 F12
FR28 D5
FR29 G12
FR30 E5
FR31 G12
FR32 E5
FR33 E5
FR34 G12
FR35 E5
FR36 G12
FR37 G12
FR38 G12
FR39 E5
FR40 G12
FR41 E5
FR42 G12
FR43 E5
FR44 G12
FR45 E5
FR46 G16
FR47 G12
FR48 E5
FR49 E5
FR50 G12
FR51 H16
FR52 H12
FR62 F5
FR63 H16
FR64 H13
FR65 F5
FR66 H13
FR67 H16
FR68 H13
FR69 F6
IR01 E15
IR02 F14
IR04 F15
IR06 F15
IR08 D15
IR10 H15
Circuit Diagrams and PWB Layouts
68LC8.2A LA 7.
SSB: Audio Processor Micronas
16
B05A B05A
AUDIO PROCESSOR - MICRONAS
2
A
+12V_DISP
B
+5V_SW
+3V3_SW
3402
1R0
RES
3403
1R0
5401
120R
5402
120R
2411
10u
2414
10u
SUP_D
SUP_A
C
D
AUD_RST
IIC_SCL
IIC_SDA
HDMI_I2S_SCK
HDMI_I2S_WS
SUP_A
E
HDMI_I2S_SD
F
G
SIF
2448
*
4448
*
SC1_AUDIO_IN_R
SC1_AUDIO_IN_L
SC2_AUDIO_IN_R
SC2_AUDIO_IN_L
COMP_AUDIO_IN_R
COMP_AUDIO_IN_L
SIDE_AUDIO_IN_R
SIDE_AUDIO_IN_L
VGA_AUDIO_IN_R
VGA_AUDIO_IN_L
*
*
*
5404 12u
*
*
H
I
J
"400-499"
MULTI 12NC: 3139 123 63421
SINGLE 12NC: 3139 123 63431
3139 123 6349.1
1
2
3
4
5
7
9
108
11
12
7410
L78L08ACU
F404
6402
I429
I430
I432
BAS316
3410 100R
RES
2446
RES
2447
56p2432
470R3416
22u5403
180p2449
*
2432
2433
2434
2435
2448
2449
3416
4448
5403 --
5404
150p
180p
LA
33p
47p
47p
47p
2K2
12u
2415
3p3
2416
3p3
--
2439
1411
18M432
100R3428
100n2419
I420
AP
56p
330p
56p
56p
--
--
-Y
22u
--
100R3411
100p
100p
CH
56p
330p
56p
56p
-Y
22u
--
25V220u
*
*
*
--
--
38
3
2440
100n
SUP_A
I412
I413
2433 330p
56p2434
56p2435
10u
2436
100n2445
EU
56p
330p
56p
56p
--
--
-Y
22u
--
4
XTALIN
XTALOUT
1
OUTIN
COM
2
220p
2412
2441
7411
MSP4450L-VK-E8 000
67
68
19
80
66
69
2
3
79
4
5
17
18
8
9
10
11
7
16
20
21
6
I421
63
I422
64
I423
65
I424
56
55
54
53
52
51
50
49
48
58
57
2437
10u
330u
2410
16V
1n5
2442
IN
OUT
RESETQ
STNDBYQ
TESTEN
TP
CL
DA
ADR_SEL
CL
WS
CL3
WS3
IN
OUT
CL
WS
1
2
3
4
DA_OUT
IN1+
ININ2+
VREFTOP
R
L
L
R
L
R
L
R
L
I425
+8V
F401
2409 1n5
DA
SC1_IN
SC2_IN
SC3_IN
SC4_IN
SC5_IN
AGNDC
2438
100n
2408 470p
470p
XTAL
DEL
ANA
45
61
F402
A
I2C
I2S
62
SUP
39
AH
MULTISTANDARD
SOUND PROCESSOR
AD
59
60
SUP_D
F403
13
DVSUP
Φ
VSS VREF
43
AUD_CL_OUT
DCTR_IO
SPDIF_OUT
SC1_OUT
SC2_OUT
SC3_OUT
14
15 12
44
DACM
CAPL
1R2AH
35
2413
SUB
DACA
NC
25
56
1n5
2443
2444
220p
R
L
C
SR
SL
R
L
M
A
0
1
R
L
R
L
R
L
470p
70
26
27
28
29
30
31
23
24
40
I414
38
I415
78
77
76
I436
4402
I416
I417
I418
I419
2428
100p
RES
36
37
33
34
41
42
1
22
32
46
47
71
72
73
74
75
4401
2451
16V10u2420
16V2423 10u
2429
100p
4403
100n
I440
I438
I441
+8V
+5V_SW
6
S2
5
D
4
S1
3423
1K2
7
2418
330p
2421
330p
2430
100p
7412
ADG719BRTZ
2
VDD
Φ
SPST
SWITCH
GND
2417
330p
2422
330p
I442
10u2424
I443
I446
I444
I445
3418 100R
3420 100R
I439
10u2425
10u2426
10u2427
2431
100p
+5V_SW
4K7
3427
I437
1
IN
3
RES
9
2450
33p
100R3417
100R3419
RES
10
AUDIO_LS_R
AUDIO_LS_L
HP_AUDIO_OUT_R
HP_AUDIO_OUT_L
SC1_AUDIO_OUT_R
SC1_AUDIO_OUT_L
SC2_AUDIO_OUT_R
SC2_AUDIO_OUT_L
SPDIF_OUT
SPDIF_IN
11
12
13
I_17760_010.eps
180208
13
A
B
C
D
E
F
G
H
I
J
1411 C4
2408 B5
2409 B5
2410 B5
2411 B3
2412 B4
2413 B6
2414 B3
2415 B3
2416 C3
2417 C8
2418 C8
2419 C3
2420 D7
2421 D8
2422 D8
2423 D7
2424 D8
2425 D8
2426 E8
2427 E8
2428 E7
2429 E7
2430 E8
2431 E8
2432 E3
2433 E4
2434 E4
2435 E4
2436 E4
2437 G5
2438 G5
2439 B4
2440 B4
2441 B5
2442 B5
2443 B6
2444 B7
2445 E4
2446 C3
2447 D3
2448 E2
2449 E3
2450 G9
2451 F7
3402 B2
340
3 B2
3410 C3
3411 C3
3416 E3
3417 D9
3418 D9
3419 E9
3420 E9
3423 G8
3427 E8
3428 C3
4401 F7
4402 G7
4403 F7
4448 E3
5401 B2
5402 B2
5403 E3
5404 E3
6402 A3
7410 A4
7411 B5
7412 F8
F401 A5
F402 B5
F403 B6
F404 A4
I412 C4
I413 C4
I414 D7
I415 D7
I416 D7
I417 D7
I418 E7
I419 E7
I420 E3
I421 E4
I422 E4
I423 E4
I424 E4
I425 G5
I429 D3
I430 D3
I432 D3
I436 G7
I437 F8
I438 F7
I439 G9
I440 F7
I441 F7
I442 D9
I443 D9
I444 E9
I445 E9
I446 G8
Circuit Diagrams and PWB Layouts
69LC8.2A LA 7.
SSB: Audio Class-D
3A11 D7
3A13 D8
3A14 E12
3A17 D11
3A19 E7
3A26 E8
3A27 E13
IA13
10R
11V9
2A01
100n
GNDSND
IA15
30R
12V2
2A04
220u
25V
GNDSND
IA19
HP_LOUT
IA30
HP_ROUT
SC1_AUDIO_MUTE_R
SC1_AUDIO_MUTE_L
SC2_AUDIO_MUTE_R
SC2_AUDIO_MUTE_L
ENGAGE
IA39
GNDSND
GNDSND
3A09
10R
IA29
2A21
1n0
2A35
1n0
3A17
10R
IA53
2A31
1n0
IA62
2A36
1n0
IA14 A10
IA15 A5
IA16 A10
IA17 B4
IA18 B5
IA19 B5
IA20 B3
5A03
22u
GNDSND
5A04
22u
2A45
1n0
IA21 B1
IA22 B2
IA23 C13
IA24 C13
IA25 C4
IA26 C4
IA27 C7
12
2A14
470n
2A28
470n
IA28 C8
IA31 C4
IA32 C10
IA33 C1
IA34 C2 IA62 E11
IA23
2A13
220n
2A17
1n0
1n0
2A72
2A23
1n0
GNDSND
2A26
220n
IA52
2A38
220n
IA61
3A14
22R
GNDSND
1n0
VDDA
8
VDDA
CLASS D
AMPLIFIER
VSSP
9
26
VSSA
GNDSND
Φ
POWER
23
GNDSND
7A51-1 B3
7A51-2 C3
7A52 E2
7A53 F2
7A54 D4
7A55 E4
7A56 E4
VDD
100n
2A09
GND_HS
33
3A28 E13
3A29 D14
3A30 D14
3A31 E15
3A32 D7
3A51 B3
3A52 B5
3A53 B2
3A54 B5
3A55 C3
3A56 C3
3A57 C5
3A58 C2
6 13
VDDA
VDD
AUDIO_LS_L
AUDIO_LS_R
ENGAGE
STANDBYn
FA0 6
-12V_AUDIO
FA0 5
3A06
3A07
FA0 9
FA1 2
FA1 3
RES
3A03
3A11
3A03
3A04
3A06
3A07
3A08
3A11
3A59 C5
3A60 D3
3A61 E2
3A62 E2
3A63 F2
3A68 D4
3A69 E4
7 8 91011
GNDSND
IA27
IA35
IA40
IA41
VSSA
VDDA
47K
3A32
VSSA
3A19
10K
12K
3A33
LCD PDP
*
10K
6K8
12K
22K
6K8
10K
6K8
10K
12K
22K
6K8
10K
3A70 E3
3A71 E4
3A72 F4
3A73 F4
3A74 G4
3A75 G3 FA10 C15
3A76 G4
IA11
10n
1n0
2A70
2A69
1u0
2A11
3A04
2A15 1u0
1u0
2A16
3A08
1u02A20
2A22
3A1339K
2A29
5A08
22u
IA28
100n
100n2A24
GNDSND
100n
4K73A26
IA36
IA38
2A40
3A77 G4
4A51 E3
5A03 C11
5A04 D11
5A05 A5
5A06 A9
5A07 A4
12
TDA8932BTW
2A12
220p
2A19
220p
IA42
IA43
IA44
IA50
IA51
IA56
IA60
470n
GNDSND
-2V8
3
-2V8
15
-2V8
14
-2V8
12
-7V6
10
31
NC
11
-8V2
18
4V7
5
3V2
6
-2V6
13
EMC
2A32
1n0
RES
2
2A64
7A01
IN1P
IN1N
IN2P
IN2N
INREF
OSCREF
OSCIO
HVPREF
DREF
ENGAGE
POWERUP
TEST
CGND VSSA
6A51 F3
6A52 G3
7A01 C9
7A05 D15
7A06 E143A33 E7
7A07 E14
IA12
10n
2A65
GNDSND
7
3A02
5A06 30R
2A10 100n
GNDSND
29
20
VDDP
OUT1
OUT2
DIAG
HVP1
HVP2
BOOT1
BOOT2
STAB 1
STAB 2
VSSD|HW
1
16
17
32
100n2A33
GNDSND
2A34 100n
7A57 F4
7A58 F4
7A59 G4
7A60 G4
F901 B3
F904 C3
FA04 D10
10R
GNDSND
GNDSND
27
22
2V6
4
30
19
8V9
28
3V9
21
IA47
25
-1V3
24
VSSA
VSS
IA14
2A02
100n
IA16
2A08
220u
25V
FA04
GNDSND
IA45
IA46
2A30
100n
FA05 C6
FA06 C6
FA07 C15
FA0 8 C15
FA09 D6
FA11 C15
-12V2
-12V2
IA32
IA37
2A18
EMC
1n0
2A25 15n
2A27 15n
VSS
VSSA
VSS
FA1 2 E6
FA1 3 E6
FA32 D15
IA10 A4
IA11 A8
IA12 A9
IA13 A5
IA35 C7
IA36 C8
IA37 C10
IA38 C8
IA39 C11
IA40 D7
IA41 D7
2A37
220n
2A71
GNDSND
IA42 D8
IA43 D8
IA44 D8
IA45 D10
IA46 D10
IA47 D10
IA48 D4
IA49 D14
IA50 D8
IA51 D8
IA52 D12
IA53 D11
IA54 E2
IA55 E14
IA56 E8
IA57 E3
IA58 E14
IA59 E4
IA60 E8
IA61 E12
14 15
IA24
3A05
22R
TO SUBWOOFER OUT
GNDSND
1A02
NC
1735446-3
TO SPEAKERS
1A35
FA0 7
FA0 8
FA1 0
FA1 1
47K
47K
GNDSND
7A07
BC847BW
1735446-4
7A05
BC857BW
FA32
10K
3A31
1n0
7A06
BC847BW
IA58
3A27
220K
3A28
220K
1u0
2A41
GNDSND
IA55
GNDSND
VDD
3A29
IA49
3A30
DC-DETECTION
5A07
22u
33p
120K3A51
7A51-1
TS482IDT
2V6
33p
7A51-2
TS482IDT
2V6
5V3
2A61 F2
2A62 A4
2A63 A4
2A64 A8
2A65 A9
2A66 A2
2A67 A3
2A68 A3
2A69 A7
2A70 A7
2A71 D13
2A72 D13
3A01 A5
3A02 A9
3A03 C7
3A04 C8
3A05 C13
3A06 C7
3A07 C7
3A08 D8
3A09 C11
45
1
7
IA17
HPIC_LOUT
+5V_SW
IA25
3A68
1K0
3A69
1K0
3A71
1K0
3A72
1K0
3A73
1K0
3A74
1K0
3A76
10K
IA10
RES
2A62
GNDSND
HPIC_ROUT
IA48
1
IA59
1
IA64
1
IA66
1
IA72
1
IA74
1
IA76
3A77
22K
10n
2A63
GNDSND
2A53
2A54
220n
IA26
2A56
220n
1n0
47u6.3V
2A58
47u6.3V
3
7A54
BC847BW
2
3
7A55
BC847BW
2
3
7A56
BC847BW
2
3
7A57
BC847BW
2
3
7A58
BC847BW
2
3
7A59
BC847BW
2
7A60
BC847BW
3A01
5A05
RES
IA18
3A52
33R
3A54
33R
RES
3A57
IA31
33R
3A59
33R
IA63
IA65
IA71
IA73
1A02 B15
1A35 C15
2A01 A5
2A02 A10
2A04 A5
2A08 B10
2A09 C9
2A10 C9
2A11 C7 IA29 C11
2A12 C8
2A13 C12
2A14 C12
2A15 C7
2A16 C7
2A17 C12
2A18 C10
2A19 D8
2A20 D7
2A21 C11
2A22 D8
2A23 D12
1
B05B B05B
2A24 D8
2A25 D10
2A26 D12
2A27 D10
2A28 D12
2A29 D8
2A30 E10
2A31 E11 5A08 A8
2A32 E8
2A33 F9
2A34 F9
2A35 D11
2A36 E11
2A37 C13
2A38 E12
2A40 E8
2A41 E14
2A45 C12
2A51 B3
2A52 B2
2A53 B4
2A54 C4
2A55 C3
2A56 C4
2A57 C2
2A58 C4
2A59 D2
2A60 E1
2 3
AUDIO - CLASS D
+12V_AUDIO
A
10n
GNDSND
RES
2A66
100n
2A67
GNDSND
2A51
1n0
2A68
B
3A56
100K
IA70
F901
F904
3A60
100K
IA57
4A51
6A51
BAS316
0V
+3V3_STBY
RES
IA20
3A75
10K
2V6
2
2V6
3
8 4
5V3
2A55
3A55 120K
2V6
6
2V6
5
8 4
10K
3A70
6A52
BAS316
IA75
HP_AUDIO_OUT_L HPIC_LIN
IA21
C
2A60
IA33
6.3V
1u0
IA69
D
E
HP_AUDIO_OUT_R
MUTING CIRCUIT
ANTI_PLOP
POWER_DOWN
F
MUTEn
G
0V
2A52
470n
2A57
470n
3A61
4K7
+3V3_STBY
IA68
2A61
1u0
IA22
IA34
IA54
RESERVED
HPIC_RIN
3V3
3A63
4K7
3A53
3A58
2A59
470n
+3V3_STBY
0V
7A52
BC857BW
3A62
4K7
IA67
7A53
BC857BW
47K
47K
IA63 E5
IA64 E4
IA65 F5
IA66 F4
IA67 F2
IA68 F2
IA69 F1
1
2
3
1
LEFT +
2
GND
3
GND
4
RIGHT -
DC_PROT
RES
IA70 F3
IA71 F5
IA72 F4IA30 C5
IA73 F5
IA74 G4
IA75 G3
IA76 G4
A
B
C
D
E
F
G
3139 123 6349.1
123 4
I_17760_011.eps
180208
5
67
8 910
11 12 13 14 15
Circuit Diagrams and PWB Layouts
70LC8.2A LA 7.
SSB: YPbPr & SVHS
1
YPBPR & SVHS
B06A B06A
A
B
1615
MSP-636H1-01
RED
White
C
RED
Blue
Green
D
E
F
1
2
3
4
5
6
7
8
9
10
11
12
F614
F608
F609
1610
1613
1611
1606
F607
F605
2
BM14B-SRSS-TBT
RES
6614
PESD5V0S1BA
RES
6613
PESD5V0S1BA
3603
75R
6610
RES
PESD5V0S1BA
RES
6612
PESD5V0S1BA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 16
3611
150R
3607
150R
F604
2602
RES
RES
2606
1621
3
1607
3605
75R
I627
I623
3601
75R
F618
I634
I635
(near to 1504 )
F620
2612
1n0
2608
1n0
RES
6611
RES
2603
PESD5V0S1BA
3619
33R
45
DTV_IRQ
SPDIF_IN
SC1_AUDIO_IN_L
SC1_AUDIO_IN_R
CVBS_IN_DTV
HD_PR_IN_ITV
HD_Y_IN_ITV
HD_PB_IN_ITV
4605
4606
BOLT_ON_UART_RXD
BOLT_ON_UART_TXD
F619
For DTV onl y
I611
2610
220n
3612
33K
I610
2607
220n
3608
33K
3618
33R
I616
3617
33R
I632
COMP_AUDIO_IN_R
COMP_AUDIO_IN_L
HD_Y_IN
HD_Y_IN_ITV
HD_PR_IN_ITV
HD_PR_IN
HD_PB_IN_ITV
HD_PB_IN
RES
1605
1
2
3
4
5
6
7
8
9
10
11
1-1735446-1
SVHS
1601
MDC-013V1-B
5
CVBS
YELLOW
1602-1 1
RED
1602-3
WHITE
1602-2
2
7
9
8
4
6
5
MTJ-032-37BAA-432 NI
MTJ-032-37BAA-432 NI
MTJ-032-37BAA-432 NI
HEADPHONE
5
1603
4
F616
2
F617
3
7
8
MSJ-035-10A B AG PPO
1
67
1
F615
F610
1616
1617
2
1
3609
RES
6621
RES
6622
F602
75R
F611
6615
F601
RES
6604
1609
1608
3621
150R
PESD5V0S1BA
2627 33p
3623
150R
33p2628
PESD5V0S1BA
3
DF3A6.8
RES
3604
2600
75R
PESD5V0S1BA
RES
6606
PESD5V0S1BA
RES
RES
3
6616
DF3A6.8
12
I621
2622
1n0
I624
2624
1n0
2613
22n
RES
2609
3622
33K
3624
33K
2614
22n
3600
100R
3602
100R
2621
220n
2623
220n
4603
4604
1618
4601
4602
1619
3
4
2
1620
8 9
SVHS_Y_CVBS_IN
SVHS_C_IN
SIDE_AUDIO_IN_L
HP_DETECT
SIDE_AUDIO_IN_R
HP_LOUT
HP_ROUT
I615
RES
2625
I631
RES
2626
I620
I622
2615 3614
2616
10n
10n
SVHS_C_IN
33p
SVHS_Y_CVBS_IN
33p
SIDE_AUDIO_IN_R
SIDE_AUDIO_IN_L
HP_DETECT
3613
10K
HP_LOUT
HP_ROUT
10K
3139 123 6349.1
123 56
4
7
8
I_17760_012.eps
9
180208
A
B
C
D
E
F
1601 B6
1602-1 C6
1602-2 D6
1602-3 D6
1603 E5
1605 A6
1606 E2
1607 D3
1608 C7
1609 C7
1610 F2
1611 C2
1613 C2
1615-1 D1
1615-2 E1
1615-3 C1
1616 D6
1617 E6
1618 F6
1619 F6
1620 F6
1621 A3
2600 C7
2602 E3
2603 D4
2606 E3
2607 C4
2608 C3
2609 C8
2610 C4
2612 C3
2613 F7
2614 F8
2615 F8
2616 F8
2621 D8
2622 D7
2623 D8
2624 E7
2625 C8
2626 C8
2627 D7
2628 E7
3600 B8
3601 E3
3602 C8
3603 D3
3604 C8
3605 F3
3607 C3
3608 C4
3609 C6
3611 C3
3612 C4
3613 F8
3614 F9
3617 E4
3618 D4
3619 E3
3621 D7
3622 D8
3623 D7
3624 E8
4601 D6
4602 D6
4603 E8
4604 F8
4605 B4
4606 B4
6604 C7
6606 C7
6610 E2
6611 D3
6612 F2
6613 C2
6614 C2
6615 F7
6616 F7
6621 D7
6622 E7
F601 B7
F602 B7
F604 D3
F605 E2
F607 E2
F608 C2
F609 C2
F610 D6
F611 D7
F614 C1
F615 C6
F616 E6
F617 E6
F618 A4
F619 B4
F620 B3
I610 C4
I611 C4
I615 B8
I616 E4
I620 D8
I621 D7
I622 D8
I623 C3
I624 E7
I627 C3
I631 C8
I632 E4
I634 A3
I635 B3
Circuit Diagrams and PWB Layouts
71LC8.2A LA 7.
SSB: I/O Cinch 1 & 2
1
B06B B06B
A
1508
1
2
3
4
5
6
7
8
9
10
1112
2
IO - CINCH 1 & 2
F346
F347
F349
F348
F353
F351
F352
F354
+3V3_STBY
ITV_Connector A:
BOLT_ON_UART_RX D
BOLT_ON_UART_TXD
SC1_CVBS_RF_OUT
B
1534
F524
F525
F526
F519
F520
F521
1535
F522
1512
F531
4508
4510
4509
1531
1532
1511
1516
1517
1519
1520
C
D
E
F
CVI-2 / AV OUT
Audio-R_out
Audio-R_in
Audio-L_out
Audio-L_in
RGB-B_in
Function_Sw
RGB-G_in
RGB-R_in
RGB-BL_in
Terr_CVBS_out
Video_in
1504
MTJ-505H-01 NI LF
F511
1
2
F513
3
F515
4
F517
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
F528
20
21
G
1522
1523
H
1524
3
RES
ITV_I2C_SCL
ITV_I2C_SDA
REMOTE
STAN D B Y
6518
RES
PESD5V0S1BA
6519
RES
PESD5V0S1BA
6504
PESD5V0S1BA
RES
6507
RES
PESD5V0S1BA
6514
RES
PESD5V0S1BA
6520
RES
PESD5V0S1BA
6515
RES
PESD5V0S1BA
6516
RES
PESD5V0S1BA
6521
RES
PESD5V0S1BA
6517
RES
PESD5V0S1BA
6511
RES
PESD5V0S1BA
RES
2535
RES
2538
3514
150R
3518
27K
2527
2531
3503
150R
3507
150R
3510
150R
RES
2528
RES
RES
2529
RES
3546
75R
ITV-Connector B
1507
1
2
3
4
5
6
7
8
9
10
F534
330p
2508
F535
2514
330p
F536
2517
1n0
F537
2523
1n0
75R
3517
6K8
3520
3523
100R
75R
3526
3528
100R
75R
3530
3532
1K0
75R
3533
I550
68R3535
1K0
3536
3545
100R
3511
33K
3515
33K
4
RES
I563
I564
SC1_B_IN
SC1_G_IN
SC1_R_IN
SC1_FBL_IN
SC1_AUDIO_OUT_L
SC1_AUDIO_OUT_R
2515
220n
2521
220n
3516
100R
6512
RES
1N4148
RES
6513
1N4148
5
ITV-Connector C
1506
1
2
3
4
5
6
7
8
9
10
I541
F538
F539
F540
F541
F542
F530
RES
11
SC1_AUDIO_MUTE_R
SC1_AUDIO_MUTE_L
6
I565
I567
I568
I570
I571
SC1_AUDIO_OUT_R
SC1_AUDIO_OUT_L
SC1_AUDIO_IN_R
SC1_AUDIO_IN_L
SC1_B_IN
SC1_STATU S
SC1_G_IN
SC1_R_IN
SC1_FBL_IN
SC1_CVBS_IN
3559
75R
RGB-R_out/YC-C_in
I
7
SC2_Y_CVBS_IN_ITV
SC2_C_IN_ITV
SC2_AUDIO_IN_R
SC2_CVBS_MON_OUT_ITVDTV_IRQ
SC2_AUDIO_OUT_R
SC2_AUDIO_OUT_L
CODE 2422 025 20251 IN ECM
Audio-R_out
Audio-R_in
Audio-L_out
Audio-L_in
Function_Sw
CVBS_out
Video/YC-Y_in
MTJ-505H-01 NI LF
AV I N
1502
8
ITV-Connector D
1505
1
2
3
4
5
6
7 8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I577
15
16
1515
17
18
19
20
21
RES
I572
I573
I574
F612
F613
F510
F512
F514
F516
F518
F532
1510
1513
TO BE REMOVED FOR ITV
4506
F523
4505
F527
RES FOR ROW
F529
1518
6525
RES
6510
1521
RES
9
PESD5V0S1BA
PESD5V0S1BA
1500
1501
1503
1533
1514
RES
2526
2536
220n
3522
68R
6522
RES
6523
RES
6501
RES
6505
RES
6524
RES
6509
RES
I551
PESD5V0S1BA
PESD5V0S1BA
PESD5V0S1BA
PESD5V0S1BA
PESD5V0S1BA
PESD5V0S1BA
3525
1K0
2530
3500
150R
3502
150R
3506
150R
3512
150R
3550
2525
220n
I530
RES
10
HD_PR_IN_ITV
HD_Y_IN_ITV
HD_PB_IN_ITVSC2_AUDIO_IN_L
27K
RES
2524
+5V_SW
5V2
3V
7500
BC847B
3529
3531
75R
2534
220n
I543
2502
2506
2520
3519
15R
VGA_H
VGA_V
2512
3551
3553
75R
100R
I553
I510
330p
I512
330p
F543
1n0
F544
1n0
I545
6K8
3552
100R
3V7
7502
BC857BW
2533
220n
BC847B
3508
3513
7503
33K
33K
3538
4K7
I552
RES
4502
+5V_SW
3524
11
1509
1
2
3
45
15R
I548
7504
BC857BW
2509
220n
2518
220n
ITV Connector E
I576
I575
I517
I520
I557
I544
3540
4K7
I549
RES FOR ITV
12 13
RES
HP_AUDIO_OUT_L
HP_AUDIO_OUT_R
3521
I528
1K0
I556
3555
68R
I533
RES
I558
4504
3554
68R
3537
1K0
I554
SC2_AUDIO_MUTE_R
SC2_AUDIO_OUT_R
SC2_AUDIO_OUT_L
SC2_AUDIO_MUTE_L
SC2_AUDIO_IN_R
SC2_AUDIO_IN_L
SC2_CVBS
SC2_CVBS_MON_OUT_ITV
SC2_Y_CVBS_IN_ITV
SC2_Y_CVBS_IN
I578
SC1_RF_OUT_CVBS
SC1_CVBS_RF_OUT
3139 123 6349.1
SC2_STATU S
SC2_C_IN_ITV
SC2_C_IN
_MON_OUT
I_17760_013.eps
180208
A
B
C
D
E
F
G
H
I
1500 C9
1501 C9
1502 D7
1503 D9
1504 C1
1505 A8
1506 A5
1507 A4
1508 A1
1509 A11
1510 E9
1511 D2
1512 E2
1513 E8
1514 E9
1515 F8
1516 E2
1517 E2
1518 G9
1520 G2
1521 H9
1522 G2
1523 H2
1524 H2
1531 C2
1532 D2
1533 E9
1534 C2
1535 D2
2502 C10
2506 C10
2508 B3
2509 D11
2512 D10
2514 C3
2515 C4
2517 D4
2518 D11
2520 E10
2521 D4
2523 D4
2524 F10
2525 G10
2526 G9
2527 F3
2528 E3
2529 F3
2530 H10
2531 G3
2533 I10
2534 I10
2535 H3
2536 G9
2538 H3
3500 B10
3502 C10
3503 B3
3506 D10
3507 C3
3508 D10
3510 C3
3511 D4
3512 D10
3513 E10
3514 D3
3515 D4
3516 E4
3517 E3
3518 E3
3519 G10
3520 E3
3521 G12
3522 G9
3523 F4
3524 I11
3525 G10
3526 F3
3528 F4
3529 H10
3530 G3
3531 H10
3532 G4
3533 G3
3535 H3
3536 H4
3537 I12
3538 G11
3540 I11
3545 H3
3546 H3
3550 E10
3551 E10
3552 F10
3553 F10
3554 I12
3555 H12
3559 B7
4502 G11
4504 I12
4505 F8
4506 F9
4508 C2
4509 C2
4510 G2
6501 D9
6504 D3
6505 E9
6507 D3
6509 F9
6510 H9
6511 H3
6512 G4
6513 G4
6514 E3
6515 F3
6516 G3
6517 H3
6518 C3
6519 C3
6520 E3
6521 G3
6522 C9
6523 C9
6524 E9
6525 G9
7500 G10
7502 G11
7503 I10
7504 I11
F346 A2
F347 A2
F348 A2
F349 A2
F351 A21519 F2
F352 A2
F353 A2
F354 B2
F510 D8
F511 C2
F512 D8
F513 C2
F514 D8
F515 C2
F516 D8
F517 C2
F518 D8
F519 D2
F520 D2
F521 D2
F522 D2
F523 F9
F524 E2
F525 E2
F526 F2
F527 F8
F528 F2
F529 F8
F530 H5
F531 E2
F532 E9
F534 B4
F535 C4
F536 C4
F537 D4
F538 E5
F539 E5
F540 F5
F541 F5
F542 G5
F543 C10
F544 D10
F612 B9
F613 B9
I510 B10
I512 C10
I517 D11
I520 D11
I528 G12
I530 G10
I533 H12
I541 D5
I543 G10
I544 G11
I545 E10
I548 I11
I549 I11
I550 G4
I551 G10
I552 G11
I553 I10
I554 I12
I556 H12
I557 F11
I558 I12
I562 A4
I563 B4
I564 B4
I565 A6
I567 A6
I568 A6
I570 B6
I571 B6
I572 A9
I573 A9
I574 A9
I575 A11
I576 A11
I577 F8
I578 I12
12 7
3
4
5
8
9
10
11
12
136
Circuit Diagrams and PWB Layouts
72LC8.2A LA 7.
SSB: VGA & PC Audio, ComPair, & UART
12
3 45
6
7 8 910 12
11
VGA & PC AUDIO & COMPAIR & UART
B06C B06C
VGA
1E01
FE10
A
B
C
D
E
F
G
H
3139 123 6349.1
12
16
1
9
2
10
3
11
4
12
5
13
6
14
7
15
8
17
1226-00B-15S-FAE-02
PC / DVI AUDIO
1
1E02
2
YKB11-3002V
WHITE
1
1E07
2
YKB11-3001V
RED
FE33
FE34
FE29
FE30
1E16
1E17
2E11
2E12
2E05
1E14
1E15
IE17
IE21
FE11
FE12
FE19
1n0
1n0
3E10
10K
330p
6E21
RES
6E22
RES
3E07
150R
3E08
1K0
2E06
2E09
100p
2E10
100p
1E11
1E12
1E13
PESD5V0S1BA
PESD5V0S1BA
IE20
DC_5V
3E11
10K
330p
3E21
150R
3E23
150R
RES
RES
RES
IE18
6E01
6E02
6E03
6E05
RES
6E06
RES
PESD5V0S1BA
PESD5V0S1BA
PESD5V0S1BA
6E04
BAS316
2E04
100n
3E09
10K
SCL_VGA
SDA_VGA
5E13
120R
PESD5V0S1BA
5E14
120R
PESD5V0S1BA
3n3
2E21
3n3
2E23
3
RES
2E01
10p
RES
2E02
10p
RES
2E03
10p
3E22
3E24
IE29
IE31
IE19
WR_EN
IE22
IE23
33K
33K
3E02
75R
3E04
75R
3E06
75R
2E20
220n
2E22
220n
5E01
60R
3E15
3E20
2K2
2K2
10K
3E01
33R
3E03
33R
3E05
33R
3E14
220R
3E18
220R
IE30
IE32
IE10
VGA_R_IN
UART ( SERVICE)
MSJ-035-29D PPO (PHT)
3E12
FE23
FE25
FE27
IE13
IE15
DC_5V
+5V_SW
7E01
M24C02-WMN6
7
WC
6
SCL
5
DC_5V
Φ
(256x8)
EEPROM
84
VGA_G_IN
FE22
2E07
100n
0
ADR
1
2SDA
VGA_AUDIO_IN_L
VGA_AUDIO_IN_R
VGA_B _IN
1
2
3
VGA_H
VGA_V
COMPAI R
MSJ-035-29D PPO (PHT)
1
DIGITIAL AUDIO OUT
SPDIF OUTPUT
MTJ-032-21B-43 NI NE LF
4.02mm Round Screw Hole
456
1311
1
FE18
1E04
FE28
1E06
2
3
2
3
FE32
1107
6E07
1E18
2
FE31
1
1E21
1E90
EMC REF HOLE
FE13
FE14
1106
6E09
BZX384-C6V8
FE24
3E70 100R
FE26
1E19
6E08
12
PESD3V3L1BA
2E78
RES
2E79
33p
5E71
RES
30R
100n
PESD3V3L1BA
6E72
7
+3V3_STBY
4K73E87
4K73E86
RES
3E84 33R
33R3E85
6E10
BZX384-C6V8
100R3E71
12
IE26
2E77
100n
3E77
RES
BZX384-C5V1
1E96
EMC REF HOLE
RES
IE27
+3V3_SW
3E82
4K7
BC847BW
3E78
68R
UART_RX
7E71
3E83
4K7
UART_TX
+5V_SW
3E68
IE28
+3V3_SW
SN74LVC2G53DCU
IE14
IE16
IIC_SDA_up
IIC_SCL_up
3E79
3E67
180R
8 9
RES
5E17
30R
5E15 30R
7E02
FE21
MT8280_EN
1K0
IE25
3E69
560R
1K0
5mm x 4.02mm Slot Screw Hole
IE11
8
VCC
5
A
Φ
Y1
2
INH
Y2
1
COM
GND
3
4
FROM VPbPr & SVHS
IE24
2E76
100n
1E92
EMC REF HOLE
2E13
100n
7
6
10
4E11
+3V3_STBY+3V3_STBY
+3V3_SW
4E12
SPDIF_OUT
1E93
EMC REF HOLE
RES
5E18
30R
SN74LVC2G53DCU
FE15
7E03
MT8280_EN
EMC REF HOLE
11
30R5E16
2E14 100n
IE12
8
VCC
5
A
Φ
2
INH
1
COM
GND
3
FROM ANALOG-IOs
1E94
TO MJC
7
Y1
6
Y2
4
FE17
EMC HOLE
1E95
FE16
UART_0RX
UART_1RX
UART_0TX
UART_1TX
FE20
4E14
4E13
UART_1RX
UART_1TX
MICROP B03
1E97
EMC REF HOLE
UART_0TX
12 13
13
UART_0RX
I_17760_014.eps
180208
G
A
B
C
D
E
F
H
1106 B7
1107 B7
1311 A6
1E01 A1
1E02 G1
1E04 C6
1E06 F6
1E07 H1
1E11 A2
1E12 B2
1E13 B2
1E14 E2
1E15 F2
1E16 G2
1E17 H2
1E18 D7
1E19 D7
1E21 F7
1E90 G7
1E92 G10
1E93 G11
1E94 G11
1E95 G12
1E96 G8
1E97 G13
2E01 A3
2E02 B3
2E03 B3
2E04 C3
2E05 D2
2E06 D2
2E07 D5
2E09 E2
2E10 F2
2E11 C2
2E12 C2
2E13 A10
2E14 A11
2E20 G3
2E21 G3
2E22 H3
2E23 H3
2E76 F10
2E77 F8
2E78 F7
2E79 F7
3E01 A4
3E02 A3
3E03 B4
3E04 B3
3E05 B4
3E06 B3
3E07 C2
3E08 C2
3E09 C3
3E10 D2
3E11 D3
3E12 D4
3E14 E4
3E15 E3
3E18 F4
3E20 F3
3E21 G3
3E22 G3
3E23 H3
3E24 H3
3E67 F9
3E68 F8
3E69 F9
3E70 D7
3E71 D7
3E77 F8
3E78 F8
3E79 F9
3E82 A8
3E83 A8
3E84 A7
3E85 B7
3E86 A8
3E87 A8
4E11 B10
4E12 B10
4E13 B12
4E14 B12
5E01 C3
5E13 E3
5E14 F3
5E15 A9
5E16 A11
5E17 A9
5E18 A11
5E71 F7
6E01 A3
6E02 B3
6E03 B3
6E04 C3
6E05 E3
6E06 F3
6E07 D7
6E08 D7
6E09 B7
6E10 B7
6E21 H2
6E22 H2
6E72 F7
7E01 D4
7E02 A9
7E03 A11
7E71 F8
FE10 A2
FE11 A2
FE12 A2
FE13 A7
FE14 A7
FE15 B11
FE16 B12
FE17 B12
FE18 B6
FE19 B2
FE20 B12
FE21 B9
FE22 D5
FE23 D4
FE24 D7
FE25 D4
FE26 D7
FE27 D4
FE28 D6
FE29 E2
FE30 F2
FE31 F7
FE32 F6
FE33 G2
FE34 H2
IE10 A4
IE11 A10
IE12 A11
IE13 B4
IE14 B9
IE15 B4
IE16 B9
IE17 C2
IE18 C3
IE19 C3
IE20 C3
IE21 C2
IE22 E3
IE23 F3
IE24 F9
IE25 F9
IE26 F8
IE27 F8
IE28 F9
IE29 G3
IE30 G4
IE31 H3
IE32 H4
Circuit Diagrams and PWB Layouts
73LC8.2A LA 7.
SSB: HDMI Switch
1
B07A B07A
E
F
I
J
L
3139 123 6349.1
1
2 3
HDMI SWITCH
FM09
2829
2627
2425
2223
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1M04
FI-RE21S-HF-R1500
2
NC
1
1M09
4
BOLT ON DTV
1
1M07
4
3
2
1M06 1
3
4
2
DLW21S
3
2
DLW21S
3
HDMI D
DLW21S
1M08 1
4
456 87
1M01
+5V_SW
+5VHDMI_SIDE
M24C02-WMN6
4M42
4M43
4M44
4M45
2
4M46
4M47
DLW21S
4M48
3
4M49
IM47
IM48
IM49
IM50
4M50
4M51
4M52
4M53
+5V_SW
+5VHDMI_B
M24C02-WMN6
+5V_SW
+5VHDMI_C
M24C02-WMN6
45
DC1R019JBAR190
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
2021
2223
6M19
BAT54 COL
6M20
BAT54 COL
7M16
1
2
3
1M02
1
2
FM06
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
2021
2223
2425
26
DC1R019WBER220
6M21
BAT54 COL
6M22
BAT54 COL
7M17
1
2
3
1M03
1
FM15
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
2021
2223
2425
26
DC1R019WBER220
6M23
BAT54 COL
6M24
BAT54 COL
7M18
1
2
3
FM05
NC
FM01
FM02
FM24
+5VHDMI_SIDE
3M78
1K0
IM37
BC847BW
100K
3M80
84
Φ
(256x8)
EEPROM
0
1
ADR
2 SDA
NC
FM07
FM08
FM10
3M81
1K0
IM40
BC847BW
100K
3M83
84
Φ
(256x8)
EEPROM
0
ADR
1
2 SDA
NC
FM11
FM12
FM13
3M84
1K0
IM43
BC847BW
100K
3M86
84
Φ
(256x8)
EEPROM
0
ADR
1
2 SDA
6
HDMI SIDE
+5VHDMI_B
+5VHDMI_C
SCL
RES
SCL
SCL
RES
RES
7M20
WC
RES
7M21
WC
RES
RES
7M22
WC
IM38
IM39
IM41
IM42
IM44
IM45
3M35 47K
47K3M36
10p
2M50
10p
2M51
3M03 100R
7M02
BC847BW
RES
3M79
4M36
2K2
4M37
4K7
47K
3M61
7
3M62
6
5
RES
HDMI B
3M37
47K
3M38
47K
10p
2M52
10p
2M53
3M07
100R
7M04
BC847BW
3M82
4M38
2K2
4M39
4K7
47K
3M66
7
3M67
6
5
HDMI C
3M39 47K
3M40
10p
2M54
10p
2M55
3M13 100R
7M09
BC847BW
3M85
4M40
2K2
4M41
4K7
47K
3M71
7
3M72
6
5
47K
3M63
RES
47K
3M68
FM26
47K
RES
47K
3M73
2M46 100n
4M32
100n2M47
2M48 100n
7
RES
IM02
RES
IM04
FM25
IM07
IM08
RES
IM09
+5VHDMI_SIDE
+5VHDMI_B
4M54
+5VHDMI_C
HDMI_SIDE_RX2+
HDMI_SIDE_RX2-
HDMI_SIDE_RX1+
HDMI_SIDE_RX1-
HDMI_SIDE_RX0+
HDMI_SIDE_RX0-
HDMI_SIDE_RXC+
HDMI_SIDE_RXC-
HDMI_CEC_A
DDC_SCL_SIDE
DDC_SDA_SIDE
DDC_RST
3M04
IM01
2K2
HDMI_HOTPLUG_RST
HPD_RST_SIDE
DDC_SCL_SIDE
DDC_SDA_SIDE
WR_EN
RX2_B+
RX2_B-
RX1_B+
RX1_B-
RX0_B+
RX0_B-
RXC_B+
RXC_B-
HDMI_CEC_A
DDC_SCLB
DDC_SDAB
IM03
DDC_RST
3M08
2K2
HDMI_HOTPLUG_RST
HPD_RST_B
DDC_SCLB
DDC_SDAB
WR_EN
RX2_C+
RX2_C-
RX1_C+
RX1_C-
RX0_C+
RX0_C-
RXC_C+
RXC_C-
HDMI_CEC_A
DDC_SCLC
DDC_SDAC
DDC_RST
3M31
IM10
2K2
HDMI_HOTPLUG_RST
HPD_RST_C
DDC_SCLC
DDC_S
WR_EN
DAC
HDMI_CEC_A
+3V3_ANA-MUX
+5V_SW
RES
IM12
3M34
+5VHDMI_MUX_TPWR
RXC_C+
RXC_CRX0_C+
RX0_CRX1_C+
RX1_CRX2_C+
RX2_C-
RXC_B+
RXC_BRX0_B+
RX0_BRX1_B+
RX1_BRX2_B+
RX2_B-
HDMI_SIDE_RXC+
HDMI_SIDE_RXCHDMI_SIDE_RX0+
HDMI_SIDE_RX0HDMI_SIDE_RX1+
HDMI_SIDE_RX1HDMI_SIDE_RX2+
HDMI_SIDE_RX2-
+1V8_ANA-MUX
RES
1M05
1
2
3
4
5
6
7
8
9
10
1-1735446-0
3M18
4K7
9
+3V3_SW
+1V8_SW
+5V_SW
SWITCH 1
SII9185CTU
4K7
3M19
4K7
3M09
4K7
IM46
3M10
470R
RES
3M11
1K0
HDMI_HOTPLUG_RST
+3V3_ANA-MUX
RES
3M33
RES
+3V3_ANA-MUX
7M07
234355
AVCC 33
13
RESET
14
LSDA
EPSEL0
EPSEL1
15
LSCL
79
I2CADDR
TPWR
35
I2CSEL
INT
75
RSVDL
19
C+
18
C-
22
0+
21
0-
25
R0X
1+
24
1-
28
2+
27
2-
39
C+
38
C-
42
0+
41
0-
45
R1X
1+
44
1-
48
2+
47
2-
59
C+
58
C-
62
0+
61
0-
65
R2X
1+
64
1-
68
2+
67
2-
12
EXT_SWING
HDMI_RX_BUF_RST
4K7
33p
2M56
3
9
10 11
IIC_SCL_SIDE
IIC_SDA_SIDE
DDC_RST
100R
3M20
3M21 100R
33p
2M57
+1V8_ANA-MUX
63
AGND
202640
6172937495769
AVCC 18
Φ
HDMI
SWITCH
46
606680
+1V8_DIG-MUX
DVCC18
DGND
34
74
8 910
33
DSCL
RPWR
73
CEC
HPD21
HPDIN
TSCL
TSDA
TX
12 13 14
5M02
IM35
RES
4M01
IM14
IM15
4M02
IM36
4M10
4M20
RES
4M12
RES
3M32
82K
6M16
RES
4M31
RES
6M13
RES
4M29
RES
6M14
RES
4M30
RES
4M05
IM27
4M06
RES
100R3M14
3M15 100R
12
33R
5M03
33R
5M01
33R
IM13
BAT54 COL
RES
6M08
BAT54 COL
BAT54 COL6M17
BAT54 COL
BAT54 COL6M18
BAT54 COL
BAT54 COL6M15
10u2M02
100n2M03
100n2M04
10u2M15
100n2M16
100n2M17
10u2M07 10u2M01
10u2M08
100n2M10
100n
2M09
CEC_INT
IIC_SCL_SIDE
IIC_SDA_SIDE
HDMI_MUX_RST
+3V3_ANA-MUX
DDC_SCLC
DDC_SCLB
DDC_SCL_SIDE
DDC_SDAC
DDC_SDAB
DDC_SDA_SIDE
+5V_SW
+5VHDMI_C
+5V_SW
+5VHDMI_B
+5V_SW
+5VHDMI_SIDE
HPD_RST_C
HPD_RST_B
HPD_RST_SIDE
HDMI_HOTPLUG_RST
HPD_RST_MUX
HDMI_MUX_TSCL
HDMI_MUX_TSDA
HDMI_MUX_TXC+
HDMI_MUX_TXCHDMI_MUX_TX0+
HDMI_MUX_TX0-
HDMI_MUX_TX1+
HDMI_MUX_TX1-
HDMI_MUX_TX2+
HDMI_MUX_TX2-
3M87
+5V_SW
47K
3M88
47K
13
100n2M05
100n2M06
+1V8_SW
+3V3_SW
A
54
53
D
31
0
51
1
71
2
30
0
50
12DSDA
70
32
0
52
1
72
2
16
0
36
56
76
78
77
10
C+
11
C-
7
0+
8
0-
4
1+
5
1-
1
2+
2
2-
11
+1V8_ANA-MUX
FM17
100n2M20
2M19 100n
2M21 100n
+1V8_DIG-MUX
FM18
+3V3_ANA-MUX
FM19
14 15
15
16
16
17
I_17760_015.eps
180208
17
A
B
C
D
E
F
G
H
J
K
L
I
1M01 A5
1M02 E5
1M03 I5
1M04 G2
1M05 A9
1M06 E3
1M07 E3
1M08 F3
1M09 F3
2M01 B13
2M02 B13
2M03 B13
2M04 B13
2M05 B13
2M06 B13
2M07 C13
2M08 C13
2M09 C13
2M10 C13
2M15 B13
2M16 B13
2M17 B13
2M19 B14
2M20 B14
2M21 B14
2M46 D7
2M47 H7
2M48 K7
2M50 C7
2M51 C7
2M52 F7
2M53 F7
2M54 J7
2M55 J7
2M56 E10
2M57 E10
3M03 C7
3M04 C8
3M07 F7
3M08 G8
3M09 G9
3M10 I9
3M11 I9
3M13 J7
3M14 H12
3M15 H12
3M18 F9
3M19 F9
3M20 E10
3M21 E10
3M31 J8
3M32 F12
3M33 D10
3M34 G9
3M35 B7
3M36 B7
3M37 F7
3M38 F7
3M39 J7
3M40 J7
3M61 D7
3M62 D7
3M63 D7
3M66 H7
3M67 H7
3M68 H7
3M71 K7
3M72 K7
3M73 K7
3M78 C6
3M79 C7
3M80 C6
3M81 G6
3M82 G7
3M83 G6
3M84 J6
3M85 K7
3M86 K6
3M87 I13
3M88 I13
4M01 F12
4M02 B12
4M05 H12
4M06 H12
4M10 C12
4M12 F12
4M20 D12
4M29 G12
4M30 H12
4M31 G12
4M32 D7
4M36 C7
4M37 C7
4M38 G7
4M39 G7
4M40 K7
4M41 K7
4M42 E4
4M43 E4
4M44 E4
4M45 F4
4M46 F4
4M47 F4
4M48 F4
4M49 F4
4M50 F4
4M51 F4
4M52 F4
4M53 F4
4M54 H7
5M01 C12
5M02 B12
5M03 B12
6M08 F13
6M13 G12
6M14 G12
6M15 H12
6M16 G12
6M17 G12
6M18 G12
6M19 D5
6M20 D5
6M21 G6
6M22 G5
6M23 K5
6M24 K5
7M02 C7
7M04 G7
7M07 F10
7M09 J7
7M16 D6
7M17 H6
7M18 K6
7M20 C6
7M21 G6
7M22 J6
FM01 B6
FM02 C6
FM05 B6
FM06 E6
FM07 F6
FM08 F6
FM09 E2
FM10 F6
FM11 J6
FM12 J6
FM13 J6
FM15 I6
FM17 B14
FM18 B14
FM19 C14
FM24 C6
FM25 J7
FM26 H7
IM01 C7
IM02 C7
IM03 G7
IM04 F7
IM07 C7
IM08 G7
IM09 K7
IM10 J7
IM12 F9
IM13 F12
IM14 H12
IM15 H12
IM27 H12
IM35 B12
IM
36 C12
IM37 C6
IM38 C6
IM39 D6
IM40 G6
IM41 G6
IM42 G6
IM43 J6
IM44 K6
IM45 K6
IM46 I9
IM47 F4
IM48 F4
IM49 F4
IM50 F4
SSB: HDMI Main
B07B
A
+5V_SW
6N41
BAT54 COL
+5VHDMI_A
B
C
D
E
F
G
H
I
J
6N42
BAT54 COL
7N40
M24C02-WMN6
1
0
2
ADR
1
3
2 SDA
1XXX
DC1R019WBER220
HDMI A
"N00 ~ N99"
MULTIPLE 12NC : 3139_123_63481
SINGLE 12NC : 3139_123_63491
3139 123 6349.1
1
IN31
84
Φ
(256x8)
EEPROM
FN08
RES
NC
3N50
HDMI_HOTPLUG_RST1
100K
3N51
BC847BW
Circuit Diagrams and PWB Layouts
2
HDMI MAIN
4K7
47K
47K
IN36
3N42
2N68 100n
3N43
47K
47K3N47
3N48
100R
BC847BW
IN08
3N52
2K2
WC
SCL
RES
FN07
1K0
3N41
7
6
5
3N46
+5VHDMI_A
IN35
7N44
2
FN09
+5VHDMI_A
RES
7N43
4N14
4N15
RES
FXXX
2XXX
WR_EN
DDC_SCLA
DDC_SDAA
HDMI_CEC_A
TXC_A+
DDC_SCLA
DDC_SDAA
10p
10p
RES
2XXX
IN17
DDC_RST
3N49
2K2
HDMI_HOTPLUG_RST
IN16
HPD_RST_A
3
TX2_A+
TX2_A-
TX1_A+
TX1_A-
TX0_A+
TX0_A-
TXC_A-
FN10
4
HDMI_RX_BUF_RST
DDC_SCLA
DDC_SDAA
HDMI_MUX_TSCL
HDMI_MUX_TSDA
IIC_SCL_SIDE
IIC_SDA_S
IDE
TXC_A+
TXC_A-
TX0_A+
TX0_A-
TX1_A+
TX1_A-
TX2_A+
TX2_A-
HDMI_MUX_TXC+
HDMI_MUX_TXC-
HDMI_MUX_TX0+
HDMI_MUX_TX0-
HDMI_MUX_TX1+
HDMI_MUX_TX1-
HDMI_MUX_TX2+
HDMI_MUX_TX2-
HDMI_I2S_SCK
HDMI_I2S_WS
HDMI_I2S_SD
4
+3V3_ANA-MUX
RES
4K7
3N37
3N40 100R
+5VHDMI_MUX_TPWR
2N13 18p
2N14 18p
IN32
IN33
IN34
RES
3N19
3N20
3N21
5
3N38
FN03
FN04
100R3N39
3N24
4K7
FN01
FN02
2N69
33p
2N70
33p
+5VHDMI_A
1M0
1N02
33R
33R
33R
4N05
4N06
3N34
4K7
4N07
4N08
28M322
3N22 33R
74LC8.2A LA 7.
61
102
INT
100
RESET
34
DSCL0
33
DSDA0
29
DSCL1
28
DSDA1
27
CSCL
26
CSDA
105
CI2CA
101
SCDT
NC
35
R0PWR5V
30
R1PWR5V
40
+
39
-
44
+
43
-
48
+
47
-
52
+
51
-
58
+
57
-
62
+
61
-
66
+
65
-
70
+
69
-
95
IN
94
OUT
89
MCLK
NC
86
SCK
85
WS
81
SD
78
SPDIF
NC
75
MUTEOUT
NC
6
SII9125CTU
R0XC
R0X0
R0X1
R0X2
R1XC
R1X0
R1X1
R1X2
XTAL
7N01-1
MAIN
7
RSVDNC
HSYNC
EVNODD
7
RSVDL
Q
VSYNC
ODCK
55
76
77
82
83
84
98
99
16
0
15
1
14
2
13
3
10
4
5
6
7
8
9
10
144
11
141
12
140
13
139
14
138
15
135
16
134
17
133
18
132
19
129
20
128
21
127
22
126
23
123
24
122
25
121
26
120
27
117
28
116
29
115
30
114
31
111
32
110
33
109
34
108
35
19
DE
20
21
22
8
NC
3N33
NC
NC
9
8
7
3
2
1
NC
NC
NC
NC
NC
5
4K7
3N01
273N02-2 33R
3 6
3N02-333R
4533R3N02-4
1 83N08-1 33R
3 6
3N08-333R
3N05
3N07
3N04-1 1 8
27
3N04-2
3
3N04-3
45
3N04-4
1 83N06-1
27
3N06-333R
3 6
3N09 33R
3N11-1 33R1
273N11-2
3N11-3
3 6
45
3N11-4
3N12-2 33R27
3N12-333R3 6
45
3N13
3N14
3N15
3N16
33R
2N65
33p
8
33R
33R3N03
8
6
8
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R
33R3N02-1 1
33R3N08-2 2 7
33R3N08-4 4 5
33R3N06-2
33R453N06-4
33R3N10
33R
33R
33R
33R1 83N12-1
33R3N12-4
IN27
IN28
IN29
IN30
HDMI_Cb(0)
HDMI_Cb(1)
HDMI_Cb(2)
HDMI_Cb(3)
HDMI_Cb(4)
HDMI_Cb(5)
HDMI_Cb(6)
HDMI_Cb(7)
HDMI_Cb(8)
HDMI_Cb(9)
HDMI_Y(0)
HDMI_Y(1)
HDMI_Y(2)
HDMI_Y(3)
HDMI_Y(4)
HDMI_Y(5)
HDMI_Y(6)
HDMI_Y(7)
HDMI_Y(8)
HDMI_Y(9)
HDMI_Cr(0)
HDMI_Cr(1)
HDMI_Cr(2)
HDMI_Cr(3)
HDMI_Cr(4)
HDMI_Cr(5)
HDMI_Cr(6)
HDMI_Cr(7)
HDMI_Cr(8)
HDMI_Cr(9)
HDMI_DE
HDMI_H
HDMI_V
HDMI_VCLK
9
9
106
118
130
142
103
112
124
136
145
7N01-3
SII9125CTU
146
147
148
149
150
151
152
36
41
45
49
53
59
63
67
71
93
11
23
79
90
4
17
31
73
87
SII9125CTU
AGND
DGND
CGNDIOGND
GND_HS
166
VIA
153
7N01-2
167
VIA
VIA
154
10
XTALVCC
DVCC18
POWER
REGVCC
168
169
VIA
156
155
10
170
157
37
54
72
38
42
46
50
56
60
64
68
96
92
12
24
25
80
91
107
119
131
143
6
18
32
74
88
104
IOVCC33 CVCC18 AVCC33 AVCC18
113
125
137
97
159
160
161
162
VIA
163
164
165
158
11
100n
1n0
2N31
1n0
2N39
1n0
2N45
1n0
2N54
100n
2N16
1n0
2N61
1n0
2N48
1n0
2N63
100n
2N17
1n0
2N26
1n0
2N41
1n0
2N59
2N20
1n0
2N29
1n0
2N43
1n0
2N52
1n0
2N15
1n0
2N25
2N18 1n0
1n02N28
1n0
2N66
1n0
2N34
1n0
2N38
1n0
2N42
1n0
2N51
1n0
2N60
11 13
+1V8SWA
+3V3SWA
1n0
1n0
2N32
2N62
+3V3SWB
+1V8SWB
+1V8SWC
1n0
2N46
+3V3SWC
+3V3SWD
1n0
1n0
2N58
2N55
+3V3SWE
12
2N49
12
1n0
100n
2N27
100n
2N33
100n
2N36
100n2N35
100n
2N44
100n
2N50
100n
2N53
100n
2N64
2N30
2N40
2N47
2N56
IN07
IN06
100n
IN09
IN10
100n
100n
IN13
IN14
100n
IN15
133 5
5N01
120R
5N02
120R
5N03
120R
IN11
2N37 100n
IN12
5N07
120R
5N08
120R
5N09
120R
I_17760_016.eps
5N04
120R
5N05
120R
5N06
120R
+1V8_SW
+3V3_SW
+3V3_SW
+1V8_SW
+1V8_SW
+1V8_SW
+3V3_SW
+3V3_SW
+3V3_SW
180208
A
B
C
D
E
F
G
H
I
J
1N02 E5
1N03 D2
2N13 E5
2N14 E5
2N15 A10
2N16 A10
2N17 A10
2N18 A10
2N20 A10
2N25 B10
2N26 B10
2N27 B11
2N28 B10
2N29 B10
2N30 B11
2N31 B10
2N32 B11
2N33 C11
2N34 C10
2N35 D11
2N36 C11
2N37 D11
2N38 D10
2N39 D10
2N40 D11
2N41 D10
2N42 D10
2N43 D10
2N44 D11
2N45 D10
2N46 D11
2N47 D11
2N48 D10
2N49 E11
2N50 E11
2N51 E10
2N52 E10
2N53 E11
2N54 E10
2N55 E11
2N56 E11
2N58 E11
2N59 E10
2N60 F10
2N61 B10
2N62 B11
2N63 E10
2N64 F11
2N65 F8
2N66 C10
2N68 B3
2N69 C5
2N70 C5
2N71 E3
2N72 E3
3N01 C7
3N02-1 C7
3N02-2 C7
3N02-3 C7
3N02-4 C7
3N03 C7
3N04-1 D7
3N04-2 D7
3N04-3 D7
3N04-4 D7
3N05 D7
3N06-1 D7
3N06-2 D7
3N06-3 D7
3N06-4 D7
3N07 D7
3N08-1 C7
3N08-2 C7
3N08-3 C7
3N08-4 C7
3N09 D7
3N10 D7
3N11-1 E7
3N11-2 E7
3N11-3 E7
3N11-4 E7
3N12-1 E7
3N12-2 E7
3N12-3 E7
3N12-4 E7
3N13 E7
3N14 E7
3N15 E7
3N16 F7
3N19 E5
3N20 F5
3N21 F5
3N22 E5
3N24 E5
3N33 B8
3
N34 C6
3N37 A5
3N38 A5
3N39 C5
3N40 C5
3N41 B2
3N42 B2
3N43 B
3
3N46 E2
3N47 E2
3N48 F2
3N49 F3
3N50 E2
3N51 F2
3N52 F3
4N05 A5
4N06 B5
4N07 C6
4N08 C6
4N14 F3
4N15 F3
5N01 A12
5N02 A12
5N03 B12
5N04 C12
5N05 C12
5N06 D12
5N07 D12
5N08 E12
5N09 F12
6N41 A2
6N42 B2
7N01-1 B7
7N01-2 B9
7N01-3 F9
7N40 B2
7N43 F3
7N44 F2
FN10 A5
FN11 B5
FN12 B3
FN13 B5
FN14 B5
FN15 C3
FN16 D2
FN17 E2
FN18 F4
IN10 A12
IN11 A2
IN12 A12
IN13 B12
IN14 C12
IN15 C12
IN16 D12
IN17 D12
IN18 E12
IN19 E8
IN20 E8
IN21 E5
IN22 E8
IN23 E3
IN24 E5
IN25 F5
IN26 F8
IN27 F12
IN28 F2
IN29 F3
IN30 F3
IN31 F3
Circuit Diagrams and PWB Layouts
75LC8.2A LA 7.
SSB: MJC MT8280 LVDS
123 4
B08A B08A
MJC MT8280 - LVDS
5678 9
10
A
B
C
AA14
AB14
AA15
AB15
AA16
AB16
AA18
AB18
AA19
AB19
AA17
AB17
AA7
AB7
2B15 100n
TxFPGAe_0n
TxFPGAe_0p
TxFPGAe_1n
TxFPGAe_1p
TxFPGAe_2n
TxFPGAe_2p
TxFPGAe_3n
TxFPGAe_3p
TxFPGAe_4n
TxFPGAe_4p
TxFPGAe_CLKp
TxFPGAe_CLKn
NC
NC
FB11
10u2B17
2B16 10n
FB15
100n2B31
2B3210u
2B18 1u0
30R
5B15
+3V3_SW
1u02B33
FROM LVDS
FROM LVDS
+3V3_SW
+1V2_SW
LVD S_A_TXe0n
LVD S_A_TXe0p
LVD S_A_TXe1n
LVD S_A_TXe1p
LVD S_A_TXe2n
LVD S_A_TXe2p
LVD S_A_TXe3n
LVD S_A_TXe3p
LVD S_A_TXe4n
LVD S_A_TXe4p
LVD S_A_TXeCLKn
LVD S_A_TXeCLKp
LVD S_A_TXo0n
LVD S_A_TXo0p
LVD S_A_TXo1n
LVD S_A_TXo1p
LVD S_A_TXo2n
LVD S_A_TXo2p
LVD S_A_TXo3n
LVD S_A_TXo3p
LVD S_A_TXo4n
LVD S_A_TXo4p
LVD S_A_TXoCLKn
LVD S_A_TXoCLKp
+3V3_SW +3V3_SW
5B10
16V
1u02B11
10u2B10
D
+3V3_SW
E
FROM LVDS
F
5B14
2B28 1u0
TxFPGAo_0n
TxFPGAo_0p
TxFPGAo_1n
TxFPGAo_1p
TxFPGAo_2n
TxFPGAo_2p
TxFPGAo_3n
TxFPGAo_3p
TxFPGAo_4n
TxFPGAo_4p
TxFPGAo_CLKn
TxFPGAo_CLKp
FB10
30R 30R5B11
10n2B13
100n2B12
2B14 10u
FB14
30R
10u2B30
2B29 100n
7G01-4
MT8280
AA8
AB8
AA9
AB9
AA10
AB10
AA12
AB12
AA13
AB13
AA11
AB11
CLKGENPLL
0N
0P
1N
1P
2N
RO
2P
3N
3P
4N
4P
N
ROCLK
P
CLKGENPLL
Y8
Y14
Φ
LVD S_RX
RXE RXO
W8
Y12
Y15
LVD S
AVDD33
AVSS33
LVD S
Y13
Y9
Y10
VIPLL
RXORXE
CLKGEN_CK
VIPLL
W9
W10
RECLK
Y11
0N
0P
1N
1P
2N
RE
2P
3N
3P
4N
4P
N
P
N
P
W11
G
11 12 13 14 15 16 17
16V
1u02B20
2B19 10u
5B16 30R
FB12
30R5B12
10n2B22
100n2B21
2B23 10u
FB16
1u02B35
2B34 100n
7G01-3
MT8280
B15
A15
B16
A16
B17
A17
B19
A19
B20
A20
B18
A18
B9
A9
B10
A10
B11
A11
B13
A13
B14
A14
B12
A12
0N
0P
1N
1P
2N
2P
3N
3P
4N
4P
N
AECK
P
0N
0P
1N
1P
2N
2P
3N
3P
4N
4P
N
AOCK
P
D19C9C10
AVDD 12
AE
AO
AVSS12
C20
C13
C11
C12
TXA TXB
LVD S_TX
TXA TXB
C16
C17
C18
C19
C15
C14
AVDD 33
Φ
AVSS33
J20
D20
E20
F20
G20
H20
L20
K20
P20
N20
M20
VPLL
VPLL
FB13
5B1330R
10n2B25
100n2B24
2B26 10u
FB17
5B17
10u2B38
100n2B36
100n
2B37
A22
J21
0N
J22
0P
K21
1N
K22
1P
L21
2N
BE
L22
2P
N21
3N
N22
3P
P21
4N
P22
4P
M21
N
BECK
M22
P
C21
0N
C22
0P
D21
1N
D22
1P
E21
2N
BO
E22
2P
G21
3N
G22
3P
H21
4N
H22
4P
F21
N
BECK
F22
P
B21
TN2
NC
A21
TP2
NC
B22
+3V3_SW
1u02B27
30R
+3V3_SW
FROM LVDS
LVD S_B_TXe0n
LVD S_B_TXe0p
LVD S_B_TXe1n
LVD S_B_TXe1p
LVD S_B_TXe2n
LVD S_B_TXe2p
LVD S_B_TXe3n
LVD S_B_TXe3p
LVD S_B_TXe4n
LVD S_B_TXe4p
LVD S_B_TXeCLKn
LVD S_B_TXeCLKp
LVD S_B_TXo0n
LVD S_B_TXo0p
LVD S_B_TXo1n
LVD S_B_TXo1p
LVD S_B_TXo2n
LVD S_B_TXo2p
LVD S_B_TXo3n
LVD S_B_TXo3p
LVD S_B_TXo4n
LVD S_B_TXo4p
LVD S_B_TXoCLKn
LVD S_B_TXoCLKp
A
B
C
D
E
F
G
2B10 D3
2B11 D3
2B12 D4
2B13 D4
2B14 D4
2B15 D6
2B16 D6
2B17 D6
2B18 D7
2B19 D10
2B20 D11
2B21 D11
2B22 D11
2B23 D11
2B24 D13
2B25 D13
2B26 D13
2B27 D14
2B28 E3
2B29 E4
2B30 E4
2B31 E6
2B32 E6
2B33 E7
2B34 E11
2B35 E11
2B36 E13
2B37 E13
2B38 E13
3B01-1 E4
3B01-2 E4
3B01-3 E4
3B01-4 E4
3B02-1 F4
3B02-2 F4
3B02-3 E4
3B02-4 F4
3B03-1 F4
3B03-2 F4
3B03-3 F4
3B03-4 F4
3B04-1 E6
3B04-2 E6
3B04-3 E6
3B04-4 E6
3B05-1 E6
3B05-2 F6
3B05-3 F6
3B05-4 F6
3B06-1 F6
3B06-2 F6
3B06-3 F6
3B06-4 F6
5B10 D3
5B11 D7
5B12 D11
5B13 D14
5B14 D3
5B15 D7
5B16 D11
5B17 D14
7G01-3 E12
7G01-4 E5
FB10 D4
FB11 D6
FB12 D11
FB13 D13
FB14 D4
FB15 D6
FB16 D11
FB17 D13
H
I
J
K
L
3139 123 6349.1
123 456 15 16
7 8
9101112
13 14
I_17760_017.eps
180208
17
H
I
J
K
L
Circuit Diagrams and PWB Layouts
76LC8.2A LA 7.
SSB: MJC MT8280 DDR
7
100n2F67
100n2F69
100n
100n2F75
100n2F73
100n2F71
2F65 4u7
2F25
2F27
2F30
2F33
2F35
2F37
2F39
2F41
2F43
2F45
2F47
2F49
2F51
2F53
2F55
2F57
VDDQ
B8
D2
2F70 100n
2F72 100n
2F68 100n
2F66 100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
G1G3G7
DQ
UDM
LDM
VREF
F2
F8
E7
H8
D8
H2
2F76 100n
2F74
A2
NC
E2
NC
L1
NC
R3
NC
NC
R7
NC
R8
NC
G8
0
G2
1
H7
2
H3
3
H1
4
H9
5
F1
6
F9
7
C8
8
C2
9
D7
10
D3
11
D1
12
D9
13
B1
14
B9
15
B3
F3
J2
100n2F77
MJC_RDQ(0:31)
MJC_RDQ(0)
MJC_RDQ(1)
MJC_RDQ(2)
MJC_RDQ(3)
MJC_RDQ(4)
MJC_RDQ(5)
MJC_RDQ(6)
MJC_RDQ(7)
MJC_RDQ(8)
MJC_RDQ(9)
MJC_RDQ(10)
MJC_RDQ(11)
MJC_RDQ(12)
MJC_RDQ(13)
MJC_RDQ(14)
MJC_RDQ(15)
8
MJC_RDQM1
MJC_RDQM0
MJC_VREF
MJC_RBA1
MJC_RBA0
MJC_RWEn
MJC_RCKE
MJC_RCASn
MJC_RRASn
MJC_RCSn
MJC_RODT
MJC_RODT
MJC_RCKE
MJC_RWEn
MJC_RCSn
MJC_RRASn
MJC_RCASn
MJC_RBA0
MJC_RBA1
MJC_RA(0:12)
MJC_RCLK1
MJC_RCLK1n
MJC_RDQS2
MJC_RDQS2n
MJC_RDQS3
MJC_RDQS3n
2F62
2F59
2F60
2F61
100u
16V
IF01
2
+1V8_SW
5F01
30R
FF10
2F63
7F03
LP2996M
VSENSE
Φ
DRAM
VTT
VREF
REXT
RA
RCLK0
RCLK1
DQM
BA
DQS0
DQS1
DQS2
DQS3
RODT
100n
RCS
RAS
CAS
RWE
CKE
RES
MEM_VREF
MJC_VREF
MJC_RA(0)
MJC_RA(1)
MJC_RA(2)
MJC_RA(3)
MJC_RA(4)
MJC_RA(5)
MJC_RA(6)
MJC_RA(7)
MJC_RA(8)
MJC_RA(9)
MJC_RA(10)
MJC_RA(11)
MJC_RA(12)
22R3F32
22R3F33
33R3F37
+0V9_VTT
+1V8_SW
75R3B19
1%
TO MJC-DDR
MJC_RA(0:12)
MJC_RCSn
MJC_RRASn
MJC_RCASn
MJC_RWEn
MJC_RCKE
MJC_RCLK0n
MJC_RCLK0MJC_RDQ(15)
MJC_RCLK1n
MJC_RCLK1
MJC_RDQM0
MJC_RDQM1
MJC_RDQM2
MJC_RDQM3
MJC_RBA0
MJC_RBA1
MJC_RDQS0n
MJC_RDQS0
MJC_RDQS1n
MJC_RDQS1
MJC_RDQS2n
MJC_RDQS2
MJC_RDQS3n
MJC_RDQS3
MJC_RODT
+1V8_SW
FF11
8
2F64
100u 16V
2F79
4u7
2F80
3
4
K3
0
L1
1
L2
2
M2
3
L3
4
P3
5
K2
6
M3
7
J2
8
N4
9
L4
10
J1
11
R3D6
12
J4
H1
H3
P1
R2
F1
F2
AA6
AB6
A2
0
B1
1
Y1
2
AB1
3
N2
0
N1
1
A3
B3
C2
C1
W1
W2
AA2
AB2
G2
A6
UP
B7
DN
4F01
RES
FF12
1u0
100n
2F82
2F83
3F31 22R
3F34 22R
100n
75R3F41
1%
RES
3F38 33R
2F81
100n
2
7
6
C7
B4
D5
A5
B6
C5
C4
G3
E3
D2
E4
D3
E1
F4
H4
U3
U1
U4
T2
T1
T4
V3
V2
Y4
AA3
AB5
Y3
W4
AA5
W5
AB4
P4
P5
SD_
PVIN
AVIN
7G01-2
MT8280
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
5
VDDQ
GND
1
DQ
RVREF
1
B08B B08B
MJC MT8280 - DDR
A
+1V8_SW
+1V8_SW
3F39 4K7
B
C
MJC_RDQ(0:31)
MJC_RDQ(0)
MJC_RDQ(1)
MJC_RDQ(2)
MJC_RDQ(3)
MJC_RDQ(4)
MJC_VREF
MJC_RDQ(5)
MJC_RDQ(6)
MJC_RDQ(7)
MJC_RDQ(8)
MJC_RDQ(9)
MJC_RDQ(10)
MJC_RDQ(11)
MJC_RDQ(12)
MJC_RDQ(13)
MJC_RDQ(14)
MJC_RDQ(16)
MJC_RDQ(17)
MJC_RDQ(18)
MJC_RDQ(19)
MJC_RDQ(20)
MJC_RDQ(21)
MJC_RDQ(22)
MJC_RDQ(23)
MJC_RDQ(24)
MJC_RDQ(25)
MJC_RDQ(26)
MJC_RDQ(27)
MJC_RDQ(28)
MJC_RDQ(29)
MJC_RDQ(30)
MJC_RDQ(31)
100n
4u7
100n
D
E
F
53
+0V9_VTT
MJC_RA(0:12)
MJC_RA(0)
MJC_RA(1)
MJC_RA(2)
MJC_RA(3)
MJC_RA(4)
MJC_RA(5)
MJC_RA(6)
MJC_RA(7)
MJC_RA(8)
MJC_RA(9)
MJC_RA(10)
MJC_RA(11)
MJC_RA(12)
MJC_RODT
MJC_RCKE
MJC_RWEn
MJC_RCSn
MJC_RRASn
MJC_RCASn
MJC_RBA0
MJC_RBA1
MJC_RA(0:12)
MJC_RA(0)
MJC_RA(1)
MJC_RA(2)
MJC_RA(3)
MJC_RA(4)
MJC_RA(5)
MJC_RA(6)
MJC_RA(7)
MJC_RA(8)
MJC_RA(9)
MJC_RA(10)
MJC_RA(11)
MJC_RA(12)
MJC_RCLK0
MJC_RCLK0n
MJC_RDQS0
MJC_RDQS0n
MJC_RDQS1
MJC_RDQS1n
47R27
47R
5
4
3F13-2
3F09-4
EDE2516ACSE-6E-E
3F35
47R
47R
1 8
45
3F09-1
3F13-4
64
47R
47R45
47R3 6
47R
2 7 47R
1 8
27
3F11-2
3F12-4
3F09-3
3F09-2
3F11-1
2F23
2F29
7F01
A1E1J9
VDD
K9
ODT
K2
CKE
K3
WE
L8
CS
K7
RAS
L7
CAS
L2
0
L3
BA
1
M8
0
M3
1
M7
2
N2
3
N8
4
N3
5
N7
6
A
P2
7
P8
8
P3
9
M2
10
P7
11
R2
12
J8
K8
CK
F7
E8
LDQS
B7
A8
UDQS
VSS VSSQ
J3
A3
E3
47R
47R
47R
47R3 6
1 8
45
3 6
3F13-1
3F11-4
3F11-3
3F12-3
+1V8_SW
FF13
100u
16V
4u7
M9R1J1
A9G9C1C3C7C9E9
VDDL
Φ
SDRAM
VSSDL
J7
A7
P9
N1
B2
G
DDR #1
H
3139 123 6349.1
1
2 3
4
5678
3 6 47R
3F13-3
MJC_RA(0)
MJC_RA(1)
MJC_RA(2)
MJC_RA(3)
MJC_RA(4)
MJC_RA(5)
MJC_RA(6)
MJC_RA(7)
MJC_RA(8)
MJC_RA(9)
MJC_RA(10)
MJC_RA(11)
MJC_RA(12)
3F36
9
47R
47R
47R27
47R3
47R
6
1 8
4 5 47R
27
3F14-4
3F12-2
3F14-2
3F12-1
3F14-3
3F40
EDE2516ACSE-6E-E
100R100R
9
47R1
8
3F14-1
2F24
2F31
7F02
A1E1J9
VDD
K9
ODT
K2
CKE
K3
WE
L8
CS
K7
RAS
L7
CAS
L2
0
L3
BA
1
M8
0
M3
1
M7
2
N2
3
N8
4
N3
5
N7
6
A
P2
7
P8
8
P3
9
M2
10
P7
11
R2
12
J8
K8
CK
F7
E8
LDQS
B7
A8
UDQS
VSS VSSQ
A3
E3
M9R1J1
J3
N1
10
+1V8_SW
100u
16V
4u7
P9
10
22n
2F84
2F85
22n
2F89
2F90
+1V8_SW
FF14
2F26
2F28
2F32
2F34
2F36
2F38
2F40
2F42
2F44
2F46
2F48
2F50
2F52
2F54
2F56
2F58
A9G9C1C3C7C9E9
VDDL
Φ
SDRAM
VSSDL
J7
A7
B2
B8
DDR #2
11
22n
22n
2F86
22n
2F91
22n22n
2F87
22n
2F92
RES FOR EMC
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
G1G3G7
D2
VDDQ
D8
F2
E7
A2
NC
E2
NC
L1
NC
R3
NC
NC
R7
NC
R8
NC
G8
0
G2
1
H7
2
H3
3
H1
4
H9
5
F1
6
F9
7
C8
DQ
8
C2
9
D7
10
D3
11
D1
12
D9
13
B1
14
B9
15
B3
UDM
F3
LDM
J2
VREF
F8
H8
H2
11 12
2F88
+1V8_SW
2F93
MJC_RDQ(16)
MJC_RDQ(17)
MJC_RDQ(18)
MJC_RDQ(19)
MJC_RDQ(20)
MJC_RDQ(21)
MJC_RDQ(22)
MJC_RDQ(23)
MJC_RDQ(24)
MJC_RDQ(25)
MJC_RDQ(26)
MJC_RDQ(27)
MJC_RDQ(28)
MJC_RDQ(29)
MJC_RDQ(30)
MJC_RDQ(31)
22n
22n
MJC_RDQ(0:31)
MJC_RDQM3
MJC_RDQM2
MJC_VREF
12
I_17760_018.eps
180208
A
B
C
D
E
G
H
2F23 C6
2F24 C10
2F25 C7
2F26 C10
2F27 C7
2F28 C10
2F29 C6
2F30 C7
2F31 C10
2F32 C10
2F33 C7
2F34 C10
2F35 C7
2F36 C10
2F37 C7
2F38 C10
2F39 C7
2F40 C10
2F41 C7
2F42 C10
2F43 D7
2F44 D10
2F45 D7
2F46 D10
2F47 D7
2F48 D10
2F49 D7
2F50 D10
2F51 D7
2F52 D10
2F53 D7
2F54 D10
2F55 D7
2F56 D10
2F57 D7
2F58 D10
2F59 F2
2F60 F2
2F61 F2
2F62 A2
2F63 A3
2F64 B3
2F65 B7
2F66 B7
2F67 B7
2F68 B7
2F69 B7
2F70 B7
2F71 B7
2F72 B7
2F73 B7
2F74 B7
2F75 B7
2F76 B8
2F77 B8
2F79 B3
2F80 B3
2F81 B2
2F82 C3
2F83 C4
2F84 A10
2F85 A10
2F86 A11
2F87 A11
2F88 A11
2F89 B10
2F90 B10
2F91 B11
2F92 B11
2F93 B11
3B19 B4
F
3F09-1 B5
3F09-2 B6
3F09-3 B6
3F09-4 B5
3F11-1 B6
3F11-2 B6
3F11-3 B6
3F11-4 B6
3F12-1 B9
3F12-2 B9
3F12-3 B6
3F12-4 B6
3F13-1 B6
3F13-2 B5
3F13-3 B9
3F13-4 B6
3F14-1 B9
3F14-2 B9
3F14-3 B9
3F14-4 B9
3F31 E4
3F32 E4
3F33 E4
3F34 E4
3F35 F5
3F36 F9
3F37 F4
3F38 F4
3F39 B2
3F40 B9
3F41 C4
4F01 B3
5F01 A3
7F01 D6
7F02 D10
7F03 A3
7G01-2 C2
FF10 A2
FF11 A3
FF12 B4
FF13 C7
FF14 C10
IF01 B2
Circuit Diagrams and PWB Layouts
77LC8.2A LA 7.
SSB: MJC MT8280 Power
1
B08C B08C
MJC MT8280 - POWER
3
4
5
6
7
8
10
A
FLASH
7G02
RES
(0)
0
+3V3_SW
+3V3_SW
+3V3_SW
+3V3_SW
+3V3_SW
M25P16-VMF
FG12
FG13
FG14
IG15
4K73G10
7G03
PDTC114ET
SFCK
1
(1)
15
16
7
9
1
B
C
D
E
F
G
+1V2_SW
+3V3_SW
+1V8_SW
+1V
+1V
+1V
5G11 30R
2G11 4u7
2G12 100n
2G14 100n
2G16 100n
2G17 1u0
5G1330R
2G18 4u7
2G19 100n
2G21 100n
2G23 100n
2G25 100n
2G27 10n
2G29 10n
2G30
2G3910n
2G41 10n
2G43 1u0
5G17
5G1830R
2G51
2G52 100n
2G54 100n
2G57 100n
2G59 100n
2G62 100n
2G64 10n
2G65 1u0
2G66 1u0
2G69
2G70
1u0
1n0
FG15
100n2G13
100n2G15
100n2G20
100n2G22
100n2G24
100n2G26
10n2G28
10n
10n2G40
1u02G42
30R
30R5G19
4u72G44
100n2G45
100n2G50
100n
100n2G53
100n2G55
100n2G58
100n2G61
10n2G63
1u02G67
7G04
TPS74801DRCR
1
IN
2
5
EN
7
SS
3
6
FG18
FG22
GND
+3V3_SW
7G01-1
MT8280
DVDD 33
DVDD 18
DVDD 18
DVDD 18
DVDD 10
DVDD 10
DVDD 10
FB
10
9
8
4
Φ
POWER
DVSS
DVSS
DVSS
DVSS
DVSS
+5V_SW
2G71
1u0
M11
M12
M14
K10
K13
N10
N13
P11
P12
AA1
A4
B5
C3
D1
D4
E2
J3
J9
J11
J12
K1
K4
L9
L11
L12
L14
M9
P2
P9
R1
R4
T3
W6
Y2
Y5
FG29
3G36
680R
1%
IG14
3G34
3G35
10K
2K2
5%
2G68
22u
6.3V
TO FLASH&NVM
+1V
+1V2_SW
+1V2_SW
+1V2_SW
+3V3_SW
5G14 30R
16V
1u02G32
2G3110u
10u2G46
2G47 1u0
3G11 820K
1G01
PRST
PWN
UART_1RX
UART_1TX
BL_ON_OFF
LCD_PWR_ON
27M0
UART_0RX
UART_0TX
30R5G12
FG20
30R5G15
2G33 100n
30R5G16
3G16
3G17
3G19
3G33 100R
FG17
FG19
4u72G34
2G48 10u
4u72G38
100n2G35
2G364u7
2G37100n
FG21
100n2G49
7G01-5
MT8280
V20
AVDD33
IG10
IG11
IG12
IG13
U20
V21
V22
W18
Y18
W15
AB21
AA20
Y6
Y7
Y16
W16
W17
V16
AVSS33
I
O
PRST
PWN
EFUSE
RXD
TXD
0
1
2
3
4
5
22p2G56
22p2G60
10K
0R
0R
100R3G23
100R3G24
100R3G30
C8
D9
W7
W19
Y20
A1
B2
C6
D7
F3
G1
G4
H2
M1
M4
N3
U2
V1
V4
W3
AA4
AB3
J10
J13
J14
K9
K11
K12
K14
L10
L13
M10
M13
N9
N11
N12
N14
P10
P13
P14
Φ
OUT
BIASPG
GND_HS
11
10K
3G38
XTAL
NS_XTAL
PHERIPHERAL
GPIO
T20
SYSPLL
AVDD12
Φ
AVSS_PLL
R20
T21
T22
MJCPLL
R21
R22
DMPLL
JTRST
JRTCK
SCL
SDA
SFCS
SFCK
SFDI
SFDO
JTMS
JTCK
JTDI
JTDO
INT0
TN0
TP0
AB20
W21
AA22
W20
AA21
Y19
Y22
Y21
V17
U21
U22
SF_S0
SF_CK
SF_CS0
FLASH_MJC_WE
A7
D8
B8
A8
FG23
FG24
FG25
FG26
FG27
FG28
NC
NC
TRAP MODE
TEST_CPUM
NORM
( ) DEFAULT MODE
+3V3_SW
+3V3_SW
TO Microp
3G12 100R
100R3G13
4K7
3G14
4K7
3G15
4K7
3G18
4K7
3G20
10K
3G21
10K
3G22
4K7
3G27
4K7
3G29
0R
3G31
10K
3G32
JTDO
X
(1)
FG16
RES
RES
RES
RES
JTRST
H
3139 123 6349.1
1 3
2
45
67
8 9
10
119
+3V3_SW
5G10
30R
2G10
FG10
210
VCC
8
Φ
Q
D
2Mx8
VSS
3
4
5
6
11
DU
12
13
14
C
S
W
HOLD
FLASH
TO Microp
IIC_SCL_up
IIC_SDA_up
INT0
SFDO
1
(1)
11 12
100n
SF_DO
NC
FG11
122
I_17760_019.eps
180208
A
B
C
D
E
F
G
H
1G01 E6
2G10 A11
2G11 B2
2G12 B2
2G13 B2
2G14 B2
2G15 B2
2G16 B2
2G17 B2
2G18 C2
2G19 C2
2G20 C2
2G21 C2
2G22 C2
2G23 C2
2G24 C2
2G25 C2
2G26 C2
2G27 C2
2G28 C2
2G29 C2
2G30 C2
2G31 C6
2G32 C6
2G33 C7
2G34 C7
2G35 C7
2G36 C7
2G37 C7
2G38 C7
2G39 D2
2G40 D2
2G41 D2
2G42 D2
2G43 D2
2G44 D2
2G45 D2
2G46 D6
2G47 D6
2G48 D7
2G49 D7
2G50 D2
2G51 D2
2G52 D2
2G53 D2
2G54 E2
2G55 E2
2G56 E7
2G57 E2
2G58 E2
2G59 E2
2G60 E7
2G61 E2
2G62 E2
2G63 E2
2G64 E2
2G65 E2
2G66 E2
2G67 E2
2G68 G5
2G69 G2
2G70 G2
2G71 G4
3G10 B10
3G11 E6
3G12 E9
3G13 E9
3G14 E9
3G15 E9
3G16 E7
3G17 E7
3G18 E9
3G19 E7
3G20 E9
3G21 E9
3G22 E9
3G23 E7
3G24 E7
3G27 F9
3G29 F9
3G30 F7
3G31 F9
3G32 F9
3G33 F7
3G34 G4
3G35 G4
3G36 G4
3G38 B8
5G10 A11
5G11 B2
5G12 C6
5G13 C2
5G14 C6
5G15 C6
5G16 D6
5G17 D2
5G18 D2
5G19 D2
7G01-1 B3
7G01-5 D8
7G02 A11
7G03 B10
7G04 F3
FG10 A11
FG11 B12
FG12 B10
FG13 B10
FG14 B10
FG15 B3
FG16 B10
FG17 B7
FG18 C3
FG19 C7
FG20 C7
FG21 D7
FG22 D3
FG23 E9
FG24 E9
FG25 E9
FG26 E9
FG27 E9
FG28 F9
FG29 F5
IG10 E7
IG11 E7
IG12 F7
IG13 F7
IG14 G4
IG15 B10
Circuit Diagrams and PWB Layouts
E
78LC8.2A LA 7.
SSB: SRP List Explanation
xample
Net Name Diagram
+12-15V AP1 (4x)
+12-15V AP4 (4x)
+12-15V AP5 (12x)
+12-15V AP6 (4x)
+12-15V AP7 (8x)
+12V AP1 (4x)
+12V_NF AP1 (2x)
+12VAL AP1 (2x)
+25VLP AP1 (4x)
+25VLP AP2 (1x)
+3V3-STANDBY AP5 (3x)
+400V-F AP1 (2x)
+400V-F AP2 (2x)
+400V-F AP3 (2x)
+5V2 AP1 (6x)
+5V2 AP2 (1x)
+5V2-NF AP1 (1x)
+5V2-NF AP2 (1x)
+5V-SW AP1 (6x)
+5V-SW AP2 (1x)
+8V6 AP1 (3x)
+AUX AP1 (2x)
+AUX AP2 (1x)
+DC-F AP1 (2x)
+DC-F AP3 (2x)
+SUB-SPEAKER AP5 (1x)
+SUB-SPEAKER AP6 (2x)
-12-15V AP1 (4x)
-12-15V AP4 (6x)
-12-15V AP5 (14x)
-12-15V AP6 (6x)
-12-15V AP7 (8x)
AL-OFF AP1 (2x)
AUDIO-L AP4 (1x)
AUDIO-L AP5 (1x)
AUDIO-PROT AP5 (3x)
AUDIO-R AP4 (1x)
AUDIO-R AP5 (1x)
AUDIO-SW AP5 (1x)
AUDIO-SW AP7 (1x)
BOOST AP1 (2x)
CPROT AP4 (2x)
CPROT AP5 (1x)
CPROT-SW AP5 (1x)
CPROT-SW AP6 (2x)
-DC-F AP1 (2x)
-DC-F AP3 (2x)
DC-PROT AP1 (1x)
DC-PROT AP5 (2x)
DIM-CONTROL AP1 (2x)
FEEDBACK+SW AP6 (2x)
FEEDBACK-L AP4 (2x)
FEEDBACK-R AP4 (2x)
FEEDBACK-SW AP6 (2x)
GND-AL AP1 (2x)
GNDHA AP1 (40x)
GNDHA AP2 (20x)
GNDHA AP3 (2x)
GNDHOT AP3 (2x)
GND-L AP1 (2x)
GND-L AP4 (4x)
GND-L AP5 (34x)
GND-LL AP4 (7x)
GND-LL AP5 (1x)
GND-LR AP4 (7x)
GND-LR AP5 (1x)
GND-LSW AP5 (1x)
GND-LSW AP6 (15x)
GND-S AP1 (11x)
GND-SA AP4 (8x)
GND-SA AP5 (2x)
GND-SA AP6 (8x)
GND-SA AP7 (6x)
GNDscrew AP3 (2x)
GNDscrew AP5 (2x)
GND-SSB AP5 (3x)
GND-SSP AP1 (51x)
GND-SSP AP2 (15x)
IN+SW AP6 (2x)
IN-L AP4 (2x)
IN-R AP4 (2x)
IN-SW AP6 (2x)
INV-MUTE AP4 (1x)
INV-MUTE AP5 (1x)
INV-MUTE AP6 (1x)
LEFT-SPEAKER AP4 (1x)
LEFT-SPEAKER AP5 (1x)
MUTE AP4 (2x)
MUTE AP5 (1x)
MUTE AP6 (2x)
ON-OFF AP1 (3x)
OUT AP6 (1x)
OUT AP7 (2x)
OUTN AP6 (1x)
OUTN AP7 (1x)
POWER-GOOD AP1 (2x)
POWER-OK-PLATFORM AP1 (2x)
RIGHT-SPEAKER AP4 (1x)
RIGHT-SPEAKER AP5 (1x)
SOUND-ENABLE AP5 (3x)
STANDBY AP1 (5x)
STANDBY AP2 (1x)
-SUB-SPEAKER AP5 (1x)
-SUB-SPEAKER AP6 (2x)
V-CLAMP AP1 (1x)
V-CLAMP AP3 (2x)
1 . 1 . Introduction
SRP (Service Re ference Protocol) is a softw are too l that creates a list w i th all refer e n c es to signal lines. The list contains
references to the signals w i thin all schemat ics of a PWB. It replaces the text refe r ences currentl y p r inted next t o the signal
names in the schematics. These printed refe rences are created man ually an d are t h e r efore n o t guar an teed to be 100 %
correct. In additio n , in the current crowded schema t ics there is often none or ver y little pl ace for these references.
Some of the PW
B schematics w ill use SRP while others w ill sti ll use the manual refe rences. Either there w ill be an SRP
r e fer ence list for a schematic, or ther e w ill be pr inted r e ferences in the schematic.
1.2. No n - SRP Schematics
There a r e severa l different signals available in a schematic:
1.2.1. Po w e r Supply Lines
All pow er suppl y lines are available in t he suppl y line overview (see chapter 6). I n th e schematics (se e chapter 7) is n o t
indicated w h e r e supplies are coming from or going to.
It is how ever indi cated if a supply is incoming (created elsew h e r e), o r outgoing (cr eat ed or adapt ed in the current sche m atic).
Outgoing Incoming
+5 V +5 V
1.2.2. Normal Signals
For no rmal signals, a schematic r e ference (e. g . B1 4b) is placed next to the signals.
B 14b
si gnal _nam e
1.2.3. Grounds
For no rmal and s pecial grounds (e .g. GN DH OT o r GND3V3 etc.), n o thing is indicate d.
1.3. SRP Schematics
SRP is a tool, w h ich automatically creates a list w i th signal reference s , indicating on which sc hematic t he signals are used.
A reference is cr eated for all signals indicat ed w i th an SRP s y mbol, these s y mbols are:
+5 V +5 V
na m e na m e
na m e na m e
na m e na m e
na m e
Bi-directional lin e (e.g. SDA ) into a w i r e tree.
na m e
Signal line into a w i r e tree, its dir e ction depends on t he circuit (e.g. ingoing for PD P, outgoing for L C D sets).
Remarks:
• When there is a black dot on the "signal dire ction arrow" it is an SRP symbol, so there will be a reference to the signal
name in the SRP list.
• All references to normal grounds (Ground symbols without additi onal text) are not listed in the reference list, this to keep
it concise.
• Signals that are not used in multiple schematics, but only onc e or several times in the same schematic, are included
in the SRP reference list, but only with one reference.
Additional Tip:
When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the
schematics. In Adobe PDF reader:
• Select the signal name you want to sear ch for, with the "Select text" tool.
• Copy and paste the signal name in the "Search PDF" tool.
• Search for all occurrences of the signal name.
• Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to
"zoom in" to e.g. 150% to see clearly, which text is select ed. Then you can zoom out, to get an overview of the complete
schematic.
PS. It is recommended to use at least Adobe PDF (reader) version 6. x, due to better search possibilities in this version.
Power suppl y li ne.
Stand alone signal or sw itching li ne (used as less as possible).
Signal line into a w i re tree.
Sw itching line into a w i re tre e .
E_06532_031.eps
230606
Personal Notes:
SSB: SRP List
Netname Diagram
+0V9_VTT B08C (2x)
+12V_AUDIO B01B (1x)
+12V_AUDIO B06A (1x)
+12V_DISP B01B (4x)
+12V_DISP B02 (2x)
+12V_DISP B03 (1x)
+12V_DISP B04A (1x)
+12V_DISP B05A (1x)
+12V_DISP B05B (1x)
+1V2_ADC B04B (5x)
+1V2_CORE B04B (2x)
+1V2_PLL B04B (4x)
+1V2_SW B01B (2x)
+1V2_SW B04B (1x)
+1V2_SW B04E (1x)
+1V2_SW B08B (1x)
+1V2-FPGA B04E (2x)
+1V2-PLL B04E (2x)
+1V8_ANA-MUX B07B (3x)
+1V8_DIG-MUX B07B (2x)
+1V8_SW B02 (1x)
+1V8_SW B07B (2x)
+1V8_SW B08A (4x)
+1V8_SW B08C (9x)
+1V8SWA B0 8A (1x)
+1V8SWB B08A (1x)
+1V8SWC B08A (1x)
+24V B04D (1x)
+2V5_SW B01B (1x)
+2V5_SW B04E (1x)
+2V5_VDDMQ B04B (2x)
+2V5_VDDMQ B04C (6x)
+2V5in-FPGA B04E (2x)
+2V5out-FPGA B04E (2x)
W B02 (3x)
+2V6_S
+2V6_SW B04C (1x)
+3V3_ANA-MUX B07B (5x)
+3V3_ANA-MUX B08A (1x)
+3V3_FPGA B04D (9x)
+3V3_FPGA B04E (4x)
+3V3_STBY B01B (1x)
+3V3_STBY B04A (33x)
+3V3_STBY B04B (1x)
+3V3_STBY B06A (3x)
+3V3_STBY B06C (1x)
+3V3_STBY B07A (3x)
+3V3_SW B01B (4x)
+3V3_SW B03 (2x)
+3V3_SW B04A (17x)
V3_SW B04B (17x)
+3
+3V3_SW B04E (1x)
+3V3_SW B05A (1x)
+3V3_SW B05B (1x)
+3V3_SW B07A (3x)
+3V3_SW B07B (2x)
+3V3_SW B08A (5x)
+3V3_SW B08B (7x)
+3V3SWA B0 8A (1x)
+3V3SWB B08A (1x)
+3V3SWC B08A (1x)
+3V3SWD B08A (1x)
+3V3SWE B08A (1x)
+5V_IF B03 (6x)
+5V_SW B02 (
+5V_SW B03 (3x)
+5V_SW B04A (2x)
+5V_SW B04B (2x)
+5V_SW B05B (3x)
+5V_SW B06A (1x)
+5V_SW B06C (2x)
+5V_SW B07A (2x)
+5V_SW B07B (9x)
+5V_SW B08A (1x)
+5V_TCON B01B (1x)
+5V_TCON B05A (1x)
+5V_TUN B03 (2x)
+5VHDMI_A B08A (4x)
+5VHDMI_B B07B (4x)
+5VHDMI_C B07B (4x)
+5VHDMI_MUX_TPWR B07B (1x)
+5VHDMI_MUX_TPWR B08A (1x)
+5VHDMI_SIDE B07B (4x)
+5VS B03 (4x)
+8V B05B (2x)
+VDISP B05A (3x)
+VTUN B01B (1x)
+VTUN B03 (1x)
-12V_AUDIO B01B (1x)
-12V_AUDIO B06A (1x)
A(0) B04A (2x)
A(0) B04B (1x)
A(0:7) B04A (1x)
A(1) B04A (2x)
A(1) B04B (1x)
A(1:7) B04A (1x)
A(10) B04A (2x)
A(11) B04A (2x)
A(12) B04A (2x)
A(13) B04A (2x)
A(14) B04A (2x)
A(15) B04A (2x)
A(16) B04A (2x)
A(17) B04A (2x)
A(18) B04A (2x)
A(19) B04A (2x)
A(2) B04A (2x)
A(2) B04B (1x)
A(3) B04A (2x)
A(3) B04B (1x)
A(4) B04A (2x)
A(4) B04B (1x)
A(5) B04A (2x)
A(5) B04B (1x)
A(6) B04A (2x)
A(6) B04B (1x)
A(7) B04A (2x)
A(7) B04B (1x)
A(8) B04A (2x)
A(8:19) B04A (2x)
A(9) B04A (2x)
AD(0) B04A (2x)
AD(0) B04B (1x)
3x)
3104 313 6349.1
Circuit Diagrams and PWB Layouts
AD(0:7) B04A (2x)
AD(1) B04A (2x)
AD(1) B04B (1x)
AD(2) B04A (2x)
AD(2) B04B (1x)
AD(3) B04A (2x)
AD(3) B04B (1x)
AD(4) B04A (2x)
AD(4) B04B (1x)
AD(5) B04A (2x)
AD(5) B04B (1x)
AD(6) B04A (2x)
AD(6) B04B (1x)
AD(7) B04A (2x)
AD(7) B04B (1x)
ALE_EMU B04A (1x)
ALE_EMU B04B (1x)
ambi_pwm(0) B04D (1x)
ambi_pwm(0) B04E (1x)
ambi_pwm(1) B04D (1x)
ambi_pwm(1) B04E (1x)
ambi_pwm(2) B04D (1x)
ambi_pwm(2) B04E (1x)
ambi_pwm(3) B04D (1x)
ambi_pwm(3) B04E (1x)
ambi_pwm(4) B04D (1x)
ambi_pwm(4) B04E (1x)
ambi_pwm(5) B04D (1x)
ambi_pwm(5) B04E (1x)
AMBI_SCL B04D (1x)
AMBI_SCL B04E (1x)
AMBI_SDA B04D (1x)
AMBI_SDA B04E (1x)
ANTI_PLOP B04A (1x)
ANTI_PLOP B06A (1x)
ASDO B04D (1x)
ASDO B04E (1x)
AUD_ RST B04A (1x)
AUD_ RST B05B (1x)
AUDIO_L
S_L B05B (1x)
AUDIO_LS_L B06A (1x)
AUDIO_LS_R B05B (1x)
AUDIO_LS_R B06A (1x)
BL_ADJUST_ANA B01B (1x)
BL_ADJUST_ANA B04B (1x)
BL_BOOST B01B (1x)
BL_BOOST B04A (1x)
BL_ON_OFF B01B (1x)
BL_ON_OFF B04A (1x)
BOLT_ON_UART_RXD B04A (1x)
BOLT_ON_UART_RXD B06B (1x)
BOLT_ON_UART_RXD B06C (1x)
BOLT_ON_UART_TXD B04A (1x)
BOLT_ON_UART_TXD B06B (1x)
BOLT_ON_UART_TXD B06C (1x)
CE B04A (1x)
CLK_OSC1 B04D (1x)
CLK_OSC1 B04E (1x)
COMP_AUDIO_IN_L B05B (1x)
COMP_AUDIO_IN_L B06B (1x)
COMP_AUDIO_IN_R B05B (1x)
COMP_AUDIO_IN_R B06B (1x)
CPU_RST B04A (1x)
CS B04A (1x)
CS B04B (1x)
CTRL_DISP1 B05A (2x)
CTRL_DISP1_up B04A (1x)
CTRL_DISP1_up B05A (1x)
CTRL_DISP2 B05A (2x)
CTRL_DISP3 B05A (2x)
CTRL_DISP4 B05A (2x)
CTRL_DISP4_up B04A (1x)
CTRL_DISP4_up B05A (1x)
CVBS_IN_DTV B04B (1x)
CVBS_IN_DTV B06B (1x)
CVBS_RF B03 (1x)
CVBS_RF B04B (1x)
DATA0 B04D (1x)
DATA0 B04E (1x)
DC_5V B07A (3x)
DC_PROT B04A (1x)
DC_PROT B06A (1x)
DCLK B04D (1x)
DCLK B04E (1x)
DDC_RST B04A (1x)
DDC_RST B07B (5x)
DDC_RST B08A (1x)
DDC_SCL_SIDE B07B (2x)
DDC_SCLA B08A (2x)
DDC_SCLB B07B (2x)
DDC_SCLC B07B (2x)
DDC_SDA_SIDE B07B (2x)
DDC_SDAA B08A (2x)
DDC_SDAB B07B (2x)
DDC_SDAC B07B (2x)
DDR_VREF B04B (1x)
DDR_VREF B04C (3x)
DP_HS B04B (2x)
DTV_IRQ B04A (1x)
DTV_IRQ B06B (1x)
DTV_IRQ B06C (1x)
ENGAGE B06A (1x)
FPGA_BL_BOOST B04E (1x)
FPGA_BL_DIMMING B04B (1x)
FPGA_BL_DIMMING B04E (1x)
GNDDC1 B01B (13x)
GNDDC2 B02 (13x)
GNDDC24V B04D (2x)
GNDSND B01B (2x)
GNDSND B06A (27x)
GNDTUN B01B (1x)
HD_PB_IN B04B (1x)
HD_PB_IN B06B (1x)
HD_PB_IN_ITV B06B (2x)
HD_PB_IN_ITV B06C (1x)
HD_PR_IN B04B (1x)
HD_PR_IN B06B (1x)
HD_PR_IN_ITV B06B (2x)
HD_PR_IN_ITV B06C (1x)
HD_Y_IN B04B (1x)
HD_Y_IN B06B (1x)
HD_Y_IN_ITV B06B (2x)
HD_Y_IN_ITV B06C (1x)
HDMI_Cb(0) B04B (1x)
HDMI_Cb(0) B08A (1x)
HDMI_Cb(1) B04B (1x)
HDMI_Cb(1) B08A (1x)
HDMI_C
b(2) B04B (1x)
HDMI_Cb(2) B08A (1x)
HDMI_Cb(3) B04B (1x)
HDMI_Cb(3) B08A (1x)
HDMI_Cb(4) B04B (1x)
HDMI_Cb(4) B08A (1x)
HDMI_Cb(5) B04B (1x)
HDMI_Cb(5) B08A (1x)
HDMI_Cb(6) B04B (1x)
HDMI_Cb(6) B08A (1x)
HDMI_Cb(7) B04B (1x)
HDMI_Cb(7) B08A (1x)
HDMI_Cb(8) B04B (1x)
HDMI_Cb(8) B08A (1x)
HDMI_Cb(9) B04B (1x)
HDMI_Cb(9) B08A (1x)
HDMI_CEC_A B07B (1x)
HDMI_CEC_A B08A (1x)
HDMI_Cr(0) B04B (1x)
HDMI_Cr(0) B08A (1x)
HDMI_Cr(1) B04B (1x)
HDMI_Cr(1) B08A (1x)
HDMI_Cr(2) B04B (1x)
HDMI_Cr(2) B08A (1x)
HDMI_Cr(3) B04B (1x)
HDMI_Cr(3) B08A (1x)
HDMI_Cr(4) B04B (1x)
HDMI_Cr(4) B08A (1x)
HDMI_Cr(5) B04B (1x)
HDMI_Cr(5) B08A (1x)
HDMI_Cr(6) B04B (1x)
HDMI_Cr(6) B08A (1x)
HDMI_Cr(7) B04B (1x)
HDMI_Cr(7) B08A (1x)
HDMI_Cr(8) B04B (1x)
HDMI_Cr(8) B08A (1x)
HDMI_Cr(9) B04B (1x)
HDMI_Cr(9) B08A (1x)
HDMI_DE B04B (1x)
HDMI_DE B08A (1x)
HDMI_H B04B (1x)
HDMI_H B08A (1x)
HDMI_HOTPLUG_RST B04A (1x)
HDMI_HOTPLUG_RST B07B (5x)
HDMI_HOTPLUG_RST B08A (1x)
HDMI_I2S_SCK B05B (1x)
HDMI_I2S_SCK B08A (1x)
HDMI_I2S_SD B05B (1x)
HDMI_I2S_SD B08A (1x)
HDMI_I2S_WS B05B (1x)
HDMI_I2S_WS B08A (1x)
HDMI_MUX_RST B04A (1x)
HDMI_MUX_RST B07B (1x)
HDMI_MUX_TX0- B07B (1x)
HDMI_MUX_TX0- B08A (1x)
HDMI_MUX_TX0+ B07B (1x)
HDMI_MUX_TX0+ B08A (1x)
HDMI_MUX_TX1- B07B (1x)
HDMI_MUX_TX1- B08A (1x)
HDMI_MUX_TX1+ B07B (1x)
HDMI_MUX_TX1+ B08A (1x)
HDMI_MUX_TX2- B07B (1x)
HDMI_MUX_TX2- B08A (1x)
HDMI_MUX_TX2+ B07B (1x)
HDMI_MUX_TX2+ B0
HDMI_MUX_TXC- B07B (1x)
HDMI_MUX_TXC- B08A (1x)
HDMI_MUX_TXC+ B07B (1x)
HDMI_MUX_TXC+ B08A (1x)
HDMI_RX_BUF_RST B04A (1x)
HDMI_RX_BUF_RST B07B (2x)
HDMI_RX_BUF_RST B08A (1x)
HDMI_SIDE_RX0- B07B (2x)
HDMI_SIDE_RX0+ B07B (2x)
HDMI_SIDE_RX1- B07B (2x)
HDMI_SIDE_RX1+ B07B (2x)
HDMI_SIDE_RX2- B07B (2x)
HDMI_SIDE_RX2+ B07B (2x)
HDMI_SIDE_RXC- B07B (2x)
HDMI_SIDE_RXC+ B07B (2x)
HDMI_V B04B (1x)
HDMI_V B08A (1x)
HDMI_VCLK B04B (1x)
HDMI_VCLK B08A (1x)
HDMI_Y(0) B04B (1x)
HDMI_Y(0) B08A (1x)
HDMI_Y(1) B04B (1x)
HDMI_Y(1) B08A (1x)
HDMI_Y(2) B04B (1x)
HDMI_Y(2) B08A (1x)
HDMI_Y(3) B04B (1x)
HDMI_Y(3) B08A (1x)
HDMI_Y(4) B04B (1x)
HDMI_Y(4) B08A (1x)
HDMI_Y(5) B04B (1x)
HDMI_Y(5) B08A (1x)
HDMI_Y(6) B04B (1x)
HDMI_Y(6) B08A (1x)
HDMI_Y(7) B04B (1x)
HDMI_Y(7) B08A (1x)
HDMI_Y(8) B04B (1x)
HDMI_Y(8) B08A (1x)
HDMI_Y(9) B04B (1x)
HDMI_Y(9) B08A (1x)
HP_AUDIO_OUT_L B05B (1x)
HP_AUDIO_OUT_L B06A (1x)
HP_AUDIO_OUT_L B06C (1x)
HP_AUDIO_OUT_R B05B (1x)
HP_AUDIO_OUT_R B06A (1x)
HP_AUDIO_OUT_R B06C (1x)
HP_DETECT B04A (1x)
HP_DETECT B06B (1x)
HP_LOUT B06A (1x)
HP_LOUT B06B (1x)
HP_ROUT B06A (1x)
HP_ROUT B06B (1x)
HPD_RST_A B04A (1x)
HPD_RST_A B08A (1x)
HPD_RST_B B07B (2x)
HPD_RST_C B07B (2x)
HPD_RST_SIDE B07B (2x)
8A (1x)
IF_ATV B03 (2x)
IIC_SCL B03 (2x)
IIC_SCL B04A (1x)
IIC_SCL B05B (1x)
IIC_SCL_SIDE B04A (1x)
IIC_SCL_SIDE B04B (1x)
IIC_SCL_SIDE B07B (3x)
IIC_SCL_SIDE B08A (1x)
IIC_SCL_up B04A (1x)
IIC_SCL_up B04D (1x)
IIC_SCL_up B07A (1x)
IIC_SDA B03 (2x)
IIC_SDA B04A (1x)
IIC_SDA B05B (1x)
IIC_SDA_SIDE B04A (1x)
IIC_SDA_
SIDE B04B (1x)
IIC_SDA_SIDE B07B (3x)
IIC_SDA_SIDE B08A (1x)
IIC_SDA_up B04A (1x)
IIC_SDA_up B04D (1x)
IIC_SDA_up B07A (1x)
ITV_I2C_SCL B04A (1x)
ITV_I2C_SCL B05A (1x)
ITV_I2C_SCL B06C (1x)
ITV_I2C_SDA B04A (1x)
ITV_I2C_SDA B05A (1x)
ITV_I2C_SDA B06C (1x)
KEYB B04A (2x)
LCD_PWR_ON B04A (1x)
LCD_PWR_ON B05A (1x)
LED1 B04A (2x)
LED2 B04A (2x)
LIGHT_SENSOR B04A (1x)
LVD S_A_TXe0n B05A (1x)
LVD S_A_TXe0n B08B (1x)
LVD S_A_TXe0p B05A (1x)
LVD S_A_TXe0p B08B (1x)
LVD S_A_TXe1n B05A (1x)
LVD S_A_TXe1n B08B (1x)
LVD S_A_TXe1p B05A (1x)
LVD S_A_TXe1p B08B (1x)
LVD S_A_TXe2n B05A (1x)
LVD S_A_TXe2n B08B (1x)
LVD S_A_TXe2p B05A (1x)
S_A_TXe2p B08B (1x)
LVD
LVD S_A_TXe3n B05A (1x)
LVD S_A_TXe3n B08B (1x)
LVD S_A_TXe3p B05A (1x)
LVD S_A_TXe3p B08B (1x)
LVD S_A_TXe4n B05A (1x)
LVD S_A_TXe4n B08B (1x)
LVD S_A_TXe4p B05A (1x)
LVD S_A_TXe4p B08B (1x)
LVD S_A_TXeCLKn B05A (1x)
LVD S_A_TXeCLKn B08B (1x)
LVD S_A_TXeCLKp B05A (1x)
LVD S_A_TXeCLKp B08B (1x)
LVD S_A_TXo0n B05A (1x)
LVD S_A_TXo0n B08B (1x)
LVD S_A_TXo0p B05A (1x)
LVD S_A_TXo0p B08B (1x)
LVD S_A_TXo1n B05A (1x)
LVD S_A_TXo1n B08B (1x)
LVD S_A_TXo1p B05A (1x)
LVD S_A_TXo1p B08B (1x)
LVD S_A_TXo2n B05A (1x)
LVD S_A_TXo2n B08B (1x)
S_A_TXo2p B05A (1x)
LVD
LVD S_A_TXo2p B08B (1x)
LVD S_A_TXo3n B05A (1x)
LVD S_A_TXo3n B08B (1x)
LVD S_A_TXo3p B05A (1x)
LVD S_A_TXo3p B08B (1x)
LVD S_A_TXo4n B05A (1x)
LVD S_A_TXo4n B08B (1x)
LVD S_A_TXo4p B05A (1x)
LVD S_A_TXo4p B08B (1x)
LVD S_A_TXoCLKn B05A (1x)
LVD S_A_TXoCLKn B08B (1x)
LVD S_A_TXoCLKp B05A (1x)
LVD S_A_TXoCLKp B08B (1x)
LVD S_B_TXe0n B05A (1x)
LVD S_B_TXe0n B08B (1x)
LVD S_B_TXe0p B05A (1x)
LVD S_B_TXe0p B08B (1x)
LVD S_B_TXe1n B05A (1x)
LVD S_B_TXe1n B08B (1x)
LVD S_B_TXe1p B05A (1x)
LVD S_B_TXe1p B08B (1x)
LVD S_B_TXe2n B05A (1x)
LVD S_B_TXe2n B0
LVD S_B_TXe2p B05A (1x)
LVD S_B_TXe2p B08B (1x)
LVD S_B_TXe3n B05A (1x)
LVD S_B_TXe3n B08B (1x)
LVD S_B_TXe3p B05A (1x)
LVD S_B_TXe3p B08B (1x)
LVD S_B_TXe4n B05A (1x)
LVD S_B_TXe4n B08B (1x)
LVD S_B_TXe4p B05A (1x)
LVD S_B_TXe4p B08B (1x)
LVD S_B_TXeCLKn B05A (1x)
LVD S_B_TXeCLKn B08B (1x)
LVD S_B_TXeCLKp B05A (1x)
LVD S_B_TXeCLKp B08B (1x)
LVD S_B_TXo0n B05A (1x)
LVD S_B_TXo0n B08B (1x)
LVD S_B_TXo0p B05A (1x)
LVD S_B_TXo0p B08B (1x)
LVD S_B_TXo1n B05A (1x)
LVD S_B_TXo1n B08B (1x)
LVD S_B_TXo1p B05A (1x)
LVD S_B_TXo1p B08B (1x)
LVD S_B_TXo2n B05A (1x)
LVD S_B_TXo2n B08B (1x)
LVD S_B_TXo2p B05A (1x)
LVD S_B_TXo2p B08B (1x)
LVD S_B_TXo3n B05A (1x)
LVD S_B_TXo3n B08B (1x)
LVD S_B_TXo3p B05A (1x)
LVD S_B_TXo3p B08B (1x)
LVD S_B_TXo4n B05A (1x)
LVD S_B_TXo4n B08B (1x)
LVD S_B_TXo4p B05A (1x)
8B (1x)
79LC8.2A LA 7.
LVD S_B_TXo4p B08B (1x)
LVD S_B_TXoCLKn B05A (1x)
LVD S_B_TXoCLKn B08B (1x)
LVD S_B_TXoCLKp B05A (1x)
LVD S_B_TXoCLKp B08B (1x)
LVD S_SEL B05A (1x)
MAIN_SCL B04D (1x)
MAIN_SCL B04E (1x)
MAIN_SDA B04D (1x)
MAIN_SDA B04E (1x)
MEM_VREF B08C (2x)
MJC_RA(0) B08C (3x)
MJC_RA(1) B08C (3x)
MJC_RA(10) B08
MJC_RA(11) B08C (3x)
MJC_RA(12) B08C (3x)
MJC_RA(2) B08C (3x)
MJC_RA(3) B08C (3x)
MJC_RA(4) B08C (3x)
MJC_RA(5) B08C (3x)
MJC_RA(6) B08C (3x)
MJC_RA(7) B08C (3x)
MJC_RA(8) B08C (3x)
MJC_RA(9) B08C (3x)
MJC_RBA0 B08C (3x)
MJC_RBA1 B08C (3x)
MJC_RCASn B08C (3x)
MJC_RCKE B08C (3x)
MJC_RCLK0n B08C (1x)
MJC_RCLK1n B08C (1x)
MJC_RCSn B08C (3x)
MJC_RDQ(0) B08C (2x)
MJC_RDQ(1) B08C (2x)
MJC_RDQ(10) B08C (2x)
MJC_RDQ(11) B08C (2x)
MJC_RDQ(12) B08C (2x)
MJC_RDQ(13) B08C (2x)
MJC_RDQ(14) B08C (2x)
MJC_RDQ(15) B08C (2x)
MJC_RDQ(16) B08C (2x)
MJC_RDQ(17) B08C (2x)
MJC_RDQ(18) B08C (2x)
MJC_RDQ(19) B08C (2x)
MJC_RDQ(2) B08C (2x)
MJC_RDQ(20) B08C (2x)
MJC_RDQ(21) B08C (2x)
MJC_RDQ(22) B08C (2x)
MJC_RDQ(23) B08C (2x)
MJC_RDQ(24) B08C (2x)
MJC_RDQ(25) B08C (2x)
MJC_RDQ(26) B08C (2x)
MJC_RDQ(27) B08C (2x)
MJC_RDQ(28) B08C (2x)
MJC_RDQ(29) B08C (2x)
MJC_RDQ(3) B08C (2x)
MJC_RDQ(30) B08C (2x)
MJC_RDQ(31) B08C (2x)
MJC_RDQ(4) B08C (2x)
MJC_RDQ(5) B08C (2x)
MJC_RDQ(6) B08C (2x)
MJC_RDQ(7) B08C (2x)
MJC_RDQ(8) B08C (2x)
MJC_RDQ(9) B0
MJC_RDQM0 B08C (2x)
MJC_RDQM1 B08C (2x)
MJC_RDQM2 B08C (2x)
MJC_RDQM3 B08C (2x)
MJC_RDQS0 B08C (1x)
MJC_RDQS0n B08C (2x)
MJC_RDQS1 B08C (1x)
MJC_RDQS1n B08C (2x)
MJC_RDQS2 B08C (1x)
MJC_RDQS2n B08C (2x)
MJC_RDQS3 B08C (1x)
MJC_RDQS3n B08C (2x)
MJC_RODT B08C (3x)
MJC_RRASn B08C (3x)
MJC_RWEn B08C (3x)
MJC_VREF B08C (4x)
MT8280_EN B04A (1x)
MT8280_EN B07A (2x)
MUTEn B04A (1x)
MUTEn B06A (1x)
nCSO B04D (1x)
nCSO B04E (1x)
NVM_WC B04A (2x)
PC_VGA_H B04B (2x)
PC_VGA_V B04B (2x)
POWER_DOWN B04A (1x)
POWER_DOWN B06A (1x)
T B04A (1x)
PRS
PWN B04A (1x)
RD B04A (1x)
RD B04B (1x)
REMOTE B04A (2x)
REMOTE B06C (1x)
RF_AGC B03 (2x)
RX0_B- B07B (2x)
RX0_B+ B07B (2x)
RX0_C- B07B (2x)
RX0_C+ B07B (2x)
RX1_B- B07B (2x)
RX1_B+ B07B (2x)
RX1_C- B07B (2x)
RX1_C+ B07B (2x)
RX2_B- B07B (2x)
RX2_B+ B07B (2x)
RX2_C- B07B (2x)
RX2_C+ B07B (2x)
RXC_B- B07B (2x)
RXC_B+ B07B (2x)
RXC_C- B07B (2x)
RXC_C+ B07B (2x)
SAW_SW B03 (1x)
SAW_SW B04A (1x)
SC1_AUDIO_IN_L B05B (1x)
SC1_AUDIO_IN_L B06B (1x)
SC1_AUDIO_IN_L B06C (1x)
SC1_AUDIO_IN_R B05B (1x)
SC1_AUDIO_IN_R B06B (1x)
SC1_AUDIO_IN_R B06C (1x)
SC1_AUDIO_MUTE_L B06A (1x)
SC1_AUDIO_MUTE_L B06C (1x)
SC1_AUDIO_MUTE_R B06A (1x)
C (3x)
8C (2x)
SC1_AUDIO_MUTE_R B06C (1x)
SC1_AUDIO_OUT_L B05B (1x)
SC1_AUDIO_OUT_L B06C (2x)
SC1_AUDIO_OUT_R B05B (1x)
SC1_AUDIO_OUT_R B06C (2x)
SC1_B_IN B04B (1x)
SC1_B_IN B06C (2x)
SC1_CVBS_IN B04B (1x)
SC1_CVBS_IN B06C (1x)
SC1_CVBS_RF_OUT B06C (2x)
SC1_FBL_IN B04B (1x)
SC1_FBL_IN B06C (2x)
SC1_G_IN B04B (1x)
SC1_G_IN B06C (2x)
SC1_R_IN B04B (1x)
SC1_R_IN B06C (2x)
SC1_RF_OUT_CVBS B04B (1x)
SC1_RF_OUT_CVBS B06C (1x)
SC1_STATU
S B04A (1x)
SC1_STATU S B06C (1x)
SC2_AUDIO_IN_L B05B (1x)
SC2_AUDIO_IN_L B06C (2x)
SC2_AUDIO_IN_R B05B (1x)
SC2_AUDIO_IN_R B06C (2x)
SC2_AUDIO_MUTE_L B06A (1x)
SC2_AUDIO_MUTE_L B06C (1x)
SC2_AUDIO_MUTE_R B06A (1x)
SC2_AUDIO_MUTE_R B06C (1x)
SC2_AUDIO_OUT_L B05B (1x)
SC2_AUDIO_OUT_L B06C (1x)
SC2_AUDIO_OUT_R B05B (1x)
SC2_AUDIO_OUT_R B06C (1x)
SC2_C_IN B04B (1x)
SC2_C_IN B06C (1x)
SC2_C_IN_ITV B06C (2x)
SC2_CVBS_MON_OUT B04B (1x)
SC2_CVBS_MON_OUT B06C (1x)
SC2_CVBS_MON_OUT_ITV B06C (1x)
SC2_STATU S B04A (1x)
SC2_STATU S B06C (1x)
SC2_Y_CVBS_IN B04B (1x)
SC2_Y_CVBS_IN B06C (1x)
SC2_Y_CVBS_IN_ITV B06C (2x)
SIDE_AUDIO_IN_L B05B (1x)
SIDE_AUDIO_IN_L B06B (1x)
SIDE_AUDIO_IN_R B05B (1x)
SIDE_AUDIO_IN_R B06B (1x)
SIF B03 (1x)
SIF B05B (1x)
SIF1 B03 (2x)
SIF2 B03 (2x)
SPDIF_IN B05B (1x)
SPDIF_IN B06B (1x)
PDIF_OUT B05B (1x)
S
SPDIF_OUT B07A (1x)
STANDBY B01B (1x)
STANDBY B04A (1x)
STANDBY B05A (1x)
STANDBY B06C (1x)
STANDBYn B04A (1x)
STANDBYn B06A (1x)
SUP_A B05B (3x)
SUP_D B05B (2x)
SVHS_C_IN B04B (1x)
SVHS_C_IN B06B (1x)
SVHS_Y_CVBS_IN B04B (1x)
SVHS_Y_CVBS_IN B06B (1x)
SVPWX_INT B04A (1x)
SVPWX_INT B04B (1x)
SVPWX_RST B04A (1x)
SVPWX_RST B04B (1x)
TACT_SWITCH_INT B04A (1x)
TCK_FPGA B04D (1x)
TCK_FPGA B04E (1x)
TDI_FPGA B04D (1x)
TDI_FPGA B04E (1x)
TDO_FPGA B04D (1x)
TDO_FPGA B04E (1x)
TMS_FPGA B04D (1x)
TMS_FPGA B04E (1x)
TX0_A- B08A (2x)
TX0_A+ B08A (2x)
TX1_A- B08A (2x)
TX1_A+ B08A (2x)
TX2_A- B08A (1x)
TX2_A+ B08A (2x)
TXC_A- B08A (2x)
TXC_A+ B08A (2x)
TxFPGAe_0n B04B (1x)
TxFPGAe_0n B04E (1x)
TxFPGAe_0n B05A (1x)
TxFPGAe_0n B08B (1x)
TxFPGAe_0p B04B (1x)
TxFPGAe_0p B04E (1x)
TxFPGAe_0p B05A (1x)
TxFPGAe_0p B08
TxFPGAe_1n B04B (1x)
TxFPGAe_1n B04E (1x)
TxFPGAe_1n B05A (1x)
TxFPGAe_1n B08B (1x)
TxFPGAe_1p B04B (1x)
TxFPGAe_1p B04E (1x)
TxFPGAe_1p B05A (1x)
TxFPGAe_1p B08B (1x)
TxFPGAe_2n B04B (1x)
TxFPGAe_2n B04E (1x)
TxFPGAe_2n B05A (1x)
TxFPGAe_2n B08B (1x)
TxFPGAe_2p B04B (1x)
TxFPGAe_2p B04E (1x)
TxFPGAe_2p B05A (1x)
TxFPGAe_2p B08B (1x)
TxFPGAe_3n B04B (1x)
TxFPGAe_3n B04E (1x)
TxFPGAe_3n B05A (1x)
TxFPGAe_3n B08B (1x)
TxFPGAe_3p B04B (1x)
TxFPGAe_3p B04E (1x)
TxFPGAe_3p B05A (1x)
TxFPGAe_3p B08B (1x)
TxFPGAe_4n B04B (1x)
TxFPGAe_4n B04E (1x)
TxFPGAe_4n B05A (1x)
TxFPGAe_4n B08B (1x)
B (1x)
TxFPGAe_4p B04B (1x)
TxFPGAe_4p B04E (1x)
TxFPGAe_4p B05A (1x)
TxFPGAe_4p B08B (1x)
TxFPGAe_CLKn B04B (1x)
TxFPGAe_CLKn B04E (1x)
TxFPGAe_CLKn B05A (1x)
TxFPGAe_CLKn B08B (1x)
TxFPGAe_CLKp B04B (1x)
TxFPGAe_CLKp B04E (1x)
TxFPGAe_CLKp B05A (1x)
TxFPGAe_CLKp B08B (1x)
TxFPGAo_0n B04B (1x)
TxFPGAo_0n B04E (1x)
TxFPGAo_0n B05A (1x)
TxFPGAo_0n B08B (1x)
TxFPGAo_0p B04B (1x)
TxFPGAo_0p B04E (1x)
TxFPGAo_0p B05A (1x)
TxFPGAo_0p B08B (1x)
TxFPGAo_1n B04B (1x)
TxFPGAo_1n B04E (1x)
TxFPGAo_1n B05A (1x)
TxFPGAo_1n B08B (1x)
TxFPGAo_1p B04B (1x)
TxFPGAo_1p B04E (1x)
TxFPGAo_1p B05A (1x)
TxFPGAo_1p B08B (1x)
TxFPGAo_2n B04B (1x)
TxFPGAo_2n B04E (1x)
TxFPGAo_2n B05A (1x)
TxFPGAo_2n B08B (1x)
TxFPGAo_2p B04B (1x)
TxFPGAo_2p B04E (1x)
TxFPGAo_2p B05A (1x)
TxFPGAo_2p B08B (1x)
TxFPGAo_3n B04B (1x)
TxFPGAo_
3n B04E (1x)
TxFPGAo_3n B05A (1x)
TxFPGAo_3n B08B (1x)
TxFPGAo_3p B04B (1x)
TxFPGAo_3p B04E (1x)
TxFPGAo_3p B05A (1x)
TxFPGAo_3p B08B (1x)
TxFPGAo_4n B04B (1x)
TxFPGAo_4n B04E (1x)
TxFPGAo_4n B05A (1x)
TxFPGAo_4n B08B (1x)
TxFPGAo_4p B04B (1x)
TxFPGAo_4p B04E (1x)
TxFPGAo_4p B05A (1x)
TxFPGAo_4p B08B (1x)
TxFPGAo_CLKn B04B (1x)
TxFPGAo_CLKn B04E (1x)
TxFPGAo_CLKn B05A (1x)
TxFPGAo_CLKn B08B (1x)
TxFPGAo_CLKp B04B (1x)
TxFPGAo_CLKp B04E (1x)
TxFPGAo_CLKp B05A (1x)
TxFPGAo_CLKp B08B (1x)
UART_1RX B04A (1x)
UART_1RX B07A (1x)
UART_1TX B04A (1x)
UART_1TX B07A (1x)
VDD B06A (3x)
VDDA B06A (3x)
VGA_AUDIO_IN_L B05B (1x)
VGA_AUDIO_IN_L B07A (1x)
VGA_AUDIO_IN_R B05B (1x)
VGA_AUDIO_IN_R B07A (1x)
VGA_B_IN B04B (1x)
VGA_B_IN B07A (1x)
VGA_G_IN B04B (1x)
VGA_G_IN B07A (1x)
VGA_H B04B (1x)
VGA_H B06C (1x)
VGA_H B07A (1x)
VGA_R_IN B04B (1x)
VGA_R_IN B07A (1x)
VGA_V B04B (1x)
VGA_V B06C (1x)
VGA_V B07A (1x)
VIF1 B03 (2x)
VIF2 B03 (2x)
VSS B06A (3x)
VSSA B06A (5x)
WR B04A (1x)
WR B04B (1x)
WR_EN B07A (1x)
WR_EN B07B (1x)
WR_EN B08A (1x)
WX_AVCC B04B (2x)
WX_BA0 B04B (1x)
WX_BA0 B04C (2x)
WX_BA1 B04B (1x)
WX_BA1 B04C (2x)
WX_CAS# B04B (1x)
WX_CAS# B04C (2x)
WX_CLKE B04B (1x)
WX_CLKE B04C (2x)
WX_CS0# B04B (1x)
WX_CS0# B04C (2x)
WX_DQM0 B04B (1x)
WX_DQM0 B04C (1x)
WX_DQM1 B04B (1x)
WX_DQM1 B04C (1x)
WX_DQM2 B04B (1x)
WX_DQM2 B04C (1x)
WX_DQM3 B04B (1x)
WX_DQM3 B04C (1x)
WX_DQS0 B04B (1x)
WX_DQS0 B04C (1x)
WX_DQS1 B04B (1x)
WX_DQS1 B04C (1x)
WX_DQS2 B04B (1x)
WX_DQS2 B04C (1x)
WX_DQS3 B04B (1x)
WX_DQS3 B04C (1x)
WX_MA0 B04B (1x)
WX_MA0 B04C (2x)
WX_MA1 B04B (1x)
WX_MA1 B04C (2x)
WX_MA10 B04B (1x)
WX_MA10 B04C (2x)
WX_MA11 B04B (1x)
WX_MA11 B04C (2x)
WX_MA2 B04B (1x)
WX_MA2 B04C (2x)
WX_MA3 B04B (1x)
WX_MA3 B04C (2x)
WX_MA4 B04B (1x)
WX_MA4 B04C (2x)
WX_MA5 B04B (1x)
WX_MA5 B04C (2x)
WX_MA6 B04B (1x)
WX_MA6 B04C (2x)
WX_MA7 B04B (1x)
WX_MA7 B04C (2x)
WX_MA8 B04B (1x)
WX_MA8 B04C (2x)
WX_MA9 B04B (1x)
WX_MA9 B04C (2x)
WX_MCK0 B04B (1x)
WX_MCK0 B04C (2x)
WX_MCK0# B04B (1x)
WX_MCK0# B04C (2x)
WX_MD0 B04B (1x)
WX_MD0 B04C (1x)
WX_MD1 B04B (1x)
WX_MD1 B04C (1x)
WX_MD10 B04B (1x)
WX_MD10 B04C (1x)
WX_MD11 B04B (1x)
WX_MD11 B04C (1x)
WX_MD12 B04B (1x)
WX_MD12 B04C (1x)
WX_MD13 B04B (1x)
WX_MD13 B04C (1x)
WX_MD14 B04B (1x)
WX_MD14 B04C (1x)
WX_MD15 B04B (1x)
WX_MD15 B04C (1x)
WX_MD16 B04B (1x)
WX_MD16 B04C (1x)
WX_MD17 B04B (1x)
WX_MD17 B04C (1x)
WX_MD18 B04B (1x)
WX_MD18 B04C (1x)
WX_MD19 B04B (1x)
WX_MD19 B04C (1x)
WX_MD2 B04B (1x)
WX_MD2 B04C (1x)
WX_MD20 B04B (1x)
WX_MD20 B04C (1x)
WX_MD21 B04B (1x)
WX_MD21 B04C (1x)
WX_MD22 B04B (1x)
WX_MD22 B04C (1x)
B04B (1x)
WX_MD23
WX_MD23 B04C (1x)
WX_MD24 B04B (1x)
WX_MD24 B04C (1x)
WX_MD25 B04B (1x)
WX_MD25 B04C (1x)
WX_MD26 B04B (1x)
WX_MD26 B04C (1x)
WX_MD27 B04B (1x)
WX_MD27 B04C (1x)
WX_MD28 B04B (1x)
WX_MD28 B04C (1x)
WX_MD29 B04B (1x)
WX_MD29 B04C (1x)
WX_MD3 B04B (1x)
WX_MD3 B04C (1x)
WX_MD30 B04B (1x)
WX_MD30 B04C (1x)
WX_MD31 B04B (1x)
WX_MD31 B04C (1x)
WX_MD4 B04B (1x)
WX_MD4 B04C (1x)
WX_MD5 B04B (1x)
WX_MD5 B04C (1x)
WX_MD6 B04B (1x)
WX_MD6 B04C (1x)
WX_MD7 B04B (1x)
WX_MD7 B04C (1x)
WX_MD8 B04B (1x)
WX_MD8 B04C (1x)
WX_MD9 B04B (1x)
WX_MD9 B04C (1x)
WX_PAVDD1 B04B (1x)
WX_PAVDD2 B04B (1x)
WX_PVCC B04B (2x)
WX_RAS# B04B (1x)
WX_RAS# B04C (2x)
WX_REGVCC B04B (2x)
WX_WE# B04B (1x)
WX_WE# B04C (2x)
I_17763_001.eps
010807
Circuit Diagrams and PWB Layouts
80LC8.2A LA 7.
Layout Small Signal Board (Overview Top Side)
1101 E3
1206 C1
1508 A5
1520 E7
1603 D8
1618 C8
1E14 C7
1M05 B8
1R02 A2
1102 E5
1301 A5
1311 D4
1320 E1
1500 E7
1501 E7
1502 E7
1503 E7
1504 E7
1505 A5
1506 A6
1507 A6
1509 A7
1510 E7
1511 E7
1512 E7
1513 E7
1514 E7
1515 E7
1516 E7
1517 E7
1518 D7
1519 E7
1103 E5
1104 D5
1105 E5
1106 D4
1107 C4
1108 A1
1202 B1
1203 A4
1204 A3
1205 C1
3139 123 6349.1
1521 D7
1605 D8
1606 E6
1607 D6
1608 E8
1609 E8
1610 E6
1611 E6
1613 E6
1615 E6
1616 D8
1617 E8
1619 C8
1620 D8
1621 A7
1A02 F1
1A35 F1
1C24 C5
1E01 D7
1E02 C6
1E04 D4
1E06 C6
1E07 C6
1522 E7
1523 D7
1524 D7
1531 E7
1532 E7
1533 E7
1534 E7
1535 E7
1601 E8
1602 D8
Part 1
I_17760_020a.eps
1E15 C7
1M06 A8
1E16 C6
1M07 A8
1E17 C6
1M08 A8
1E18 C4
1M09 A8
1E19 D4
1N02 A6
1E21 C6
1N03 B6
1G01 B2
1P01 D1
1M01 B8
1P02 E1
1M02 B7
1P03 E1
1M03 B7
1P04 A3
1M04 A8
1R01 A2
I_17760_020c.eps
1R03 A2
1R04 A2
1R05 A2
1R06 A2
1R07 A2
1R08 A2
1R09 A2
1R10 A2
1R11 A2
1R12 A2
1R13 A2
Part 3
1R14 B1
1R15 B1
1R16 B1
1R17 A1
1R18 A1
1R19 A1
1R20 A1
1R21 A1
1R22 A1
1R23 A1
1R24 A1
1R25 A1
2117 D5
2127 D5
2142 D4
2205 B1
2206 B1
2207 B1
2208 B1
2209 B1
2210 B1
2211 A3
2214 A3
2215 B1
2216 C1
2217 B1
2218 B1
2219 B1
2314 A5
2315 A6
2316 A5
2317 A6
2323 A5
2324 A5
2338 B6
2341 C5
2343 A5
2344 A5
2345 A5
2346 A5
2347 C6
2409 F6
2410 F5
2420 E5
2423 E5
36 F5
24
2439 F5
2445 E5
2613 C8
2614 D8
2615 C8
2616 D8
2724 A4
2A01 F2
2A02 F2
2A04 F2
2A08 F2
2A09 F2
2A10 F2
2A11 F3
2A12 F3
2A14 F1
2A15 F3
2A16 E3
2A17 F1
2A18 F3
2A19 E3
2A20 E3
2A22 F3
2A23 F1
2A24 F3
2A28 F1
2A29 F2
2A30 F2
2A32 F3
2A33 F2
2A34 F2
2A40 F3
2A53 D8
2A58 D8
2A62 F1
2A63 F2
2A67 F2
2A68 F2
2A69 F2
2A70 F2
2A71 F1
2A72 F1
2B10 B2
2B19 C1
2B20 C1
2C01 C5
2C02 C5
2C03 C5
2C04 C5
2C05 C5
2C06 C5
2C08 C5
2C09 C5
2C10 C5
2C11 C5
2C12 C5
2C13 C5
2C15 C5
2C17 C5
2C18 C5
2C19 C5
2C78 C5
2C79 C5
2C80 C5
2C81 C5
83 C5
2C
2C94 C5
2C95 C5
2D31 C4
2D32 C4
2D71 B3
2D72 B3
2E09 D7
2E10 D7
2E13 D3
2E14 D3
2E20 D6
2E21 D6
2E22 D6
2E23 D6
2E76 D6
2E77 D6
2E78 D5
2E79 D5
2F23 D1
2F24 D2
2F62 D2
2F64 D2
2F65 D2
2F66 D2
2F67 D2
2F68 D2
2F69 D2
2F70 D2
2F71 D2
2F72 D2
2F73 D2
2F74 D2
2F75 D2
2F76 D2
2F77 D2
2G10 C1
2G31 B2
2G44 C3
2G56 B2
2G60 B2
2G68 C3
2G69 D3
2G70 C3
2G71 D3
2N13 A6
2N14 A6
2N55 A6
2N68 B6
2N71 B6
2N72 B6
2P19 D1
2P20 D1
2P28 E1
2P29 E2
2P30 E1
2P34 E1
2P46 D2
2P59 D1
2P61 E2
2P84 E1
2P86 E1
2P87 E1
2P88 E1
2P89 C3
2Q28 E2
2Q29 E2
2Q30 E3
2Q34 D3
2Q46 D3
2Q55 D3
8 D3
2Q5
2Q59 D2
2Q61 D3
2Q73 D3
2R11 A1
2R12 A2
2R28 A1
3207 B1
3222 B1
3224 B1
3225 B1
3231 A3
3232 A3
3234 A3
3235 A3
3236 A3
3238 A3
3240 A3
3246 A3
3247 C1
3248 B1
3301 A5
I_17760_020b.eps
Part 4
I_17760_020d.eps
3303 A5
3306 A5
3307 A5
3313 A5
3314 A5
3315 A5
3316 A5
3317 A5
3318 A5
3319 A6
3320 A5
3321 A5
Part 2
3322 A5
3324 A5
3325 A6
33
29 A5
3332 A5
3346 A5
3347 A5
3351 A5
3352 A5
3354 A5
3356 A5
3357 A5
3358 A5
3359 D5
3360 D5
3380 A5
3382 A5
3386 A5
3387 A5
3388 A5
3395 B6
3396 A6
3398 A5
3399 A5
3537 D8
3540 E8
3554 E8
3559 A6
3613 C8
3614 D8
3713 A4
3714 A4
3720 A4
3721 A4
3722 A4
3723 A4
3724 A4
3736 A4
3725 A4
3737 A4
3726 A4
3738 A4
3727 A4
3739 A4
3728 A4
3740 A4
3729 A4
3741 A4
3730 A4
3742 A4
3
731 A4
3743 A4
3732 A4
3744 A4
3733 A4
3745 A4
3734 A4
3746 A4
3735 A4
3747 A4
I_17760_020.eps
110208
3748 A4
3749 A4
3750 A4
3751 A4
3752 A4
3753 A4
3A01 F2
3A02 E2
3A03 F3
3A04 F3
3A06 F3
3A07 E3
3A08 E3
3A11 E3
3A13 F3
A19 F3
3
3A26 F3
3A32 F3
3A33 F3
3A52 C8
3A54 C8
3A57 D8
3A59 D8
3C01 C5
3C02 C5
3C03 B5
3C04 B5
3C05 B5
3C06 B5
3C29 C6
3C30 C6
3C31 C6
3C32 C6
3C33 C6
3C34 C6
3C36 B6
3C37 B6
3C46 C5
3D01 B4
3D02 C4
3D05 B4
3D06 B4
3D09 B4
3D11 B4
3D38 C4
3D40 C4
3D43 C4
3D44 C4
3D47 C4
3D4
8 C4
3E14 D7
3E15 D7
3E18 D7
3E20 D7
3E21 D6
3E22 D6
3E23 D6
3E24 D6
3E67 D6
3E68 D6
3E69 D6
3E70 C4
3E71 D4
3E77 D6
3E78 D6
3E79 D6
3E82 D3
3E83 D4
3E84 C3
3E85 D4
3E86 D3
3E87 D3
3F14 D2
3F31 C2
3F32 C2
3F33 C3
3F34 C3
3G10 C1
3G11 B2
3G12 B3
3G13 B
3G14 C1
3G15 C1
3G23 B3
3G24 B3
3G34 C3
3G35 C3
3G36 C3
3G38 C1
3L01 A5
3L02 A5
3L04 B6
3L05 A5
3L12 A5
3L13 A5
3L15 A5
3L16 A5
3L53 A5
3L55 A5
3L56 A5
3L58 A5
3L59 A5
3L61 A5
3L62 A5
3L63 A5
3L64 A5
3L67 A5
3L72 A5
3L73 A5
3L75 A5
3L76 A5
3L79 A5
3L93 A5
3L94 A5
3L95 A5
3N02 B6
3N03
B6
3N04 B6
3N05 B6
3N06 A6
3N07 B6
3N08 B6
3N10 A6
3N11 A6
3N12 A6
3N13 B6
3N14 B6
3N15 B6
3N22 A6
3N24 A6
3N37 B7
3N38 B7
3N39 B6
3N40 B6
3N41 B6
3N42 B6
3N43 B6
3P15 D1
3P67 D1
3
3Q59 D3
3Q77 D3
3Q78 D3
3Q79 D3
4301 A4
4306 D5
4307 D5
4313 A5
4317 A3
4318 A3
4323 A5
4504 D
4603 C8
4604 D8
4E11 D3
4E12 C3
4E13 D4
4E14 D4
4M50 A8
4M51 A8
4M52 A8
4M53 A8
4M54 C7
4N05 B6
4N06 B6
4N07 B7
4N08 B6
4R22 A2
4R24 A2
4R26 A2
4R27 A2
4R31 B3
4R32 A3
4R33 A3
4R34 A3
4R35 A3
4R36 A3
5201 A3
5202 A3
5306 C5
5307 C6
5703 A4
5704 A4
5705 A4
5A03 F2
5A04 E2
5A05 F2
5A06 E2
5A07 F1
5A08 F1
5B12 C1
5C15 C5
5C16 C5
5D03 C3
5E13 D7
5E14 D7
5E15 D3
5E16 D3
5E17 D3
5E18 D3
5E71 D6
5G10 C1
5G17 C3
5G18 C3
5G19 C3
5P01 E1
5P02 E2
5P06 D1
5P09 D2
5Q01 E2
5Q02 E3
5Q09 D3
63
01 A6
6317 B6
6318 B6
6512 E8
6513 E8
6615 C8
6616 D8
6E05 D7
6E06 D7
6E07 C4
6E08 D4
6E09 C3
6E10 D4
6E21 D6
6E22 D6
6E72 D5
6N41 B6
6N42 B6
6P02 D1
6P03 D1
6P16 D1
6Q05 D3
7113 D5
7201 A3
7302 D5
7303 C6
7311 A5
7312 A6
7314 A5
7322 A6
7323 A5
7504 D8
7700 A4
7A01 F3
7C01 B5
7C03 C6
7D01 B4
7D02 C4
7E01 C8
7E02 D3
7E03 D3
7E71 D6
7F01 C2
7F02 C3
7G01 B2
7G03 C1
7G04 C3
7L10 A5
7M07 A7
7M16 C8
7M17 C7
7M18 C7
7N01 A6
7N40 B6
7P06 E1
8
7P07 E2
7P14 D1
7Q06 E2
7Q07 E3
7Q08 D3
7Q09 D3
7R05 A3
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 1 Top Side)
81LC8.2A LA 7.
Part 1
I_17760_020a.eps
110208
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 2 Top Side)
82LC8.2A LA 7.
Part 2
I_17760_020b.eps
110208
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 3 Top Side)
83LC8.2A LA 7.
Part 3
I_17760_020c.eps
110208
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 4 Top Side)
84LC8.2A LA 7.
Part 4
I_17760_020d.eps
110208
Circuit Diagrams and PWB Layouts
85LC8.2A LA 7.
Layout Small Signal Board (Overview Bottom Side)
2440 F5
2514 E2
2534 E1
2624 E1
2711 A5
1306 E8
2122 E5
2123 D4
2124 D4
2125 D4
2126 D4
2128 D4
2129 D4
2130 D4
2131 D4
2132 D4
2133 D4
2134 D4
2135 D4
2136 D4
2137 D4
2138 D4
2139 D4
2140 D4
2141 D4
2143 D4
2144 D4
2145 D4
2147 D5
2148 E5
2149 E5
2151 E5
2152 E5
2201 C3
2202 C3
2203 B8
2204 B8
2310 A4
1307 E8
1308 E8
1309 E8
1310 F8
1312 E8
1313 F8
1411 F4
1E11 C2
1E12 C2
1E13 C2
2112 E5
2118 E5
2119 E5
2120 E5
2121 E5
3139 123 6349.1
2311 A4
2312 A4
2313 A4
2318 A4
2319 B4
2320 A5
2327 E8
2328 F8
2329 F8
2330 E8
2331 E8
2332 E8
2333 E8
2334 F8
2335 F8
2336 E8
2337 E8
2339 E8
2340 E8
2342 E8
2348 D6
2349 C6
2408 E3
2411 E4
2412 F4
2413 E4
2414 F4
2415 F4
2416 F4
2417 E4
2418 E4
2419 F4
2421 E4
2441 F3
2515 E2
2422 E4
2424 E4
2425 E4
2426 E4
2427 E4
2428 E4
2429 E4
2430 E4
31 E4
24
2432 F3
2433 F3
2434 F3
2435 F3
2437 E3
2438 E3
2442 F3
2443 E4
2444 E4
2446 F4
2447 F4
2448 F3
2449 F3
2450 F4
2451 F4
2502 F1
2506 E1
2508 F2
2509 E1
2512 E1
2517 E2
2518 E1
2520 E1
2521 E2
2523 E2
2524 E1
2525 D1
2526 D1
2527 E2
2528 E2
2529 E2
2530 E1
2531 E2
2533 E1
2535 D2
2536 D1
2538 D2
2600 E1
2602 E3
2603 D3
2606 E3
2607 E3
2608 E3
2609 E1
2610 E3
2612 E3
2621 E1
2622 D1
2623 E1
Part 1
I_17760_021a.eps
Part 3
I_17760_021c.eps
2625 E1
2626 E1
2627 D1
2628 E1
2700 A5
2701 A5
2702 A5
2703 A5
2704 A5
2705 A5
2706 A5
2707 A5
2708 A5
2709 A5
2710 A5
2712 A5
2713 A5
2714 A5
2715 A5
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Part 2
I_17760_021b.eps
Part 4
I_17760_021d.eps
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I_17760_021.eps
110208
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6613 E3
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6622 E1
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7317 B3
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7411 F4
7412 F4
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7502 D1
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7A55 F5
7A56 F5
7A57 F5
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7P05 E8
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7Q05 E7
7Q11 E6
7R07 A6
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 1 Bottom Side)
86LC8.2A LA 7.
Part 1
I_17760_021a.eps
120208
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 2 Bottom Side)
87LC8.2A LA 7.
Part 2
I_17760_021b.eps
120208
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 3 Bottom Side)
88LC8.2A LA 7.
Part 3
I_17760_021c.eps
120208
Circuit Diagrams and PWB Layouts
Layout Small Signal Board (Part 4 Bottom Side)
89LC8.2A LA 7.
Part 4
I_17760_021d.eps
120208
Circuit Diagrams and PWB Layouts
90LC8.2A LA 7.
Keyboard Control Panel
KEYBOARD CONTROL
E E
3139 123 6323.1
I_17760_031.eps
Personal Notes:
030708
Layout Keyboard Control Panel
3139 123 6323.1
I_17760_032.eps
030408
E_06532_012.eps
131004
IR / LED Panel
Circuit Diagrams and PWB Layouts
91LC8.2A LA 7.
A
B
C
D
E
1
2 3 4567
8
IR & LED PANEL
J J
3P28
10K
7P13
BC847BW
10K
"RED"
+3V3STBY
SML-512
+5V_SW
IP19
3P24
10K
3P10
1K8
IP11
6P10
IP13
7P10
BC847BW
"LIGHT SENSOR"
TEMT6000X01
IP17
7P12
+5V_SW
3
2
1
3P21
270K
IP21
3P26
270K
+5V_SW
3P18
100K
IP18
3P22
10K
TO ME8 LIGHT GUIDE
1P09
1
2
3
45
BM03B-SRSS-TBT
RES
TO ME8 SSB
1P10
1
2
3
4
5
6
7
8
9
10 11
BM09B-SRSS-TBT
FP10
FP20
FP11
FP12
FP13
FP14
FP15
FP16
FP17
FROM ME8 KEYB
1P11
1
2
3
4
5
BM04B-SRSS-TBT
FP18
6
+3V3STBY
+5V_SW
+3V3STBY
+3V3STBY
+3V3STBY
3P08
680R
RES
+3V3STBY
3P07
680R
RES
LIGHT_SENSOR
1-F7
1-F7
1-D8
1-D6
TACT_SWITCH_INT
TACT_SWITCH_INT
IR
LED2
LED1
KEYBOARD
KEYBOARD
"IR RECEIVER"
GP1UE260RKVF
4
LED1
7P14
VS
OUT
GND
5
"WHITE"
+5V_SW
3P11
8K2
IP10
6P11
19-113/T7D-CS2T2B2-3T
IP12
RES
IP14
3P15
1-D5
10K
3P27
10K
+3V3STBY
3P16
100R
IP16
3P19
6K8
2
1
3
IP20
3P23
100K
2P10
10u
IR
1-C5
3P17
0R
7P11
BC847BW
LIGHT_SENSOR
1-C5
2P11
10u
+5V_SW
3P13
270R
IP22
TSML1020
(RES FOR BDS)
3P09
22K
2P12
10u
6P12
4P024P01
2P13
10u
3P12
270R
RES
IP15
1-C5
3P14
10K
LED2
3P25
39K
SAME LOCATION WITH 701 2
3P20
A
B
C
D
E
1P09 A1
1P10 B1
1P11 C1
2P10 E5
2P11 E5
2P12 E6
2P13 E6
3P07 C3
3P08 C2
3P09 D6
3P10 A7
3P11 A5
3P12 A6
3P13 A6
3P14 B6
3P15 B4
3P16 D4
3P17 E5
3P18 D8
3P19 E4
3P20 E6
3P21 E8
3P22 E8
3P23 E4
3P24 E7
3P25 E6
3P26 E8
3P27 B5
3P28 B6
4P01 B5
4P02 B6
6P10 A7
6P11 A5
6P12 A6
7P10 B7
7P11 B5
7P12 D8
7P13 E7
7P14 E3
FP10 B1
FP11 B1
FP12 B1
FP13 B1
FP14 B1
FP15 B1
FP16 B1
FP17 B1
FP18 C1
FP20 B1
IP10 A5
IP11 A7
IP12 B5
IP13 B7
IP14 B4
IP15 B6
IP16 D5
IP17 E7
IP18 E8
IP19 E7
IP20 E4
IP21 E8
IP22 A6
3139 123 6327.3
1
2 3
456
7 8
I_17760_033.eps
180208
Circuit Diagrams and PWB Layouts
Layout Front IR / LED Panel (Top Side)
1P09 A4 1P10 A5 1P11 A1 2P12 A1 2P13 A1
92LC8.2A LA 7.
3139 123 6327.3
Layout Front IR / LED Panel (Bottom Side)
2P10 A4
2P11 A6
3P07 A4
3P08 A4
3P09 A6
3P10 A3
3P11 A2
3P12 A6
3P13 A6
3P14 A2
3P15 A2
3P16 A4
3P17 A5
3P18 A6
3P19 A4
3P20 A6
3P21 A6
3P22 A6
3P23 A4
3P24 A6
3P25 A6
3P26 A6
3P27 A2
3P28 A3
4P01 A2
4P02 A2
6P10 A3
6P11 A3
6P12 A5
7P10 A2
7P11 A2
7P12 A5
I_17760_035.eps
180208
7P13 A6
7P14 A4
3139 123 6327.3
I_17760_034.eps
180208
8. Alignments
Alignments
EN 93LC8.2A LA 8.
Index of this chapter:
8.1 General Alignment Conditions
8.2 Hardware Alignments
8.3 Software Alignments
8.4 Option Settings
Note: Figures below can deviate slightly from the actual
situation, due to the different set executions.
General: The Service Default Mode (SDM) and Service
Alignment Mode (SAM) are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or
RIGHT keys of the remote control transmitter.
8.1 General Alignment Conditions
Perform all electrical adjustments under the following
conditions:
• Power supply voltage (depends on region):
– AP-NTSC: 120 V
– AP-PAL-multi: 120 - 230 V
– EU: 230 V
– LATAM-NTSC: 120 - 230 V
– US: 120 V
• Connect the set to the mains via an isolation transformer
with low internal resistance.
• Allow the set to warm up for approximately 15 minutes.
• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground.
• Test probe: Ri > 10 MΩ, Ci < 20 pF.
• Use an isolated trimmer/screwdriver to perform
alignments.
AC
AC
or 230 VAC / 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
/ 60 Hz (± 10%).
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
8.2 Hardware Alignments
There are no hardware alignments foreseen for this chassis,
but below find an overview of the most important DC voltages
on the SSB. These can be used for checking proper functioning
of the DC/DC converters.
Specifications
(V)
Test
Description
+12V_DISP FP12 11.4 12.0 12.6 B01A_DC-DC
+VTUN FP11 30 33 36 B01A_DC-DC
+3V3_STBY FP10 3.20 3.30 3.40 B01A_DC-DC
+3V3+SW FP20 3.13 3.3 3.46 B01A_DC-DC
+1V2_SW FP24 1.18 1.25 1.31 B01A_DC-DC
+5V_SW FQ05 4.85 5.10 5.35 B01B_DC-DC
+1V8_SW FQ06 1.72 1.82 5.25 B01B_DC-DC
+2V5_SW FQ03 2.38 2.5 2.62 B01B_DC-DC
+5V_IF F129 4.75 5 5.25 B02_TUNER_IF
+5VS F131 4.75 5 5.25 B02_TUNER_IF
+5V_TUN F146 4.75 5 5.25 B02_TUNER_IF
+1V2_ADC FC04 1.14 1.2 1.26 B04A_TRIDENT
+1V2_PLL FC05 1.14 1.2 1.26 B04A_TRIDENT
+1V2_CORE FC06 1.14 1.2 1.26 B04A_TRIDENT
+2V5_VDDMQFD01 2.38 2.5 2.62 B04B_DDR
+VDISP FR10 11.4 12.0 12.6 B04E_LVDS
+8V F401 7.60 8.00 8.40 B05A_AUDIOPR
Point
DiagramMin. Typ. Max.
OCESSOR
8.3 Software Alignments
With the software alignments of the Service Alignment Mode
(SAM) the Tuner and RGB settings can be aligned.
To store the data: Use the RC button “Menu” to switch to the
main menu and next, switch to “Stand-by” mode.
8.3.1 Tuner Adjustment (RF AGC Take Over Point)
Purpose: To keep the tuner output signal constant as the input
signal amplitude varies.
This chassis comes with the UV13x6(x) tuner. No alignment is
necessary, as the AGC alignment is done automatically
(standard value: “15”). However in case of problems use the
following method (use multi meter and RF generator):
• Apply a vision IF carrier of 38.9 (China: 38.0) MHz
(105 dBμV = 178 mVrms) to test point F143 (input via 50 Ω
coaxial cable terminated with an RC network of series
10 nF with 120 Ω to ground).
• Measure voltage on test point F116.
• Adjust AGC (via SAM menu: TUNER -> AGC), until voltage
on test point F116 is 3.3 +0.5/-1.0 V.
• Store settings and quit SAM.
8.3.2 RGB Alignment
Before alignment, choose “TV MENU” -> “Picture” and set:
• “Brightness” to “50”.
• “Colour” to “50”.
• “Contrast” to “100”.
White Tone Alignment:
• Activate SAM.
• Select “RGB Align.” -> “White Tone” and choose a colour
temperature.
• Use a 100% white screen as input signal and set the
following values:
– All “White point” values initial to “256”.
– All “BlackL Offset” values to “0”.
In case you have a colour analyser:
• Measure with a calibrated (phosphor- independent) colour
analyser (e.g. Minolta CA-210) in the centre of the screen.
Consequently, the measurement needs to be done in a
dark environment.
• Adjust the correct x, y coordinates (while holding one of the
White point registers R, G or B on “256”) by means of
decreasing the value of one or two other white points to the
correct x, y coordinates (see table “White D alignment
values”). Tolerance: dx: ± 0.004, dy: ± 0.004.
• Repeat this step for the other colour Temperatures that
need to be aligned.
• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
Table 8-1 White D alignment values
Normal (9000
Value Cool (11000 K)
x 0.278 0.289 0.314
y 0.278 0.291 0.319
If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).
K) Warm (6500 K)
EN 94 LC8.2A LA8.
Alignments
• Set the RED, GREEN and BLUE default values per
temperature according to the values in the “Tint settings”
table.
• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
Table 8-2 Tint settings
Alignment 42" 47" 52"
WARM_RED 128* 128* 128*
WARM_GREEN 120* 120* 120*
WARM_BLUE 110* 110* 110*
NORMAL_RED 125* 125* 125*
NORMAL_GREEN 128* 128* 128*
NORMAL_BLUE 120* 120* 120*
COOL_RED 110* 110* 110*
COOL_GREEN 118* 118* 118*
COOL_BLUE 140* 140* 140*
Note: *These values were not available at the time of writing,
therefore they come from an early production sample (for
indication only). As soon as the production data become
available, a Service Info or Service Manual update will be
issued via the appropriate channels.
Black Level Offset Alignment
• Activate SAM.
• Select “RGB Align.” -> “BlackL Offset” and choose a colour.
• Set all “BlackL Offset” values to “0”.
• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
Note: For models with “Pixel Plus”, the “Black Offset” (black
level offset) should NOT be changed in SAM. These offset
values of RGB should be set to “0”, and should NOT be
adjusted. Any adjustment of these values will affect the low
light white balance.
8.4 Option Settings
8.4.1 Introduction
The microprocessor communicates with a large number of I
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence/absence of these specific
ICs (or functions) is made known by the option codes.
Notes:
• After changing the option(s), save them with the STORE
command.
• The new option setting becomes active after the TV is
switched “off” and “on” again with the mains switch (the
EAROM is then read again).
8.4.2 How To Set Option Codes
When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set all option numbers. You can find the correct option
numbers in table “Option Codes OP1...OP7” below.
How to Change Options Codes
An option code (or “option byte”) represents eight different
options (bits). When you change these numbers directly, you
can set all options very quickly. All options are controlled via
seven option bytes (OP1... OP7).
Activate SAM and select “Options”. Now you can select the
option byte (OP1 to OP7) with the CURSOR UP/ DOWN keys,
and enter the new 3 digit (decimal) value. For the correct
factory default settings, see the next table “Option codes
OP1...OP7“. For more detailed information, see the second
table “Option codes at bit level“. If an option is set (value “1”), it
represents a certain decimal value.
When all the correct options (bits) are set, the sum of the
decimal values of each Option Byte (OP) will give the option
code.
Table 8-3 Option code overview
2
C
ADC YPbPr Gray Scale Alignment
When the grey scale is not correct, use this alignment:
• Activate SAM.
• Select “NVM Editor”.
• Enter address “26(dec)” (ADR).
• Set value (VAL) to “197(dec) ± 25”.
• Store (STORE) the value.
CTN Option Code Display Code
32PFL5403/94 128 093 170 249 073 228 131 069
32PFL5403/98 128 093 170 249 073 228 131 069
32PFL5403S/98 128 093 170 249 073 228 131 069
42PFL5203/93 192 093 162 249 073 229 129 138
42PFL5203/94 128 093 170 249 073 228 129 138
42PFL5203/98 128 093 170 249 073 228 129 138
42PFL5203S/98 128 093 170 249 073 228 129 138
42PFL5403/93 192 093 162 249 073 229 129 130
42PFL5403/94 128 093 170 249 073 228 129 130
42PFL5403/98 128 093 170 249 073 228 129 130
42PFL5403S/98 128 093 170 249 073 228 129 130
42PFL7403/93 192 093 226 249 073 229 129 134
42PFL7403/98 128 093 234 249 073 228 129 134
42PFL7403A/93 192 093 226 249 073 229 129 134
42PFL7603/93 192 125 226 249 073 229 130 130
42PFL7603/98 128 125 234 249 073 228 130 130
42PFL7803/98 128 125 234 249 073 228 130 134
42PFL8803D/30 228 125 162 249 073 229 130 134
42PFL8803D/93 228 125 162 249 073 229 130 134
47PFL5403/93 192 093 162 249 073 229 129 135
47PFL5403/98 128 093 170 249 073 228 129 135
52PFL5403/93 192 093 162 249 073 229 129 098
52PFL5403/98 128 093 170 249 073 228 129 098
52PFL7403/93 192 093 226 249 073 229 129 075
52PFL7403/98 128 093 234 249 073 228 129 075
52PFL8803D/93 228 125 162 249 073 229 130 075
Note: *for 42PFL7403/93, in future releases of the software,
the display code will be changed into “142” for the same panel.
Check the Philips Service website for details.
Alignments
EN 95LC8.2A LA 8.
Option Bit Overview
Below find an overview of the Option Codes on bit level.
Table 8-4 Option codes at bit level (OP1-OP7)
Option Byte & Bit Dec. Value Option Name Description
Byte OP1
Bit 7 (MSB) 128 BBE ON = BBE is available; OFF = BBE is not available
Bit 6 64 CHINA ON = SW is for CHINA only; OFF = SW is for Non-China AP cluster
Bit 5 32 DTV_CHINA ON = DTV_CHINA will be available (Reserved); OFF = DTV_CHINA will not be available
Bit 4 16 DTV_EU ON = DTV will be available; OFF = DTV will not be available
Bit 3 8 UK_PNP ON = UK PNP is available (for analogue TV only); OFF = UK PNP is not available (for analogue
Bit 2 4 VIRGIN_MODE ON = Virgin Mode (PNP) is available; OFF = Virgin Mode (PNP) is not available
Bit 1 2 ACI ON = ACI is available; OFF = ACI is not available
Bit 0 (LSB) 1 ATS ON = ATS is available; OFF = ATS is not available
Byte OP2
Bit 7 (MSB) 128 1080P ON = 1080p is available; OFF = 1080p is not available
Bit 6 64 LIGHT_SENSOR ON = Light Sensor is available; OFF = Light Sensor is not available
Bit 5 32 AMBILIGHT ON = Ambilight Feature will be available; OFF = Ambilight Feature will not be available
Bit 4 16 BACKLIGHT_DIMMING ON = Backlight Dimming is available; OFF = Backlight Dimming is not available
Bit 3 8 HUE ON = Hue is available; OFF = Hue is not available
Bit 2 4 2D3DCF ON = 3D Comb Filter is available; OFF = 2D Comb Filter is available
Bit 1 2 WSSB ON = WSS is available; OFF = WSS is not available
Bit 0 (LSB) 1 WIDE_SCREEN ON = TV is 16x9 set; OFF = TV is 4x3 set
Byte OP3
Bit 7 (MSB) 128 CVI1 ON=CVI1 (YPbPr) (For ROW)
Bit 6 64 HDMI3 ON = HDMI3 (rear) is available; OFF = HDMI3 (rear) is not available
Bit 5 32 HDMI4 ON = HDMI4 (side) is available; OFF = HDMI4 (side) is not available
Bit 4 16 VCHIP ON = VChip is available; OFF = VChip is not available
Bit 3 8 VIDEO_TEXT ON = Video-TXT is available; OFF = Video-TXT is not available
Bit 2 4 STEREO_DBX ON = Stereo DBX detection is available (LATAM); OFF = Stereo DBX detection is not available
Bit 1 2 STEREO_NICAM_2CS ON = Stereo NICAM 2CS detection is available (EU/AP/China); OFF = Stereo NICAM 2CS
Bit 0 (LSB) 1 LIP_SYNC ON = Lip Sync is available; OFF = Lip Sync is not available
Byte OP4
Bit 7 (MSB) 128 HDMI2 ON = HDMI2 is available; OFF = HDMI2 is not available
Bit 6 64 HDMI1 ON = HDMI1 is available; OFF = HDMI1 is not available
Bit 5 32 VGA ON = VGA is available; OFF = VGA is not available
Bit 4 16 SVHS3 ON = SVHS3 is available; OFF = SVHS3 is not available
Bit 3 8 AV3 ON = AV3 is available; OFF = AV3 is not available
Bit 2 4 CVI ON = CVI is available; OFF = CVI is not available
Bit 1 2 SVHS2 ON = SVHS2 is available; OFF = SVHS2 is not available
Bit 0 (LSB) 1 AV2 ON = AV2 is available; OFF = AV2 is not available
Byte OP5
Bit 7 (MSB) 128 NVM_CHECK ON = NVM (range) checking is available; OFF = NVM (range) checking is not available
Bit 6 64 DNM ON = DNM is available; OFF = DNM is not available
Bit 5 32 SUBWOOFER ON = Sub woofer is available; OFF = Sub woofer is not available
Bit 4 16 MP_ALIGN ON = Using multi-point alignment for Gamma & White Point; OFF = Using old way for Gamma (pre-
Bit 3 8 SYS_RECVRY ON = System Recovery is available; OFF = System Recovery is not available
Bit 2 4 ED_HD_DNM ON = DNM not available on ED and HD signal; OFF = DNM available on ED and HD signal
Bit 1 2 HOTEL ON = Hotel/BDS is available; OFF = Hotel/BDS is not available
Bit 0 (LSB) 1 SS_DEMO ON = Split Screen Demo is available; OFF = Split Screen Demo is not available
Byte OP6
Bit 7 (MSB) 128 BACKLIGHT_BOOST ON = iLAB Backlight boost feature is available; OFF = iLAB Backlight boost feature is not available
Bit 6 64 STATIC _DIMMING ON = iLAB Static Dimming feature is available; OFF = iLAB Static Dimming feature is not available
Bit 5 32 CEC ON = CEC feature available; OFF = CEC feature not available
Bit 4 16 AUTO_HDMI ON = Auto HDMI feature available; OFF = Auto HDMI feature not available
Bit 3 8 TUNER PROFILE 0 = ATV_EU_PHILIPS UV1318S/AIH-3; 1 = ATV_EU_Panasonic EN57K28G3F; 2 =
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
Byte OP7
Bit 7 (MSB) 128 OPC_VOL_UP_UNMUTE ON = Volume Up key will unmute the TV; OFF = Volume Up key will not unmute the TV
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 OPC_DTV_LATAM ON = Brazil Digital available; OFF = Br azil Digital not available
Bit 4 16 CABINET PROFILE 0 = All flat response; 1 = ME8 42/47/52 Basic; 2 = ME8 42/47/52 AMBL; 3- 16 = Reserved
Bit 3 8
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
TV only)
detection is not available
defined) & WP alignment
DTV_EU_PHILIPS TD1316AF/IHP-2; 3 = Not Used (Reserved); 4 = ATV_AP_PHILIPS UV1316E/
AIH-4; 5 = ATV_CHINA_PHILIPS UV1356; 6 = ATV_CHINA_ALPS TEDE9-286B; 7 =
ATV_CHINA_Tuner2 (Reserved); 8 = ATV_LATAM_PHILIPS UV1338/AIH-4; 9 =
ATV_LATAM_PHILIPS UV1336; 10 = DTV_CHINA_Tuner1 (Reserved); 11 =
DTV_CHINA_Tuner2 (Reserved); 12 = Not Used (Reserved); 13 = Not Used (Reserved); 14 = Not
Used (Reserved); 15 = Not Used (Reserved)
EN 96 LC8.2A LA9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9. Circuit Descriptions, Abbreviation List, and IC Data Sheets
Index of this chapter:
9.1 Introduction
9.2 LCD Power Supply
9.3 DC/DC converters
9.4 Front-End
9.5 Video Processing
9.6 Audio Processing
9.7 HDMI
9.8 Abbreviation List
9.9 IC Data Sheets
Notes:
•Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the Wiring, Block (chapter 6) and
Circuit Diagrams (chapter 7). Where necessary, you will
find a separate drawing for clarification.
9.1 Introduction
The LC8.2A LA chassis (development name “LC08R”) is a new
chassis using a Trident chipset. It covers screen sizes of 32",
42", 47" and 52" with a new styling called “ME8”.
Main key components are:
• Trident WX69 video processor
• SiL9125CTU HDMI processor
• SiL9185ACTU HDMI switch
• UV1316 tuner and TDA9886 demodulator
• Additional (optional) DFI panel including CYCLONE II
FPGA (EP2C35F48C7N) (for 100 Hz 1080p applications).
In due time this DFI panel will be replaced by an on-board
Mediatek solution.
Main features are:
• Video: Video processing is performed by the Trident video
processor SVP WX69 (item 7C01), which supports
- Digital Natural Motion for HD (HD DNM)
- MPEG Artifact Reduction
- 4-field Motion Adaptive De-Interlacing technology (MADI).
• Audio: introducing BBE
®
technology for increased speech
intelligibility and music performance.
• China: Support of Digital Multimedia Broadcast Terrestrial/Handheld (DMB-T/H), the Chinese digital
television terrestrial/handheld broadcasting system
standard.
Refer to figure “LC08R Architecture” for details.
SiI9185
Switch
Analogue inputs
Tuner
IF
SAW
SiI9125
HDMI
IIS
Bolt-on module
Brasil
China
ISDTV Bolt-on
DDR
32
SVP-WX69
Digital Colour Decoder
MADI (4-field)
HD-DNM
1080P Through
FLASH
Renesas uP
TV control
MSP4450L
2C5 FPGA
(optional)
AmbiLight
AmbiLight2
8
DDR
L/R
TDA8932T
Class D
SPDIF
32
FPGA
(optional)
DFI
FHD 100Hz
DFI Bolt-on
DDR
32
Matrix
Matrix
HD@50Hz
HD@50Hz
FHD@50Hz
FHD@50Hz
FHD@100Hz
FHD@100Hz
I_17760_050.eps
040308
Figure 9-1 LC08R Architecture
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.1.1 SSB Cell Layout
EN 97LC8.2A LA 9.
100Hz 1080p PROCESSING
(FUTURE IMPLEMENTATION)
DC - DC CONVERSION
AUDIO CLASS - D
FPGA
AMBI
LIGHT
TUNER
VIDEO PROCESSING
HDMI
HDMI
RECEIVER
HDMI
MULTI
FOR FUTURE USE
PLEXER
Figure 9-2 SSB top view
I_17760_058.eps
040308
EN 98 LC8.2A LA9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
FLASH
MEMORY
DC - DC CONVERSION
9.2 LCD Power Supply
The Power Supply Unit (PSU) in this chassis is a buy-in and is
a black-box for Service. When defective, a new panel must be
ordered and the defective panel must be returned for repair,
unless the main fuse of the unit is broken. Always replace the
fuse with one with the correct specifications! This part is
commonly available in the regular market.
Different PSUs are used in this chassis:
• 32" sets use a “Delta” PSU DPS - 182CP A
• 42" sets use an “LG” PSU (LGIT PLHL-T721A or -T720A)
• 47" sets use an “LG” PSU (LGIT PLHL-T722A)
• 52" sets use a “Delta” PSU (DPS-411AP A).
AUDI O
PROCESSING
Figure 9-3 SSB bottom view
• +5 V (+5V
•+VTUN
• +5 V (+5V_SW)
• +3.3 V (+3V3_SW)
• +2.5 V (+2V5_SW)
• +1.8 V (+1V8_SW)
• +1.2 V (+1V2_SW)
• +8 V (+8V)
The following diagram shows the power supply architecture of
the SSB:
tuner
I_17760_059.eps
040308
)
The 42" and 47" Power Supply Units deliver the high voltage to
drive the backlight units (no inverters needed). In addition, all
Power Supply Units deliver the following voltages to the
chassis:
•+3V3
•+12 V
•+12 V
STBY
display
audio
to SSB
to SSB
and -12 V
audio
to SSB
• +12 V to DC-DC converters to SSB
• +12 V to Bolt-on Supply (where applicable) to SSB
• +24 V to Bolt-on Supply (where applicable) to SSB.
9.3 DC/DC converters
On-board DC-DC converters convert the +12 V coming from
the PSU and deliver the following voltages:
Circuit Descriptions, Abbreviation List, and IC Data Sheets
• Advanced Chroma Processing
• Judder Free Nature Motion Controller
• Perfect Colour Management
• Real Colour Reproducer
• Dynamic Contrast Improvement
• Integrated 7th Generation Motion Adaptive 3D Digital
Comb Video Decoder with Programmable Filter
• Inverse Colour Space Conversion
• Mosquito NR and Block NR with No Details Lost
• Interlaced and Progressive Scan Refresh
• Frame Rate Conversion
•PWM
• Fast Blank
• Teletext
• Memory Interface
• DCRe Advanced Image Processing
• Multi Screen Display Modes
• OSD and VBI/Closed Caption
• Advanced OSD Engine
9.5.1 System Overview
EN 99LC8.2A LA 9.
Figure 9-4 Power Supply Architecture
9.4 Front-End
9.4.1 Tuner Diversity
The following analogue tuners/splitters are used:
• AP: UV1316E tuner.
• China: UV1356 tuner.
• China Digital: UV1356 tuner with UV1356L splitter
(optional).
A switchable video SAW filter is used to switch between
systems M (signal SAW_SW = logic 0) and B, G, D, K, I (signal
SAW_SW = logic 1).
Refer to figure “Front-end implementation” for details.
SAW FILTER
RF
SDA SCL AGC
TUNER
IF
GND
SWITCH
SAW_SW (pin23 of M30620SPGP)
AUDIO
SAW FILTER
1
VIDEO
B,G,D,K,I / M
2
38.9MHz
38.0MHz (for China)
SIF1
SIF2
VIF1
VIF2
TDA9886
TAGC CVBSOUTIF
I_17760_051.eps
SDASCL
I_17760_052.eps
040308
040308
Refer to figure “System Overview” for details.
1.2V 2.5V 3.3V
TV - RF CVBS input
AV- CVBS input
Side AV- CVBS/YC input
VGA-RGB analog PC input
CVI-YPbPr input
HD
HDMI 30 bit input
LC07 uses 24 bit input
WX69
Figure 9-6 System Overview
Address (0:7)
Data (0:7)
Address
Data
CVBS output 1
CVBS output 2
BL Dimming PWM output
Single/Dual LVDS output
Flash Memory
Microprocessor
2M x 16Bit x 4 Banks
2x DDRs
2.5V/2.6V
Address (0:7)Data (0:19)
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Figure 9-5 Front-end implementation
9.5 Video Processing
The video processing is completely handled by the Trident SVP
WX69 video processor which features:
• Integrated HDMI receiver with HDCP up to 162 MHz
(UXGA) with XVYCC Colour Space support
• 30-bit digital input supporting HDMI 1.3 RGB 10-bit
applications
• Integrated 7th Generation Motion and Edge Adaptive
De-interlacing
• Integrated ADC
• Scan Rate Conversion improvement
• PC Auto Tune
• Dual 8/10 LVDS transmitter
• Advanced 7th Generation Cubic-4 Image Scaling Engine
• DNR-Digital Temporal and Spatial Noise Reduction Filter
EN 100 LC8.2A LA9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.5.2 Video Application
AV IN
SIDE AV
HDMI A/DTV
Analog
Front End
SC2_Y_CVBS_IN
VGA
SVHS_Y_CVBS_IN
CVI 1
VGA_R_IN
VGA_G_IN
VGA_B_IN
SVHS_C_IN
HD_Y_IN
HD_PB_IN
HD_PR_IN
R1X
TX
HDMI
MAIN
R0X
R1X
R2X
HDMI
SWITCH
CVBS_RF
HDMI YCbCr R0X
CVBS 1
PR R3
PC R
PC G
PC B
C
YG3
YG1
PB B1
PR R1
DPA
HDMI SIDE
HDMI B
HDMI C
TRIDENT
WX69
CVBS OUT1
Figure 9-7 Block diagram video processing
“Block diagram video processing” shows the input and output
signals to and from the Trident Video Processor.
MONITOR OUT
SC1 RF OUT CVBS
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9.6 Audio Processing
Refer to the LC7.1A LA Service Manual.
For additional (future) China DTV implementation, refer to
figure “Block diagram audio processing”.
Figure 9-9 Block diagram audio processing
9.7 HDMI
9.7.1 Introduction
Refer to the LC7.1A LA Service Manual.
9.7.2 Implementation
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During analogue reception, a CVBS signal coming from the
analogue front-end is fed to the video processor via pin
CVBS1.
The video processor also interfaces the (side-) AV inputs, VGA,
CVI (HD) and HDMI input. Through the CVBS OUT connector,
a monitor output is foreseen.
9.5.3 Dynamic Frame Insertion (DFI)
In order to obtain 1080p @ 100 Hz, the same DFI panel is used
as in Q528.1A LA Service Manual.
Refer to figure “DFI implementation” for the LC08-specific
implementation of the DFI panel.
Primary DLVDS
pins)
(51
Secondary
DLVDS (41 pins)
Cascade IIC
HD/FHD 100/120 Hz
Panels
HD – Primary DLVDS only
FHD – Both primary and
Secondary DLVDS
Right
AL
Box
Power Supply
100Hz
12V
12V
DFI FPGA
bolt-on
41 pin DLVDS
(with IIC)
LC08 SSB
AmbiLight FPGA
AmbiLight IIC out
Left
AL
Box
Figure 9-8 DFI implementation
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The main HDMI receiver which is used is the Sil 9125 (Silicon
Image) third generation HDMI receiver (item 7N01 on the
SSB). In addition, the Sil 9185 HDMI switch (item 7M07) is
used for switching between the 3 HDMI inputs. Refer to figure
“HDMI implementation” for details.
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Figure 9-10 HDMI implementation
When the HDMI receiver Sil9125 receives either RGB or
YCbCr 4:2:2 input signals, it will convert these signals to 24-36bit YCbCr 4:4:4 output signals. When it receives an YCbCr
4:4:4 input signal, it will just bypass this signal to the Trident
WX69 video processor.
Please not that in due time the DFI panel will be replaced by an
on-board Mediatek solution.
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