Philips LC7.5E-LA Schematic

Colour Television Chassis

SUPER NOVA

LC7.5E

LA

SUPER NOVA

Contents Page Contents Page

1. Technical Specifications, Connections, and Chassis
Overview 2

2. Safety Instructions, Warnings, and Notes 6

3. Directions for Use 7

4. Mechanical Instructions 8

5. Service Modes, Error Codes, and Fault Finding 15

6. Block Diagrams, Test Point Overviews, and

Waveforms

Wiring Diagram 32” LCD (ME7) 29
Wiring Diagram 32” LCD with AmbiLight (ME7) 30
Wiring Diagram 42” LCD (ME7) 31
Wiring Diagram 42” LCD with AmbiLight (ME7) 32
Wiring Diagram 52” LCD (ME7) 33
Block Diagram Video 34
Block Diagram Audio 35
Block Diagram Control & Clock Signals 36
Testpoint Overview SSB (Bottom Side) 37-41
I2C Overview 42
Supply Lines Overview 43

7. Circuit Diagrams and PWB Layouts Diagram PWB
SSB: DC / DC 3V3, VTUN, & 5V_SW (B01A) 44 67-76
SSB: DC / DC 1V2, 2V5, & 1V8 (B01B) 45 67-76
SSB: Tuner IF & Demodulator (B02) 46 67-76
SSB: DVB-Demodulator (B03A) 47 67-76
SSB: DVB-T: DVB Common Interface (B03B) 48 67-76
SSB: DVB MOJO (B03C) 49 67-76
SSB: DVB MOJO Memory (B03D) 50 67-76
SSB: DVB MOJO Analog Back End (B03E) 51 67-76
SSB: Micro Processor (B04) 52 67-76
SSB: Trident WX68 (B05A) 53 67-76
SSB: DDR & CPU Interface (B05B) 54 67-76
SSB: WX Power / Ground (B05C) 55 67-76
SSB: FPGA Interface (AL Sets only) (B05D) 56 67-76
SSB: FPGA I/O Banks (B05E) 57 67-76

©

Copyright 2007 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.

SSB: Audio Processor (B06A) 58 67-76
SSB: Audio (B06B) 59 67-76
SSB: Headphone Ampl. & Muting (B06C) 60 67-76
SSB: YPBPR & SVHS (B07A) 61 67-76
SSB: I/O SCART 1&2 (B07B) 62 67-76
SSB: HDMI Main (B07C) 63 67-76
SSB: HDMI Switch (B07D) 64 67-76
SSB: LVDS Connector (B07E) 65 67-76
SSB: SRP List 66 67-76
Side I/O Panel (32”): HDMI (D) 77 79
Side I/O Panel (32”) (D) 78 79
Side I/O Panel (42” & 52”): HDMI (D) 80 82
Side I/O Panel (42” & 52”) (D) 81 82
Side I/O Panel (42” & 52”) (D) 81 82
Keyboard Control Panel (E) 83 84
Front IR / LED Panel (J) 85 86

8. Alignments 87

9. Circuit Descriptions, Abbreviation List, and IC Data
Sheets 92
Abbreviation List 97
IC Data Sheets 99

10. Spare Parts List 107

11. Revision List 133

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Published by WS 0770 BU CD Customer Service Printed in the Netherlands Subject to modification EN 3122 785 17372

EN 2 LC7.5E LA1.

Technical Specifications, Connections, and Chassis Overview

1. Technical Specifications, Connections, and Chassis Overview

Index of this chapter:

1.1 Technical Specifications

1.2 Connection Overview

1.3 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

1.1 Technical Specifications

1.1.1 Vision

Display type : LCD
Screen size : 32" (82 cm), 16:9

Resolution (HxV pixels) : 1366x768 (32")

Dyn. contrast ratio : 7500:1
Min. light output (cd/m
Typ. response time (ms) : 8 (32")

Viewing angle (HxV degrees) : 176x176 (32")

Tuning system : PLL
Presets/channels : 100 presets
Tuner bands : VHF, UHF, S, H
TV Colour systems : PAL B/G, D/K, I

Video playback : NTSC

Supported computer formats : 640x480

Supported video formats : 640x480i - 1fH

2

) : 500

: 42" (107 cm), 16:9

: 1920x1080 (42")

: 5 (42")

: 178x178 (42")

: SECAM B/G, D/K, L/L’
: DVB-T COFDM

: PAL
: SECAM

: 800x600
: 1024x768
: 1280x768
: 1280x1024
: 1360x768

: 640x480p - 2fH
: 720x576i - 1fH
: 720x576p - 2fH
: 1280x720p - 3fH
: 1920x1080i - 2fH
: 1920x1080p - 3fH

1.1.3 Miscellaneous

Power supply:

- Mains voltage (V

- Mains frequency (Hz) : 50 / 60

Ambient conditions:

- Temperature range (°C) : +5 to +40

- Maximum humidity : 90% R.H.

Power consumption (values are indicative)

- Normal operation (W) : ≈ 110 (32")

- Stand-by (W) : < 1

Dimensions (WxHxD cm) : 80.4x53.3x17.8 (32")

Weight (kg) : 15 (32")

) : 220 - 240

AC

: ≈ 170 (42")

: 102.9x66.2x13.6 (42")

: 25.5 (42")

1.1.2 Sound

Sound systems : stereo, BBE
Maximum power (W

) : 2 × 20

RMS

®

Technical Specifications, Connections, and Chassis Overview

1.2 Connection Overview

EN 3LC7.5E LA 1.

COMMON INTERFACE

TV ANTENNA

Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, and Ye= Yellow.

1.2.1 Side Connections

EXT3: Cinch: Video CVBS - In, Audio - In

Ye -Video CVBS 1 V
Wh -Audio L 0.5 V
Rd - Audio R 0.5 V

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

EXT3: Head phone - Out

Bk -Head phone 32 - 600 ohm / 10 mW rt

EXT3: HDMI: Digital Video, Digital Audio - In

19

18 2

1

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Figure 1-2 HDMI (type A) connector

1 -D2+ Data channel j
2 -Shield Gnd H
3 -D2- Data channel j
4 -D1+ Data channel j
5 -Shield Gnd H
6 -D1- Data channel j
7 -D0+ Data channel j
8 -Shield Gnd H
9 -D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - n.c.
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H

HDMI 2

Figure 1-1 Side and rear I/O connections

1.2.2 Rear Connections

Service Connector (ComPair)

1 -SDA-S I
2 -SCL-S I
3 -Ground Gnd H

Service Connector (UART)

1 -UART_TX Transmit k
2 -Ground Gnd H
3 -UART_RX Receive j

EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out

1 -Audio R 0.5 V
2 -Audio R 0.5 V
3 -Audio L 0.5 V
4 -Ground Audio Gnd H
5 -Ground Blue Gnd H
6 -Audio L 0.5 V
7 -Video Blue 0.7 V
8 -Function Select 0 - 2 V: INT

9 -Ground Green Gnd H
10 - Easylink P50 0 - 5 V / 4.7 kohm jk
11 - Video Green 0.7 V
12 - n.c.
13 - Ground Red Gnd H
14 - Ground P50 Gnd H
15 - Video Red 0.7 V
16 - Status/FBL 0 - 0.4 V: INT

17 - Ground Video Gnd H
18 - Ground FBL Gnd H
19 - Video CVBS 1 V
20 - Video CVBS 1 V
21 - Shield Gnd H

Pb rPY

2

1

050404

21

20

HDMI 1

S-VIDEO

2

C Data (0 - 5 V) jk

2

C Clock (0 - 5 V) j

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Figure 1-3 SCART connector

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 75 ohm j

PP

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j

/ 75 ohm j

PP

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j

/ 75 ohm k

PP

/ 75 ohm j

PP

RL

AUDIO IN

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EXT2: Video YC - In, CVBS - In/Out, Audio - In/Out

Technical Specifications, Connections, and Chassis Overview

1 -Audio R 0.5 V
2 -Audio R 0.5 V
3 -Audio L 0.5 V
4 -Ground Audio Gnd H

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 1 kohm k

RMS

5-n.c.
6 -Audio L 0.5 V
7 -C-out 0.7 V

/ 10 kohm j

RMS

/ 75 ohm k

PP

8 -Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j
9-n.c.
10 - Easylink P50 0 - 5 V / 4.7 kohm jk
11 - n.c.
12 - n.c.
13 - n.c.
14 - Ground P50 Gnd H
15 - C 0.7 V
16 - Status/FBL 0 - 0.4 V: INT

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j
17 - Ground Video Gnd H
18 - Ground FBL Gnd H
19 - Video CVBS 1 V
20 - Video CVBS/Y 1 V
21 - Shield Gnd H

/ 75 ohm k

PP

/ 75 ohm j

PP

Common Interface

68p- See diagram B03B jk

Aerial - In

- -IEC-type (EU) Coax, 75 ohm D

HDMI1 & 2: Digital Video, Digital Audio - In

1 -D2+ Data channel j
2-Shield Gnd H
3 -D2- Data channel j
4 -D1+ Data channel j
5-Shield Gnd H
6 -D1- Data channel j
7 -D0+ Data channel j
8-Shield Gnd H
9 -D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - n.c.
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H

EXT4: Cinch: Video YPbPr - In, Audio - In

Gn - Video Y 1 V
Bu -Video Pb 0.7 V
Rd - Video Pr 0.7 V
Wh -Audio L 0.5 V
Rd -Audio R 0.5 V

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

EXT4: S-Video (Hosiden): Video Y/C - In

1 -Ground Y Gnd H
2 -Ground C Gnd H
3 -Video Y 1 V
4 -Video C 0.3 V

/ 75 ohm j

PP

P / 75 ohm j

PP

Technical Specifications, Connections, and Chassis Overview

1.3 Chassis Overview

EN 5LC7.5E LA 1.

MAIN SUPPLY UNIT

SMALL SIGNAL

B

BOARD

Figure 1-4 PWB/CBA locations (32" sets)

SIDE I/O PANEL

CONTROL BOARD

LED PANEL

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SIDE I/O PANEL

D

E

J

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D

MAIN SUPPLY UNIT

SMALL SIGNAL

B

BOARD

Figure 1-5 PWB/CBA locations (42" models)

CONTROL BOARD

LED PANEL

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E

J

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EN 6 LC7.5E LA2.

Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes

Index of this chapter:

2.1 Safety Instructions

2.2 Warnings

2.3 Notes

2.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation

transformer (> 800 VA).

• Replace safety components, indicated by the symbol h,

only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:

• Route the wire trees correctly and fix them with the

mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for

external damage.

• Check the strain relief of the Mains/AC Power cord for

proper function.

• Check the electrical DC resistance between the Mains/AC

Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the "on" position
(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 Mohm and 12 Mohm.

4. Switch "off" the set, and remove the wire between the
two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.

Service Default Mode (see chapter 5) with a colour bar
signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated
otherwise) and picture carrier at 475.25 MHz for PAL, or

61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.

• Manufactured under license from Dolby Laboratories.
“Dolby”, “Pro Logic” and the “double-D symbol”, are
trademarks of Dolby Laboratories.

2.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kohm).

• Resistor values with no multiplier may be indicated with
either an "E" or an "R" (e.g. 220E or 220R indicates 220
ohm).

• All capacitor values are given in micro-farads (μ= x10
nano-farads (n= x10

• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An "asterisk" (*) indicates component usage varies. Refer
to the diversity tables for the correct values.

• The correct component values are listed in the Spare Parts
List. Therefore, always check this list when there is any
doubt.

2.3.3 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this
URL: www.atyourservice.ce.philips.com (needs subscription,
not available for all regions). After login, select “Magazine”,
then go to “Repair downloads”. Here you will find Information
on how to deal with BGA-ICs.

-9

), or pico-farads (p= x10

-12

-6

),

).

2.2 W arnings

• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential. Available
ESD protection equipment:
– Complete kit ESD3 (small tablemat, wristband,

connection box, extension cable and earth cable)
4822 310 10671.

– Wristband tester 4822 344 13999.

• Be careful during measurements in the high voltage
section.

• Never replace modules or other components while the unit
is switched "on".

• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.

2.3 Notes

2.3.1 General

• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile,
which is coupled to the 12NC. For an overview of these profiles,
visit the website www.atyourservice.ce.philips.com (needs
subscription, but is not available for all regions)
You will find this and more technical information within the
"Magazine", chapter "Repair downloads".
For additional questions please contact your local repair help
desk.

2.3.4 Lead-free Soldering

Due to lead-free technology some rules have to be respected
by the workshop during a repair:

• Use only lead-free soldering tin Philips SAC305 with order
code 0622 149 00106. If lead-free solder paste is required,
please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.

• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.

To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.

2.3.5 Alternative BOM identification

Directions for Use

MODEL :

PROD.NO:

32PF9968/10

AG 1A0617 000001

EN 7LC7.5E LA 3.

MADE IN BELGIUM

220-240V 50/60Hz

~

VHF+S+H+UHF

S

128W

BJ3.0E LA

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130606

The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for

ordering the correct spare parts!

For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.

Figure 2-1 Serial number (example)

2.3.6 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!

2.3.7 NVM content

If the processor NVM IC is replaced or initialised, the Model
Number, Serial Number, and SSB Code number must be re­written to the NVM. ComPair will foresee in a possibility to do
this.

2.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.

3. Directions for Use

You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com

EN 8 LC7.5E LA4.

Mechanical Instructions

4. Mechanical Instructions

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

4.1 Cable Dressing

Notes:

• Figures below can deviate slightly from the actual situation,
due to the different set executions.

• Follow the disassemble instructions in described order.

Figure 4-1 Cable dressing (32" sets)

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Mechanical Instructions

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Figure 4-2 Cable dressing (42" sets)

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EN 10 LC7.5E LA4.

Mechanical Instructions

4.2 Service Positions

For easy servicing of this set, there are a few possibilities
created:

• The buffers from the packaging.

• Foam bars (created for Service).

• Aluminium service stands (created for Service).

Note: the aluminium service stands can only be used when the
set is equipped with so-called “mushrooms”. Otherwise use the
original stand that comes with the set.

4.2.1 Foam Bars

1

Required for sets

1

42"

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Figure 4-3 Foam bars

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove

the rear cover.

1. Refer to next figures.

2. Place the TV set upside down on a table top, using the
foam bars (see part “Service Positions”).

3. Remove rear cover screws [1] and the stand (if mounted).

4. Remove Subwoofer mounting screws [2] (if present).

5. Lift Subwoofer module, and unplug Subwoofer cable [3].

6. Unplug AmbiLight cables [4] (if present).

7. Remove rear cover.

2

1

1

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The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs. See figure “Foam
bars” for details.
Sets with a display of 42" and larger, require four foam bars [1].
Ensure that the foam bars are always supporting the cabinet
and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen.

4.2.2 Aluminium Stands

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Figure 4-5 Rear cover removal (1/3)

3

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Figure 4-6 Rear cover removal (2/3)

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Figure 4-4 Aluminium stands

The MkII aluminium stands with order code 3122 785 90690,
can also be used to do measurements, alignments, and
duration tests. The stands can be (dis)mounted quick and easy
by means of sliding them in/out the "mushrooms". The stands
are backwards compatible with the earlier models.
Important: For (older) FTV sets without these "mushrooms", it
is obligatory to use the provided screws, otherwise it is possible
to damage the monitor inside!

4

H_17370_038.eps

Figure 4-7 Rear cover removal (3/3)

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Mechanical Instructions

EN 11LC7.5E LA 4.

4.3.2 AmbiLight Lamps (if present)

1. Refer to next figure.

2. Unplug connectors [1].

3. Remove the T10 parker screws [2].

4. Remove the unit by shifting it sidewards [3].
When defective, replace the whole unit.

2

3

2

2

Figure 4-8 AmbiLight lamps

4.3.4 Side I/O Panel

1. Refer to next figures.

2. Unplug connectors [1]. To release the flatcable connector
[1b], push the two side levers and unplug the connector.

3. Remove screws [2] and remove the complete module [3].

When defective, replace the whole unit.

2

2

1a

3

1

2

1b

3

2

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Figure 4-10 Side I/O module (1/2)

2

2

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4.3.3 Keyboard Control Panel

1. Refer to next figure.

2. Unplug connector [2].

3. Remove the T10 parker screws [1].

4. Remove the unit.

5. Release clips [3] and remove the board.
When defective, replace the whole unit.

1

3

2

1

1b

Figure 4-11 Side I/O module (2/2)

4.3.5 IR/LED Panel

1. Refer to next figure.

2. Unplug connectors [1].

3. Release clip [2] and remove the board.

When defective, replace the whole unit.

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Figure 4-9 Keyboard control panel

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1

2

Figure 4-12 IR/LED panel

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EN 12 LC7.5E LA4.

4.3.6 Speakers

Unplug the speaker cables and remove the speaker.

4.3.7 Main Supply Panel

1. Unplug cables.

2. Remove the fixation screws.

3. Take the board out (it hinges at the left side).
When defective, replace the whole unit.

4.3.8 Small Signal Board (SSB)

Note: Follow sequence below closely, otherwise you will have

difficulties with removing the top shielding.

1. Refer to next figures.

2. Disconnect all cables [1] on the SSB.

3. Remove the T10 tapping screws [2] that hold the SSB.

4. Remove the screws [3] that hold the connectors and the
connector plate.

5. Lift the complete SSB from the set (including the shielding
and connector plate).

6. Now, remove the connector plate first, by pulling it away
from the connectors.

7. Then, lift the top shielding from the SSB.

Mechanical Instructions

2

2

2

1

2

2

3

Figure 4-13 SSB removal (1/2)

3

2

2

3

3

3

3

3

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33

3

Figure 4-14 SSB removal (2/2)

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Mechanical Instructions

EN 13LC7.5E LA 4.

4.3.9 LCD Panel

1. Refer to next figures.

2. Unplug the connectors [1] on the Main Supply Panel, the
display (LVDS connector), Loudspeakers, and the LED/IR
board.

3. Do NOT forget to unplug the LVDS connector from the
SSB. Important: Be careful, as this is a fragile connector!

4. Remove T10 parker screws [2] on the top and bottom of the
central sub-frame.

3

5. Remove the T20 panel fixation screws [3]. Note that the
number of these screws can vary, depending on the
screensize.

6. Lift he complete central sub-frame from the set [4] (incl. the
PSU, SSB, and Side I/O boards and wiring).

7. After removing the sub-frame, the LCD panel can be lifted
from the front cabinet.

2

3

1

3

1

2

3

1

H_17370_042.eps

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Figure 4-15 LCD panel (1/3)

14

13

Figure 4-16 LCD panel (2/3)

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Figure 4-17 LCD panel (3/3)

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EN 14 LC7.5E LA4.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse
order.

Notes:

• While re-assembling, make sure that all cables are placed
and connected in their original position. See figure "Cable
dressing".

• Pay special attention not to damage the EMC foams.
Ensure that EMC foams are mounted correctly (one is
located above the LVDS connector on the display, between
the LCD display and the metal sub-frame).

Mechanical Instructions

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

EN 15LC7.5E LA 5.

Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Service Tools

5.4 Error Codes

5.5 The Blinking LED Procedure

5.6 Software Upgrading

5.7 Fault Finding and Repair Tips

5.1 Test Points

In the chassis schematics and layout overviews, the test points
(Fxxx) are mentioned. In the schematics, test points are
indicated with a rectangular box around “Fxxx” or “Ixxx”, in the
layout overviews with a “half-moon” sign.
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. Several key ICs are
capable of generating test patterns, which can be controlled via
ComPair. In this way it is possible to determine which part is
defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

The Service Mode feature is split into four parts:

• Service Default Mode (SDM).

• Service Alignment Mode (SAM).

• Customer Service Mode (CSM) and Digital Customer
Service Mode (DCSM).

• Computer Aided Repair Mode (ComPair).

SDM and SAM offer features, which can be used by the Service
engineer to repair/align a TV set. Some features are:

• A pre-defined situation to ensure measurements can be
made under uniform conditions (SDM).

• Activates the blinking LED procedure for error identification
when no picture is available (SDM).

• The possibility to overrule software protections when SDM
was entered via the Service pins.

• Make alignments (e.g. white tone), (de)select options,
enter options codes, reset the error buffer (SAM).

• Display information (“SDM” or “SAM” indication in upper
right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).

The (D)CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:

• Increase the home repair hit rate.

• Decrease the number of nuisance calls.

• Solved customers' problem without home visit.

ComPair Mode is used for communication between a computer
and a TV on I2C /UART level and can be used by a Service
engineer to quickly diagnose the TV set by reading out error
codes, read and write in NVMs, communicate with ICs and the
uP (PWM, registers, etc.), and by making use of a fault finding
database. It will also be possible to up and download the
software of the TV set via I2C with help of ComPair. To do this,
ComPair has to be connected to the TV set via the ComPair
connector, which will be accessible through the rear of the set
(without removing the rear cover).

5.2.1 General

Some items are applicable to all Service Modes or are general.
These are listed below.

Life Timer

During the life time cycle of the TV set, a timer is kept. It counts
the normal operation hours (not the Stand-by hours). The
actual value of the timer is displayed in SDM and CSM in a
decimal value. Every two soft-resets increase the hour by +1.

Software Identification, Version, and Cluster

The software ID, version, and cluster will be shown in the main
menu display of SDM, SAM, and CSM.
The screen will show: “AAAABCD X.YY”, where:

• AAAA is the chassis name: LC71 for analogue range (non­DVB), LC72 for digital range (DVB).

• B is the region indication: E= Europe, A= AP/China, U=
NAFTA, L= LATAM.

• C is the display indication: L= LCD, P= Plasma.

• D is the language/feature indication: 1= standard, H=
1080p full HD.

• X is the main version number: this is updated with a major
change of specification (incompatible with the previous
software version). Numbering will go from 1 - 9 and A - Z.
– If the main version number changes, the new version

number is written in the NVM.

– If the main version number changes, the default

settings are loaded.

• YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous versions)
Numbering will go from 00 - 99.
– If the sub version number changes, the new version

number is written in the NVM.

– If the NVM is fresh, the software identification, version,

and cluster will be written to NVM.

Display Option Code Selection

When after an SSB or display exchange, the display option
code is not set properly, it will result in a TV with “no display”.
Therefore,

it is required to

set this display

option code after
such a repair.
To do so, press the following key sequence on a standard RC
transmitter: “062598” directly followed by MENU and “xxx”,
where “xxx” is a 3 digit decimal value of the panel type: see
column “Panel Code” in table “Option Codes OP1...OP7” (ch.

8), or see sticker on the side/bottom of the cabinet. When the
value is accepted and stored in NVM, the set will switch to
Stand-by, to indicate that the process has been completed.

Display Option

Code

39mm

040

PHILIPS

MODEL:

32PF9968/10

27mm

PROD.SERIAL NO:
AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps

Figure 5-1 Location of Display Option Code sticker

During this algorithm, the NVM-content must be filtered,
because several items in the NVM are TV-related and not SSB­related (e.g. Model and Prod. S/N). Therefore, “Model” and
“Prod. S/N” data is changed into “See Type Plate”.
In case a call centre or consumer reads “See Type Plate” in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.

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EN 16 LC7.5E LA5.

Service Modes, Error Codes, and Fault Finding

5.2.2 Service Default Mode (SDM)

Purpose

Set the TV in SDM mode in order to be able to:

• Create a pre-defined setting for measurements to be
made.

• Override software protections.

• Start the blinking LED procedure.

• Read the error buffer.

• Check the life timer.

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz) Defaul t syst.

Europe (except France),

475.25 PAL B/G

AP-PAL/-Multi
France SECAM L
NAFTA, AP-NTSC 61.25 (channel 3) NTSC M
LATAM PAL M

• Set linear video and audio settings to 50%, but volume to
25%. Stored user settings are not affected.

• All service-unfriendly modes (if present) are disabled, since
they interfere with diagnosing/repairing a set. These
service unfriendly modes are:
– (Sleep) timer.
– Blue mute/Wall paper.
– Auto switch “off” (when there is no “ident” signal).
– Hotel or hospital mode.
– Child lock or parental lock (manual or via V-chip).
– Skipping, blanking of “Not favourite”, “Skipped” or

“Locked” presets/channels.

– Automatic storing of Personal Preset or Last Status

settings.

– Automatic user menu time-out (menu switches back/

OFF automatically.

– Auto Volume levelling (AVL).

How to Activate

To activate SDM, use one of the following methods:

• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the MENU button
(do not allow the display to time out between entries while
keying the sequence).

• Short one of the “Service” jumpers on the TV board during
cold start (see Figures “Service jumper”). Then press the
mains button (remove the short after start-up).
Caution: Activating SDM by shorting “Service” jumpers will
override the DC speaker protection (error 1), the General
I2C error (error 4), and the Trident video processor error
(error 5). When doing this, the service-technician must
know exactly what he is doing, as it could damage the
television set.

On Screen Menu

After activating SDM, the following screen is visible, with SDM
in the upper right corner of the screen to indicate that the
television is in Service Default Mode.

HHHHH A A A AB C D- X . Y Y
ERR XX XX XX XX XX
O P X X X X X X X X X X X X X X X X X X

SDM

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Figure 5-3 SDM menu

Menu explanation:

• HHHHH: Are the operating hours (in decimal).

• AAAABCD-X.YY: See paragraph “Service Modes” ->
“General” -> “Software Identification, Version, and Cluster”
for the SW name definition.

• SDM: The character “SDM” to indicate that the TV set is in
Service mode.

• ERR: Shows all errors detected since the last time the
buffer was erased. Five errors possible.

• OP: Used to read-out the option bytes. See “Options” in the
Alignments section for a detailed description. Seven codes
are possible.

How to Navigate

As this mode is read only, there is not much to navigate. To
switch to other modes, use one of the following methods:

• Command MENU from the user remote will enter the
normal user menu (brightness, contrast, colour, etc...) with
“SDM” OSD remaining, and pressing MENU key again will
return to the last status of SDM again.

• To prevent the OSD from interfering with measurements in
SDM, command “OSD” (“STATUS” for NAFTA and
LATAM) from the user remote will toggle the OSD “on/off”
with “SDM” OSD remaining always “on”.

ress the following key sequence on the remote control

P

•
transmitter: “062596” directly followed by the OSD/i+
button to switch to SAM (do not allow the display to time out
between entries while keying the sequence).

How to Exit

Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or on the television set.
If you switch the television set “off” by removing the mains (i.e.,
unplugging the television), the television set will remain in SDM
when mains is re-applied, and the error buffer is not cleared.
The error buffer will only be cleared when the “clear” command
is used in the SAM menu.

SDMSDM

H_17370_048.eps

Figure 5-2 Service jumper (SSB component side)

Note:

• If the TV is switched “off” by a power interrupt while in SDM,
the TV will show up in the last status of SDM menu as soon
as the power is supplied again. The error buffer will not be
cleared.

• In case the set is in Factory mode by accident (with “F”
displayed on screen), by pressing and hold “VOL-“ and
“CH-” together should leave Factory mode.

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Service Modes, Error Codes, and Fault Finding

EN 17LC7.5E LA 5.

5.2.3 Service Alignment Mode (SAM)

Purpose

• To change option settings.

• To display / clear the error code buffer.

• To perform alignments.

Specifications

• Operation hours counter (maximum five digits displayed).

• Software version, error codes, and option settings display.

• Error buffer clearing.

• Option settings.

• Software alignments (Tuner, White Tone, and Audio).

• NVM Editor.

• ComPair Mode switching.

• Set the screen mode to full screen (all contents on screen
are viewable).

How to Activate

To activate SAM, use one of the following methods:

• Press the following key sequence on the remote control
transmitter: “062596" directly followed by the OSD/
STATUS/INFO/i+ button (it depends on region which
button is present on the RC). Do not allow the display to
time out between entries while keying the sequence.

• Or via ComPair.

After entering SAM, the following screen is visible, with SAM in
the upper right corner of the screen to indicate that the
television is in Service Alignment Mode.

LLLL L A AAABCD- X. YY
ERR XX XX XX XX XX
O P X X X X X X X X X X X X X X X X X X

C l e a r > Y e s
O p t i o n s >
T u n e r >
R G B A l i g n >
N V M E d i t o r >
C o m p a i r >
S W E V E N T S >

Figure 5-4 SAM menu

Menu explanation:

1. LLLLL. This represents the run timer. The run timer counts
normal operation hours, but does not count Stand-by
hours.

2. AAAABCD-X.YY. See paragraph “Service Modes” ->
“General” -> “Software Identification, Version, and Cluster”
for the SW name definition.

3. SAM. Indication of the Service Alignment Mode.

4. ERR (ERRor buffer). Shows all errors detected since the
last time the buffer was erased. Five errors possible.

5. OP (Option Bytes). Used to read-out the option bytes. See
“Options” in the Alignments section for a detailed
description. Seven codes are possible.

6. Clear. Erases the contents of the error buffer. Select the
CLEAR menu item and press the MENU RIGHT key. The
content of the error buffer is cleared.

7. Options. Used to set the option bits. See “Options” in the
“Alignments” chapter for a detailed description.

8. Tuner. Used to align the tuner. See “Tuner” in the
“Alignments” chapter for a detailed description.

9. RGB Align. Used to align the White Tone. See “White
Tone” in the “Alignments” chapter for a detailed
description.

10. NVM Editor. Can be used to change the NVM data in the
television set. See also paragraph “Fault Finding and
Repair Tips” further on.

11. ComPaIr. Can be used to switch the television to “In
Application Programming” mode (IAP), for software

SAM

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uploading via ComPair. Read paragraph “Service Tools” ­> “ComPair”. Caution: When this mode is selected without
ComPair connected, the TV will be blocked. Remove the
AC power to reset the TV.

12. SW Events. Only to be used by development to monitor
SW behaviour during stress test.

How to Navigate

• In the SAM menu, select menu items with the MENU UP/
DOWN keys on the remote control transmitter. The
selected item will be indicated. When not all menu items fit
on the screen, use the MENU UP/DOWN keys to display
the next / previous menu items.
W

ith the MENU LEFT/RIGHT keys, it is possible to:

•
– Activate the selected menu item.
– Change the value of the selected menu item.
– Activate the selected sub menu.

• When you press the MENU button twice while in top level
SAM, the set will switch to the normal user menu (with the
SAM mode still active in the background). To return to the
SAM menu press the MENU button.

• Command “OSD/i+” key from the user remote will toggle
the OSD “on/off” with “SAM” OSD remaining always “on”.

• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the MENU button
to switch to SDM (do not allow the display to time out
between entries while keying the sequence).

How to Store SAM Settings

To store the settings changed in SAM mode (except the
OPTIONS settings), leave the top level SAM menu by using the
POWER button on the remote control transmitter or the
television set.

How to Exit

Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or the television set.

Note:

• When the TV is switched “off” by a power interrupt while in
SAM, the TV will show up in "normal operation mode" as
soon as the power is supplied again. The error buffer will
not be cleared.

• In case the set is in Factory mode by accident (with “F”
displayed on screen), by pressing and hold “VOL-“ and
“CH-” together should leave Factory mode.

EN 18 LC7.5E LA5.

Service Modes, Error Codes, and Fault Finding

5.2.4 Customer Service Mode (CSM)

Purpose

The Customer Service Mode shows error codes and
information on the TV’s operation settings. A call centre can
instruct the customer (by telephone) to enter CSM in order to
identify the status of the set. This helps them to diagnose
problems and failures in the TV before making a service call.
The CSM is a read-only mode; therefore, modifications are not
possible in this mode.

Specifications

• Ignore “Service unfriendly modes”.

• Line number for every line (to make CSM language
independent).

• Set the screen mode to full screen (all contents on screen
are viewable).

• After leaving the Customer Service Mode, the original
settings are restored.

• Possibility to use “CH+” or “CH-” for channel surfing, or
enter the specific channel number on the RC.

How to Activate

To activate CSM, press the following key sequence on the
remote control transmitter: “123654” (do not allow the display
to time out between entries while keying the sequence).

Upon entering the Customer Service Mode, the following
screen will appear:

1 M O D E L : 3 2 P F L 7 7 6 2 D / 0
2 P R O D S / N : AG1A0712123456
3 S W I D : L C 7 5 E L 1 - 1 . x x
4 O P : X X X X X X X X X X X X X X X X X X X X X
5 C O D E S : X X X X X X X X X X
6 S S B : 3 1 39 127 12341
7 N V M : X X X X X X X X
8 F l a s h D a t a : X X . X X . X X . X X
9 D I S P L A Y : xxxx xxx xxxxx

P A G E D O W N

B
y

5

CS M

H_17370_035a.eps

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Menu Explanation

1. MODEL. Type number, e.g. 32PFL7762D/05. (*)

2. PROD S/N. Product serial no., e.g. AG1A0712123456. (*)

3. SW ID. Software cluster and version is displayed.

4. OP. Option code information.

5. CODES. Error buffer contents.

6. SSB. Indication of the SSB factory ID (= 12nc). (*)

7. NVM. The NVM software version no.

8. Flash Data. PQ (picture quality) and AQ (audio quality)
data version. This is a sub set of the main SW.

9. DISPLAY. Indication of the display ID (=12 nc).

10. TUNER. Indicates the tuner signal condition: “Weak” when
signal falls below threshold value, “Medium” when signal is
at mid-range, and “Strong” when signal falls above
threshold value.

11. SYSTEM. Gives information about the video system of the
selected transmitter (PAL/SECAM/NTSC).

12. SOUND. Gives information about the audio system of the
selected transmitter (MONO/STEREO/NICAM).

13. n.a.

14. HDAU. HDMI audio stream detection. “YES” means audio
stream detected. “NO” means no audio stream present.
Only displayed when HDMI source is selected.

15. FORMAT. Gives information about the video format of the
selected transmitter (480i/480p/720p/1080i).

16. L.T. (LIFE TIMER). Operating hours indication.

17. FPGA FW. Only applicable to sets with an FPGA.

18. Reserved.

(*) If an NVM IC is replaced or initialised, the Model Number,
Serial Number, and SSB Code Number must be re-written to
the NVM. ComPair will foresee in a possibility to do this.

How to Exit

x

it CSM, use one of the following methods:

To e

• Press the MENU button twice, or POWER button on the
remote control transmitter.

• Press the POWER button on the television set.

Figure 5-5 CSM menu -1- (example)

1 0 T U N E R : W E A K / G O O D / S T R O N G
1 1 S Y S T E M : P A L / N T S C / S E C A M
1 2 S O U N D : M O N O / S T E R E O / N I C A M
1 3
1 4 H D A U : Y E S / N O
1 5 F O R M A T : X X X X X X X X
1 6 L. T. : xxxxxx
1 7 F P G A F W : xx.xx.xx
1 8 :
P A G E U P :

B
y

Figure 5-6 CSM menu -2- (example)

CS M

H_17370_035b.eps

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Service Modes, Error Codes, and Fault Finding

5.2.5 Digital Customer Service Mode (DCSM)

Purpose

The Digital Customer Service Mode shows error codes and
information on the IBO Zapper module (DVB reception part)
operation settings. The call centre can instruct the customer to
activate DCSM by telephone and read off the information
displayed. This helps the call centre to diagnose problems and
failures in the IBO Zapper module before making a service
call.The DCSM is a read-only mode; therefore, modifications
are not possible in this mode.

How to Activate

To activate the DCSM, put the television in its digital mode (via
the “A/D” button on the remote control).

1. Press the “Digital Menu” button on the remote control to
activate the digital user menu (called “Setup”).

2. Activate the “Information” sub menu (via the “down” and
“right” cursor buttons).

3. In the “Information” sub menu, press the following key
sequence on the remote control to activate the DCSM:
“GREEN RED YELLOW 9 7 5 9” (do not allow the display
to time out between entries while keying this sequence).
Then, the “Service menu” will appear (see figures below).

Alternative method to activate DCSM: press key sequence
“123654” on the remote control transmitter while in digital mode
(do not allow the display to time out between entries while
keying the sequence). Then, the “Service menu” will appear
(see figures below).

Menu explanation

Figure 5-7 DCSM menu - 1

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EN 19LC7.5E LA 5.

E_14970_042.eps

090904

Figure 5-9 DCSM menu - 3

1. Hardware version: This indicates the version of the IBO
Zapper module hardware.

2. Application SW: The application software version.

3. NOR Version: The NOR Flash image software version

4. Digital Frequency: The digital frequency that the set is
tuned to.

5. Bit Error Rate: The error rate measured before the error
correction algorithm circuitry. (this value gives an
impression of the received signal)

6. Tuner AGC: Tuner AGC value.

7. COFDM Lock: Indication if COFDM decoder is locked.

8. AFD Status: Status of the Active Picture Format
Descriptor.

9. Terrestrial Delivery System Parameters:
– Bandwidth: Bandwidth of the received signal.
– Constellation Pattern: Displays the signal

constellation.
– Alpha Value: Displays the Alpha Value.
– FEC Scheme: Displays the Forward Error Correcting

Scheme
– Guard Interval: Displays the value for the Guard

Interval.
– Transmission Mode: Displays the Transmission

Mode.

10. Audio Comp Type: Type of detected audio stream.

11. MHEG Present: Indicates if MHEG is present or not.

12. CIM Card

How to exit

Press the BLUE button on the Remote Control to exit DCSM.

P

resent: Indicates if CIM card is present or not.

Figure 5-8 DCSM menu - 2

E_14970_041.eps

100904

EN 20 LC7.5E LA5.

Service Modes, Error Codes, and Fault Finding

5.3 Service Tools

5.3.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:

1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. You do not
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box
and the TV communicate via a bi-directional cable via the
service connector(s).

How to Connect

This is described in the ComPair chassis fault finding database.

TO TV

TO
I2C SERVICE
CONNECTOR

TO

UART SERVICE

CONNECTOR

TO

UART SERVICE

CONNECTOR

• ComPair UART interface cable: 3138 188 75051 (to be
used with chassis LC7.5).

Note: If you encounter any problems, contact your local
support desk.

5.3.2 LVDS Tool

Support of the LVDS Tool has been discontinued.

ComPair II

RC in

Optional

Switch

Power ModeLink/

Activity

HDMI

2

I

C only

RC out

Multi

function

2

I

C

PC

ComPair II Developed by Philips Brugge

Optional power

5V DC

RS232 /UART

G_06532_036.eps

240807

Figure 5-10 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• ComPair32 CD (update): 3122 785 60160.

•ComPair I
with chassis L01, A02, A10, EMX, ...).

•ComPair I

2

C interface cable: 3122 785 90004 (to be used

2

C interface extension cable: 3139 131 03791 (to
be used with chassis L01, A02, A10, L04, LC4, LC7.1,
LC7.2).

• ComPair UART interface cable: 3122 785 90630 (to be
used with chassis LC4, EJ3, BJ2, BL2, BP2, ...).

• ComPair RS232 cable: 3104 311 12742 (to be used with
chassis Q52x).

•ComPair I
with chassis TPM1.xA).

•ComPair I

2

C adapter cable: 3122 785 90004 (to be used

2

C interface cable: 9965 100 07325 (to be used

with chassis LC7.5).

Service Modes, Error Codes, and Fault Finding

EN 21LC7.5E LA 5.

5.4 Error Codes

5.4.1 Introduction

Error codes are required to indicate failures in the TV set. In
principle a unique error code is available for every:

• Activated protection.

• Failing I2C device.

• General I2C error.

• SDRAM failure.

The last five errors, stored in the NVM, are shown in the
Service menu’s. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code may never lead to a
deadlock situation. This means that it must always be
diagnosable (e.g. error buffer via OSD or blinking LED
procedure, ComPair to read from the NVM).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.

Example: In case of a failure of the I2C bus (CAUSE), the error
code for a “General I2C failure” and “Protection errors” is
displayed. The error codes for the single devices (EFFECT) is
not displayed. All error codes are stored in the same error
buffer (TV’s NVM) except when the NVM itself is defective.

5.4.2 How to Read the Error Buffer

You can read the error buffer in 3 ways:

• On screen via the SAM/SDM/CSM (if you have a picture).
Example:
– ERROR: 0 0 0 0 0 : No errors detected
– ERROR: 6 0 0 0 0 : Error code 6 is the last and only

detected error

– ERROR: 9 6 0 0 0 : Error code 6 was detected first and

error code 9 is the last detected (newest) error

• Via the blinking LED procedure (when you have no
picture). See “The Blinking LED Procedure”.

•Via ComPair.

5.4.3 Error Codes

In case of non-intermittent faults, write down the errors present
in the error buffer and clear the error buffer before you begin
the repair. This ensures that old error codes are no longer
present.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
and not the actual cause of the problem (for example, a fault in
the protection detection circuitry can also lead to a protection).

Table 5-2 Error code overview

Error

1)

code

0No error.
1 DC Protection of speakers.
2 +12V protection error. 12V missing or "low".
3 Reserved.
4 General I2C error. note 2
5 Trident Video Processor

6 I2C error while communicating

7 I2C error while communicating

8 I2C error while communicating

9 I2C error communicating with

10 SDRAM defective. 7D01
11 I2C error while communicating

12 I2C error while communicating

13 DVB HW communication

14 SDRAM defective. 7D02
15 I2C error while communicating

16 I2C error while communicating

17 I2C error while communicating

18 Reserved. (iTV)
19 Reserved. (1080p bolt-on module)
20 I2C error while communicating

21 I2C error while communicating

22 I2C error while communicating

23 Reserved.

Description Item nr. Remarks

communication error.

with the NVM.

with the Tuner.

with the IF Demodulator.

the Sound Processor.

with the HDMI IC.

with the MOJO PNX8314.

error.

with the IBO COFDM channel
decoder.

with the IBO NVM.

with FPGA

with the IBO PCMCIA
controller.

with the HDMI mux IC

with the HDMI buffer in Side A/
V Panel

7C01 When Trident IC is

defective, error 10 and 14
might also be reported.
Trident communicates via
parallel bus, not via the I2C
bus. The I2C bus of Trident
is only used in ComPair
mode.

7L23 The TV will not start-up due

to critical data not available
from the NVM, but the LED
will blink the error code.

1101

7113

7411

7N01

7H03 if applicable

7F01,

if applicable
7K00,
7H03

7F01

7H03

7700 or
external

7K00

7M07

Notes

1. Some of the error codes reported are depending on the
option code configurations.

2. This error means: no I2C device is responding to the
particular I2C bus. Possible causes: SCL/SDA shorted to
GND, SCL shorted to SDA, or SCL/SDA open (at uP pin).
The internal bus of the Trident platform should not cause
the entire system to halt as such an error can be reported.

5.4.4 How to Clear the Error Buffer

The error code buffer is cleared in the following cases:

• By using the CLEAR command in the SAM menu:
– To enter SAM, press the following key sequence on the

remote control transmitter: “062596” directly followed
by the OSD/i+ button (do not allow the display to time
out between entries while keying the sequence).

– Make sure the menu item CLEAR is selected. Use the

MENU UP/DOWN buttons, if necessary.

– Press the MENU RIGHT button to clear the error

buffer. The text on the right side of the “CLEAR” line will
change from “CLEAR?” to “CLEARED”

• If the contents of the error buffer have not changed for 50
hours, the error buffer resets automatically.

EN 22 LC7.5E LA5.

Service Modes, Error Codes, and Fault Finding

Note: If you exit SAM by disconnecting the mains from the
television set, the error buffer is not reset.

5.5 The Blinking LED Procedure

5.5.1 Introduction

The software is capable of identifying different kinds of errors.
Because it is possible that more than one error can occur over
time, an error buffer is available, which is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.

Errors can also be displayed by the blinking LED procedure.
The method is to repeatedly let the front LED pulse with as
many pulses as the error code number, followed by a period of

1.5 seconds in which the LED is “off”. Then this sequence is
repeated.

Example (1): error code 4 will result in four times the sequence
LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After
this sequence, the LED will be “off” for 1.5 seconds. Any RC5
command terminates the sequence. Error code LED blinking is
in red colour.

Example (2): the content of the error buffer is “12 9 6 0 0”
After entering SDM, the following occurs:

• 1 long blink of 5 seconds to start the sequence,

• 12 short blinks followed by a pause of 1.5 seconds,

• 9 short blinks followed by a pause of 1.5 seconds,

• 6 short blinks followed by a pause of 1.5 seconds,

• 1 long blink of 1.5 seconds to finish the sequence,

• The sequence starts again with 12 short blinks.

5.5.2 Displaying the Entire Error Buffer

5.6 Software Upgrading

In this chassis, three SW “stacks” are used:

• TV mains SW (processor and processor NVM).

• Digital TV SW (IBO Zapper).

5.6.1 TV Main SW Upgrade

For instructions on how to upgrade the TV Main software, refer
to ComPair.

5.6.2 “Digital TV” Software Upgrade

How to Upgrade Philips “Digital TV” Software (IBO Zapper):

Preparation of the Memory Device for Software Upgrade

For the procedure you will require:

1. A personal computer with web browsing capability.

2. An archive utility that supports the ZIP-format (e.g. Winzip
for Windows).

3. A CompactFlash PC Card Adapter (Type II).

4. A CompactFlash (Type I) portable memory card for
insertion into the PC Card Adapter. Philips recommends
using Compact Flash (CF) portable memory cards with
their respective PC Card Adapters (Sandisk or Kingston)
with memory sizes of up to 256MB. Philips does not
guarantee that other types of portable memory cards and
their respective PC Card Adapters, including multi-card PC
Card Adapters work on Philips Digital TV.
Note: Only FAT16-formatted portable memory is
supported. NTFS & FAT32 are not supported.

Copying of Software Image Files to the Flash Device

Copy the appropriate “FCL.img” and “IBOZ.img” to the root
directory of the flash device.

Additionally, the entire error buffer is displayed when Service
Mode “SDM” is entered. In case the TV set is in protection or
Stand-by: The blinking LED procedure sequence (as in SDM­mode in normal operation) must be triggered by the following
RC sequence: “MUTE” “062500” “OK”.
In order to avoid confusion with RC5 signal reception blinking,
this blinking procedure is terminated when a RC5 command is
received.

To erase the error buffer, the RC command “MUTE” “062599
“OK” can be used.

Verifying the Current Version of the TV Software

Before you start the software upgrade procedure, it is advised
to check what the current TV software is. The current TV
software version can be seen in the “System software” menu.

1. First press the “A/D” key and then the “DIGITAL MENU”
key on the remote controller to access the “Setup” menu.

2. Access the “Information” menu.

3. Access the “Current software version” menu.

Example:

The menu shows “IdtvZapper_HW260.256_SW2.0.24”. This
means that the hardware version is “260.256” and the software
version is “2.0.24”.

Figure 5-11 Current software version

G_16221_001.eps

241006

Service Modes, Error Codes, and Fault Finding

Software Upgrade Procedure

1. Power ON your TV with the power switch at the side of the
TV. Put your TV ON by using the remote controller if the TV
is in Stand-by.

2. Make sure that it is in “Digital” mode (via “A/D” button).

3. Make sure that your TV is not in Stand-by. Power OFF your
TV with the power switch of the TV.

4. Remove the Conditional Access Module (if any) from the
CI-slot.

5. Insert the PC Card Adapter with the portable memory card
containing the software upgrade files.

6. Switch ON your TV with the power switch at the side of the
TV.

7. At start-up, the TV will scan the CI slot until it finds the
update content. The TV will automatically go to the
upgrade mode. After a few seconds it will display the status
of the upgrade procedure.

Warnings:

Do NOT remove the memory card or the PC card adapter
during the software upgrade procedure.
In case of a power drop during the upgrade procedure, don’t
remove the portable memory from the TV. The TV will continue
the upgrade as soon as the power comes back.

Example: At start-up of the TV, the current software is erased.

EN 23LC7.5E LA 5.

G_16221_005.eps

241006

Figure 5-15 Upgrade ready

When the software upgrade has been successful, switch OFF
the TV, remove the PC Card Adapter, and restart the TV with
the Power switch at the side of the TV.
The TV will now start up with the new software.

Verifying that the Software Has Been Upgraded Successfully

Verify that the software is upgraded to the new version by
following the procedure outlined in the section “Verifying the
current version of the TV software”.

G_16221_002.eps

241006

Figure 5-12 Erasure of the software

If the erasure is successful, the programming will start.

G_16221_003.eps

241006

Figure 5-13 Programming of the software

Example: The programming is completed when the progress

bar reaches the 100% mark.

G_16221_004.eps

241006

Figure 5-14 Programming complete

The TV will reset and the screen will go blank, after a few
seconds a dialogue box will occur to inform you that the current
module inserted in the CI slot is not recognized. This is normal
as the slot only recognizes a Conditional Access Module during
normal operation.

Example: The following dialogue box will appear after the TV is
upgraded successfully:

EN 24 LC7.5E LA5.

Service Modes, Error Codes, and Fault Finding

5.7 Fault Finding and Repair Tips

Notes:

• It is assumed that the components are mounted correctly
with correct values and no bad solder joints.

• Before any fault finding actions, check if the correct options
are set.

5.7.1 NVM Editor

In some cases, it can be convenient if one directly can change
the NVM contents. This can be done with the “NVM Editor” in
SAM mode. With this option, single bytes can be changed.

Caution:

• Do not change the NVM settings without
understanding the function of each setting, because
incorrect NVM settings may seriously hamper the
correct functioning of the TV set!

• Always write down the existing NVM settings, before
changing the settings. This will enable you to return to the
original settings, if the new settings turn out to be incorrect.

Table 5-3 NVM editor overview

Hex Dec Description

.ADR 0x000A 10 Existing value
.VAL 0x0000 0 New value
.Store Store?

5.7.2 Load Default NVM Values

Alternative method (1):

1. Go to SAM.

2. Select NVM Editor.

3. Select ADR (address) to 1 (dec).

4. Change the VAL (value) to 170 (dec).

5. Store the value.

6. Do a hard reset to make sure new default values took
place.

Alternative method (2):

It is also possible to upload the default values to the NVM with
ComPair in case the SW is changed, the NVM is replaced with
a new (empty) one, or when the NVM content is corrupted.
After replacing an EEPROM (or with a defective/no EEPROM),
default settings should be used to enable the set to start-up and
allow the Service Default Mode and Service Alignment Mode to
be accessed.

5.7.3 Start-up/Shut-down Flowcharts

Important note for DVB sets:

• When you put a DVB set into Stand-by mode with an RC,
the set will go to “Semi Stand-by” mode for 5 minutes. This,
to facilitate “Off the Air download” (OAD). If there is no
activity within these 5 minutes, the set will switch to Stand­by mode. In “Semi Stand-by” mode, the LCD backlight and
Audio Amplifier are turned “off” but other circuits still work
as normal. The customer might think the set is in Stand-by.
However, in real Stand-by mode, only the uP and the NVM
are alive and all other circuits are switched “off”.

• If you press the mains switch at the local key board in a
DVB set, the set will switch to Stand-by mode.

It is possible to download default values automatically into the
NVM in case a blank NVM is placed or when the NVM first 20
address contents are "FF". After the default values are
downloaded, it is possible to start-up and to start aligning the
TV set. To initiate a forced default download the following
action has to be performed:

1. Switch “off” the TV set with the mains cord disconnected
from the wall outlet (it does not matter if this is from "Stand­by" or "Off" situation).

2. Short-circuit the SDM jumpers on the SSB (keep short
circuited).

3. Press “P+” or “CH+” on the local keyboard (and keep it
pressed).

4. Reconnect the mains supply to the wall outlet.

5. Release the “P+” or “CH+” when the set is “on” or blue LED
is blinking.

When the downloading has completed successfully, the set
should be into Stand-by, i.e. red LED on.

On the next pages you will find start-up and shut-down
flowcharts, which might be helpful during fault finding.
Please note that some events are only related to PDP sets,
and therefore not applicable to this LCD chassis.

Service Modes, Error Codes, and Fault Finding

EN 25LC7.5E LA 5.

LC07S

Start Up

No

Disable Audio Mute

Standby Soft Mode

(NO LED)

Port Assignment in STANDBY

Wait for Power Local Key

Notes:

---------

1. LC07S TV software only start communication with IBOZ once
receive the INT message from IBOZ.

2.InitialiseHDMI MUX & Buffer IIC address( EDID,CEC)

3.RESET_n is to reset IBOZ

4. Enable Mute mean ANTI_PLOP= LOW, MUTEn=HIGH

5. Disable Mute mean ANTI_PLOP = HIGH, MUTEn=LOW

Standby Normal

Error2

[Protection]

V1.5

13 June 2007

Mode

Standby Normal Mode

(RED LED)

Disable Audio Mute

Port Assignment in STANDBY

Wait for RC key or

Wake up event

*100msfor12Vrising

Wait for 100ms

Time out = 2000ms

* 50ms for 1V2 DC-DC wait

* 50ms for Trident requirement

Wait for IBO Config

MAX 500 ms

Wait for IBO System Ready

MAX 5000 ms

Error 6 - NVM

[Protection]

No

Yes

AC ON

+5VSTBY&+3V3STBYAvailable

150ms

50ms

100ms

100ms

300ms

500ms

Error 7

Error 8

M16C POR by +3VSTBY

STANDBYn = LOW

InitCold Component:

1. Check SDM port.

- If SDM pin = LOW and NVM first 20Byte = 0xFF,
reload Software default NVM value.

2. Check Panel port.

- If Panel Pin = LOW and check slave address
0x65 = 0xA5, Enter Panel Mode.

Last status is ON?

Yes

Read NVM completed.

STOP I²C activities.

LED = BLUE for Normal mode

LED = RED for Recording mode

BLOCK RC Key

Yes

M16C RST_H = LOW

HDMI_RST_RX_BUF=LOW

RST_AUD = LOW
RESET_n = LOW

LCD_PWR_ON = LOW

SDI PDP => CTRL_DISP1 = LOW

Enable Audio Mute ( 50ms)

STANDBYn = HIGH

(Same function as CTRL-DISP3)

Wait for 100ms

Is Power Down =

No

(SVP_Trident) M16C RST_H to LOW

KMNPLL Latch data need 50us setup time

BL_ADJ = HIGH (100% Duty Cycle) first!!

HIGH?

Yes

Wait for 100ms

M16C RST_H = HIGH

Wait for 300ms

HDMI_RST_RX_BUF= HIGH

RST_AUD = HIGH

(IBO) RESET_n = HIGH

Enable Power Down INT

Enable DC_PROT INT

Initialise Trident WX

DPTVInit( )

Initialise Tuner

InitialiseIF Demodulator,Afric

TDA9886T

HDMI_MUX_RST

Reset (LOW =150ms) then go to HIGH

User wake up the sets

in DVB recording mode

LCD_PWR_ON= HIGH

(Same function as CTRL-DISP2)

SDI PDP => CTRL_DISP1 = LOW

20ms

2000ms to

2500ms

* BL_ADJ keep 100% for 1000ms

then reduce gradually to 70% from
1001ms to 3000ms .After 3000ms

do the dimming according to

No

Wait for 20 ms

Switch ON LVDS Signal

Init. Warm Component

(For software)

For LCD:

BL_ON_OFF = HIGH

picture content.

Blank Picture

Picture Mode Setup & Detection

unBlank Picture &

UnMute Audio

End

For PDP:

3000ms delay

For DVB Sets only (Semistandby)
Recording mode

SDI PDP => CTRL_DISP1 = HIGH
FHP PDP => CTRL_DISP4 = LOW

Recording Mode finished

SoftwareShutdown:

WP for NVM

Port Assignment in STANDBY

STANDBYn = LOW

Standby

Normal Mode

Yes

Error 9

Error 11

Error 21

Error 22

Error 3

[Protection]

Initialise Micronas

Mute Audio

Initialise HDMI Receiver, Sil 9125

Initialise HDMI Mux, Sil 9185

Initialise HDMI Buffer, Sil 9181

AmbiLight Set

InitialiseAmbiLight

Initialise FHP Panel (Provision)

*ForFHPPDPSetsonly

Initialise Bolt-ON

(100Hz, iTV, USB) TBC

Enable RC Key

DVB recording mode

Figure 5-16 Start-up flowchart

Error5 -Trident

[Protection]

Error 10 – SDRAM 7204

[Protection]

Error 14 – SDRAM 7205

[Protection]

Error 17 – AmbiLight

Error18 – iTV iFace

Error 19 – 1080P

H_17370_056.eps

090807

EN 26 LC7.5E LA5.

Service Modes, Error Codes, and Fault Finding

SEMISTANDBY/ STANDBY

300ms

20ms

Start

Mute Audio

BL_ADJ

(PWM duty cycle 70%)

BL_ON_OFF= LOW

Wait300ms

Switch OFF LVDS

Wait 20ms

LCD_PWR_ON = LOW

(ANTI_PLOP=LOW)

(MUTEn = H IGH)

LED = RED No

For DVB Sets only (Semistandby)

Wait for 3000ms

Exceptpower tact switch

SDI PDP => CTRL_DISP 1 = HIGH
FHP PDP => CTRL_DISP4 = LOW

Off Air Downloading/ Recording Mode

IBOZ send shut down command

40ms

Total = 360ms

SoftwareShutdown:

Standby using

“power key”

Yes

LED = NO LED

for Standby soft mode

Disable Power Down INT &

DC_PROT_INT

BL_ADJ = LOW

(PWM duty cycle 0%)

WP for NVM

EnableAudio Mute

Port Assignment in STANDBY

STANDBYn = LOW

(ANTI_PLOP =HIGH)

(Mute_n = LOW)

Sets go to standby here

Blocking for the next start up to ensure
power supply discard properly.

Waitfor 3000ms

Disable Audio Mute

End

Figure 5-17 Semi Stand-by/Stand-by flowchart

(ANTI_PLOP =HIGH)

(Mute_n = LOW)

H_17370_057.eps

090807

Service Modes, Error Codes, and Fault Finding

EN 27LC7.5E LA 5.

Power Down INT:

AC OFF or Transient INT

Avoid false trigger

No

End

Notes:

1. Power Down INT will based on fall edge triggering

2. +3V3STBY will stay for 15ms, software must perform WP for NVM within 15ms.

Start

Poll the Power Down

INT for 5 times

Yes

Mute Audio & VIdeo

WP forNVM

STANDBYn = LOW

Wait 5000 ms

Re-start: Start up

End

DC_PROT INT

Avoid false trigger

No

End

Error1

[Protection]

Figure 5-18 Power Down & DC_PROT flowchart

Start

is DC_PROT = LOW

for 3 sec?

Yes

Mute Audio & VIdeo

Log Error Code

WP for NVM

STANDBYn = LOW

End

H_17370_058.eps

090807

EN 28 LC7.5E LA5.

Personal Notes:

Service Modes, Error Codes, and Fault Finding

E_06532_012.eps

131004

Block Diagrams, Test Point Overviews, and Waveforms

6. Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 32” LCD (ME7)

29LC7.5E LA 6.

CN2
DISPLAY SUPPLY

1. +24VI

2. +24VI

3. +24VI

4. +24VI

5. +24VI

6. GND3

7. GND3

8. GND3

9. GND3

10. GND3

11. VBRI

12. ON/OFF

13. PWM

14. GND1

CN3
DISPLAY SUPPLY

1. +24VI

2. +24VI

3. +24VI

4. +24VI

5. +24VI

6. GND3

7. GND3

8. GND3

9. GND3

10. GND3

11. N.C.

12. N.C.

WIRING 32” LCD

14P

CN2

INVERTER

(STYLING ME7)

14P

12P

8319

MAIN SUPPLY

(1005)

CN2

CN3

4P

CN4

ONLY USED

FOR LPL PANEL

4P

CN5

CN6

CN7

9P

LCD DISPLAY

(1004)

LVDS

30P

TO SUBWOOFER

IN BACK COVER

41P

1R01

(5226)

3P

1A02

7P

1L20

11P

1304

3P

1A03

4P

1A01

8304

12P

CN3

8B12

8R01

8P

8B13

8316

B

8P

SSB

(1150)

1B126P1B13

10P

1305

8305

5P

1201

INVERTER

CN6
CONTROL:

1. -12V(audio)

2. +12V(audio)

3. GND2(audio)

4. 5.2VS

5. 5.2VS

6. 5.2VS

7. GND1

8. GND1

9. GND1

CN7
CONTROL:

1. BL-ADJUST

2. PG

3. BL_ON_OFF

4. GND1

5. BOOST

6. PSON

7. N.C.

8. +12V

RIGHT SPEAKER

(5215) (5213)

CN1

2P3

INLET

21P

TUNER

1N01

8R04

D

11P

SIDE I/O

(1116)

1R04

KEYBOARD CONTROL

(1114)

E

8308

8N01

8191

8192(UK)

LEFT SPEAKER

10P

1Q02

21P

1Q03

8M20

(5215)(5213)

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

3P

1M01

8M01

3P

1M01

H_17371_001.eps

171007

Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 32” LCD with AmbiLight (ME7)

WIRING 32” LCD + AMBI LIGHT

CN2
DISPLAY SUPPLY

1. +24VI

2. +24VI

3. +24VI

4. +24VI

5. +24VI

6. GND3

7. GND3

8. GND3

9. GND3

10. GND3

11. VBRI

12. ON/OFF

13. PWM

14. GND1

CN3
DISPLAY SUPPLY

1. +24VI

2. +24VI

3. +24VI

4. +24VI

5. +24VI

6. GND3

7. GND3

8. GND3

9. GND3

10. GND3

11. N.C.

12. N.C.

CN6
CONTROL:

1. -12V(audio)

2. +12V(audio)

3. GND2(audio)

4. 5.2VS

5. 5.2VS

6. 5.2VS

7. GND1

8. GND1

9. GND1

4P7

1M09

5P

1M59

7P

1M82

8319

14P

CN2

INVERTER

(IN BACK COVER)

AMBI-LIGHT UNIT

(STYLING ME7)

8M09 8M09

8116

4P

4P

CN5

CN4

9P

CN6

14P

CN2

8P

CN7

12P

CN3

MAIN SUPPLY

(1005)

ONLY USED

FOR LPL PANEL

2P3

CN1

8B12

8B13

8316

30LC7.5E LA 6.

LCD DISPLAY

1B126P1B13

B

8P

SSB

(1150)

(1004)

LVDS

30P

10P

1305

5P

1201

TUNER

8R01

8305

41P

1R01

TO SUBWOOFER

IN BACK COVER

(5226)

7P

3P

1L20

1A02

8M59

11P

1304

3P

1A03

4P

1A01

1N01

8304

21P

8M82

8R04

12P

CN3

INVERTER

SIDE I/O

D

(1116)

11P

1R04

(IN BACK COVER)

AMBI-LIGHT UNIT

4P7

1M82

5P

1M59

4P

1M09

(1114)

KEYBOARD CONTROL

E

CN7
CONTROL:

1. BL-ADJUST

2. PG

3. BL_ON_OFF

4. GND1

5. BOOST

6. PSON

7. N.C.

8. +12V

RIGHT SPEAKER

(5215) (5213)

INLET

8308

8N01

8191

8192(UK)

LEFT SPEAKER

10P

1Q02

21P

1Q03

8M20

(5215)(5213)

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

H_17371_002.eps

3P

1M01

8M01

3P

1M01

171007

Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 42” LCD (ME7)

WIRING 42” LCD

(STYLING ME7)

8319

8316

8B13

LCD DISPLAY

(1004)

8B12

LVD S

51P

31LC7.5E LA 6.

8R03

12P

X403

TO SUBWOOFER

IN BACK COVER

(5226)

4P

X405

4P

X411

9P

X412

8P

X406

14P

X404

MAIN SUPPLY

(1005)

10P

5P

1201

8305

41P

1R01

3P

1A02

7P

1L20

11P

1304

3P

1A03

4P

1A01

1N01

21P

8304

D

SIDE I/O

(1116)

12P

CN3

14P

CN2

6P

8P

1B13

1305

B

1B12

SSB

(1150)

INVERTER INVERTER

2P3

X101

RIGHT SPEAKER

(5215)

(5213)

INLET

8308

8191

8192(UK)

8N01

8R04

(5213)

LEFT SPEAKER

(5215)

11P

10P

21P

1R04

1Q02

1Q03

8M20

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

1M01

H_17371_003.eps

(1114)

KEYBOARD CONTROL

E

3P

1M01

8M01

3P

021007

Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 42” LCD with AmbiLight (ME7)

WIRING 42” LCD + AMBI LIGHT

(STYLING ME7)

32LC7.5E LA 6.

4P

1M09

5P

1M59

4P7

1M82

INVERTER

CN2

14P

8M09

8319

8M09

8316

8321

9P

4P

X412

X405

4P

X411

MAIN SUPPLY

(1005)

8P

X406

8B13

14P

X404

8M82

12P

X403

LCD DISPLAY

(1004)

8B12

6P

1B12

LVD S

51P

1B13

8M59

(IN BACK COVER)

8R03

TO SUBWOOFER

IN BACK COVER

(5226)

8305

10P

1305

5P

1201

41P

1R01

3P

1A02

7P

1L20

11P

1304

3P

1A03

8P

4P

1A01

8304

12P

CN3

AMBI-LIGHT UNIT

(1175)

4P7

1M82

5P

1M59

(IN BACK COVER)

AMBI-LIGHT UNIT

(1175)

RIGHT SPEAKER

(5215)

(5213)

X101

4P

SSB

B

(1150)

21P

1N01

2P3

INLET

8308

8191

8192(UK)

8N01

8R04

(5213)

LEFT SPEAKER

D

(5215)

SIDE I/O

(1116)

11P

1R04

10P

1Q02

21P

1Q03

INVERTER

8M20

1M20

J

1M09

3P

7P

1M01

IR/LED/LIGHT
SENSOR

(1112)

8M01

KEYBOARD CONTROL

3P

(1114)

E

1M01

H_17371_004.eps

181007

Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 52” LCD (ME7)

WIRING 52” LCD

(STYLING ME7)

33LC7.5E LA 6.

CN2
DISPLAY SUPPLY

1. +24Vinv

2. +24Vinv

3. +24Vinv

4. +24Vinv

5. +24Vinv

6. GND3

7. GND3

8. GND3

9. GND3

10. GND3

11. Vbri

12. ON/OFF

13. PWM

14. GND1

CN3
DISPLAY SUPPLY

1. +24Vinv

2. +24Vinv

3. +24Vinv

4. +24Vinv

5. +24Vinv

6. GND3

7. GND3

8. GND3

9. GND3

10. GND3

11. N.C.

12. N.C.

14P

CN2

8219

8316

14P

CN2

CN6
CONTROL:

1. -12V(Audio)

2. +12V(Audio)

3. GND2(Audio)

4. 5V2stby

5. 5V2stby

6. 5V2stby

7. GND1

8. GND1

9. GND1

12P
CN3

MAIN SUPPLY

(1005)

9P

CN6

CN7
CONTROL:

1. BL-ADJUST

2. Power OK

3. BL_ON_OFF

4. GND1

5. Boost

6. STANDBY

7. N.C.

8. 12Vssb

8B12

8P

CN7

LCD DISPLAY

(1004)

8B13

LVD S

51P

8R01

8305

TO SUBWOOFER
ON BACK COVER

(5226)

8304

12P

CN3

10P

6P

8P

1B12

INVERTER INVERTER

2P3

CN1

8308

INLET

RIGHT SPEAKER

(5215) (5213) (5215)(5213)

1B13

SSB

B

(1150)

8191

8192(UK)

1305

5P

1201

41P

1R01

3P

1A02

7P

1L20

11P

1304

3P

1A03

4P

1A01

1N01

21P

8N01

8R04

LEFT SPEAKER

D

11P

10P

21P

SIDE I/O

(1116)

1R04

1Q02

1Q03

8M20

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

3P

1M01

8M01

KEYBOARD CONTROL

3P

(1114)

E

1M01

H_17371_005.eps

021007

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Video

VIDEO

B02

TUNER IF & DEMODULATOR

1101
TD1316AF/IHP-2

MAIN

TUNER

(HYBRID)

10

11

VIP_IBO

VIM_IBO

IF_OUT1

9

IF_AGC_IBO

RF_AGC

34LC7.5E LA 6.

7113
TDA9886T/V4

8

2

7111

12

14

13

11

IF_ATV

RF_AGC_IBO

RF_AGC

DVB_SW

B03A

B04

1102

1

1103

1

7114

EF

VIF1

5

VIF2

4

SIF1

5

SIF2

4

VIF1

1

2

VIF2

SIF1

23

SIF2

24

TAGC

14

SIF AGC

TUNER AGC

+5VS

SUPPLY

VIF-PLL

SINGLE REFERENCE QSS MIXER

VIF AGC

DEMODULATOR

SOUND TRAPS

4.5 to 6.5 Mhz

INTERCARRIER MIXER AND

AM-DEMODULATOR

I2C-BUS TRANSCEIVER

SCL

MAD

CVBS

17

SDA

B03A

DVB-DEMODULATOR

7F01
TDA10046AHT

COMP_OUT

CONDITIONAL

BO7D

HDMI SWITCH

1M01

1

3

4

1

6
7

9

10

18 2

19

12
19

1M02

1

3

4

1

6
7
9

10

18 2

19

12
19

1M03

1

3

4

1

6
7
9

10

18 2

19

12
19

HDMI

CONNECTOR

COFDM
CHANNEL
DECODER

ADC

7F04

PCMCIA

ACCESS

HPD_RESET_A

HPD_RESET_B

HPD_RESET_C

62
61
2

MPEG-TS

35

(PARALLEL)

121

RF_AGC_IBO

RX2+A

RX2-A

RX1+A

RX1-A

RX0+A

RX0-A

RXC+A

RXC-A

OPTIONAL

RX2+B

RX2-B

RX1+B

RX1-B

RX0+B

RX0-B

RXC+B

RXC-B

RX2+C

RX2-C

RX1+C

RX1-C

RX0+C

RX0-C
RXC+C
RXC-C

TDA_DAT(0-7)

TDA_SYNC

1K00

68P

B03B

DVB-COMMON INTERFACE

7K00
STV0700L

49

B02

A_MDO(0-7)

A_MDI(0-7)

7M07
SII9185ACTU

28

+

R0X2

27

-

25

+

R0X1

24

-

22

+

R0X0

21

-

19

+

R0XC

18

-

16

HDMI

SWITCH

48

+

R1X2

47

-

45
44
42
42

39
38
36

68
67
65
64
62
61
59
58

56

ADC

+

R1X1

­+

R1X0

­+

-

+

­+

­+

­+

-

R1XC

R2X2

R2X1

R2X0

R2XC

HSYNC
VSYNC

PCMCIA

CONTROLLER

TS

INTERFACE

D2

D1

ODCK

DE

CONNECT

10

+

TXC

11

­7

+

TX0

8

­4

+

TX1

5

­1

+

TX2

2

-

62

SIDE I/O

VIDEO

SIDE HDMI

1Q01

1

18 2

19

HDMI

OR

1

3

4
6
7

9
10
12

19

B03C

TS_DATA(0-7)

TS_SYNC

B07B

B07A

1302

RX2+S

RX2-S

RX1+S

RX1-S

RX0+S

RX0-S

RXC+S

RXC-S

DVB-MOJO

7G00
PNX8314HS/C102

(TS)(AV)

30

IO - SCART 1 & 2

1504

19

15
11

7

1

20

16

8

EXT1

1506

19

21

EXT2

1615

Pr

Y

1601

Pb

1601

1

5

2

FRONT_CVBS_IN

7Q03
SII9181CNU

HDMI

35

BUFFER

34
33
32
30

29
28
27
25

20

15

8

4

2x SCART

YPBPR & SVHS

S VIDEO

3

MOJO

3528

3516

3528

3522

3552

3617

3619

8

9
6
7

3

4
1
2

ADC

1R04

1Q03

18
20
15
17
12
14

11

Y_IN
C_IN

2
4

9

C
B
G

R

3535

3523

3545

3518

3529

3550

3618

B07C

172
163
165

167

B04

1304

1N01

2
4

18
20
15
17
12
14
9
11

C_CVBS

B|Pb

G|Y

R|Pr

7503

3537

EF

SC1_STATU S

7500

3521

EF

SC2_STATU S

MICROPROCESSOR

FRONT_Y_CVBS_IN_T

N.C.

HDMI MAIN

HDMI-SIDE_TXC+

HDMI-SIDE_TXC-

HDMI-SIDE_TX0+

HDMI-SIDE_TX0-

HDMI-SIDE_TX1+

HDMI-SIDE_TX1-

HDMI-SIDE_TX2+

HDMI-SIDE_TX2-

HDMI-MUX_TXC+

HDMI-MUX_TXC­HDMI-MUX_TX0+

HDMI-MUX_TX0-

HDMI-MUX_TX1+

HDMI-MUX_TX1-

HDMI-MUX_TX2+

HDMI-MUX_TX2-

B03E

DVB-MOJO
ANALOG BACK END

5J52
5J54
5J53

5J55

SC1_RF_OUT_CVBS

B04

SC2_CVBS_MON_OUT

B04

7601

NC

FRONT_CVBS_SVHS_Y_IN

COM
NO

7N01

SII9125CTU
58
57
62
61
66
65
70
69

40
39
44
43
48
47
70
69

ADC

+

R1XC

-

HDMI

(MAIN)

+

R1X0

-

+

R1X1

-

+

R1X2

-

+

R0XC

-

+

R0X0

-

+

R0X1

-

+

R0X2

-

CVBS_RF

IBO_CVBS_IN

IBO_B_IN
IBO_G_IN
IBO_R_IN

SC1_R_IN
SC1_G_IN
SC1_B_IN

SC1_CVBS_IN

SC1_FBL_IN

SC2_Y_CVBS_IN

SC2_C_IN

HD_Pr_IN

HD_Y_IN

HD_Pb_IN

FRONT_CVBS_SVHS_SEL

HDMI_VCLK

5

ODCK

HDMI_DE

19

DE

HDMI_H

20

HSYNC
VSYNC

21

HDMI_V

HDMI_Cb(0-9)

HDMI_Y(0-9)

HDMI_Cr(0-9)

B04

B05A

TRIDENT - WX68

B05C

7C01
SVP WX68-7568-LF

Y4

CVBS1

V4

FS1

W10

PC_B

Y7

PC_G

U8

PC_R

ANALOG

MUX

W2

CVBS_OUT1

W8

PR_R2

W6

Y_G2

Y9

PB_B2

Y10

PB_B3

Y5

FB1

V2

CVBS_OUT2

V8

PR_R3

W4

FS2

Y8

PR_R1

V6

Y_G1

W9

PB_B3

Y6

Y_G3

V9

C

W20

DP-CLK

Y20

DP_DE_FLD

V20

DP_HS

DIGITAL IN

Y10

DP_VS

VIDEO

PROCESSOR

LVD S

OUT

TCLK1

MEMORY

TA1

TB1

TC1

TD1

A14
B14

A15
B15
A16
B16

A18
B18

A19
B19
B17
A17

H19
G20

G19
F20

E19
D20

B20
A20

D19
C20
F19
E20

WX_MD(0-31)

WX_MA

B05B

TxFPGAe_0n
TxFPGAe_0p

TxFPGAe_1n
TxFPGAe_1p

TxFPGAe_2n

TxFPGAe_2p

TxFPGAe_CLKn
TxFPGAe_CLKp

TxFPGAe_3n
TxFPGAe_3p
TxFPGAe_4n
TxFPGAe_4p

TxFPGAo_0n
TxFPGAo_0p

TxFPGAo_1n
TxFPGAo_1p

TxFPGAo_2n
TxFPGAo_2p

TxFPGAo_CLKn
TxFPGAo_CLKp

TxFPGAo_3n
TxFPGAo_3p
TxFPGAo_4n
TxFPGAo_4P

DDR & CPU

(0-11)

(0-15)

(0-11)

(16-31)

7D01
K4D261638K

SDRAM

2Mx16x4

7D02
K4D261638K

SDRAM

2Mx16x4

B05E

FPGA I/O BANKS

4713
4714

4715
4716

4717
4718

4725
4716

4719
4720
4721
4722

4703
4704

4705
4706

4707
4708

4723
4724

4709
4710

4711
4712

B07E

LVD S CONNECTOR

TxLVDSe_0n
TxLVDSe_0p

TxLVDSe_1n
TxLVDSe_1p
TxLVDSe_2n
TxLVDSe_2p

TxLVDSe_CLKn
TxLVDSe_CLKp

TxLVDSe_3n
TxLVDSe_3p
TxLVDSe_4n
TxLVDSe_4p

TxLVDSo_0n
TxLVDSo_0P

TxLVDSo_1n
TxLVDSo_1p

TxLVDSo_2n
TxLVDSo_2p

TxLVDSo_CLKn
TxLVDSo_CLKP

TxLVDSo_3n
TxLVDSo_3p
TxLVDSo_4n
TxLVDSo_4p

1R02

1R03

1R04

1R05

1R06

1R07

1R08

1R09

1R10

1R11

1R12

1R13

RES

RES

+VDISP

LVD Se_0n
LVD Se_0p

LVD Se_1n

LVD Se_1p
LVD Se_2n
LVD Se_2p

LVD Se_CLKn
LVD Se_CLKp

TxLVDSe_3n
TxLVDSe_3p
TxLVDSe_4n
TxLVDSe_4p

TxLVDSo_0n
TxLVDSo_0P

TxLVDSo_1n
TxLVDSo_1p

TxLVDSo_2n
TxLVDSo_2p

TxLVDSo_CLKn

TxLVDSo_CLKP

TxLVDSo_3n
TxLVDSo_3p
TxLVDSo_4n
TxLVDSo_4p

1R01

41
40

39
38

32
31

30

29
28
27
25
24
22
21

20
19

CONNECTOR

TO FULL HD

17
16

15
14

13
12

10

9
7

6
5
4

H_17371_006.eps

LVD S

DISPLAY

021007

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Audio

AUDIO

TUNER IF & DEMODULATOR

B02

1101
TD1316AF/IHP

MAIN

TUNER

(HYBRID)

10

11

VIM_IBO

VIP_IBO

IF_OUT1

RF_AGC

9

IF_AGC_IBO

B04

8

2

DVB_SW

35LC7.5E LA 6.

AUDIO

7113
TDA9886T/V4

1102

7109

1

1103

1

6103

IF-ATV

7111

RF_AGC_IBO

12

14

RF_AGC

13

B04

SAW_SW

11

B03A

VIF1

5

VIF2

4

SIF1

5

SIF2

4

VIF1

1

2

VIF2

23

SIF1

SIF2

24

TAGC

14
12

SIF AGC

TUNER AGC

+5VS

SUPPLY

VIF-PLL

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

VIF AGC

DEMODULATOR

SOUND TRAPS

4.5 to 6.5 Mhz

AM-DEMODULATOR

I2C-BUS TRANSCEIVER

SCL

MAD

CVBS

SIOMAD

SDA

B06B

12

1A02

1
2

3

SUB

WOOFER

B03A

DVB-DEMODULATOR

7F01
TDA10046AHT

PCMCIA

CONDITIONAL

ACCESS

B07A

YPBPR & SVHS

D1

SIDE HDMI

1

RX

18 2

19

COFDM

ADC

CHANNEL
DECODER

62
61
2

1K00

68P

7Q03
SII9181CNU

HDMI

BUFFER

TDA_DAT(0-7)

A_MDO(0-7)

A_MDO(0-7)

HDMI-SIDE

B03B

DVB-COMMON INTERFACE

7K00
STV0700L

PCMCIA

CONTROLLER

TS

INTERFACE

D2

B07B

EXT4

SIDE I/O

EXT3

TS_DATA(0-7)

I0 - SCART 1 & 2

2x SCART

1

21

AUDIO

L/R IN

AUDIO

L/R IN

1504

1
2

3

6

EXT1

1506

1
2

3

6

EXT2

1615

1R20

DVB-MOJO

B03C

SC1_AUDIO _OUT_R

SC1_AUDIO _OUT_L

SC2_AUDIO _OUT_R

SC2_AUDIO _OUT_L

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

L_FRONT_IN

R_FRONT_IN

7G00
PNX8314HS/C102

MOJO

(TS)

(AV)

1R04

6

8

202

203

204

SC1_AUDIO _MUTE_R

SC1_AUDIO _MUTE_L

SC2_AUDIO _MUTE_R

SC2_AUDIO _MUTE_L

MICROPROCESSOR

B04A

1304

6

8

SIF 63

MOJO_I2S_OUT_SD

MOJO_I2S_OUT_SCK

MOJO_I2S_OUT_WS

B06C

SC1_AUDIO_IN_R

SC1_AUDIO_IN_L

B06C

B06C

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

B06C

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

SIDE_AUDIO_IN_L

SIDE_AUDIO_IN_R

B06A

AUDIO PROCESSOR

20

17

18

67

68

1411
18M432

36

55

37
54

33
53

34

52

50

51

48

49

7411
MSP4450K-VK-E8-001 Y

ANA-IN1+

DA3

CL3
WS3

XTALIN

XTALOUT

SC1-OUT-R
SC1-IN-R

SC1-OUT-L
SC1-IN-L

SC2-OUT-R
SC2-IN-R
SC2-OUT-L
SC2-IN-L

SC3-IN-L

SC3-IN-R

SC4-IN-L

SC4-IN-R

SOUND

PROCESSOR

DACM-L

DACM-R

SUPPLY

DACA-L

DACA-R

7A01
TDA8932T

27
26

AUDIO-LS_L

AUDIO-LS_R

3A03
3A11

2

14

CLASS D

5A03

27

POWER

AMPLIFIER

STANDBYn

B04

12
13
61

62

80
38
39

40

+5V_D
+5V_AUD

+8V

HEADPHONE AMP & MUTING

B06C

ENGAGE

3A19

3A26

B04

B04

6

5

DC_PROT

MICRO

5A04

22

7A05÷7A07

DC-DETECTION

D2

SIDE I/O

1A01

1

2

3

4

LEFT

SPEAKER

RIGHT

SPEAKER

PROCESSOR

24

23

HP_AUDIO_OUT_L

HP_AUDIO_OUT_R

ANTI_PLOP

B04

POWER_DOWN

B04
B04

MUTEn

7901

MUTING

CONTROL

HP_LOUT

HP_ROUT

SC1_AUDIO _MUTE_R
SC1_AUDIO _MUTE_L
SC2_AUDIO _MUTE_R
SC2_AUDIO _MUTE_L

1304

1R04

10

11

10

11

B07B

HEAD_PH_L

HEAD_PH_R

1R03

2

3

5

EXT3

HEADPHONE

B07D

1M03

1

19

18 2

CONNECTOR

HDMI SWITCH

1M01

1

1M02

18 2

19

1

(OPTIONAL)

18 2

19

HDMI

RX-A

RX-B

RX-C

7M07
SII9185ACTU

R0X

HDMI

SWITCH

R1X

R2X

TX

FOR MORE DETAILS SEE
BLOCK DIAGRAM VIDEO

B07C

HDMI-SIDE

HDMI-MUX

HDMI MAIN

7N01
SII9125CTU

R1X

R0X

HDMI

(MAIN)

SCK

WS

MUTE

SD

86

HDMI_I2S_SCK

85

HDNI_I2S_WS

81

HDMI_I2S_SD

75

7N07
UDA1334ATS

AUDIO

1

BCK

2

WS

3

DAT AI

8

MUTE

DAC

VOUTL

VOUTR

HDMI_AUDIO_IN_L

14

HDMI_AUDIO_IN_R

16

57

58

SC5-IN-L

SC5-IN-R

H_17371_007.eps

021007

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Control & Clock Signals

CONTROL & CLOCK SIGNALS

B03A

DVB-DEMODULATOR

7F01
TDA10046AHT/C1

COFDM
CHANNEL
DECODER

PCMCIA

CONDITIONAL

ACCESS

1

21

54

25
9

37
36
35

COMP_OUT

7F03

1

RESET_FE_n

TDA_CLK
TDA_VALID
TDA_SYNC

1K00
1

35

20
57

68P

7F04

7F02

1

TDA_DAT(0-7)

PCMCIA_D(0-7)

B03B

DVB-COMMON INTERFACE

RF_AGC_IBO

4MHZ_CLK

50
48
49

A_MDO(0-7)

A_MDI(0-7)

A_MICLK

A_MOCLK

7K04

110

118

35

27M

7K00
STV0700L

PCMCIA

CONTROLLER

7K03

BUFFERING

7K01

36LC7.5E LA 6.

DQ(0-31)

B05A

TRIDENT - WX68

7C01
SVP WX68-7568

PROCESSOR

111

W20

VIDEO

G17

B17
A17

F19
E20

61
62
63

84
86

56

7C02
7C04

CONTROL

B04

MICROPROCESSOR

AD(0-7)

A(0-7)

7310
M29W800DT

EPROM

1Mx8

512Kx16

28

11

BL_ADJUST

TXFPGAe_CLKn
TXFPGAe_CLKp

TXFPGAo_CLKn
TXFPGAo_CLKp

26
12

+3V3_STBY

7312
BD45275G

5

VOUT

2,3

HDMI_HOTPLUG_RESET
HDMI_RST_RX_BUF

HDMI_INT_MUX

AD(0-7)

A(0-19)

CE

CPU_RST

4

(3V3)

CS
WR
RD
ALE_EMU
RST_H

INT

B01A

B04

B03C

DVB-MOJO

7G00

6

PNX8314HS/C102

MOJO

158

34
31

(GPIO)

32

(TS)

29
30
28

109

(MIU)

B05B

DDR & CPU INTERFACE

B07D

HDMI SWITCH

1

RXxxA

18 2

19

1

RXxxB

18 2

19

1

RXxxC

18 2

19

HDMI

CONNECTOR

7M07
SII9185ACTU

+

R0X

-

HDMI

SWITCH

+

R1X

-

+

R2X

-

MUX

35
13

7D01
K4D261638K

SDRAM

2Mx16x4

7D02
K4D261638K

SDRAM

2Mx16x4

B07C

HDMI MAIN

7817
SII9025CTU

HDMI
MAIN

HDMI_RST_MUX

44

44

5

76
100

WX_MA(0-11)

WX_MCLK

HDMI_VCLK

HDMI_Cb(0-7)

HDMI_Y(0-7)

HDMI_Cr(0-7)

B02

TUNER IF & DEMODULATOR

1101
TD1316AF/IHP-2

MAIN

TUNER

14

11

DVB_SW

7113
TDA9886T/V4

DEMODULATOR

14

RESET_STV

TS_DATA(0-7)

TS_CLK
TS_SYNC
TS_VALID

MIU_RDY

MIU_DATA(0-7)

(HYBRID)

2

4MHZ_MOJO

FE_LOCK

7111

12

13

RF_AGC

34

63
62
61

15

MIU_ADDR(15-24)

B05E

B07E

7311
M30300SAGP

48

10

PROCESSOR

45
44
42

38

4

18

89

5

73
36

FPGA I/O BANKS

TXFPGAe_CLKn
TXFPGAe_CLKp

TXFPGAo_CLKn
TXFPGAo_CLKp

LVDS CONNECTOR

77
76
99

3

13

MICRO

11

9

8

74
75
72

78

88

7700
EP2C5F256C7N

J16

J15

H15
H16

TxLVDSe_CLKn
TxLVDSe_CLKp

TxLVDSo_CLKn
TxLVDSo_CLKp

CTRL_DISP1_up
CTRL_DISP4_up

7322

1301
10M

POWER_DOWN

H2

FPGA

F4
H4
C3
F1

LCD_PWR_ON

STANDBYn

STAN D BY

ITV_SPI_CLK
ITV_SPI_DATA_IN

ANTI_PLOP

BL_ON_OFF

MUTEn

RST_AUD

B05D

FPGA INTERGACE

(ONLY FOR AMBI-LIGHT)

CLK_OSC1

7201
EPCS4I8

nCSO
DCLK

SCD

ASDO
DAT A0

1R01

25
24

10

9

B07E
B07E
B07E
B06B

B07E

B01A B06C

1312

6
5

ITV_CONNECTOR A

B06C
B01A
B06C

B06C

B06A

1204

TO DISPLAY

(LVDS)

27M

B03D

DVB-MOJO MEMORY

PCMCIA_A(0-7)

PCMCIA_D(8-14)

34

68

BUFFERING

7K01

BUFFERING

7H00
M29W320ET70N6F

EPROM
SDRAM

4MX8/2Mx16

2/4/8MB

NOR

FLASH

38

MIU_ADDR(0-7)

MIU_ADDR(8-14)

RESET_n

MIU_ADDR(0-20)

MIU_DATA(0-15)

B04A

7H02
K4S281632I-UC60

SYNC

SDRAM

4x2Mx16

MIU_ADDR(0-24)

SDRAM_CLK

38

SDRAM_DATA(0-15)

SDRAM_ADDR(0-14)

136

(SDRAM)

180

4

B03D

E

KEYBOARD CONTROL

3010

6010

6011

1011
1012
1013
1014
1015

1016

7010

LED1
BLEU

LED2

RED

3012

3013

IR

SENSOR

KEYBOARD

7011

7012

J

IR/LED/LIGHT-SENSOR

CHANNEL +
CHANNEL -

MENU

VOLUME -

VOLUME +

ON / OFF

+5V_STANDBY

+5V_STANDBY

+5V_STANDBY

RESET_n

LED1

LED2

RC

N.C.

3L11

FOR DVB ONLY

1M01

2

1M01

2

1M20

1M20

7

66

44

33

11

B07B

B07A

B06B

IBO_RESET

IB0_IRQ

SC1_STATU S
SC2_STATU S

DC_PROT

2

16

91
90

71

73

FRONT_CVBS_SVHS_SEL

4

100

RSR_H

E_PAGE

B07A

B05A

7315
M24C64-WMN6P

EEPROM

7

8Kx8

19
23
21

7

KEYB

LED1

LED2

REMOTE

LIGHT_SENSOR

93

95

3L56

25

87

18

2

DCC_RESET

+3V3_STBY

3L79

SAW_SW

DVB_SW

4301

SDM

B07D

B02
B02

H_17371_008.eps

021007

Block Diagrams, Test Point Overviews, and Waveforms

Test Point Overview SSB (Overview Bottom Side)

A115 E5

F129 D5

F211 A5

F312 C4

F328 C3

F344 B2

F363 C3

F387 B3

F520 D2
A116 E5
A124 E5
A125 E5
F101 E5
F112 E7
F114 E7
F115 F6
F116 F6
F117 F6
F118 E6
F119 E6
F120 E6
F121 E6
F126 E7
F128 D5

F130 D5
F131 E6
F132 D7
F133 E6
F134 F7
F140 D5
F142 E6
F143 D6
F145 E7
F201 A6
F202 A4
F204 A4
F207 A6
F208 A4
F209 A5

F214 A5
F222 B4
F223 B4
F224 B4
F225 A4
F227 B4
F236 A6
F237 B4
F302 B4
F303 E3
F304 A4
F305 D3
F309 C3
F310 C4
F311 C4

F313 C5
F314 C4
F315 C4
F316 C4
F317 C4
F318 C4
F319 C5
F320 C4
F321 C5
F322 C4
F323 A3
F324 C4
F325 C4
F326 C3
F327 C4

F329 C3
F330 C5
F331 C3
F332 C3
F333 C4
F334 C4
F335 C4
F336 C4
F337 C4
F338 C4
F339 C4
F340 C3
F341 C3
F342 B2
F343 B2

F345 C3
F346 B4
F347 C3
F348 C3
F349 C3
F350 D3
F351 A4
F352 D3
F353 C3
F354 C5
F356 D3
F357 A3
F360 A3
F361 C4
F362 C4

F364 C3
F365 C3
F366 C3
F367 D5
F368 C5
F369 D4
F370 F7
F379 A4
F380 D5
F381 C5
F382 A3
F383 A3
F384 A3
F385 C4
F386 C5

F388 C3
F389 C5
F401 A3
F402 B3
F403 A4
F510 E2
F511 E3
F512 E1
F513 E2
F514 E1
F515 E3
F516 D2
F517 D2
F518 D1
F519 E2

F521 D2

F522 D2

F523 D2

F524 D2

F525 C2

F526 C3

F527 C2

F528 C2

F529 C1

F530 C2

F531 D3

F532 D2

F534 E3

F535 A3

F536 E2

F537 E2
F538 D3
F539 D2
F540 D3
F541 D3
F542 D2
F543 E1
F544 D1
F601 F3
F602 F2
F604 F2
F605 F1
F607 F2
F608 F2
F609 F1
F612 E2

Part 1

H_17370_025a.eps

H_17370_025c.eps

3139 123 6273.1

F613 E2
F614 F2
F615 F3
F701 A4
F702 B4
F703 B5
F704 B5
F705 B5
F706 B5
F733 B5
F734 A5
F901 B4
F904 B4
FA01 A2
FA02 A1
FA04 A2

Part 3

FA05 A3
FA06 A3
FA07 A1
FA08 A1
FA09 B3
FA10 A1
FA11 A1
FA12 A3
FA13 A2
FA14 A2
FA15 A2
FA16 A1
FA17 A1
FA18 A1
FA32 A2
FB07 A9

FB10 B9
FB11 A9
FB13 A10
FB14 B9
FB15 A9
FB27 A10
FB28 A8
FB29 A9
FB30 A9
FB31 A9
FB32 A9
FB33 A9
FB34 A8
FB36 A9
FB37 A9
FB38 A10

FB39 A9
FB40 A8
FC01 B7
FC02 C7
FC03 C7
FD01 B6
FE01 D7
FE02 C6
FE03 B6
FE04 C7
FE05 C7
FE06 C7
FE07 B6
FE08 C6
FF10 C8
FF11 E8

FF12 F8
FF13 F7
FF14 F8
FF16 E7
FF17 E8
FF18 E7
FF19 E8
FF20 E7
FF21 F7
FF22 E8
FF23 E7
FF24 C10
FF25 F7
FF26 E7
FF27 E7
FF28 E7

FF29 E7
FF30 E7
FG10 B10
FG11 B10
FG12 B10
FG13 D10
FG14 C10
FG15 C10
FG16 D10
FG17 C10
FG18 B10
FG19 C10
FG20 C10
FG21 C10
FG24 C9
FG25 C9

37LC7.5E LA 6.

FG26 C10
FG27 C9
FG28 C9
FG29 C8
FG30 B9
FG31 B10
FG32 C10
FG33 B10
FG34 C10
FG35 C10
FG36 C10
FG37 B9
FG39 C10
FG40 C9
FG41 C9
FH00 B9

FH01 D9
FH02 B10
FH03 B9
FH04 B10
FH05 D10
FH06 D9
FH07 C8
FH08 D10
FJ01 D9
FJ02 B1
FJ22 C9
FJ23 C9
FJ24 B1
FJ25 B1
FJ26 C8
FJ27 C9

FJ28 B9

FK21 E9

FK37 E9
FK01 F9
FK02 F10
FK05 D8
FK06 F9
FK10 E9
FK11 E9
FK12 D9
FK13 E9
FK14 E9
FK15 E9
FK16 D9
FK17 E9
FK18 E9
FK19 E9
FK20 D9

FK22 E9
FK23 E9
FK24 D9
FK25 E9
FK26 E9
FK27 E9
FK28 D9
FK29 E9
FK30 E9
FK31 E9
FK32 E9
FK33 E9
FK34 D9
FK35 E9
FK36 E9

FK38 D9

FK39 E9

FK40 E9

FK41 E8

FK42 D9

FK43 E9

FK44 E8

FK45 E8

FK46 D8

FK47 E8

FK48 E8

FK49 E8

FK50 D8

FK51 E8

FK52 E8

FK53 E8
FK54 D8
FK55 E8
FK56 E8
FK57 E8
FK58 D8
FK59 E8
FK60 E8
FK61 E8
FK62 E10
FK63 E8
FK67 E10
FK68 E10
FK69 E10
FK70 D10
FK71 E10

Part 2

H_17370_025b.eps

Part 4

H_17370_025d.eps

FK72 E9
FK73 E9
FK74 D9
FK75 E9
FK80 D10
FK81 F9
FK82 F9
FK83 D10
FK84 E9
FL20 A3
FL21 A2
FL22 A2
FL23 A2
FL24 A2
FL25 A2
FL26 A2

FL36 C5
FM01 F4
FM02 F4
FM03 F4
FM05 F4
FM06 F5
FM07 F4
FM08 F4
FM10 F4
FM11 F3
FM12 F3
FM13 F3
FM15 F3
FM16 E4
FM17 F4
FM18 F4

FM19 F4
FN01 E3
FN02 E4
FN03 E4
FN04 E4
FP03 B8
FP05 A8
FP06 B8
FP08 A8
FP35 B9
FP40 A8
FR01 A6
FR02 A6
FR03 A5
FR04 A5
FR05 A5

FR06 A5
FR07 A5
FR08 A5
FR09 A5
FR10 A5
FR11 A5
FR12 A5
FR13 A5
FR14 A5
FR15 A4
FR16 A4
FR17 A4
FR18 A4
FR19 A4
FR20 A4
FR21 A4

FR22 A4
FR23 A7
FR24 A5
FR25 A5
FR26 A5
FR27 A5
FR28 A4
FR29 A4
FR30 A4
FR31 A4
I111 E7
I114 E5
I118 E5
I120 E5
I121 E7
I122 F6

I123 E6
I124 D5
I125 E5
I126 D5
I127 D5
I128 E5
I129 E5
I130 E4
I131 E5
I133 D5
I135 D5
I136 D5
I137 E5
I138 D5
I139 D5
I141 D4

I142 E5
I143 E5
I144 E5
I145 E6
I146 E7
I147 E6
I148 E5
I149 D5
I150 E7
I201 A4
I205 B4
I206 A7
I207 A7
I209 A5
I210 A7
I211 A7

I212 A7
I213 A7
I232 A4
I311 C4
I312 D4
I318 C3
I326 C4
I330 C4
I331 C4
I332 A5
I333 C4
I334 C4
I335 C4
I338 C4
I341 D3
I342 C3

H_17370_025.eps

I344 D4
I351 C3
I352 C4
I353 B4
I354 C3
I357 C4
I359 D3
I362 A5
I364 C4
I365 C3
I366 C3
I367 C3
I368 C3
I373 A3
I374 A4
I376 A4

070804

I380 B4
I384 C3
I387 D5
I388 F7
I389 D4
I390 C5
I391 F7
I392 F7
I393 B3
I394 B3
I396 D4
I397 D4
I398 D4
I412 B4
I413 B4
I414 A3

I415 A3
I416 A3
I417 A3
I418 A3
I419 A3
I420 B3
I421 B3
I422 B3
I423 B3
I424 B3
I425 B3
I426 A3
I427 B4
I428 B4
I429 A4
I430 A4
I431 B4
I432 B4
I510 E2
I512 E2
I517 E1
I520 D1
I528 C2
I530 C2
I533 C1
I540 E2
I541 E2
I543 C2
I544 C1
I545 D2
I548 C3
I549 C3
I550 C3
I551 C2
I552 C2
I553 D3
I554 C3
I556 C2
I557 D2
I558 C3
I610 E2
I611 E1
I615 E2
I623 E2
I627 E1
I631 E2
I705 A7
I712 A6
I713 A7
I728 A7
I911 B4
I912 E1
I913 B2
I914 B2
I919 E2
I920 E1
I921 E1
I922 E1
I930 E2
I931 E1
I932 E1
I933 E1
IA01 A2
IA02 A2
IA03 A2
IA04 A1
IA05 A3
IA06 A3
IA07 A2
IA09 B2
IA10 B3
IA11 B3
IA12 B2
IA13 B2
IA14 A2
IA15 A2
IA16 B2
IA17 A1
IA18 A2
IA19 B2
IA20 A2
IA21 A2
IA22 B2
IA23 A2
IA24 A2
IA25 A2
IA26 B2
IA27 A1
IA29 A2
IA30 A2
IA31 A2
IA33 A3
IA34 A1
IA35 A2
IA36 A2
IA37 A1
IA38 B2
IA39 B2
IA40 A2
IA41 A3
IB12 A9
IB14 B9
IB15 B9
IB19 A9

IB20 A9
IB49 A10
IB50 B9
IB51 A10
IB52 A9
IC01 C5
IC02 B5
IC07 C6
ID01 A4
ID05 B4
IE04 A6
IE05 A6
IE06 A6
IE07 A6
IE08 A6
IE09 A6
IE10 C7
IE11 C7
IE12 C6
IE15 A7
IF10 F7
IF11 C9
IF12 F7
IF13 F7
IF14 E7
IF15 E7
IF16 E8
IF17 E7
IF18 E8
IF19 F8
IF20 F8
IF21 F8
IF22 F8
IF23 F8
IF24 F8
IF25 F8
IF26 F8
IF27 F9
IF28 F8
IF29 F8
IF30 F8
IF31 E8
IF32 E7
IF33 F8
IG13 C9
IG14 C9
IG15 C10
IG16 C10
IG17 C10
IG18 B10
IG19 C10
IG20 B10
IG21 B10
IH04 C10
IH06 D10
IH07 D9
IJ01 D8
IJ02 D8
IJ63 C9
IJ64 C9
IJ65 C9
IJ66 C9
IJ67 F1
IJ68 F1
IK68 E9
IK69 F9
IK70 F9
IK72 F9
IK73 E9
IK75 C9
IK76 F9
IK84 F8
IK85 F10
IL20 A3
IL21 B3
IL22 A3
IL23 B3
IL25 C3
IL26 C4
IL30 C5
IL31 A7
IL32 C3
IL33 D3
IL34 A3
IL35 A3
IL37 C5
IL38 E3
IL39 F3
IM01 F5
IM02 F5
IM03 F4
IM04 F4
IM07 F5
IM08 F4
IM09 F3
IM10 F3
IM11 F3
IM12 E3
IM13 F4
IM14 E3
IM15 E4
IN06 E4
IN07 E3
IN09 E3

IN10 E3
IN11 E4
IN12 E3
IN13 D4
IN14 D4
IN15 D4
IN16 E3
IN17 E3
IN18 E3
IN19 E3
IN20 E3
IN21 E3
IP01 B8
IP02 B8
IP03 A9
IP04 A8
IP08 A8
IP09 B8
IP16 B8
IP17 A8
IP23 B8
IP24 B8
IP25 A8
IP26 A8
IP27 B9
IP28 A8
IP29 B8
IP31 A8
IP32 B8
IP33 B7
IP36 B9
IP37 A8
IP38 A8
IP39 B8
IP40 B8
IP41 A8
IP42 B9
IP43 B8
IP44 B8
IP45 B8
IP55 B8
IP56 A8
IP57 A8
IP58 B8
IP59 B8
IR01 A6
IR02 A5
IR04 A6
IR05 A5
IR06 A6
IR08 A6

Block Diagrams, Test Point Overviews, and Waveforms

Test Point Overview SSB (Part 1 Bottom Side)

38LC7.5E LA 6.

Part 1

H_17370_025a.eps

070804

H_17370_025a.eps

070804

Block Diagrams, Test Point Overviews, and Waveforms

Test Point Overview SSB (Part 2 Bottom Side)

39LC7.5E LA 6.

Part 2

H_17370_025b.eps

070804

Block Diagrams, Test Point Overviews, and Waveforms

Test Point Overview SSB (Part 3 Bottom Side)

40LC7.5E LA 6.

Part 3

H_17370_025c.eps

070804

Block Diagrams, Test Point Overviews, and Waveforms

Test Point Overview SSB (Part 4 Bottom Side)

41LC7.5E LA 6.

Part 4

H_17370_025d.eps

070804

I2C Overview

I²C

MICROPROCESSOR

B04

7311

M30300SAGP

MICRO

PROCESSOR

Block Diagrams, Test Point Overviews, and Waveforms

+3V3_STBY

SDA2
SCL2

28
27

3382
3L62

DATA

ADDR

IIC_SDA_up

IIC_SCL_up

ERR

04

7310
MX29LV800CTTI

EPROM

1Mx8/

512kx16

FPGA INTERFACE

B05D

1201

3

1
2

TO AMBI-LIGHT

MODULE

HDMI SWITCH

B07D

1M01

1

16
15

18 2

19

1M02

1

16
15

18 2

19

1M03

1

16
15

18 2

19

HDMI

CONNECTOR

SIDE HDMI

D1

1Q01

1

16
15

18 2

19

+5VHDMI_A

3M36

+5VHDMI_S

3Q14

3Q15

3L54

+5VHDMI_B

3M35

DDC_SDAS

DDC_SCLS

3L75

3L76

3355

56

7L23

M24C64
EEPROM

(NVM)

ERR

06

+3V3_FPGA

3204

3203

+5VHDMI_C

3M40

3M37

3M38

37

38

1314

3343

2

3345

3

IIC_SDA_up
IIC_SCL_up

3206

AMBI_SDA

3205

AMBI_SCL

(ONLY FOR AMBI-LIGHT SET)

3M39

DOC_SDAA
DOC_SCLB

DOC_SDAB
DOC_SCLB

DOC_SDAC
DOC_SCLC

IIC_SDA

IIC_SCL

3Q10

3Q11

12 13

7Q03

SII9181CNU

HDMI

BUFFER

52

53

HDMI-SIDE_TSDA
HDMI-SIDE_TSCL

CONNECTOR

7302
PCA9515ADP

3

2

7303
PCA9515ADP

3

2

COMPAIR
SERVICE

B05E

3M21

SII9185CTU

30
31

50
51

70
71

6

7

6

7

FPGA I/O BANKS

3M20

14 15

7M07

HDMI

SWITCH

ERR

21

1Q02

2

3

1Q03 1N01

2

3

+3V3SW

3360

3359

IIC_SDA
IIC_SCL

+3V3SW

3361

3362

IIC_SDA_SIDE

IIC_SCL_SIDE

1305

3

TO 1Q02

D1

2

SIDE I/O

3202

MAIN_SDA

3201

MAIN_SCL

P2 H1

7700

EP2C5F256C7N

N2

FPGA

P3

ERR

17

(ONLY FOR AMBI-LIGHT SET)

HDMI MAIN

B07C

+3V3_ANA-MUX

HDMI-MUX_SDA

77

HDMI-MUX_SCL

78

FROM 1305

B04

SSB

3N36

+3V3_ANA-MUX

HDMI-SIDE_TSDA

17

HDMI-SIDE_TSCL

16

42LC7.5E LA 6.

B03C

DVB-MOJO

3G46

3G47

9 8

7G00

PNX8314HS

AUDIO PROCESSOR

B06A

PROCESSOR

3411

3 2

7411

MSP4450P

SOUND

ERR

09

3410

TUNER IF & DEMODULATOR

B02

3151

3152

10 11

7113

TDA9886T/V4

DEMODULATOR

ERR

08

B05A

TRIDENT - WX68

3C09

3C08

H17 H18

7C01

SVP WX68

TRIDENT

ERR

05

MOJO

DVB-MOJO MEMORY

3G44
3G43

DATA

ADDR

DATA

ADDR

B03D

I2C_LOCAL_SDA

I2C_LOCAL_SCL

ERR

13

user_EEPROM_WP

7H00
M29W320ET70

NOR

FLASH

2/4/8MB

7H02
K4S281632I

SYNC
DRAM

4x2Mx16

DVB-MOJO ANALOG

B03E

BACK END

TXD0

RXD0

4J14

4J15

+5V_SW

3H11

3H09

56

M24C64

7

EEPROM

1J14

2

3

+5V_SW

3H13

3H10

7H03

8Kx8

ERR

16

SERVICE

CONNECTOR

3H12

UART

ERR

12

7

6

185

3N39

3N40

26 27

7N01

SII9125CTU

3N35

33

HDMI
MAIN

34

ERR

11

15

14

3N37

3N38

28

DVB-COMMON INTERFACE

B03B

3K01

STV0700L

CONTROLLER

3K00

30 31

7K00

PCMCIA

ERR

20

29

DDR & CPU INTERFACE

B05B

7D01
K4D261638K

SDRAM

8Mx16

ERR

7D02
K4D261638K

SDRAM

8Mx16

ERR

DVB-DEMODULATOR

B03A

3F40

8 6

7F01

TDA10046AHT

COFDM
CHANNEL
DECODER

ERR

15

10

14

TUNER IF & DEMODULATOR

B02

7111
74HCT4053D

1

3F44

+5V_SW

3F46

4

3F48

3

3F41

3F42

I2C_TDA_SDA

I2C_TDA_SCL

B04A

3

2
5

DVB_SW

15

4

5120

5121

54

1101

TD1316AF/IHP

11

TUNER

ERR

07

TXD0

RXD0

ERR

22

LVD S CONNECTOR

+3V3_SW

3354
3L53

BOLT_ON_SDA
BOLT_ON_SCL

33
34

3352

3351

B07E

3R26
3R25

1R01

1
2

LVD S

CONNECTOR

H_17371_009.eps

021007

Block Diagrams, Test Point Overviews, and Waveforms

Supply Lines Overview

SUPPLY LINES OVERVIEW

DC-DC - 3V3 & VTUN & 5 V_SW

B01A

CN7

X406

1B13

77

88

CN6

X404

SUPPLY

1
2

3

41
52
6 3

74
8 5
96

CN4

X405

1
2

3

4

CN5

X411

1
2

3

4

1A03

B06B

SSB

1B12

5B01

SUPPLY

AMBI-LIGHT

MODULES

DC/DC - 1V2 & 2V5 & 1V8

B01B

5A07

7P06-1

7P11

1

STEP

7P06-2

DOWN

REG.

2

7P07-1

15

7P07-2

16

7

B04

7B01

DOWN

STANDBY

STEP

REG.

7

+12V

7B02

IN OUT

COM

7B12

5B06

7B13

3B67

ONLY FOR ANALOG TUNER

5B03 5B02

13

5P01

5P09

+5V_STANDBY

+5V_STANDBY

6B03

+2V5_SW

+1V8_SW

+1V2_SW

+12V_DISP

+3V3_STBY

+5V_SW

+VTUN

(34V)

+3V3_SW

+12V

B01a

B01a

B03a,B04,
B06a,B07e

B01a

B01a

B04,B05a

B04,B06c

B01b

B02,B03a,b,d

B03e

B06a,c,B07a,b,d

B01a

B02

B03e

B03e,B04,
B05a,c,e,
B07c,d

B01a

B01b
B03e

B03e

B03e

B01a

B01a

B01b

B05a,e

B03a,e
B07c,d

B03c,B05c,e

TUNER IF & DEMODULATOR

B02

+3V3_SW+3V3_SW

+5V_SW +5V_SW

3133

3134

+VTUN +VTUN

+12V_DISP +12V_DISP

DVB-DEMODULATOR

B03A

+1V8_SW +1V8_SW

+3V3 +3V3

5F10

+5V_SW +5V_SW

DVB-COMMON INTERFACE

B03B

+3V3 +3V3

5K03

5K04

5K05

+5V_SW +5V_SW

B03C

+1V2_SW +1V2_SW

+3V3

+3V3clean

B03D

+3V3

+5V_SW +5V_SW

B03E

+3V3_SW

+1V8S_SW

7K05

IN OUT

COM

DVB-MOJO

5G04

DVB-MOJO MEMORY

5H02

DVB-MOJO ANALOG BACK END

5J01

IJ01

CONTROL

5114

5115

ONLY FOR ANALOG TV

5K01

5K02

7J04

+5VS

+5V_IF

+3V3FE

+3V3_STV

+3V3_CORE

+3V3_BUF

PCMCIA_5V

PCMCIA_AVCC

PCMCIA_VPP

+3V3

+3V3_VDDP

+3V3clean

+3V3

+3V3_NOR48

+3V3_SW

+3V3clean

+3V3

+1V8S_SW

B01a
B01a

B01a

B01a

B01a

B01a

B01b

B01b

B01a

B05a

B05a

B05e

B01a

B01b

B01b

B03E

B03a,b,c

43LC7.5E LA 6.

MICROPROCESSOR

B04

+12V_DISP
+3V3_STBY

+3V3_SW
+5V_STANDBY

3L10

TRIDENT - WX68

B05A

+3V3_SW
+5V_STANDBY

TRIDENT - WX68

B05A

+2V5_SW +2V5_SW

5D03

3D15

WX POWER / GROUND

B05C

+1V2_SW +1V2_SW

5E12

5E13

+3V3_SW

+2V5_VDDMQ +2V5_VDDMQ
DDR_VREF DDR_VREF

B05D

+3V3_FPGA +3V3_FPGA

B05E

+3V3_SW+3V3_SW

+2V5_SW +2V5_SW

+1V2_SW +1V2_SW

5E14

FPGA INTERFACE

FPGA I/O BANKS

5700

5701

5702

5703

5705

5704

(ONLY FOR AMBI-LIGHT SETS)

+12V_DISP
+3V3_STBY

+3V3_SW

+5V_STANDBY

5304

+3V3_SW

+5V_STANDBY

+2V5_VDDMQ

DDR_VREF

+1V2_ADC

+1V2_PLL

+1V2_CORE

+3V3_SW

+3V3_FPGA

+2V5out-FPGA

+2V5in-FPGA

+1V2_FPGA

+2V5in-PLL

1L20

5

B01a

B01a

B01a

B01a
B01a

B01b

1Q03

D1

SIDE I/O

B01a

B01a

B01a

B07d

B07d

1M20

IR/LED

CN6

SUPPLY

B05c

B05c

B05d

AUDIO PROCESSOR

B06A

+12V_DISP +12V_DISP

4401

J

+5V_SW +5V_SW

3402

AUDIO

B06B

1A03

5A09

2

A

1

B06C

+3V3_STBY +3V3_STBY

+5V_SW +5V_SW

B07A

+5V_SW +5V_SW

B07B

+5V_SW +5V_SW

B07C

+5V_SW +5V_SW
+3V3_SW+3V3_SW

+1V8_SW +1V8_SW

+3V3_ANA-MUX +3V3_ANA-MUX

+5VHDMI-MUX-_TPWR +5VHDMI-MUX-_TPWR

1N01
19

3A01

5A05

5A07

5A08

3A02

5A06

HEADPHONE AMP & MUTING

YPBPR & SVHS

I/O - SCART 1 & 2

HDMI MAIN

5N02

5N03

5N07
5N08
5N09

5N01

5N04

5N05
5N06

+AUDIO_POWER_+12V_DISP

7410

IN OUT

COM

5401

5402

4A01

+AUDIO_POWER_+12V_DISP

RES

+8V

+5V_D

+5V_AUD

+AUDIO_POWER

VDDA

VDD

-AUDIO_POWER

VSSA

VSS

+3V3_SWA

+3V3_SWB

+3V3_SWC
+3V3_SWD
+3V3_SWE

+1V8_SWA

+1V8_SWB

1V8_SWC

+1V8_SWD

+5VHDMI-SIDE-_TPWR

1305

B04

SSB

1L20

B04

SSB

B01b

B01a

B01a

B01a

B01a

HDMI SWITCH

B07D

+1V8_SW

5M02

5M03

+3V3_SW+3V3_SW

5M01

+5V_SW

3M13

1M01

HDMI

CONNECTOR-1

CONNECTOR-2

CONNECTOR-3

B07E

+12V_DISP +12V_DISP

D1

1Q02

5

6

7

1Q01
18

D2

D1
D1

+3V3_SW+3V3_SW
+5V_SW +5V_SW

J

1M20

5

18

1M02

HDMI

18

1M03

HDMI

18

LVD S CONNECTOR

7R05

7R07

CONTROL

SIDE HDMI

5Q01

5Q02
5Q03

3Q09

SIDE I/O

7R02

IN OUT

COM

IR/LED/LIGHT-SENSOR

+5V_STANDBY +5V_STANDBY

+1V8_SW

+1V8_ANA-MUX

+1V8_DIG-MUX

+3V3_ANA-MUX

+5V_SW

+5VHDMI-MUX-_TPWR

+5VHDMI_A

+5VHDMI_B

+5VHDMI_C

5R02
5R03

+5VHDMI_SIDE_TPWR

VDISP

LCD_PWR_ON

+3V3_SW

+3V3_ANA-SIDE

+1V8_SW
+1V8_ANA-SIDE
+1V8_DIG-SIDE

+5V_SW

+5VHDMI_S

+5V_USB

B04

1R01

1Q03

B07c

B07c

41

TO

DISPLAY

D2

D2

3

1N01

B07C

SSB

H_17371_010.eps

021007

Circuit Diagrams and PWB Layouts

7. Circuit Diagrams and PWB Layouts

SSB: DC / DC 3V3, VTUN, & 5V_SW

44LC7.5E LA 7.

123456789

DC / DC - 3V3 & VTUN & 5V_SW

B01A B01A

A

B

C

D

E

F

3139 123 6273.1

+5V_SW

+5V_STANDBY

5B01

10u

2B12

GNDDC

7B02

LD1117DT33C

32

OUTIN

COM

100n

2B65

1

ONLY FOR LCD

STANDBY

0V(5V)

3B18

6K8

(---V) MEASURED IN STANDBY

123456789

22u

3B17

6K8

IB49

FB10

L5973D

2B18

FB15

2B22

SI4423DY

7B01

3

2

FB13

16V10u

4u7 35V

7B12

4

8

Φ

INH

SYNC

GND GND_HS

7

+5V_STANDBY

1

2

3

567

6

VREFVCC

OUT

FB

COMP

9

+3V3_STBY

8

1

5

4

2B24

2B25

FB40

16V
47u

IB12

220p

2B21

100n

2B26

3B65

22n

IB19

4K7

+5V_SW

IB14

3B67

3B15

3B66

220R

1

1K0

IB51

1K0 1%

GNDTUN

5B06

3

2

3B12

1K5

6K8

3B19

220u

7B13
2N7002

2B66

BAV99 6B03

5B08

10u

470u 16V

IB50

SS246B30

RES RES

IB15

2B20

5B05

22u

3B10

IB20

2B67

100p

ONLY FOR ANALOG TUNER

2B19

2B10

FB14

35V22u

FB11

16V

100u

6B02

+3V3_SW

2B27

10n

+VTUN

34V

BZX384-C33

+5V_STANDBY

+12V_DISP

RES
RES
RES
RES

+5V_SW

*

LCD

4B04 / 4B05 / 4B06 / 4B07

PDP

4B08 / 4B09 / 4B10 / 4B11

BL_ADJUST
POWER_DOWN
BL_ON_OFF

BACKLIGHT_BOOST
STANDBY

+5V_STANDBY

FB36

FB37

FB38

FB39

4B04
4B05
4B06
4B07

4B08
4B09
4B10
4B11

2B63

RES

5V2

*

*

*

*

1n0

RES

1n0

2B06

4B12

IB52

FB32
FB33

2B68

3B68

220p

100R

0V(5V)

*

*

*

*

FB34

1B12
FB28FB27
FB29
FB30

FB07

FB31

440054-6

1B13

2V9
2V8

1V6

440054-8

H_17370_001.eps

1
2
3

TO / FROM PSU

4
5
6

1
2
3
4
5
6
7
8

TO / FROM PSU

010804

A

B

C

D

E

F

1B12 D9
1B13 F9
2B06 E8
2B10 A6
2B12 B2
2B18 D2
2B19 C6
2B20 C5
2B21 F3
2B22 F2
2B24 F3
2B25 B3
2B26 B4
2B27 B7
2B63 F8
2B65 D1
2B66 B5
2B67 B5
2B68 F9
3B10 A5
3B12 B5
3B15 D4
3B17 F2
3B18 F2
3B19 B5
3B65 B4
3B66 B4
3B67 C4
3B68 F9
4B04 E8
4B05 E8
4B06 E8
4B07 E8
4B08 E8
4B09 E8
4B10 E8
4B11 E8
4B12 F8
5B01 A2
5B05 A5
5B06 C4
5B08 A6
6B02 C6
6B03 C5
6B30 B5
7B01 A3
7B02 D2
7B12 F2
7B13 C5
FB07 E9
FB10 A2
FB11 A6
FB13 D2
FB14 C6
FB15 E2
FB27 D9
FB28 D9
FB29 E9
FB30 E9
FB31 E9
FB32 F8
FB33 F8
FB34 F8
FB36 F8
FB37 F8
FB38 F8
FB39 F8
FB40 F3
IB12 A4
IB14 C4
IB15 C5
IB19 B4
IB20 B5
IB49 F2
IB50 A5
IB51 A4
IB52 F8

Circuit Diagrams and PWB Layouts

SSB: DC / DC 1V2, 2V5, & 1V8

45LC7.5E LA 7.

123456789

DC/DC - 1V2 & 2V5 & 1V8

B01B B01B

2P78

IP26
IP27

IP16

IP31

6P14

BAS316

2

3P41

6K8

7P06-1

6K8

2P42

IP03

1u0

1

4

100n

78

SI4936ADY

2P32

3n3

7P06-2

GNDDC2V5

3P32

100n

2P39

3P70

3K3

68R3P47

68R3P48

100n2P07

6

5
SI4936ADY

3

2P38

10R

3P13

2R2

3P34

3K3

IP43

3P71

IP56

2P29

GNDDC2V5

3P25

2P35

1n0

IP40

IP41IP17

3P74

6K8

6K8

22u

10R

1n0

4P02

3P68

6K8

3P69

6K8

6P13

BAS316

2P30

GNDDC1V2

IP42

2P37

7P07-2

4

SI4936ADY

22u

2

3n3

GNDDC1V2

FP35

2P28

7P07-1

56

3

22u

IP02

78

SI4936ADY
1

5P02

10u

2P53

1n0

+2V5_SW

+1V2_SW

+12V_DISP

IP33

10R

3P61

IP36

1n0

2P52

FP08

6K8

3P37

2P36

3P38

IP57

5P01

10u

100n

1K0

3n3

2P34

2P33

GNDDC2V5

+12V_DISP

3P45

IP59

2P54

IP44

3P50

2K2

100p

RES

2P48

3P52

GNDDC2 GNDDC2

GNDDC2

22u

100u 4V

2P59

GNDDC2V5

BZX384-C6V8

5P09

10u

6K8

100n

1K0

6P12

4V

2P72

100u

GNDDC2V5

IP58

3n3

3P51

2P43

3P53

1K03P78

1%

180R

1%

680R

3P79 1K0

RES

7P09

2

3

NC

12

NCNC

REF

TS431AILT

NC

2P61

6P05

22n

2P73

4

7P08

100u2P46 4V

22u

GNDDC1V2

GNDDC2

BZX384-C6V8

GNDDC1V2

1

PHD38N02LT

IP23

K

A

53

GNDDC1V2

1%

470R

3P59

3P77

4V

100u

2P68

RES

1%

1K0

1u0

2P58

IP24

GNDDC1V2

GNDDC2V5

2P55

4V

100u

2P56

FP05

FP06

4V

100u

FP03

A

B

C

D

E

3139 123 6273.1

BC817-25W

7P05

+2V5_SW

1%

FP40

3P64

680R

IP08

IP09

IP28

2P40 100n

GNDDC2

1%

3P54

3P56

470R

GNDDC2 GNDDC2

GNDDC2

2P31

GNDDC2

NCP5422ADR2G

IP29

IP55

100n2P41

3P40

GNDDC2

GNDDC2

10K

100p

2P49

IP45

GNDDC2

BZX384-C18

1u0

7P11

4

7

10

8

9

39K

6P15

3P20

BST

1

VFB

2

1

COMP

2

ROSC

10R

IP01

14

VCC

GNDDC2

Φ

3

GATE

GATE

GND

IP37

H1

L1

H2

L2

+1

-1

IS

+2

-2

16

15

1213
11

IP32

220R3P49

IP38

4P01

10R

3P23

IP04

2R2

1

IP25

3P26

2

5
6

IP39

3P72

123456789

+2V5_SW

+1V8_SW

+1V2_SW

H_17370_002.eps

010804

A

B

C

D

E

2P07 A3
2P28 A4
2P29 A4
2P30 A4
2P31 B2
2P32 B3
2P33 B6
2P34 B6
2P35 B4
2P36 B6
2P37 C4
2P38 C4
2P39 D3
2P40 D1
2P41 D1
2P42 E3
2P43 D7
2P46 D8
2P48 E6
2P49 E1
2P52 D5
2P53 D5
2P54 D6
2P55 B8
2P56 B9
2P58 C8
2P59 B6
2P61 D7
2P68 D8
2P72 B7
2P73 B8
2P78 A3
3P13 C4
3P20 B2
3P23 B3
3P25 B4
3P26 C3
3P32 D3
3P34 D4
3P37 B6
3P38 C6
3P40 D2
3P41 D3
3P45 D6
3P47 A3
3P48 A3
3P49 A2
3P50 D6
3P51 D7
3P52 E6
3P53 E7
3P54 E1
3P56 E1
3P59 C8
3P61 C5
3P64 C1
3P68 D4
3P69 D4
3P70 D3
3P71 E3
3P72 E3
3P74 D4
3P77 C8
3P78 C7
3P79 C7
4P01 B3
4P02 C4
5P01 B6
5P02 A5
5P09 C7

6P05 B8
6P12 C7
6P13 A4
6P14 A3
6P15 A2
7P05 A2
7P06-1 B3
7P06-2 B3
7P07-1 C4
7P07-2 C4
7P08 C8
7P09 B7
7P11 C2
FP03 C9
FP05 B9
FP06 B9
FP08 B6
FP35 E4
FP40 C1
IP01 B2
IP02 A5
IP03 B3
IP04 B3
IP08 C1
IP09 D1
IP16 D3
IP17 D3
IP23 B7
IP24 C8
IP25 C3
IP26 C3
IP27 C3
IP28 D1
IP29 D1
IP31 D3
IP32 E2
IP33 A5
IP36 C5
IP37 A2
IP38 B3
IP39 D3
IP40 D4
IP41 D4
IP42 C4
IP43 D4
IP44 D6
IP45 E1
IP55 D1
IP56 A4
IP57 B6
IP58 C7
IP59 D6

SSB: Tuner IF & Demodulator

123456789101112

TUNER IF & DEMODULATOR

B02

A

SAW FILTERS

IF_ATV

B

C

SAW_SW

D

E

DEMODULATOR

RF_AGC

F

VIF2
VIF1

G

SIF2
SIF1

H

IIC_SCL_up

I

IIC_SDA_up

SIF

3139 123 6273.1

+5VS

F101

5111
390n

3119

22K

2V
2V

2V
2V

I120

3188

18K

RES

7113

TDA9886T/V4

VIF22
VIF11

SIF224
SIF123

I141

123456789101112

Circuit Diagrams and PWB Layouts

+5V_IF

3113

6K8

2K2

3117

3123

330R

2123

1n5

RC VCO

OUTPUT

PORTS

OP13

OP222

1n0

10n

2145

RES

2144
2140
3152 100R

2141

I114

6103

I125

I144

3151

+5V_IF

3118

2K2

7109

BC847B

3124
100R

2124

F128

22n

TOP 9

TAGC 14

TUNER AGC VIF AGC

SUPPLY

Vp20

NC

AGND18

13

10n2138

2117

10n

I124

2126

220n

470n

2125

I126

I127

16VAGC

VPLL 19

VIF-PLL

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

AM-DEMODULATOR

SIF

AGC

I143

1102

1

I

3

GND

OFWK3953M

38M9

1SS356

I118

2

I C-BUS TRANSCEIVER

100R

RES

RES

1103

1

I

3

GND

OFWK9656M

38M9

DIGITAL VCO CONTROL

MAD

SCL11

SDA10

I133

I135

I136

1104

4M0

DGND7

5

O1

4

O2IGND

5

O1

4

O2ISWI

2127

15

REF

SIOMAD12

2V1

A115

5117
RES

A124

A125

22p

0V

AFC DETECTOR

SOUND TRAPS

4.5 to 6.5 Mhz

NARROW-BAND FM-PLL

DEMODULATOR

22K

3193

3194

22K

VIF1

A116

VIF2

SIF2
SIF1

1n0

2143

I142

AFC 21

AUDIO PROCESSING

AND SWITCHES

FMPLL4

2V3

+5VS

I131

4126

18K

3195

2137

10n

2139
390p

CVBS 17

AUD

DEEM 5

AFD 6

I130

7134
BC847B

F112

2146

3127

5K6

1u0

8

*

4112

RES

I128

I129

2115

F130

F132

1u0

2133

10n

2136
470n

1101

46LC7.5E LA 7.

*

RES

15

2116

+12V_DISP

TUNER

TUNER

TD1316AF/IHP-2

RF_AGC4SCL5SDA

XTAL_OUT

DC_PWR

1u0

F116

4114

** **

F126

I122

2

F115

4115

F145

4123

F117

F118

*

673CS1

F119

4116

+5V

2122

15p

*

2121

15p

+5VS

15R

3135

2V1

7114
BC847B

1V5

I138

3125

I139

3126

150R

180R

IF_AGC8IF_OUT110IF_OUT2

9

F121

F120

4118

4117

*

2128

F142

4119

1V3

1V3

RES

RES

2134

11

F143

I148

1314

MTMT

12

IF_OUT3

10n

*

15p

5118

33R

F134

4113

*

4120

*

3120

3146 10R

4124

5116

5u6

15p

2135

RES

3140
150R

3187

4K7

I147I146

3136

L78M05CDT

13

2147

330n

+VTUN

3192

1K0

I137

2119
100n

120R5120
10R

120R5121

F140

CVBS_RF

3137

47R47R

7133

OUTIN

COM

2

RES

ONLY FOR ANALOG TV

2142

10u

50V

+5VS

2148

I145

100n

4V9

5112

33R

2120

22u

F133

2118

10n

I121

I123

+5V_SW

+5V_SW

DVB ONLY

7111
74HCT4053D

4V3

F114

1101 A6
1102 B4
1103 C4
1104 E4

A

B

C

D

E

G

H

F

I

2112 B11
2113 B10
2115 B6
2116 B6
2117 C3
2118 C10
2119 C8
2120 C9
2121 E7
2122 D7
2123 F3
2124 F2
2125 F2
2126 F3
2127 F4
2128 F7
2129 H11
2130 H11
2131 I11
2132 I11
2133 G6
2134 H7
2135 H8
2136 G6
2137 H5
2138 H2
2139 H5
2140 I3
2141 I3
2142 C8
2143 F5
2144 I3
2145 I3
2146 B6
2147 A8
2148 A9
2149 B11
3110 A12
3111 A11
3113 B3
3115 B12
3117 C3
3118 C2
3119 C1
3120 D8
3123 E3
3124 E2
3125 G7
3126 H7
3127 H6
3133 H10
3134 H10
3135 F7
3136 A8
3137 A9
3140 I8
3146 E8
3151 I3
3152 I3
3187 I8
3188 D2
3190 D10
3191 E10
3192 B8
3193 I5
3194 I5
3195 I5
4112 B6
4113 B8
4114 C7
4115 C7
4116 C7
4117 C7
4118 C7
4119 C7
4120 D8
4121 D10
4122 E10
4123 D7
4124 G7
4125 B11
4126 I5
5111 B1
5112 B9
5114 H11
5115 H11
5116 G7
5117 B5
5118 A8
5120 D7
5121 E7
6103 C3
6110 A11
7109 C2
7111 B10
7113 F2
7114 G7
7131 D11
7132 E11
7133 A8
7134 I6
A115 B5
A116 B5
A124 C5

3111

5K6

+5V_IF

6110

2u2

F129

F131

DIGITAL

Y
Y

Y

Y
Y
Y
Y
Y

Y
Y

I111

+5V_IF

2113

10n

16

VDD

MDX

6

3133

1R0

3134

1R0

RES
3190

4K7

RES
3191

4K7

*

+5V_IF

*

+5V_IF

4X1
4X2

VEEVSS

8

4121

4122

G4

1
2

7

RES
7131

BSH111

RES
7132

BSH111

*

4110
4111
4112
4113
4114
4115

4116
4117
4118
4119
4120
4121
4122
4123
4124

13
12
11

10

I149

I150

1
2

3
5
9

5114

10u

5115

10u

14

15

4

2112

22u

4125

*

+3V3_SW

+3V3_SW

ANALOG

Y
Y
Y
Y

Y

Y
Y
Y
Y
Y

2130

2129

22u 10n

2131

22u

BAS316

2132

22u

2149

RF_AGC

3110

8K2

3115

39K

RF_AGC_IBO

WAGC_SW

DVB_SW

IIC_SDA

I2C_TDA_SDA

IIC_SCL

I2C_TDA_SCL

VIP_IBO

IF_AGC_IBO

VIM_IBO

IF_ATV

4MHZ_CLK

+5VS

+5V_IF

H_17370_003.eps

010804

A125 C5
F101 B1
F112 A6
F114 H10
F115 B7
F116 B7
F117 B7
F118 B7
F119 B7
F120 B7
F121 B7
F126 C7
F128 F2
F129 H11
F130 G6
F131 H11
F132 A6
F133 B9
F134 A8
F140 G8
F142 B7
F143 B7
F145 C7
I111 A12
I114 C4
I118 C4
I120 C2
I121 D10
I122 D7
I123 E10
I124 E3
I125 F4
I126 F3
I127 F3
I128 G6
I129 G6
I130 H6
I131 H5
I133 I4
I135 I4
I136 I4
I137 B8
I138 G7
I139 G7
I141 C1
I142 F5
I143 H3
I144 H3
I145 A9
I146 A8
I147 A8
I148 I7
I149 H11
I150 H11

SSB: DVB-Demodulator

6
D
D

C
C

B
B
B
C
C
D
D
D
D
D
E
E
E

C
C
D
D
D
D
D
D
D
D
D
D

6

3

3

6

6

C
C
C
C
C
D
D
D
D
D
D

C
C

Circuit Diagrams and PWB Layouts

47LC7.5E LA 7.

1234567891011

B03A B03A

DVB - DEMODULATOR

A

2F24

100n

3F21

33R

16V

5F10

60R

2F11

47u 16V

5F11

60R

2F18

100n

33R45
33R3F31-3 3 6

33R
33R3F32-3 3 6
33R27
33R3F32-1

33R

33R

33R

IF20
IF21
IF22
IF23
IF24
IF25
IF26
IF27

IF28

IF29

IF30

+3V3+3V3FE

+1V8_SW

TDA_DAT(0)
TDA_D
TDA_DAT(2)
TDA_DAT(3)
TDA_DAT(4)
TDA_DAT(5)
TDA_DAT(6)
TDA_DAT(7)

TDA_CLK

TDA_VALID

TDA_SYNC

10046_TDO

STV_TDO

JTAG_TMS

JTAG_TCK

JTAG_TRST

AT(1)

B

4MHZ_CLK

C

RF_AGC_IBO

COMP_OUT

D

E

F

I2C_TDA_SDA

I2C_TDA_SCL

G

3139 123 6273.1

+3V3

+5V_SW

+5V_SW

3F23

2F30

4K7

100n

7F02

74AHC1GU04GW

IF10

3F11
680K

7F03

74AHC1GU04GW

3F15

3F28
100K

680K

FF16

FF18
FF20

IF32

+5V_SW

3V3

3V3

2F27

100n

3F24

3

IF18

100K

2

7

4F11

RES

7F04-1

LM393D

8

1

2V2

4

+5V_SW

7F04-2

8

LM393D

5

6

4

RES

+5V_SW

3F223F27

3F41

2K7

680K

100K

+5V_SW+5V_SW

4F12

2F28
100n

3F42

2K7

IF_AGC_IBO

VIP_IBO

VIM_IBO

2F33

10p

5

2

1

NC

1V3

1

+3V3

5

2

1

NC

1V3

1

3F17 220K

3F25

100K

2F29

2F32 100n

3F29

100K

COMP_OUT

I2C_LOCAL_SDA

I2C_LOCAL_SCL

3V2

1V6

3

220K3F13

3V2

1V6

3

100n

FE_LOCK

FF10

3F10

4

470R

FF13

3F14

4

330R

+5V_SW +5V_SW

3F26

1K0

100n2F31

3F19

4K7

+3V3FE

IF12

IF11

3F12

330R

390R

3F16

3F20
4K7

4MHz_MOJO

2F26

100n

FF24

FF26

FF28

12345

+3V3FE

+1V8_SW

FF11

2F16

2F15

2F14

64

59

60

VDDA33_ADCVDDA33_ADC

VDD18_PLL_ADC

VDD18_PLL_ADC

100n

57

VDDA18_PLL

VDDA18_PLL

53

VDDA18_OSC

VDDA18_OSC

100n

42

50

VDDI18_3

VDDI18_3

VDDI18_4VDDI18_4

100n

22

VDDI18_2VDDI18_2

COFDM

CHANNEL DECODER

I2C

VSS4VSS4

VSS5VSS5

VSS645VSS6

VSSA_ADCVSSA_ADC56VSSA_OSCVSSA_OSC

VSS_PLL_ADCVSS_PLL_ADC

63

58

VSS752VSS7

29

40

2F13

100n

475

VDDI18_1VDDI18_1

VDDE33_3VDDE33_3

JTAG

MPEG-TS (SERIAL)

MPEG-TS (SERIAL)

MPEG-TS (PARALLEL)

VSS3

VSS2VSS2

VSS3

15

24

34

VDDE33_2VDDE33_2

VSS17VSS1

RESET_FE_n

3F18

10K

FF17

FF19

3F30

33R

3F33

10K

3F40

100R

3F44

100R

100R3F46

3F48 100R

IF16IF15IF14

IF17

FF21
FF22

FF23

IF19

3V2

FF25

FF27

FF29

FF30

TDA10046AHT/C1

IF13

9

3V2

1

2V8

2

1V3

1V5

1V5

54

0V7

55

0V6

2V3

21

23

25

26

11

10

4V6

6

4V6

4

5V

3

5V

7F01

100n

2F12

+3V3FE

100n

2F22

CLR_CLR_

AGC_TUNAGC_TUN

AGC_IF

AGC_IF

VIP62VIP

VIM61VIM

XIN

XIN

XOUTXOUT

GPIO0GPIO0

GPIO1GPIO1

GPIO2

GPIO2
GPIO3GPIO3

SADDR0

SADDR0

SADDR1SADDR1

SDA8SDA

SCLSCL

SDA_TUNSDA_TUN

SCL_TUNSCL_TUN

TEST12TEST

VDD33_ADCVDD33_ADC

678

2F10
100n

FF12

2F17

2F19
100n

FF14

19

VDDE33_1VDDE33_1

ENSERI13ENSERI

S_OCLKS_OCLK

S_PSYNC

S_PSYNC

S_UNCORS_UNCOR

UNCOR33UNCOR

TDO20TDO

TDI17TDI

TMSTMS

TCKTCK

TRST14TRST

S_DOS_DO

S_DENS_DEN

DO038DO0
DO139DO1
DO241DO2
DO3DO3
DO4DO4
DO5DO5
DO648DO6
DO749DO7

OCLK37OCLK

DEN36DEN

PSYNC35PSYNC

SACLK51SACLK

2F20

100n

100n

2F23
100n

0V

0V

16

2V4

0V

18

2V4

32

31

30

28

27

3F31-4

2V2
2V2

3F31-2 33R

2V2

3F31-1 33R

2V2

43

3F32-4 4 5

2V2

44

2V2

46

3F32-2

2V2
2V2

1V7

3F34-1
3F34-2

1V3

3F34-3

0V

0V

IF31

2F21

47u

+3V3FE

2F25

100n

IF33

27
18

18

18

27

36

91011

TDA_DAT(0:7)

H_17370_004.eps

010804

A

B

C

D

E

F

G

2F10 B
2F11 B
2F12 B
2F13 B
2F14 B
2F15 B
2F16 B
2F17 B
2F18 B
2F19 B
2F20 B
2F21 B
2F22
2F23
2F24
2F25
2F26
2F27
2F28
2F29
2F30
2F31
2F32
2F33 E
3F10 B
3F11 B
3F12 B
3F13 B
3F14
3F15
3F16
3F17
3F18
3F19
3F20
3F21
3F22
3F23
3F24
3F25
3F26
3F27
3F28 E
3F29 E
3F30 E
3F31-1
3F31-2
3F31-3
3F31-4
3F32-1
3F32-2
3F32-3
3F32-4
3F33 E
3F34-1
3F34-2
3F34-3
3F40 F
3F41 F
3F42 F
3F44 F
3F46 F
3F48 F
4F11
4F12
5F10 B
5F11 B
7F01
7F02 B
7F03
7F04-1
7F04-2
FF10
FF11
FF12
FF13
FF14
FF16
FF17
FF18
FF19
FF20
FF21
FF22
FF23

Circuit Diagrams and PWB Layouts

48LC7.5E LA 7.

SSB: DVB-T: DVB Common Interface

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

DVB-COMMON INTERFACE

B03B B03B

A

A_MOVAL

A_MDO(0)

47R

3K41 47R

3K40

0V0V0V

125

1

MDOA0

MOVALA

MOVAL

MDO0

61

53

2V2

33R

33R

3K03-1

3K02-1

TS_VALID

TS_DATA(0)

PCMCIA_A(10)
PCMCIA_A(11)

PCMCIA_A(9)
PCMCIA_A(8)
PCMCIA_A(13)
PCMCIA_A(14)

PCMCIA_A(12)
PCMCIA_A(7)
PCMCIA_A(6)
PCMCIA_A(5)
PCMCIA_A(4)
PCMCIA_A(3)
PCMCIA_A(2)
PCMCIA_A(1)
PCMCIA_A(0)

33R3K25
33R3K26
33R3K23-4
33R3K23-3

33R
33R

33R3K24-4
33R3K24-3

33R3K24-2 2 7

33R3K24-1 1 8

A_MDO(0:7)

A_MDO(1)

A_MDO(2)

A_MDO(3)

47R

47R

3K44

3K43 47R

3K42

0V

3

5

MDOA1

MDOA2

MDOA374MDOA476MDOA578MDOA680MDOA7

MDO154MDO255MDO3

56

2V2

2V2

2V2

33R

33R

33R

3K03-4

3K03-3

3K03-2

TS_DATA(3)

TS_DATA(2)

TS_DATA(1)

TS_DATA(0:7)

DATDIR
|DATOE

PCMCIA_D(7)

PCMCIA_D(6)
PCMCIA_D(5)
PCMCIA_D(4)
PCMCIA_D(3)
PCMCIA_D(2)
PCMCIA_D(1)

PCMCIA_D(0)

A_MDO(4)

A_MDO(5)

47R

47R

3K46

3K45

0V

0V0V0V

MDO4

MDO558MDO659MDO760

57

2V2

2V2

33R

33R

3K05-2

3K05-1

TS_DATA(5)

TS_DATA(4)

PCMCIA_D(0:7)

A_MDO(6)

3K47 47R

0V

84

TS INTERFACE

2V2

33R

3K05-3

3K05-4

TS_DATA(6)

A_MDO(7)

47R3K48

108

MICLKB

2V2

33R

TS_DATA(7)

PCMCIA_D(3)
PCMCIA_D(4)
PCMCIA_D(5)
PCMCIA_D(6)

PCMCIA_D(7)
A_|CE1
PCMCIA_|OE

PCMCIA_|WE
A_|RDY|IRQ

PCMCIA_AVCC
PCMCIA_VPP

A_MIVAL
A_MICLK

PCMCIA_D(0)
PCMCIA_D(1)
PCMCIA_D(2)

+3V3_STV

PCMCIA_5V

A_|CD1

10K

10K
10K
10K
10K
10K
10K
10K

2V5

3K09

2K14

+3V3_STV

3K04

10K

3K06

+3V3_STV

A_|CD2

3V2

3V2

72

CD1A_

CD2A_7CD2B_

RESET

CLK

34

35

0V

FK01

10K

1n0

RESET_STV

A_MDO(0)

10K

EXTINT
12

3V2

FK02

A_MDO(1)

A_MDO(2)

IK68

3V2

71

CD1B_

INTERRUPTS

MANAGEMENT

INT
14

3V2

+3V3_STV

STV_INT

A_MDI(0)

A_MDI(1)
A_MDI(2)
A_MDI(3)

A_MDI(4)
A_MDI(5)
A_MDI(6)
A_MDI(7)

IK69

3V2

6

A_|RDY|IRQ

IK73

5V

101

100

RDY|IRQA_

3K12

10K

5V

RDY|IRQB_

PCMCIA_|IOWR

3K19
3K21

3K20
3K18
3K15
3K16
3K17
3K22

104

91

MIVALB

MISTRTB

93

MDIB0

98

MDIB195MDIB2

102

MDIB3

106

MDIB4

111

MDIB5

113

MDIB6

115

68p PCMCIA

MDIB7

117

MOCLKB

124

126

128

2

4

MDOB1

MDOB2

MDOB373MDOB475MDOB577MDOB679MDOB7

MDOB0

MOVALB

MOSTRTB

+5V_SW

7K04
2560NK
27M

VDD

1

STNDBY

GND

47n

EMC

IK84

EMC

47n

2K17 2K16

4

3

OUT

2
FK05

A_MDO(0:7)

83

+3V3_STV

CONNECTOR

1K00-A

ROW_A

GND1

WE|P

RDY|BSY

VCC1

VPP1

GND2

CE1

1

D3

2

D4

3

D5

4

D6

5

D7

6
7

A10

8

OE

9

A11

10

A9

11

A8

12

A13

13

A14

14
15
16
17
18

A16

19

A15

20

A12

21

A7

22

A6

23

A5

24

A4

25

A3

26

A2

27

A1

28

A0

29

D0

30

D1

31

D2

32
33
34

6970

FK80 FK67
FK68 FK69
FK70 FK71
FK72 FK73
FK74 FK75
FK10 FK11

FK14 FK15
FK18 FK19
FK22 FK23
FK26 FK27

FK28
FK30
FK31
FK32
FK34
FK36
FK38
FK40
FK42
FK44
FK46
FK48
FK50
FK52
FK54
FK56
FK58
FK60

A_|IOIS16

10K

3K08

+3V3_STV

3K51

WP|IOIS16

FK63

4K7

R

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

1K00-B

O

7172

W_B

GND3
CD1
D11
D12
D13
D14
D15
CE2
VS1
IORD
IOWR
A17
A18
A19
A20
A21
VCC2
VPP2
A22
A23
A24
A25
VS2
RESET
WAIT
INPACK
REG
BVD2|SPKR
BVD1|STSCHG
D8
D9
D10
CD2
GND4

FK62

FK13FK12
FK17FK16
FK21FK20
FK25FK24
FK29

FK33
FK35
FK37
FK39
FK41
FK43
FK45
FK47
FK49
FK51
FK53
FK55
FK57
FK59
FK61

A_MDO(3)

A_MDO(4)

A_MDO(5)

A_MDO(6)

A_|VS1

PCMCIA_AVCC

PCMCIA_VPP

A_|INPACK

3K07

+3V3_STV

A_MDO(7)

10K

A_RESET

0V

120

119

RSTA

RSTB

RD|DIR

WR|STR

17

16

3V2

3V2

MIU_WEN

MIU_OEN

A_|CD1

A_|CE2

PCMCIA_|IORD

A_MISTRT

A_MDI(0:7)

A_MOCLK

A_RESET

A_|WAIT

PCMCIA_|REG

A_MOVAL

A_MOSTRT

A_|CD2

A_|WAIT

5V

122

WAITA_

CS
18

3V2

IK75

MIU_RDY

STV_CS

WAIT|ACK

15

3V2

PCMCIA_|WE

PCMCIA_|REG

IK76

5V

3V2

3V2

123

121

97

WE_

REG_

WAITB_

A1519A1620A1721A1822A19

0V

0V

MIU_ADDR(15)

MIU_ADDR(16)

PCMCIA_|OE

PCMCIA_|IORD

PCMCIA_|IOWR

3V2

3V2

3V2

88

89

90

OE_

IORD_

IOW_R

UCSG

23

3V2

3V2

3V2

MIU_ADDR(17)

MIU_ADDR(18)

MIU_ADDR(19)

MIU_ADDR(0:24)

A_|CE1

A_|CE2

VCCEN

3V2

3V2

70

85

CE1A_82CE1B_81CE2A_87CE2B_

A2024A2125A2226A2327A2428A25

3V2

MIU_ADDR(20)

3V2

0V0V0V

MIU_ADDR(21)

MIU_ADDR(22)

MIU_ADDR(23)

VCCEN

MIU_ADDR(24)

|DATOE

0V0V0V

69

DATOE_

29

0V

STV_A25

DATDIR

68

DATDIR

|ADOE

0V

67

ADOE_

EXTCS

13

ADLE

0V

66

ADLE

GND-DVB2

GND-PROC

GND-TSO

GND-TSI

GND-CORE

VCC-PROC

VCC-TSO

VCC-TSI

VCC-CORE

PCMCIA_5V

86

9
52
39

37

109

64

51

36

VCCEN

PCMCIA_5V

PCMCIA_5V

+3V3

+3V3

+3V3

+3V3_STV

+3V3_CORE

+3V3_STV

FK06

2K07

5K01

5K02

5K03

5K04

5K05

CURRENT

SWITCH

100n

100n

100n

FAULT_

4

2K09

7K05

ST890C

ON_

GND

100n

IN1
IN2

2K10

FK81

FK82

FK83

100n

3V2

1
2
8
3

0V

10K

3K10

FK84

7

5V

OUT1

6

OUT2

IK70

5

SET

0V

1%

3K13

10u

2K0

60R

100n

2K05

60R

100n

2K03

2K02

60R

60R

60R

2K06

2K11

2K13

2K08

10u 16V

16V10u

2K12

16V
10u

B

C

D

STV_TDO
JTAG_TRST

STV_TDI

JTAG_TMS
JTAG_TCK

E

F

G

H

MIU_ADDR(0:24)

I

J

K

3139 123 6273.1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

PCMCIA

CONTROLLER

10

TDO

8

TRST_

2

38
65
11

7K00

STV0700L

|ADOE
ADLE

MIU_ADDR(7)
MIU_ADDR(6)
MIU_ADDR(5)
MIU_ADDR(4)
MIU_ADDR(3)
MIU_ADDR(2)
MIU_ADDR(1)
MIU_ADDR(0)

MIU_ADDR(8)
MIU_ADDR(9)
MIU_ADDR(10)
MIU_ADDR(11)
MIU_ADDR(12)
MIU_ADDR(13)
MIU_ADDR(14)

TDI
TMS
TCK

SA0
32

I C

SA1

33

INTERFACE

SCL
31

4V6

100R

3K00

I2C_LOCAL_SCL

BUS TRANSCEIVER

MIU_DATA(0:15)

MIU_DATA(7)
MIU_DATA(6)

MIU_DATA(5)
MIU_DATA(4)
MIU_DATA(3)
MIU_DATA(2)
MIU_DATA(1)
MIU_DATA(0)

3K01

33R3K49
33R3K50

SDA
30

4V6

100R

I2C_LOCAL_SDA

A_MICLK

A_MISTRT

47R3K28

3K27 47R

0V

0V

110

92

MISTRTA

MICLK MICLKA

MISTRT

50

49

1V60V2V2

TDA_SYNC

TDA_CLK

LATCH

74LVC573ADB

0V

3V2

0V
3V2
3V2
3V2
3V2
0V

3V2
3V2

LATCH

74LVC573ADB

0V

0V
3V2
0V
0V
3V2
0V
3V2

2K04

100n

74LVC245A

0V
0V

0V
0V
0V

0V
0V
0V

7K03

105

7K01

7K02

A_MIVAL

3K29 47R

0V

MIVALA

MIVAL
48

TDA_VALID

11

11

18
17

16
15
14
13
12
11

2D0
3D1
4D2
5D3
6D4

8D6
9D7

OE_

1

2D0
3
4D2
5D3
6D4
7D5
8D6
9D7

94

OE_1

D57

D1

A_MDI(0)

A_MDI(1)

47R3K30

3K31 47R

0V

96

MDIA1

MDIA0

MDI1

MDI0

41

40

2V2

2V2

TDA_DAT(0)

TDA_DAT(1)

+3V3_BUF

20

EN

VCC

C1

1D

GND

10

+3V3_BUF

20

EN

VCC

C1

1D

GND

10

+3V3_BUF

3V2

VCC

1

GND

A_MDI(0:7)

A_MDI(2)

A_MDI(3)

47R

47R3K32

1

8

3K33 47R

0V0V0V

99

103

MDIA2

MDIA3

MDI2

MDI3

42

43

2V2

2V2

TDA_DAT(2)

TDA_DAT(3)

TDA_DAT(0:7)

19Q0
18

Q1

17Q2
16Q3
15Q4
14Q5
13Q6
12Q7

19

Q0

18Q1
17Q2

Q3 16

15Q4
14Q5
13Q6
12Q7

20

3EN1
3EN2

G3

2

10

A_MDI(4)

A_MDI(5)

A_MDI(6)

A_MDI(7)

47R3K34-4

47R3K34-3

47R

453

2

6

7

3K34-1

3K34-2

0V

0V

0V

0V

107

112

114

116

MDIA4

MDIA5

MDIA6

MDIA7

MDI444MDI545MDI646MDI7

47

2V2

2V2

1V3

2V2

TDA_DAT(6)

TDA_DAT(7)

TDA_DAT(4)

TDA_DAT(5)

2K00
100n

0V

PCMCIA_A(7)

3V2

PCMCIA_A(6)

3V2

PCMCIA_A(5)

3V2

PCMCIA_A(4)

3V2

PCMCIA_A(3)

0V

PCMCIA_A(2)

3V2

PCMCIA_A(1)

3V2

PCMCIA_A(0)

2K01
100n

PCMCIA_A(8)

0V

PCMCIA_A(9)

3V2

PCMCIA_A(10)

0V

PCMCIA_A(11)

0V

PCMCIA_A(12)

3V2

PCMCIA_A(13)

0V

PCMCIA_A(14)

3V2

0V

1

19

0V

2K15 100p

2

0V

3

0V

3K23-2

4

0V

3K23-1 1 8

5

0V

6

0V

7

0V

8

0V

9

0V

A_MOCLK

A_MOSTRT

47R3K38

4K7

3K52

3K39 47R

IK85

0V

2V8

118

127

MOCLKA

MOSTRTA

MOCLK

MOSTRT

63

62

1V50V1V3

33R

33R

3K02-3

3K02-2

TS_SYNC

TS_CLK

PCMCIA_A(0:14)

45
36

27
45

36

5V

+5V_SW

10K

3K11

IK72

PCMCIA_AVCC

PCMCIA_VPP

+3V3_STV

+3V3_CORE

+3V3_BUF

H_17370_005.eps

010804

A

B

C

D

G

H

K

E

F

I

J

1K00-A H7
1K00-B H8
2K00 H4
2K01 I4
2K02 H15
2K03 H15
2K04 J3
2K05 H15
2K06 H15
2K07 F14
2K08 H15
2K09 H15
2K10 H15
2K11 I1
2K12 I1
2K13 I15
2K14 F9
2K15 K4
2K16 F8
2K17 G8
3K00 F2
3K01 F2
3K02-1 F4
3K02-2 F4
3K02-3 F4
3K03-1 F5
3K03-2 F5
3K03-3 F5
3K03-4 F5
3K04 H9
3K05-1 F5
3K05-2 F5
3K05-3 F6
3K05-4 F6
3K06 K9
3K07 K9
3K08 K6
3K09 F9
3K10 E14
3K11 F16
3K12 F10
3K13 F15
3K15 B9
3K16 B9
3K17 B9
3K18 B9
3K19 B9
3K20 B9
3K21 B9
3K22 C9
3K23-1 K4
3K23-2 K4
3K23-3 K4
3K23-4 K4
3K24-1 K4
3K24-2 K4
3K24-3 K4
3K24-4 K4
3K25 K4
3K26 K4
3K27 C2
3K28 C3
3K29 C3
3K30 C3
3K31 C3
3K32 C3
3K33 C3
3K34-1 C4
3K34-2 C4
3K34-3 C4
3K34-4 C4
3K38 C4
3K39 C4
3K40 C4
3K41 C5
3K42 C5
3K43 C5
3K44 C5
3K45 C5
3K46 C5
3K47 C6
3K48 C6
3K49 H2
3K50 H2
3K51 K6
3K52 C4
5K01 G15
5K02 H15
5K03 H15
5K04 I15
5K05 I15
7K00 E1
7K01 H3
7K02 I3
7K03 K3
7K04 F8
7K05 E16
FK01 E9
FK02 F10
FK05 G9
FK06 F15
FK10 H7
FK11 H9
FK12 H7
FK13 H9
FK14 I7
FK15 I9
FK16 I7
FK17 I9
FK18 I7
FK19 I9
FK20 I7
FK21 I9
FK22 I7
FK23 I9
FK24 I7
FK25 I9
FK26 I7
FK27 I9
FK28 I7
FK29 I9
FK30 I7
FK31 I7
FK32 I7
FK33 I9
FK34 I7
FK35 I9
FK36 I7
FK37 I9
FK38 I7
FK39 I9
FK40 J7
FK41 J9
FK42 J7
FK43 J9
FK44 J7
FK45 J9

FK46 J7
FK47 J9
FK48 J7
FK49 J9
FK50 J7
FK51 J9
FK52 J7
FK53 J9
FK54 J7
FK55 J9
FK56 J7
FK57 J9
FK58 J7
FK59 J9

5

FK60 J7

5

FK61 J9
FK62 J8
FK63 J7
FK67 H9
FK68 H7
FK69 H9
FK70 H7
FK71 H9
FK72 H7
FK73 H9
FK74 H7
FK75 H9
FK80 H7
FK81 H16
FK82 I16
FK83 I16
FK84 F15
IK68 C10
IK69 C10
IK70 F15
IK72 F16
IK73 C10
IK75 F11
IK76 C11
IK84 G8
IK85 C4

Circuit Diagrams and PWB Layouts

49LC7.5E LA 7.

SSB: DVB MOJO

1234567891011121314

10K

B03C B03C

DVB-MOJO

RES

RES

A

MIU_WEN
NOR_RYBY

RES

4G09
4G10

+3V3

3G18
3G19

3G15

3G16
3G17

10K
10K
10K
10K
10K

MOJO_TRST
MOJO_TDI
10046_TDO
MOJO_TMS
MOJO_TCK

10K3G20

RESET_n

3G38

FG10
FG11

FG12
FG14
FG15

FG16

FG40
FG41

B

RESET_n

4MHZ_MOJO

C

2G31

RES

4G31

100n

+1V2_SW

RES

5G03

100MHz

33R5G05

1V2clean

2G32

100n

2G33

10u 16V

FG37

MOJO_TCK

MOJO_TRST

1V2

0V

0V

3V3

3V3

3

158

RESETN

2

TCK

TRST

157

160

159

XTAL_IN

AVSS_PLL

AVDD_PL L

XTAL_OUT

MOJO_TMS

FG18

3V3

1

TMS

DSU_TPC0

3V2

33R

3G48

3V2

208

207

TDI

TDO

RES RES

1G01-1

FTSH

W_2

RO
1G01-2

FG13

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

2019

FTSH

ROW_1

FOR DEV. ONLY

4G01
4G02
4G03

4G04
4G05

RES

CONFIGURABLE

4G05 FOR DEVELOPMENT ONLY
4G01, 4G02, 4G03,4G04 FOR PRODUCTION

JTAG_TCK

JTAG_TRST

JTAG_TMS

10046_TDO

STV_TDI

SDRAM_DATA(0:15)

SDRAM_DATA(0)
SDRAM_DATA(1)
SDRAM_DATA(2)
SDRAM_DATA(3)
SDRAM_DATA(4)
SDRAM_DATA(5)
SDRAM_DATA(6)
SDRAM_DATA(7)
SDRAM_DATA(8)
SDRAM_DATA(9)
SDRAM_DATA(10)
SDRAM_DATA(11)
SDRAM_DATA(12)
SDRAM_DATA(13)
SDRAM_DATA(14)
SDRAM_DATA(15)

2V3
2V9
2V5

2V5

2V6
2V6
2V6
2V6
2V6

0V

2V3
2V3
0V
2V3

0V

113

114

115

116
117
118

0V

121
122
132
129
128
127
126
125
124
123

D

7G00-8

PNX8314HS

(JTAG-ETAG-SYS)

PCST0

186

DSU_TPC1

187

2G02 10u16V

FG39

+3V3

PCST1

195 4

10u

2G17 16V

196

12012

0

189

188

197

1V2_CORE

2G12

16V2G18

2G13

10u

2G14
2G15
2G16
2G03
2G04
2G05
2G06
2G07
2G08

2G09
2G10

5G04

60R

SYS_RESETN

194

3G11

+3V3_VDDP

100n
100n
100n2G11

2G22

16V10u

2G23

16V

10u

2G24

10u

16V

+3V3_VDDP

5

IG21

10K

100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n

1V2

3V3

+3V3_VDDP

10K

3G12

FG26

DSW_n

7G00-1

41

PNX8314HS

78
119

(PWR)

VDDC

134
191
10
43
60
76
94

VDDP

111
130
161
190

AVDD

IDUMP

VSSC

VSSP

42

79
120
135
192

11

MIU_DATA(0:15)

44

61

77

95
112
131
162
193
175

0

169

1

164

2

171

1

166

2

174

1V2

173

IG13

2G21

3G40

+3V3clean

100n2G19
100n2G20
100n

1%
1K2

DSU_CLK

7G00-2

0
1
2
3

TS_DATA
4
5
6
7

IG18

202

1V

IG19

203

IG20

204

1V6

206
205

3G44 100R
3G46
3G47

PNX8314HS

SD_OUT

SCK_OUT

0V

WS_OUT

SPDIF

FSCLK

100R3G43

100R
100R

(TS)

TS_SYNC

TS_STROBE

TS_VAL

7G00-3

PNX8314HS

(AV)

FG32
FG34

7

FG35

8

FG36

9
36
198
39

6

4V6
4V6
3V3
3V3

0V

30

1V6

29

1V3

28

CVBS

Y

C

CVBS

Y

CVBS

B

G

Y

R
C

PNX8314HS

(I2C-USB-SCO)

SCL0

SDA0

SCL1

SDA1

SC0_DA

USB_OVRCUR

SC0_OFF

168

172

170

163
165

167

7G00-6

TS_SYNC

TS_CLK

TS_VALID

0V

C_CVBS

0V
0V

0V

SC0_CMDVCC

USB_PWR

SC0_CCK

B|Pb

R|Pr

USB_DP

USB_DM

SC0_RST

G|Y

+1V2_SW

5G06

33R

5G07

33R

RES
5G01

100MHz

RES

5G02

100MHz

37
199
200
201

40

38

E

2V2

TS_DATA(0)
TS_DATA(1)
TS_DATA(2)
TS_DATA(3)
TS_DATA(4)
TS_DATA(5)
TS_DATA(6)
TS_DATA(7)

2V2
2V2
2V2
2V2
2V2
2V2
2V2

20
21
22
23
24
25
26
27

F

MOJO_I2S_OUT_SD
MOJO_I2S_OUT_SCK
MOJO_I2S_OUT_WS

IG14

IG15

IG16

3G35

3G34

3G33 22R

22R
22R

G

H

I2C_LOCAL_SCL
I2C_LOCAL_SDA

IIC_SCL_SIDE
IIC_SDA_SIDE

FG31
FG33

FG17

FG19

I

RESET_FE_n
RESET_STV
user_EEPROM_WP

FE_LOCK
NOR_RYBY
NOR_WP
STV_INT
STV_A25

RXD0
TXD0

MIU_DATA(0)
MIU_DATA(1)
MIU_DATA(2)
MIU_DATA(3)
MIU_DATA(4)
MIU_DATA(5)
MIU_DATA(6)
MIU_DATA(7)
MIU_DATA(8)
MIU_DATA(9)
MIU_DATA(10)
MIU_DATA(11)
MIU_DATA(12)
MIU_DATA(13)
MIU_DATA(14)
MIU_DATA(15)

3G63 10K

3G57-1

3G57-3
3G58-1
3G58-3

3G56-1
3G56-3 33R
3G59-1

3G57-2

3G58-2

3G56-4
3G59-2
3G59-4

MIU_RDY
NOR_CS
STV_CS

MIU_OEN
MIU_WEN

3V3

31

0V

32

4V6

185

33

3V3

34

0V

35

0V

45

0V

46

0V

47

3V3

48
49

IG17

0V

12
13

0V

14

0V

15
16

33R

18

69

36

33R

3G60

33R

3G61

33R

3G62

33R

67

1

33R

65

36

33R

63

18

33R

59

36

57

18

33R

55

3

33R3G59-3

53

27

33R

68

4

33R3G57-4

66

27

33R

64

45

33R3G58-4

62

27

33R3G56-2

58

45

33R

56

27

33R

54

33R45

52
109

3V3
3V3

74
73

3V3

72
71

3V3

70

3V3

108
106

8

6
5

3139 123 6273.1

1234567891011121314

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

IR_IN

IR_OUT

PWM

VS

VPP

C4

C8

SC1_DA

SC1_CMDVCC

SC1_RST

SC1_OFF

SC1_CCK

CTS0

RTS0

RX0

TX0

DCD0

PLL_OUTX0

0V

0

0V

1

0V

2

0V

3

0V

4

0V

5

0V

6

0V

7

0V

8

0V

9

0V

10

0V

11

0V

12

0V

13

0V

14

0V

15

MIU_RDY

MIU_CS_N0

MIU_CS_N1

MIU_CS_N2

MIU_CS_N3

MIU_OE_N

MIU_WEN

MIU_MASK0

PNX8314HS

(SDRAM)

SDRAM_DATA

PIO <0:15>

MIU_DATA

7G00-4

SDRAM_ADDR

7G00-7

PNX8314HS

(GPIO)

7G00-5

PNX8314HS

(MIU)

MIU_ADDR

10

11

12

13

14

DQM0

DQM1

CAS

RAS

WE

CKE

HSCKB

DTR0

VCXO_CLOCK

RX1

BOOT <0:3>

ITU_OUT

ITU_CLOCK

PIO <16:27>

MIU_MASK1

MIU_LBA

MIU_BAA

MIU_CLK

0

1

2

3

4

5

6

7

8

9

TX1

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

156
149
148
147
146
145
144
152
143
142
150
151
138
133
140
141
139
137
136

0

1

2

3

4

5

6

7

0
1
2
3
4
5
6
7
8
9

153

154

155

0V
0V

0V
0V
0V
0V

0V
0V
0V
0V
0V

2V1
3V1
3V

2V9

3V

3V3

1V5

17

0V

0V

18

3V3

19

176
177

3V3
3V3

178

FG28

179
180
181
182

FG30

183

0V

184

75
80
81
82
83
84
85
86
87
88
89
90
91
92
93
96
97
98

99
100
101
102
103
104
105

107
110

50

51

SDRAM_ADDR(0:14)

0V
0V
0V
0V

SDRAM_ADDR(0)

SDRAM_ADDR(1)

SDRAM_ADDR(2)
SDRAM_ADDR(3)
SDRAM_ADDR(4)
SDRAM_ADDR(5)
SDRAM_ADDR(6)
SDRAM_ADDR(7)
SDRAM_ADDR(8)

SDRAM_ADDR(9)
SDRAM_ADDR(10)
SDRAM_ADDR(11)
SDRAM_ADDR(12)
SDRAM_ADDR(13)
SDRAM_ADDR(14)

SDRAM_DQM0
SDRAM_DQM1

FG22

RX_ZAP

FG23

TX_ZAP

0V

PIO19|ITU_OUT0|BOOT0
PIO20|ITU_OUT1|BOOT1
PIO21|ITU_OUT2|BOOT2

PIO22|ITU_OUT3|BOOT3

3V2

FG29

RES

3G51

10K

DSW_I2C_enable

10K

3G54

0V

3V3

0V

3V3
3V3
3V3
3V3

0V
0V

3V3

0V
0V

3V3

0V

3V3

0V

0V
3V3
3V3
3V3
3V3
3V3
0V
0V
0V

SDRAM_CAS
SDRAM_RAS

SDRAM_WE

SDRAM_CKE

SDRAM_CLK

FG21
FG20

3G55

10K

RES

3G41

FG24

FG25

FG27

10K

3G30
3G28

3G31

3G37

MIU_ADDR(0)
MIU_ADDR(1)
MIU_ADDR(2)
MIU_ADDR(3)
MIU_ADDR(4)
MIU_ADDR(5)
MIU_ADDR(6)
MIU_ADDR(7)
MIU_ADDR(8)

MIU_ADDR(9)
MIU_ADDR(10)
MIU_ADDR(11)
MIU_ADDR(12)
MIU_ADDR(13)
MIU_ADDR(14)
MIU_ADDR(15)
MIU_ADDR(16)
MIU_ADDR(17)
MIU_ADDR(18)
MIU_ADDR(19)
MIU_ADDR(20)
MIU_ADDR(21)
MIU_ADDR(22)
MIU_ADDR(23)
MIU_ADDR(24)

10K

10K

+3V3

10K

+3V3

RES

10K3G36
10K3G29

+3V3

RES

10K

IBO_IRQ

+3V3

+3V3

MIU_ADDR(0:24)

H_17370_006.eps

010804

A

B

C

D

E

F

G

H

I

1G01-1 A8
1G01-2 A9
2G02 G5
2G03 G6
2G04 G6
2G05 G6
2G06 H6
2G07 H6
2G08 H6
2G09 H6
2G10 H6
2G11 H6
2G12 F6
2G13 G6
2G14 G6
2G15 G6
2G16 G6
2G17 G6
2G18 G6
2G19 H9
2G20 I9
2G21 I9
2G22 H6
2G23 I6
2G24 I6
2G31 B3
2G32 C5
2G33 C5
3G11 E6
3G12 E9
3G15 A4
3G16 A4
3G17 A4
3G18 A4
3G19 A4
3G20 A4
3G28 E14
3G29 F14
3G30 E14
3G31 E14
3G33 G2
3G34 G2
3G35 F2
3G36 F14
3G37 F14
3G38 A4
3G40 I8
3G41 E14
3G43 H2
3G44 H2
3G46 H2
3G47 I2
3G48 C6
3G51 G13
3G54 G13
3G55 G13
3G56-1 H10
3G56-2 H10
3G56-3 H10
3G56-4 H10
3G57-1 G10
3G57-2 H10
3G57-3 G10
3G57-4 H10
3G58-1 G10
3G58-2 H10
3G58-3 G10
3G58-4 H10
3G59-1 H10
3G59-2 H10
3G59-3 H10
3G59-4 H10
3G60 I11
3G61 I11
3G62 I11
3G63 F10
4G01 B9
4G02 B9
4G03 B9
4G04 C8
4G05 C8
4G09 A2
4G10 A2
4G31 C3
5G01 G5
5G02 G5
5G03 C5
5G04 I6
5G05 C4
5G06 F5
5G07 F5
7G00-1 F7
7G00-2 E3
7G00-3 F3
7G00-4 A12
7G00-5 G12
7G00-6 H4
7G00-7 D12
7G00-8 D7
FG10 A7
FG11 A7
FG12 A7
FG13 A9
FG14 A7
FG15 A7
FG16 A7
FG17 H2
FG18 C6
FG19 H2
FG20 E13
FG21 E13
FG22 E13
FG23 E13
FG24 E14
FG25 E14
FG26 E9
FG27 F14
FG28 F13
FG29 F13
FG30 F13
FG31 H2
FG32 H3
FG33 H2
FG34 H3
FG35 H3
FG36 I3
FG37 C5
FG39 F6
FG40 A7
FG41 A7
IG13 I8
IG14 F1

IG15 G1
IG16 G1
IG17 F11
IG18 F2
IG19 G2
IG20 G2
IG21 E6

Circuit Diagrams and PWB Layouts

50LC7.5E LA 7.

SSB: DVB MOJO Memory

12345678

DVB-MOJO MEMORY

B03D B03D

MIU_ADDR(0:24)

A

B

C

D

E

SDRAM_ADDR(0:14)

SDRAM_ADDR(12)

SDRAM_ADDR(0)
SDRAM_ADDR(1)
SDRAM_ADDR(2)
SDRAM_ADDR(3)
SDRAM_ADDR(4)
SDRAM_ADDR(5)
SDRAM_ADDR(6)
SDRAM_ADDR(7)
SDRAM_ADDR(8)
SDRAM_ADDR(9)
SDRAM_ADDR(10)
SDRAM_ADDR(11)

SDRAM_ADDR(13)
SDRAM_ADDR(14)

SDRAM_CLK
SDRAM_CKE

SDRAM_RAS
SDRAM_CAS
SDRAM_WE

+3V3

K4S281632I-UC60T

100MHz

0V
0V
0V

0V
0V
0V
0V
0V
0V
0V
0V
0V

0V

0V

1V5

3V3

3V
3V

3V

5H01

7H02

2H06

23
24
25
26
29
30
31
32
33
34

22

35

20
21

38
37
19
18
17
16

16V10u

FH07

100n

2H10

2H09 100n

11427

0
1
2
3
4
5

A

6
7
8
9
10
11

0

BA

1

CLK
CKE
CS
RAS
CAS
WE

28 41 54 6 12 46

100n

100n2H13

2H08

39

VDD VDDQ

Φ

SYNC

DRAM

4x2Mx16

VSS

100n

2H03

100n2H12

43

VSSQ

D

2H11 100n

49

DQM

NC

52

37

EPROM

4Mx8/2Mx16

0

32M-1

2/4/8MB

NOR

FLASH

27

2H15

220n

7

6
5

FH08

2H07

VPP/WP_

46

5H02

+3V3

MIU_ADDR(1)
MIU_ADDR(2)
MIU_ADDR(3)
MIU_ADDR(4)
MIU_ADDR(5)
MIU_ADDR(6)
MIU_ADDR(7)
MIU_ADDR(8)
MIU_ADDR(9)
MIU_ADDR(10)
MIU_ADDR(11)
MIU_ADDR(12)
MIU_ADDR(13)
MIU_ADDR(14)
MIU_ADDR(15)
MIU_ADDR(16)
MIU_ADDR(17)
MIU_ADDR(18)

MIU_ADDR(19)

MIU_ADDR(20)

MIU_ADDR(22)
MIU_ADDR(21)

+3V3_NOR48

MIU_ADDR(20)

NOR_RYBY

RESET_n

36

0V

40

2

1V3

0

4

1V3

1

5

1V

2

7

1V3

3

8

1V3

4

10

1V2

5

11

0V

6

13

1V4

7

42

1V3

8

44

1V3

9

45

1V

10

47

1V4

11

48

1V4

12

50

1V3

13

51

0V7

14

53

1V2

15

15

L

U

3V3

39

2V2

SDRAM_DATA(0:15)

SDRAM_DATA(0)
SDRAM_DATA(1)
SDRAM_DATA(2)
SDRAM_DATA(3)
SDRAM_DATA(4)
SDRAM_DATA(5)
SDRAM_DATA(6)
SDRAM_DATA(7)
SDRAM_DATA(8)

SDRAM_DATA(9)
SDRAM_DATA(10)
SDRAM_DATA(11)
SDRAM_DATA(12)
SDRAM_DATA(13)
SDRAM_DATA(14)
SDRAM_DATA(15)

SDRAM_DQM0
SDRAM_DQM1

MIU_WEN
MIU_OEN

NOR_CS

3H00

+5V_SW

+5V_SW

4H02

4H03

RES

3K3

4H01

RES

3H14

1R0

4H04

4H00

I2C ADDRESS:A0

5V

IH04

FH05

7H03

M24C64-WMN6

1
2
3

3V2

0V
3V2
3V2
3V2

3V2

0V
0V

3V2

0V
0V

3V2

0V

3V2

0V
0V

3V2

0V

3V2

3V2
3V2

3V2

3V2

3V2
3V2

3V2
3V2

FH01

FH06

+3V3_NOR48

5H03

FH03

100MHz

5V

8

Φ

(8Kx8)

EEPROM

0

ADR

1
2SDA

4

100MHz

M29W320ET70N

25

0

24

1

23

2

22

3

21

4

20

5

19

6

18

7

8

8

7

9

6

10

5

11

4

12

3

13

2

14

1

15

48

16

17

17

16

18

9

19

10

20

15

RB

12

RP

11

WE

28

OE

26

CE

47

BYTE

2H14

220n

WC

SCL

7H00

A

16V10u

D

2H04

10
11
12
13
14
15

A-1

NC

+3V3_NOR48

100n

0
1
2
3
4
5
6
7
8
9

4V6

4V6

4V6

29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45

13

14

3H11

FH00

FH04

FH02

IH07

IH06

0V
0V

0V

0V
0V
0V

0V

0V
0V
0V

0V

0V

0V

0V

0V
0V

0V

3V2

+5V_SW

10K

4H12

3H10

100R

3H09
100R

MIU_DATA(0)
MIU_DATA(1)
MIU_DATA(2)
MIU_DATA(3)
MIU_DATA(4)
MIU_DATA(5)
MIU_DATA(6)
MIU_DATA(7)
MIU_DATA(8)

MIU_DATA(9)
MIU_DATA(10)
MIU_DATA(11)
MIU_DATA(12)
MIU_DATA(13)
MIU_DATA(14)
MIU_DATA(15)

MIU_ADDR(22)

4H05

3H05

10K

4H15

RES

3K33H12

3H13 3K3

MIU_DATA(0:15)

+3V3_NOR48

NOR_WP

user_EEPROM_WP

I2C_LOCAL_SCL

I2C_LOCAL_SDA

A

B

C

D

E

2H03 C2
2H04 A7
2H06 B1
2H07 A7
2H08 C2
2H09 C2
2H10 C2
2H11 C3
2H12 C2
2H13 C2
2H14 D6
2H15 D6
3H00 C5
3H05 C7
3H09 E7
3H10 E7
3H11 E7
3H12 E8
3H13 E8
3H14 D5
4H00 C5
4H01 C5
4H02 C5
4H03 C5
4H04 C5
4H05 C7
4H12 E7
4H15 C7
5H01 B1
5H02 A6
5H03 D5
7H00 A6
7H02 C1
7H03 E5
FH00 E7
FH01 D5
FH02 E7
FH03 D6
FH04 E7
FH05 D5
FH06 D5
FH07 B2
FH08 A7
IH04 C5
IH06 C7
IH07 C7

3139 123 6273.1

H_17370_007.eps

010804

12345678

Circuit Diagrams and PWB Layouts

SSB: DVB MOJO Analog Back End

51LC7.5E LA 7.

123456789

DVB-MOJO ANALOG BACK END

B03E B03E

A

B

C

D

E

3139 123 6273.1

3J59

180R

C_CVBS

G|Y

B|Pb

R|Pr

IJ63

IJ64

IJ65

IJ66

3J65

3J63

180R

3J61

180R

180R

2J72

123456789

2J69

180p

2J63

2J66

RES
2J71

22p

5J55

3u3

180p

180p

180p

RES
2J68

22p

5J54

3u3

RES

2J60

22p

5J52

3u3

RES
2J64

22p

5J53

3u3

2J73

2J70

68p

2J62

2J67

68p

68p

68p

3J66

3J62 3J60

3J64

47R

47R

47R 47R

RES

RES

RESRES

6J61 6J60

6J63 6J62

PESD5V0S1BA

PESD5V0S1BA PESD5V0S1BA

PESD5V0S1BA

FJ22

FJ23

FJ26

FJ27

IBO_CVBS_IN

IBO_G_IN

IBO_B_IN

IBO_R_IN

+3V3_SW

+1V8_SW

5J01

60R

2J01

2J02

100n

10u 16V

IJ01

3J03
100R

6J03

1V8

BAS316

UART CONNECTOR (SERVICE)

1J14

MSJ-035-29D PPO (PHT)

2

3

1

1001

FJ02

1002

2

6J14

ESD Protection

3J02

7J05
PDTC114ET

FJ24

FJ25

PESD3V3L1BA1PESD3V3L1BA

3J01

RES

RES

IJ02

4J14

3J14

4J15

12K

6J15

12

22K

2J04

100R

100R3J15

+3V3_SW

22u 16V

1V2

IJ67

IJ68

FJ28

7J04

SI2301BDS

2J05

100u 16V

TXD0

RXD0

EMC

FJ01

2J06

+3V3

100n

H_17370_008.eps

+3V3clean

010804

A

B

C

D

E

1001 D7
1002 D7
1J14 D6
2J01 B7
2J02 B7
2J04 B8
2J05 C8
2J06 C9
2J60 A3
2J62 B3
2J63 B2
2J64 C3
2J66 C2
2J67 C3
2J68 D2
2J69 D2
2J70 D3
2J71 E2
2J72 E2
2J73 E2
3J01 B8
3J02 B8
3J03 B6
3J14 D8
3J15 D8
3J59 B2
3J60 B3
3J61 C2
3J62 C3
3J63 D2
3J64 D3
3J65 E2
3J66 E3
4J14 C8
4J15 D8
5J01 A6
5J52 A3
5J53 C3
5J54 D2
5J55 E2
6J03 B7
6J14 D7
6J15 D8
6J60 B3
6J61 C3
6J62 D3
6J63 E3
7J04 B9
7J05 B7
FJ01 B9
FJ02 D6
FJ22 A4
FJ23 C4
FJ24 D8
FJ25 D8
FJ26 D4
FJ27 E4
FJ28 A8
IJ01 B7
IJ02 B8
IJ63 B1
IJ64 C1
IJ65 C1
IJ66 C1
IJ67 D8
IJ68 D8

Circuit Diagrams and PWB Layouts

A

G

52LC7.5E LA 7.

SSB: Micro Processor

F353 I5

3L15 F1

1 2 3 4 5 6 7 8 9 10111213

10p

RES

2L21

*

RES

2L31 1n0

100p

RES

2L26

E_PAGE

IIC_SDA

IIC_SCL

1R0

47R3389

47R

RES

RES

*

*

RES

D

A-1

NC

RES

4L20

*

RES

3L20 100R

RES

4L21

*

RES

3L21

10p

2L20

*

4L24

*

RES

4L25

RES

*

3L25 33R

1n02L30

*

3L22 33R

RES

*

2L34 1n0

*

29

0

31

1

33

2

35

3

38

4

40

5

42

6

44

7

30

8

32

9

34

10

36

11

39

12

41

13

43

14

45

15

10
13
14

2341

100n

4302

I374

1n0

EMC

2335

2336 1n0

100R

10p

RES

RES

2L23

*

IL20

33R3L24

IL22

1n02L33

RES

RES

*

33R3L23

22n

RES

RES

4L26
3L27

9

RES

F312
F314
F316
F318
F320
F322
F325
F327

F337

NC

5306

NC

+3V3_STBY

1n02337

1n0

2339

2L29

100R

RES

2L35 1n0

*

AD(0:7)

AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)

A(0)

30R

8

VCC

SDA03SDA16

SCL02SCL17

5EN

GND

4

8

PCA9515ADP

VCC

3SDA0 6SDA1

2SCL0 7SCL1

EN5

GND

4

RES

4304
4305

RES

RES

4303

I376

1n02332

IL35

4309

10p

2L22

2L24
2L25

2L32 1n0

*

22n

FOR EMC

2L28

7302

PCA9515A

NC

7303

NC

FRONT_Y_CVBS_IN_T

220n
220n

*

+3V3_SW

1

NC

+3V3_SW

3K3

3362

1

NC

3V2

REMOTE

FRONT_C_IN_T

IL21

SIDE_AUDIO_IN_L
SIDE_AUDIO_IN_R

IL23

HP_LOUT

HP_ROUT

HP_DETECT_T

+3V3_SW

3360 4K7

3359 4K7

3K33361

4306

4307

RES

RES

IIC_SDA_SIDE

IIC_SCL_SIDE

KEYB

LED1
LED2

H_17370_009.eps

IIC_SDA

IIC_SCL

010804

MICROPROCESSOR

B04

CPU_RST

+3V3_STBY

10K

100n

5

VDD

Φ

V

OUT

32

SUBERGND

+3V3_STBY

3L86

22K

7308

BC847BW

7323-2
NL27WZ08USG

3L15
330R

100n

7

7323-1

NL27WZ08USG

2315

3393

4
3V3

I380

IL25

15K

RES

4323

4326
4327
4328

6301 BAS316

3319

2317
100n

I353
I330
I332

I334

4K7

RES
RES

100R 3L63

F379

I393

0V8

220n

2338

3395

I394

3398
100K

+3V3_STBY

8

3

4

1
2

48

+3V3_STBY
+3V3_STBY
+3V3_STBY

3300 1K2

3L28

+3V3_STBY

3L04
1K5

1K5

5

47K

3L72

6

IL26

3343 100R

100R3345

+3V3_STBY

2314

10K3316

2316
3314 10K

3318

CNVSS

RES

3321

F380

F381

+3V3_STBY

AD(0:7)

3L57
3339 100R
3341 100R

HDMI_INT

+12V_DISP

6318
PDZ8.2-B
+3V3_STBY

10K

3399

0V6

7L10

BC847BW

22R

3L71

22R

3384

4K73L94

3L73

47K

3386 100R

4K7

3L95

F342

F343

6307

6306

1302

12

12

PESD3V3L1BA

PESD3V3L1BA

7311

M30300SAGP

15p

1V5

10M

1301

15p

1V5

I312

100R

I387

1K0
100R3323

AD(0)
AD(1)

2318

100n

AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)

I352

100R

I331

100R3338

I333
I335

100R3340

I338

F385

100R

F361

3L17

A(0:7)

A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)

A(8:19)

A(8)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)

A(16)
A(17)
A(18)
A(19)

F389

I365

3V3

I368

I384

COMPAIR

1314

MSJ-035-29D PPO (PHT)

2

3

F344

1303

13
11
6
7
10
96
86

85
84
83
82
81
80
79

78
77
76
75
74
73
72
71

70
69
68
67
66
65
64
63

61
59
58
57
56
55
54
53

52
51
50
49
48
47
46
45

44
43
42

41
40
39
38
37

1

7312

BD45275G

F330

1

10K

3325

B

C

MUTEn
CTRL_DISP1_up
CTRL_DISP4_up
BL_ON_OFF
ANTI_PLOP
HDMI_INT_MUX
HDMI_INT_MAIN
HDMI_INT_SIDE

D

POWER_DOWN

6317

RES

BZX384-C3V3

7317

BC847BW

E

DC_PROT

CE

F

2323

CS
WR

RD

ALE_EMU

H

IIC_SDA_up

IIC_SCL_up

I

+3V3_STBY

+3V3_STBY

60R

5301

2312

100n

2313

14

60

VCC

Φ

IN

XTAL

OUT

BYTE

CNVSS

RESET

VREF

0
1
2
3

DATA

4

6
7

P0<0:7> SOUT3

AN0<0:7>

8
9
10
11

DATA

12
13
14
15

P1<0:7>

INT<3:5>

0
1
2
3

ADDR

4
5
6
7

D<0:7>

D<0:7>
A<0:7>
AN2<0:7>

P2<0:7>

8
9
10
11
12

ADDR
13
14
15

P3<0:7>

16
17

ADDR
18

19
0
1

CS

2
3

P4<0:7>

WRL
WR
WRH
BHE
RD
BCLK
HLDA
HOLD
ALE
RDY
CLKOUT

P5<0:7>

AVSS

VSS

12

62

RESERVED

1313

1
2
3

440054-3

+3V3_STBY

100n

97

AVCC

AN

P10<0:7>

KI<0:3>

TBIN<0:4>5

CLK3

SIN3

CLK4
ANEX0
SOUT4
ANEX1

SIN4

ADTRG

P9<0:7>

TA4OUT

TA4 IN

INT

XCOUT

XCIN

P8<0:7>

A0OUT

T

TXD2

SDA2

TB5IN

TA0 IN

RXD2

SCL2
A1OUT

T

CLK2

TA1 IN

CTS2

RTS2

TA2OUT

TA2 IN

TA3OUT

TA3 IN

P7<0:7>

CTS0

RTS0

CLK0

SCL1

RXD0

TXD0

SDA0

CTS0

CTS1

RTS1

CLKS1

CLK1

SCL1

RXD1

TXD1

SDA1

P6<0:7>

94

100n

2310

95

0

93

1

92

2

91

3

90

4

89

5

88

6

87

7

DA0
DA1

100

99
98

20

U

19

U

18

0

17

1

16

2

ZP

15

NMI

28

27

26

V

25

V
V

24

W

23

W

22
21

36

35
34

33

32

31
30

29

+5V_STANDBY

I311

F362

F386

5

I326

4

I357

3
2

I389

1

I364

I341
I342

I344

I396
I397

9

I398

8

NC

I351

I354

I359

NC

BOOT LOADER

IBO_RESET

3380

RES

RES

3346 100R

3347 10K

3350 10K
3397 47K

3L56 100R

3L58

3L55 10K

3L60

3L61 100R

4L03

RES

1312

1
2
3
4
5
6
7
8

9
10
11
12
13

1415

+3V3_STBY

3313 330R

3317 330R
3322 100R
3L05 100R

3324 10K
3357 100R

3329

100R
100R3387

3L26 100R

47R3348
10K3349

100R

3L67

100R

3388

RES
4301

F305

SDM

3L79

100R

100R

F309

100R3L02

10K3L03

+3V3_STBY

F346
F347
F349

F348
F353
F351

F352
F354

+3V3_SW

10K3330

1K0

RES

3310

3L96

100K

IL30

I362
IL39

I388

IL31

+3V3_STBY

+3V3_STBY
+3V3_STBY

+3V3_STBY

10K

IL33
F370

F303

PAN E L

F323
FL36

IL38
F302

F304
I390

I366

+3V3_STBY

7314
BC847BW

4K73L01

RES

4313

100R3L09

RESERVED

IL37

7322

PDTC114ET

I367

+3V3_STBY

+3V3_STBY

RES

+3V3_STBY

10K

3L06

I391
I392

100R3315
100R3320
100R3303

100R

100R3L59

3L08 100R

ITV_Connector A:

+5V_STANDBY

75R3309

ITV_SPI_DATA_IN

SC1_CVBS_RF_OUT

3311 75R

HP_DETECT_T

SC1_STATUS
SC2_STATUS

HDMI_HOTPLUG_RESET

3301 100R

1

3354 100R

+3V3_STBY

3L07

BOLT_ON_SCL
BOLT_ON_SDA

ITV_SPI_CLK

IBO_CVBS_IN

IL32

3

2

3306

RES FOR BDS

100R3L53

RES FOR BDS

1311

10K

REMOTE

IBO_IRQ

STANDBY

RESET_n

RST_AUD

RES

3382
3L76 2K2

3L75

3L62 100R

RES

1K0

45

3
2
1

LED1

KEYB

LED2

3356 10K

3L16 1K0

RES

3L12 3K3

3352

3L13

3351 3K3

UART CON

For Development only

TO / FROM SIDE IO

1305

RST_H

E_PAGE

CEC_D

IBO_IRQ

EMC
2327
10n

1309

1
2

1

3

2

4

3

5

4

6

5
6

7

7

8

8

9

9

10
11

10

1-440054-1

INT

6311

RES

BZX384-C6V8

1304

CPU_RST

RES

WR
RD
CE

+3V3_STBY

RES

I318

4316 3L14 10K

BOLT_ON_SDA
BOLT_ON_SCL

F360

1310

6312

RES

HDMI_INT_SIDE
IIC_SCL_SIDE
IIC_SDA_SIDE
HDMI_RST_RX_BUF

DDC_RESET

1K03396

3L11 100R
FOR DVB ONLY

100R

F356

2K2

F350

4K73L93

2324 1u0
3307

3K3

3K3

F357

1L20

7
6
5
4
3
2
1

440054-7

1-440054-0

+3V3_SW

+1V8_SW

+5V_SW

NC

HDMI_RST_RX_BUF

+3V3_SW

+5V_STANDBY

FRONT_CVBS_SVHS_SEL

+3V3_SW
+5V_SW

+3V3_STBY

+3V3_SW

+3V3_STBY

+3V3_SW

1306

1307

6309

RES

STANDBY

STANDBYn

RESET_n

LCD_PWR_ON

WAGC_SW

DDC_RESET

REMOTE

ITV_SPI_CLK

ITV_SPI_DATA_IN

IIC_SDA_up

IIC_SCL_up

SAW_SW

FPGA_BL_BOOST

BACKLIGHT_BOOST

DVB_SW

HDMI_RST_MUX

BOLT_ON_SCL

BOLT_ON_SDA

RES

6308

BZX384-C6V8

1308

6310

RES

BZX384-C6V8

BZX384-C6V8

TO / FROM IR/ LED & KEYBOARD

FRONT_Y_CVBS_IN

FL20

FRONT_C_IN

FL21

L_FRONT_IN

FL22

R_FRONT_IN

FL23
FL24

FL25

FL26

HEAD_PH_L

HEAD_PH_R

HP_DETECT

+3V3_STBY

A(1:7)

A(1)
A(2)
A(3)
A(4)
A(5)
A(6)

A(8:19)

A(7)
A(8)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
A(18)
A(19)

RES

100R

3326
100R

3336

100n

2319

+3V3_STBY

2320

100n

8

M24C64-WMN6

Φ

(8Kx8)

EEPROM

1

0

2

ADR

1

3

2SDA

4

F345

F382

I373
F383
F384

BZX384-C6V8

5302

F368

60R

2311

7L23

F387
F388

F310
F311
F313
F315
F317
F319
F321
F324
F326
F328
F329
F331
F332
F333
F334
F335
F336
F338
F339

F340
F341
F366
F367
F369

WC

SCL

EMC

1n0

2329

3V3

1n0

EMC

25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16

15
12
11
28
26
47

RES
RES

2330

7310

7
6
5

F364
F365

+5V_STANDBY

EMC

M29W800DT-70N6

10u

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

RB
RP
WE
OE
CE
BYTE

+3V3_STBY

3353

F363

3355
100R
3L54

100R

4314
4315

1n0

1n0

2331

2333

1n02340

RES

100p2L27

RES

*

37

EPROM

1Mx8/512Kx16

0

A

8M-1

27

46

IIC_SDA_up

IIC_SCL_up

10K

3L10

5304 220R
3390
3391 47R

IL34

4310

3139 123 6273.1

1 2 3 4 5 6 7 8 9 10111213

1301 B3
1302 I3
1303 I3
1304 A9
1305 A9
1306 H8
1307 I8
1308 I8
1309 I9
1310 I9
1311 H7
1312 I5
1313 I4

A

1314 H3
1L20 H8
2310 A4
2311 C10
2312 A4
2313 A4
2314 B3
2315 A1
2316 B3
2317 B1
2318 C3
2319 E9
2320 F10
2323 F1
2324 F7

B

2327 H9
2329 I10
2330 I10
2331 I10
2332 I12
2333 I11
2335 I11
2336 I11
2337 I12
2338 E2
2339 I12
2340 I11
2341 E12
2L20 A11

C

2L21 A11
2L22 A12
2L23 A12
2L24 A12
2L25 A12
2L26 B11
2L27 B11
2L28 B12
2L29 B12
2L30 B11
2L31 B11
2L32 B12
2L33 B12

D

2L34 C11
2L35 C12
3300 C2
3301 F6
3303 B5
3306 F7
3307 F7
3309 I6
3310 A6
3311 I6
3313 B5
3314 B3
3315 B5

E

3316 B2
3317 B5
3318 B3
3319 A2
3320 B5
3321 B3
3322 B5
3323 B3
3324 B5
3325 B1
3326 E10
3329 C5
3330 A6
3336 E9

F

3338 D3
3339 D3
3340 D3
3341 D3
3343 I2
3345 I2
3346 D5
3347 D5
3348 D5
3349 D5
3350 E5
3351 G7
3352 G7

G

3353 F11
3354 G7
3355 G11
3356 C7
3357 C5
3359 F13
3360 F13
3361 G13
3362 G13
3380 D5
3382 E7
3384 G2
3386 H2

H

3387 D5
3388 E5
3389 H11
3390 I11
3391 I11
3393 D1
3395 E2
3396 C7
3397 E5
3398 E2
3399 E3
3L01 G6
3L02 G5
3L03 H5
3L04 E2
3L05 B5

I

3L06 H6
3L07 H7
3L08 H6
3L09 H6
3L10 H11
3L11 C7
3L12 G7
3L13 G7
3L14 G9

3L16 F7
3L17 D3
3L20 A11
3L21 A11
3L22 B11
3L23 B11
3L24 A11
3L25 A11
3L26 D5
3L27 B12
3L28 D2
3L53 G7
3L54 G11
3L55 F5
3L56 F5
3L57 D3
3L58 F5
3L59 C5
3L60 G5
3L61 G5
3L62 F7
3L63 D2
3L67 E5
3L71 G2
3L72 F2
3L73 H2
3L75 E7
3L76 E7
3L79 F5
3L86 D1
3L93 F7
3L94 H2
3L95 H2
3L96 B6
4301 F6
4302 H11
4303 H12
4304 H12
4305 H12
4306 G13
4307 G13
4309 I12
4310 I11
4313 H6
4314 H11
4315 H11
4316 G9
4323 F1
4326 D1
4327 D1
4328 D1
4L03 H5
4L20 A11
4L21 A11
4L24 A11
4L25 A11
4L26 B12
5301 A4
5302 B10
5304 I11
5306 E12
6301 A1
6306 I2
6307 I3
6308 H8
6309 I8
6310 I8
6311 I9
6312 I9
6317 D1
6318 E2
7302 E12
7303 G12
7308 E1
7310 C10
7311 B3
7312 A1
7314 F6
7317 E1
7322 C6
7323-1 G1
7323-2 F1
7L10 F3
7L23 G10
F302 B6
F303 G6
F304 C6
F305 F5
F309 G5
F310 C10
F311 C10
F312 C12
F313 C10
F314 C12
F315 C10
F316 C12
F317 D10
F318 D12
F319 D10
F320 D12
F321 D10
F322 D12
F323 B6
F324 D10
F325 D12
F326 D10
F327 D12
F328 D10
F329 D10
F330 A1
F331 D10
F332 D10
F333 D10
F334 D10
F335 D10
F336 D10
F337 D12
F338 D10
F339 E10
F340 E10
F341 E10
F342 H3
F343 I3
F344 I3
F345 G10
F346 I5
F347 I5
F348 I5
F349 I5
F350 F8
F351 I5
F352 I5

F354 I5
F356 E8
F357 H8
F360 I9
F361 D3
F362 B5
F363 G10
F364 G10
F365 G10
F366 E10
F367 E10
F368 B10
F369 E10
F370 G6
F379 D2
F380 B2
F381 B3
F382 H10
F383 I10
F384 I10
F385 D3
F386 C5
F387 H10
F388 H10
F389 G3
FL20 A9
FL21 A9
FL22 A9
FL23 A9
FL24 A9
FL25 A9
FL26 A9
FL36 B6
I311 B5
I312 B3
I318 G9
I326 C5
I330 D1
I331 D3
I332 D1
I333 D3
I334 D1
I335 D3
I338 D3
I341 D5
I342 D5
I344 D5
I351 F5
I352 C3
I353 C1
I354 F5
I357 C5
I359 G5
I362 D6
I364 D5
I365 G3
I366 E6
I367 E6
I368 G3
I373 I10
I374 I11
I376 I12
I380 E1
I384 H3
I387 B3
I388 D6
I389 C5
I390 C6
I391 H6
I392 H6
I393 E2
I394 E2
I396 E5
I397 E5
I398 E5
IL20 A12
IL21 A13
IL22 A12
IL23 A13
IL25 F1
IL26 G2
IL30 C6
IL31 D6
IL32 F7
IL33 F6
IL34 I1
IL35 I1
IL37 B6
IL38 B6
IL39 D6

1
2

Circuit Diagrams and PWB Layouts

53LC7.5E LA 7.

SSB: Trident WX68

1234567891011

Trident - WX68

B05A B05A

7C01-3

A

B

C

+3V3_SW

+3V3_SW

+3V3_SW

5C06

220R

5C07

220R

5C08

220R

2C23

2C27

2C29

6.3V10u

6.3V10u 6.3V10u

+3V3_SW

2C22

2C26

2C28

RES

100n

100n

100n

3C39

4K7

FC01

FC02

100n

2C25

FC03

+3V3_SW

4K7

3C42

RES

WX_PVCC

WX_AVCC

100n

2C24

WX_REGVCC

+3V3_SW

4K7

3C40

4K7

3C43

RES

3C41

3C44

4K7

4K7

WX_PVCC

WX_AVCC

WX_REGVCC

IC07

NC
NC

NC

NC
NC
NC

NC

NC
NC

L4
M5
M4
N4
N5
P4
L2
L1
L3
M3
N3
P3
R1
M2
M1
N2
N1
P2
P1
R5
P5
T10
T11
U11
U12
V11
V12
W11
W12
Y11

SVP WX68

PVCC
ANTSTO
AVCC1

C

C2

AV
AVCC3
AVCC4
RXC­RXC+
TMDS_GND1
TMDS_GND2
TMDS_GND3
TMDS_GND4
TMDS_GND5
RX0­RX0+
RX1­RX1+
RX2­RX2+
REGVCC
DGND
PWR5V
DSCL
DSDA
WS
SCDT
SD0
AUDIOCLK
SPDIF
SCK

TA

TA1 M

TB1P
TB1M
TC1P
TC1M
TD1P
TD1M

TE1P
TE1M

TCLK1M

TCLK1P

TCLK2M

TCLK2P

TE2M

TE2P
TD2M
TD2P
TC2M
TC2P
TA2 M

TA2 P
TB2M

TB2P

A14

1

P

B14
A15
B15
A16
B16
A18
B18
A19
B19
B17
A17
F19

E20
H19
G20
G19

F20

E19
D20

B20

A20
D19
C20

TxFPGAe_0p
TxFPGAe_0n
TxFPGAe_1p
TxFPGAe_1n
TxFPGAe_2p
TxFPGAe_2n
TxFPGAe_3p
TxFPGAe_3n
TxFPGAe_4p

TxFPGAe_4n
TxFPGAe_CLKn
TxFPGAe_CLKp
TxFPGAo_CLKn
TxFPGAo_CLKp

TxFPGAo_4n

TxFPGAo_4p

TxFPGAo_3n

TxFPGAo_3p

TxFPGAo_2n

TxFPGAo_2p

TxFPGAo_0n

TxFPGAo_0p

TxFPGAo_1n

TxFPGAo_1p

TO FPGA / TO LVDS CONNECTO R

Pin Name Pin No

WS U12 Use ALE to latch Address Use Falling Edges of WR#&RD# to latch Address(*)
SD0 V12 Use Rising Edge of WR# to latch data(*) Use Falling Edge of WR# to latch data
SCK Y11 I2C Slave Address=0x7E/7F(*) I2C Slave Address=0x7C/7D

2C01 18p

2C02

AD(0:7)

A(0:7)

WX_PAVDD1

WX_PAVDD2
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)
A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
ALE_EMU
WR
RD

IIC_SDA
IIC_SCL

CS

D

E

F

G

3139 123 6273.1

VGA_H

VGA_V

+5V_SW

3C29

+5V_SW

3C32

4K74K7

3C31

22R

3C33

22R

7C03-1

74LCX14T

1

7C03-2

74LCX14T

3

7C03-3

74LCX14T

5

7C03-4

74LCX14T

9

+3V3_SW

14

7

714

714

714

3C30

2

22R

3C34

4

22R

2C33

100n

6

8

3C36

22R

74LCX14T

3C37

22R

714

RES

FOR ITV ONLY

PC_VGA_H

PC_VGA_V

7C03-67C03-5

74LCX14T

10

13

714

1211

1234567891011

1(HIGH) 0(LOW)

1M0

1C24

3C01

18p

24M0

3C02
33R

2C81 2n7
2C82 2n7

18

100R3C04-1

27

3C04-2

3C04-4 100R
3C05-1
3C05-2
3C05-4
3C05-3 100R

3C06-2
3C03-1

3C03-3 100R

3C08
3C09
3C10

100R

36

100R3C04-3
45
18

100R
27

100R

100R

45
36
45

100R3C06-4

36

100R3C06-3

27

100R

18

100R3C06-1

18

100R

27

100R3C03-2

6

3
45

100R3C03-4

100R
100R

0R

W1

XTALI

Y1

XTALOV6Y_G1

U2

MLF1

R4

PLF2

L17

AD0

L18

AD1

L19

AD2

L20

AD3

K17

AD4

K18

AD5

K19

AD6

K20

AD7

N17

ADDR0

N18

ADDR1

N19

ADDR2

N20

ADDR3

M20

ADDR4

M19

ADDR5

M18

ADDR6

M17

ADDR7

J18

ALE

J19

WR_

J20

RD_

H17

SDA

H18

SCL

J17

CPU_CS

7C01-1

SVP WX68

CVBS_OUT1
CVBS_OUT2

TESTMODE

CVBS1

Y_G2
Y_G3

PB_B1
PB_B2
PB_B3
PR_R1
PR_R2
PR_R3

FS1
FS2
FB1

FB2
AIN_H
AIN_V

PC_R
PC_G
PC_B

V5SF

PWM0

INTN

RESET

C

F17
F16

Y10

V10
U10

W10

G17
G18
F18

Y4

W6

Y6

W2

V2
V9

W9

Y9

Y8

W8

V8
V4

W4

Y5
U4

U8
Y7

2C03
2C04
2C05 100n

2C07 100n

2C08 100n

2C09 100n

2C10 100n

2C11 100n

2C12 100n

2C13 100n

2C14

2C15

NC

2C17

2C18 100n

2C19

4C07

100n

2C21

100n
100n

100n2C06

100n

100n

100n

100n
470R3C19

FRONT_CVBS_SVHS_Y_IN

3C20

2C20 100n

2C30 100n

3C25

CVBS_RF

HD_Y_IN

SC1_G_IN

SC1_RF_OUT_CVBS

SC2_CVBS_MON_OUT

SVHS_C_IN

HD_PB_IN

SC1_B_IN

SC1_CVBS_IN

HD_PR_IN

SC1_R_IN

SC2_Y_CVBS_IN

IBO_CVBS_IN

SC2_C_IN

SC1_FBL_IN

PC_VGA_H
PC_VGA_V

IBO_R_IN
IBO_G_IN
IBO_B_IN

1K0

+5V_STANDBY

RST_H

FPGA_BL_DIMMING

RES

3C07

100R

10K

RES

2C73

10u

INT

IC01

+3V3_SW

7C02
BC847BW

3C22

4K7

7C04
BC847BW

RES

4C08

3C23
220R

IC02

3C24
100R

BL_ADJUST

RES

2C74
22u

H_17370_010.eps

010804

A

B

C

D

E

F

G

1C24 A6
2C01 A6
2C02 A6
2C03 A8
2C04 B8
2C05 B8
2C06 B8
2C07 B8
2C08 B8
2C09 B8
2C10 B8
2C11 B8
2C12 B8
2C13 B8
2C14 B8
2C15 B8
2C17 C8
2C18 C8
2C19 C8
2C20 D8
2C21 D8
2C22 A1
2C23 A1
2C24 B2
2C25 B2
2C26 B1
2C27 B1
2C28 C1
2C29 C1
2C30 D9
2C33 F3
2C73 D9
2C74 D11
2C81 B6
2C82 B6
3C01 A6
3C02 A7
3C03-1 C6
3C03-2 C6
3C03-3 C6
3C03-4 C6
3C04-1 B6
3C04-2 B6
3C04-3 B6
3C04-4 B6
3C05-1 B6
3C05-2 B6
3C05-3 B6
3C05-4 B6
3C06-1 C6
3C06-2 B6
3C06-3 B6
3C06-4 B6
3C07 D9
3C08 C6
3C09 C6
3C10 C6
3C19 C8
3C20 C9
3C22 D10
3C23 D11
3C24 D11
3C25 D9
3C29 E2
3C30 E3
3C31 F2
3C32 F2
3C33 F2
3C34 F3
3C36 F3
3C37 G3
3C39 C1
3C40 C2
3C41 C2
3C42 D2
3C43 D2
3C44 D2
4C07 C8
4C08 E10
5C06 A1
5C07 A1
5C08 B1
7C01-1 A7
7C01-3 A3
7C02 D10
7C03-1 E2
7C03-2 F2
7C03-3 F2
7C03-4 G2
7C03-5 G4
7C03-6 G5
7C04 D10
FC01 A2

FC02 A2
FC03 B2
IC01 D10
IC02 D11
IC07 A3

Circuit Diagrams and PWB Layouts

54LC7.5E LA 7.

SSB: DDR & CPU Interface

1234567891011

B05B B05B

DDR&CPU INTERFACE

A

+2V5_VDDMQ

1K0

DDR_VREF

1K0

3D16 3D15

470p

10n2D57

100n

10u

2D46

K4D261638K

18

3D06-4 4 5

45
36

18

3D05-1 22R
3D02-4
3D02-3

3D02-2 2 7

18
3D01-1 22R18
3D01-2 22R27
3D01-3
3D01-4

45

NC NC

22R3D06-1
22R3D06-2 2 7
22R3D06-3 3 6
22R
22R3D05-4

22R3D05-3
22R3D05-2 2 7

22R45
22R36
22R
22R3D02-1

22R36
22R

WX_MD4
WX_MD5
WX_MD6
WX_MD7
WX_MD3
WX_MD2
WX_MD1

WX_MD0
WX_MD15
WX_MD14
WX_MD12
WX_MD13

WX_MD9

WX_MD8
WX_MD10
WX_MD11

WX_MA0
WX_MA1
WX_MA2
WX_MA3
WX_MA4
WX_MA5
WX_MA6
WX_MA7
WX_MA8
WX_MA9
WX_MA10
WX_MA11

DDR_VREF

WX_MCK0
WX_MCK0#
WX_CLKE

WX_BA0
WX_BA1

WX_DQM2
WX_DQM3
WX_DQS2
WX_DQS3

WX_WE#
WX_CAS#
WX_RAS#

3D38

15R

3D40 15R

2_DDQS2
2_DDQS3

7D02

29
30
31
32
35
36
37
38
39
40
28
41

49

24
45
46
44

26
27

20
47
16
51

21
22
23

2D37

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10|AP
A11

VREF

CS_
CK
CK_
CKE

BA0
BA1

LDM
UDM
LDQS
UDQS

WE_
CAS_
RAS_

ID05

2D43

1

18

33

VDD

VSS VSSQ

344866612

10n2D58

10n2D59

470p

100n

100n

2D60

2D39

2D38

3

9

155561

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DNU1
DNU2

58

64

52

10
11
13
54
56
57
59
60
62
63
65

14
17
25
43
53
42

19
50

2D33

2D34

2
4
5
7
8

100n

100n

1_DQ0

1_DQ1
1_DQ2

1_DQ3
1_DQ4
1_DQ5
1_DQ6
1_DQ7
1_DQ8
1_DQ9

1_DQ10
1_DQ11
1_DQ12
1_DQ13
1_DQ14
1_DQ15

NC1
NC2
NC3
NC4
NC5
NC6

2_DQ16

2

2_DQ17

4

2_DQ18

5

2_DQ19

7

2_DQ20

8

2_DQ21

10

2_DQ22

11

2_DQ23

13

2_DQ24

54

2_DQ25

56

2_DQ26

57

2_DQ27

59

2_DQ28

60

2_DQ29

62

2_DQ30

63

2_DQ31

65

14
17
25
43
53
42

19
50

18

3D43-1

2

3D43-2
3D43-3
3D43-4 4 5

45

3D44-4

36

3D44-3

3D44-2

3D44-1 22R1

45

3D47-4

36

3D47-2 2 7

18

3D47-1

18

3D48-1
3D48-2

36

3D48-3
3D48-4

WX_MD20

22R

WX_MD21

7

22R

WX_MD22

22R36

WX_MD23

22R

WX_MD18

22R
22R

WX_MD16
WX_MD17

22R27

WX_MD19

8

WX_MD31

22R

WX_MD30

22R3D47-3

WX_MD28

22R

WX_MD29

22R

WX_MD24

22R

WX_MD25

7

22R2

WX_MD26

22R

WX_MD27

22R45

B

C

D

E

100n

2D31

RES

2D12 470p

155561

+2V5_VDDMQ

100n

2D32

2D03 100n

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

NC1

NC2

NC3

NC4

NC5

NC6

DNU1
DNU2

64

51R

51R3D14

5D03

220R

2D71

15R3D11
15R3D09

+2V5_SW

WX_MA0
WX_MA1
WX_MA2
WX_MA3
WX_MA4
WX_MA5
WX_MA6
WX_MA7
WX_MA8
WX_MA9
WX_MA10
WX_MA11

DDR_VREF

WX_CS0# WX_CS0#
WX_MCK0
WX_MCK0#
WX_CLKE

WX_BA0
WX_BA1

WX_DQM0
WX_DQM1
WX_DQS0
WX_DQS1

WX_WE#

F

WX_CAS#
WX_RAS#

FD01

6.3V22u
2D72

+2V5_VDDMQ +2V5_VDDMQ

K4D261638K

1_DDQS0
1_DDQS1

10n

2D18

10u

7D01

29
30
31
32
35
36
37
38
39
40
28
41

49

24
45
46
44

26
27

20
47
16
51

21
22
23

+2V5_VDDMQ

470p

2D02 100n

2D11

1

18

VDD VDDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10|AP
A11

VREF

CS_
CK
CK_
CKE

BA0
BA1

LDM
UDM
LDQS
UDQS

WE_
CAS_
RAS_

344866

ID01

10n

2D04 10n

33

VSS VSSQ

2D08

3

6

2D09 10n

2D10 100n

9

VDDQ

125258

A

B

C

D

E

F

2D02 C2
2D03 C3
2D04 C3
2D08 C3
2D09 C3
2D10 C3
2D11 C2
2D12 C3
2D14 G1
2D18 C2
2D31 B3
2D32 B4
2D33 B4
2D34 B4
2D37 C8
2D38 C9
2D39 C9
2D43 C8
2D46 C7
2D57 C8
2D58 C8
2D59 C9
2D60 C9
2D71 B2
2D72 B2
3D01-1 E4
3D01-2 E4
3D01-3 E4
3D01-4 E4
3D02-1 E4
3D02-2 E4
3D02-3 D4
3D02-4 D4
3D05-1 D4
3D05-2 D4
3D05-3 D4
3D05-4 D4
3D06-1 D4
3D06-2 D4
3D06-3 D4
3D06-4 D4
3D09 F1
3D10 G1
3D11 F1
3D14 G1
3D15 B4
3D16 B4
3D38 F7
3D40 F7
3D43-1 D10
3D43-2 D10
3D43-3 D10
3D43-4 D10
3D44-1 D10
3D44-2 D10
3D44-3 D10
3D44-4 D10
3D47-1 E10
3D47-2 E10
3D47-3 D10
3D47-4 D10
3D48-1 E10
3D48-2 E10
3D48-3 E10
3D48-4 E10
5D03 B1
7D01 D2
7D02 D8
FD01 B2
ID01 G2
ID05 G8

G

3139 123 6273.1

3D10

10n

2D14

H_17370_011.eps

G

010804

1234567891011

Circuit Diagrams and PWB Layouts

55LC7.5E LA 7.

SSB: WX Power / Ground

1234567891011

WX POWER / GROUND

B05C B05C

+1V2_SW

A

B

C

D

E

F

G

3139 123 6273.1

5E12

150R

5E13

150R

5E14

33R

+3V3_SW

+3V3_SW

+3V3_SW

5E03

220R

+1V2_PLL

+1V2_PLL

FE06

FE07

FE08

+1V2_CORE

2E66

5E16

220R

5E17

220R

6.3V

2E05

10u

5E04

150R

5E05

150R

2E68

22u 6.3V

2E70

22u 6.3V

6.3V

2E71

22u

2E57

10u 6.3V

+2V5_VDDMQ

2E43

FE01

FE02

FE03

100n

2E06

FE04

FE05

100n

2E67

100n

2E69

100n

2E72

10u 6.3V

100n

6.3V
10u

2E35

2E01

10u 6.3V6.3V

2E03

10u 6.3V

100n

2E07

2E10

10u

6.3V

2E12

10u

100p

2E13

100p2E14

2E17 100p

100p2E18

+1V2_ADC

+1V2_PLL

+1V2_CORE

100n2E58

100n2E56

100n

100n2E37

2E36

VDD3_ADC1

WX_A

100n

2E02

WX_AVSS_ADC1

VDD3_ADC2

WX_A

100n

2E04

WX_AVSS_ADC2

WX_LVDS_VDD

100n

2E08

WX_LVDS_VSS

WX_AVDDAPLL

100n

2E09

WX_AVSSAPLL

WX_AVDDLLPLL

100n

2E11

WX_AVSSLLPLL

100n2E55

100n

2E38

12345678

100n

100n2E54

2E53

100n

100n

2E40

2E39

+2V5_VDDMQ

WX_AVDD3_BG_ASS
WX_PAVDD1
WX_PAVDD2
WX_AVDD_ADC1
WX_AVDD_ADC2
WX_AVDD_ADC3
WX_AVDD_ADC4

WX_LVDS_VDD
WX_AVDDAPLL
WX_AVDDLLPLL

100p2E15

100p2E16

+3V3_SW

2E48

10u 6.3V

100n2E50

100n2E51

100n2E52

100n

100n

470p

2E41

2E75

2E42

0R

3E07

2E77

RES

10u

WX_AVDD3_ADC1
WX_AVDD3_ADC2
WX_AVDD3_OUTBUF

+1V2_PLL

100n2E49

470p

2E76

+3V3_SW

100n2E44

100n2E45

NC

100n

2E46

C14

VDDC1

C15

VDDC2

D13

VDDC3

D14

VDDC4

D15

VDDC5

E13

VDDC6

E14

VDDC7

E15

VDDC8

G16

VDDC9

H5

VDDC10

H16

VDDC11

J5

VDDC12

J16

VDDC13

K5

VDDC14

K16

VDDC15

R16

VDDC16

T14

VDDC17

T15

VDDC18

B4

VDDM1

C4

VDDM2

D4

VDDM3

D5

VDDM4

D11

VDDM5

E5

VDDM6

E6

VDDM7

E9

VDDM8

E10

VDDM9

E11

VDDM10

E12

VDDM11

F5

VDDM12

G5

VDDM13

L16

VDDH1

M16

VDDH2

N16

VDDH3

P16

VDDH4

T12

VDDH5

T13

VDDH6

R17

VDDH7

R18

VDDH8

P20

NC

Y3

AVDD3_ADC1

U9

AVDD3_ADC2

U3

AVDD3_OUTBUF

E2

VDDR1

E8

VDDR2

V3

AVDD3_BG_ASS

T3

PA

T4

PAVDD2

U5

AVDD_ADC1

U7

AVDD_ADC2

T8

AVDD_ADC3

U6

AVDD_ADC4

D18

L

VDS_VDDP

E17

LVDS_VDDA

D16

LVDS_VDDD

C17

LVDS_VDDO1

D17

VDS_VDDO2

L

U1

AVDDAPLL

R2

AVDDLLPLL

V5

VREFN_1

W5

VREFP_1

V7

VREFN_2

W7

VREFP_2

100n2E47

V

DD 1

7C01-4

SVP WX68

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45

AVSS_OUTBUF

VSSR1
VSSR2

AVSS_BG_ASS

PAVSS1

PAVSS2
AVSS_ADC1
AVSS_ADC2
AVSS_ADC3
AVSS_ADC4

LVDS_VSSP
LVDS_VSSA

LVDS_VSSD

LVDS_VSSO1
LVDS_VSSO2

AVSSAPLL

AVSSLLPLL

B3
C6
C9

C12

D2
H8
H9

H10
H11
H12
H13

J8

J9

J10
J11
J12
J13

K8

K9

K10
K11
K12
K13

L5

L8

L9

L10
L11
L12
L13

M8
M9

M10
M11
M12
M13

N8
N9

N10
N11
N12
N13
P18

T16

H20

Y2

E4

E7

W3

WX_AVSS_BG_ASS

T2
R3

T5

T7

T9

T6

E18
E16
C16
C18
C19

V1

T1

VSS_OUTB

WX_A

WX_PAVSS1

WX_PAVSS2
WX_AVSS_ADC1
WX_AVSS_ADC2
WX_AVSS_ADC3
WX_AVSS_ADC4

WX_LVDS_VSS

WX_AVSSAPLL

WX_AVSSLLPLL

WX_AVDD3_OUTBUF

WX_AVSS_OUTBUF

WX_AVDD3_BG_ASS

WX_AVSS_BG_ASS

WX_PAVDD1

WX_PAVSS1

WX_PAVDD2

WX_PAVSS2

WX_AVDD_ADC1

WX_AVSS_ADC1

WX_AVDD_ADC2

WX_AVSS_ADC2

UF

WX_AVDD_ADC3

WX_AVSS_ADC3

WX_AVDD_ADC4

WX_AVSS_ADC4

2E19

2E21

2E23

2E25

2E27

2E29

2E31

2E33

100n

IE10

100n

100n

100n

IE11

100n

100n

IE12

100n

100n

2E20

2E22

2E24

2E26

2E28

2E32 2E30

2E34

10u 6.3V

10u 6.3V

10u 6.3V

10u 6.3V

10u 6.3V

10u

10u 6.3V 6.3V

10u 6.3V

5E06

220R

5E07

220R

3E02

22R

3E04

22R

5E08

150R

5E09

150R

5E10

150R

5E11

150R

+3V3_SW

+3V3_SW

+1V2_ADC

+1V2_ADC

+1V2_ADC

+1V2_ADC

+3V3_SW

Pin Name Pin No

DP_HS P19 MPU in A/D Multiplix Mode MPU in A/D Separate Mode(*)

DDR_VREF

WX_BA1
WX_BA0

WX_DQS3
WX_DQS2
WX_DQS1
WX_DQS0
WX_CLKE
WX_DQM3
WX_DQM2
WX_DQM1
WX_DQM0
WX_MCK0#
WX_MCK0

WX_CS0#
WX_WE#
WX_CAS#
WX_RAS#
WX_MD31
WX_MD30
WX_MD29
WX_MD28
WX_MD27
WX_MD26
WX_MD25
WX_MD24
WX_MD23
WX_MD22
WX_MD21
WX_MD20
WX_MD19
WX_MD18
WX_MD17
WX_MD16
WX_MD15
WX_MD14
WX_MD13
WX_MD12
WX_MD11
WX_MD10
WX_MD9
WX_MD8
WX_MD7
WX_MD6
WX_MD5
WX_MD4
WX_MD3
WX_MD2
WX_MD1
WX_MD0
WX_MA11
WX_MA10
WX_MA9
WX_MA8
WX_MA7
WX_MA6
WX_MA5
WX_MA4
WX_MA3
WX_MA2
WX_MA1
WX_MA0

1(HIGH) 0(LOW)

BA1

K4

BA0

K3

MVREF

E3

DQS3

B2

DQS2

B6

DQS1

B9

DQS0

B12
IE15
IE04

IE05

IE06
IE07
IE08
IE09

K2
B1
A6
A9
A12
E1
D1
J3
J4
K1
J1
J2
D3
C3
C2
C1
A1
A2
A3
C5
A4
B5
A5
D6
A7
B7
C7
D7
D8
C8
B8
A8
D9
D10
C10
B10
A10
A11
B11
C11
D12
A13
B13
C13
F1
F2
F3
F4
G4
G3
G2
G1
H1
H2
H3
H4

CLKE
DQM3
DQM2
DQM1
DQM0
MCK0_
MCK0
CS1_
CS0_
WE_
CAS_
RAS_
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MA11
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0

7C01-2

SVP WX68

91011

DPB_HS

DPB_VS

DP

A_HS
A_VS

DP

DPB_DE
DPA_CLK
DPB_CLK

DPA23
DPA22
DPA21
DPA20
DPA19
DPA18
DPA17

A16

DP
DP

A15
DPA14
DPA13
DPA12
DPA11
DPA10

DPA9
DPA8
DPA7
DPA6
DPA5
DPA4
DPA3
DPA2
DPA1

DPA0
DPB15
DPB14
DPB13
DPB12
DPB11
DPB10

DPB9

DPB8

VS

NC

P17

HS

P19
V19
V20
Y19
Y20

W20

Y15
T19
Y12
U13
V13

W13

Y13
Y14

W14

V14
U14
U15
V15

W15

Y16

W16

V16
U16
U17
V17

W17

Y17
Y18

W18

V18

W19

U18
U19
U20
T20
T18
T17
R19
R20

NC
NC

HDMI_DE

HDMI_VCLK

NC

HDMI_Cr(9)
HDMI_Cr(8)
HDMI_Cr(7)
HDMI_Cr(6)
HDMI_Cr(5)
HDMI_Cr(4)
HDMI_Cr(3)

HDMI_Cr(2)
HDMI_Cb(9)
HDMI_Cb(8)
HDMI_Cb(7)
HDMI_Cb(6)
HDMI_Cb(5)
HDMI_Cb(4)
HDMI_Cb(3)
HDMI_Cb(2)

NC
NC

HDMI_Cb(1)

HDMI_Cb(0)

DP_HS

HDMI_H

HDMI_V

HDMI_Y(9)
HDMI_Y(8)
HDMI_Y(7)

HDMI_Y(6)
HDMI_Y(5)
HDMI_Y(4)
HDMI_Y(3)
HDMI_Y(2)

HDMI_Cr(1)
HDMI_Cr(0)

HDMI_Y(1)
HDMI_Y(0)

+3V3_SW

RES

4K7

3E05

DP_HS

4K7

3E06

H_17370_012.eps

010804

A

B

C

D

E

F

G

2E01 E2
2E02 E2
2E03 E2
2E04 E2
2E05 F1
2E06 F1
2E07 F2
2E08 F2
2E09 F2
2E10 F2
2E11 G2
2E12 G2
2E13 G2
2E14 G2
2E15 G2
2E16 G2
2E17 G2
2E18 G2
2E19 C6
2E20 C6
2E21 C6
2E22 C6
2E23 D6
2E24 D6
2E25 D6
2E26 D6
2E27 E6
2E28 E6
2E29 E6
2E30 E6
2E31 F6
2E32 F6
2E33 F6
2E34 F6
2E35 D2
2E36 D2
2E37 D2
2E38 D2
2E39 D2
2E40 D2
2E41 D3
2E42 D3
2E43 D1
2E44 A3
2E45 A3
2E46 A3
2E47 A4
2E48 A3
2E49 C3
2E50 C3
2E51 C3
2E52 C3
2E53 C2
2E54 C2
2E55 C2
2E56 C2
2E57 C1
2E58 C2
2E66 C1
2E67 A2
2E68 A1
2E69 B2
2E70 B1
2E71 B1
2E72 B2
2E75 D3
2E76 D3
2E77 E3
3E02 C7
3E04 D7
3E05 C11
3E06 C11
3E07 E3
5E03 E1
5E04 F1
5E05 G1
5E06 B7
5E07 C7
5E08 D7
5E09 E7
5E10 F7
5E11 F7
5E12 A1
5E13 B1
5E14 B1
5E16 D1
5E17 E1
7C01-2 B10
7C01-4 B4
FE01 D2
FE02 E2
FE03 F2

FE04 F2
FE05 G2
FE06 A1
FE07 B1
FE08 B1
IE04 C9
IE05 C9
IE06 C9
IE07 C9
IE08 D9
IE09 D9
IE10 C6
IE11 D6
IE12 F6
IE15 C9

Circuit Diagrams and PWB Layouts

SSB: FPGA Interface (AL Sets only)

56LC7.5E LA 7.

12345678910

B05D B05D

FPGA INTERFACE

+3V3_FPGA

(ONLY FOR AMBI-LIGHT SET)

5202

A

B

C

D

E

F

G

IIC_SCL_up
IIC_SDA_up

AMBI_SCL

AMBI_SDA

I209

100R 3205

F211

100R

3204

1K5

3206

2204

1n0

+3V3_FPGA

RES

+3V3_FPGA

+3V3_FPGA

3203

1K5

2203

1n0

4202

I207

4205

5201

30R

I205

2211

10n

2

3

DAT A

7

VCC

SCD

GND

7201
EPCS4SI8

8

CS_

Φ

DCLK

ASDI

4

TO DRIVE IC AL DRIVERS

S_SCL

S_SDA

+3V3_FPGA

I206

RES

4201

4203

F209

F214

I2S_SEL1
I2S_SEL2

4204

1

6

5

1201

440054-5

nCSO nCSO

DCLK DCLK

ASDO ASDO

DAT A0 DA TA0

2 CONNECTORS

OVERLAPPING 5PIN & 7PIN

1202

440054-7
1
2
3
4
5

EPCS16SI16N

F222

F223

F224

F227

1
2
3
4
5
6
7

I210
I211
I212

I213

RES

7

15

2205 1n0

7202

2206 1n0

CS

DCLK

ASDI

9

2207 1n0

VCC

SCD

GND

2

Φ

10

2208 1n0

1

3
4

NC

5
6

816

DAT A

11
12

NC

13
14

3202 100R

FOR PWM AL DRIVER

3222
3225

3207
3248

1n0

1n0

2210

2209

100R3247

100R
100R3224
100R

100R
100R

RES

2212
10n

100R3201

RES

RES

2213
10n

RES

2201

100p

RES

2202

100p

TMS_FPGA
TDI_FPGA
TDO_FPGA
TCK_FPGA

MAIN_SCL

MAIN_SDA

ambi_pwm(0)
ambi_pwm(1)
ambi_pwm(2)
ambi_pwm(3)
ambi_pwm(4)
ambi_pwm(5)

I201

DSO751SV

2214

10u

+3V3_FPGA

1204

1

27M0

+3V3_FPGA

3231
1K0

30R

4

I232

3

2

RES

3232

F204
F208
F202
F225

3236

47R

3246 100R

3234 100R

3238

RES

100R3240
100R3235

F237

1K0

CLK_OSC1

+3V3_FPGA

F236

F201

JTAG_TMS

JTAG_TDI

JTAG_TDO

JTAG_TCK

F207

1203

440054-6

1
2
3
4
5
6

(FOR DEVELOPMENT)

SOFTWARE DEBUGGER

FOR PROGRAMMING FPGA

A

B

C

D

E

F

G

1201 F3
1202 F4
1203 C9
1204 A7
2201 E6
2202 E6
2203 F2
2204 F2
2205 G4
2206 G4
2207 G4
2208 G4
2209 G5
2210 G5
2211 B2
2212 B5
2213 B6
2214 B7
3201 E5
3202 E5
3203 E2
3204 E2
3205 E2
3206 E2
3207 G5
3222 F5
3224 F5
3225 G5
3231 C7
3232 C7
3234 C7
3235 C7
3236 A8
3238 C7
3240 C7
3246 C7
3247 F5
3248 G5
4201 F2
4202 F2
4203 G2
4204 G3
4205 G2
5201 A2
5202 A7
7201 B3
7202 B4
F201 C9
F202 C7
F204 C7
F207 C9
F208 C7
F209 E3
F211 E1
F214 E3
F222 B4
F223 B4
F224 B4
F225 C7
F227 C4
F236 C9
F237 B8
I201 A6
I205 B2
I206 G2
I207 G2
I209 E1
I210 F4
I211 F4
I212 F4
I213 G4
I232 A7

3139 123 6273.1

123456789

H_17370_013.eps

10

010804

Circuit Diagrams and PWB Layouts

57LC7.5E LA 7.

SSB: FPGA I/O Banks

12345678910111213141516

B05E B05E

A

+3V3_SW

B

+2V5_SW

C

D

E

F

G

H

I

J

+1V2_SW

ASDO

nCSO
MAIN_SDA
AMBI_SDA

ambi_pwm(5)
ambi_pwm(2)

ambi_pwm(3)

FPGA I/O BANKS

F701

5700

30R

2701
1u0

F702

5701

30R

F703

5702

30R

5703

30R

5704

30R

F705

FPGA_BL_BOOST

FPGA_BL_DIMMING

RES
2700

1n0

2706

4u7

2717

5705

30R

I728
I713

F704

2707
10n

2718
10n4u7

2724

47u

4V

2729
1u0

2708

C3
F4
P1
P2
N1
N2
L1
L2
K4
K5
K1
K2
E1
E2
D3
D4

2709
10n10n

27202719

2725

2730
10n

EP2C5F256C7N

IO_C3|ASDO
IO_F4|CSO_
IO_P1|LVDS0p
IO_P2|LVDS0n
IO_N1|LVDS1p
IO_N2|LVDS1n
IO_L1|L

VDS2p

IO_L2|L

VDS2n
IO_K4|LVDS3p
IO_K5|LVDS3n
IO_K1|LVDS4n
IO_K2|LVDS4p
IO_E1|LVDS5p
IO_E2|LVDS5n
IO_D3|LVDS6p
IO_D4|LVDS6n

10n

2710

2721
10n10n10n

2726
10n10n

7700-2

Φ

BANK1

IO_E3|LVDS7p
IO_E4|LVDS7n
IO_D5|LVDS8p
IO_E5|LVDS8n
IO_C1|LVDS9p
IO_C2|LVDS9n

IO_L4|PLL1_OUTp

IO_M4|PLL1_OUTn

IO_F3|VREFB1N0

IO_J4|VREFB1N1

IO_M1
IO_M2
IO_M3

IO_L3

IO_P3

FROM TRIDENT FROM TRIDENT

+3V3_FPGA

2705

2704

27032702

27122711
10n10n10n

10n10n10n

+2V5out-FPGA

2713

10n

E3
E4

NC

D5

E5
C1
C2

L4
M4

F3

J4

NC

L3
M1
M2
M3

P3

I712
I705

2714

2715

10n10n

+2V5in-FPGA

+1V2-FPGA

ambi_pwm(4)
ambi_pwm(0)

ambi_pwm(1)

AMBI_SCL

+1V2-PLL

TxFPGAo_3p

TxFPGAo_3n

TxFPGAo_1p

TxFPGAo_1n

TxFPGAo_0p

TxFPGAo_0n

TxFPGAo_2p

TxFPGAo_2n

TxFPGAo_4p

TxFPGAo_4n

TxFPGAo_CLKp

TxFPGAo_CLKn
TxFPGAe_CLKp

TxFPGAe_CLKn

3747

22R

3749

22R

3738

22R

3740

22R

3735

22R

3737

22R

3741

22R

3743

22R

3744

22R

3746

22R

3750

3751
3752

3753

3748

180R

3739

180R

3736

180R

3742

180R

3745

180R

3720

TxFPGAe_3p

22R

3721

180R

3722

TxFPGAe_3n

22R

INPUT BANK

7700-5

EP2C5F256C7N

Φ

IO_M11|LVDS43p
IO_L11|LVDS43n
IO_T14|LVDS44p
IO_R14|LVDS44n
IO_T13|LVDS45p
IO_R13|LVDS45n
IO_T12|LVDS46p
IO_R12|LVDS46n
IO_P12|LVDS47p
IO_P13|LVDS47n
IO_K11|LVDS48p
IO_K10|LVDS48n
IO_R10|LVDS49p
IO_T10|LVDS49n
IO_L9|LVDS50p
IO_L10|LVDS50n
IO_T11|LVDS51p
IO_R11|LVDS51n

VDS52p

IO_T9|L
IO_R9|LVDS52n

VDS53p

IO_T8|L
IO_R8|LVDS53n

EP2C5F256C7N

0

H1

1

J2

2

J1

3

H16

CLK

4

H15

5

J15

6

J16

7

F1

DATA0

H4

DCLK

BANK4

IO_T7|LVDS54p
IO_R7|LVDS54n
IO_T5|LVDS55p
IO_R5|LVDS55n
IO_T4|LVDS56p
IO_R4|LVDS56n
IO_P5|LVDS57p
IO_P4|LVDS57n
IO_T3|LVDS58p
IO_R3|LVDS58n
IO_N9|LVDS59p

IO_N10|LVDS59n

IO_L7|LVDS60p
IO_L8|LVDS60n

IO_N11|VREFB4N0

IO_N8|VREFB4N1

IO_L12

IO_P11

7700-1

Φ

OL

CONTR

STATUS

CONFIG

CONF_DONE

MSEL

IO_T6

CE

TCK
TMS
TDO

TDI

T7

R7

T5

R5

T4
R4
P5
P4

T3
R3
N9

N10

L7

L8

N11

N8

L12
P11

T6

+3V3_FPGA

3703

3700

10K

10K

G5H2

F706

M13

J5

F734

L13
J13

0
1

F733

K12

TCK_FPGA

F2

TMS_FPGA

G1

TDO_FPGA

G2

TDI_FPGA

H5

M11
L11
T14
R14
T13
R13
T12
R12
P12
P13
K11
K10
R10
T10
L9
L10
T11
R11
T9
R9
T8
R8

CLK_OSC1

3714

3713

180R

180R

MAIN_SCL

D

ATA0

DCLK

RES

2734

1n0

NC

22R

22R
22R

22R

3724

180R

3727

180R

3730

180R

3733

180R

+3V3_FPGA

3701

4700

10K

4701
RES

3723
22R

3725
22R

3726
22R

3728
22R

3729
22R

3731
22R

3732
22R

3734
22R

TxFPGAe_2p

TxFPGAe_2n

TxFPGAe_1p

TxFPGAe_1n

TxFPGAe_0p

TxFPGAe_0n

TxFPGAe_4p

TxFPGAe_4n

3702
10K

FPGA BYPASS

TxFPGAo_0n TxLVDSo_0n
TxFPGAo_0p TxLVDSo_0p

TxFPGAo_1p TxLVDSo_1p
TxFPGAo_2p TxLVDSo_2p
TxFPGAo_3p TxLVDSo_3p
TxFPGAo_4p TxLVDSo_4p
TxFPGAo_CLKn TxLVDSo_CLKn

TxFPGAo_CLKp TxLVDSo_CLKp
TxFPGAe_0n TxLVDSe_0n

TxFPGAe_0p TxLVDSe_0p
TxFPGAe_1p TxLVDSe_1p
TxFPGAe_2p TxLVDSe_2p
TxFPGAe_3p TxLVDSe_3p
TxFPGAe_4p
TxFPGAe_CLKn TxLVDSe_CLKn

TxFPGAe_CLKp TxLVDSe_CLKp

4703
4704
4705
4706
4707
4708
4709
4710
4711
4712

4723
4724

4713
4714
4715
4716
4717
4718
4719
4720
4721
4722

4725
4726

TxLVDSo_1nTxFPGAo_1n
TxLVDSo_2nTxFPGAo_2n
TxLVDSo_3nTxFPGAo_3n
TxLVDSo_4nTxFPGAo_4n

TxLVDSe_1nTxFPGAe_1n
TxLVDSe_2nTxFPGAe_2n
TxLVDSe_3nTxFPGAe_3n
TxLVDSe_4nTxFPGAe_4n

TxLVDSe_4p

TO LVDS

NC

TxLVDSe_3p
TxLVDSe_3n
TxLVDSe_0p
TxLVDSe_0n

TxLVDSe_2p
TxLVDSe_2n
TxLVDSo_0p
TxLVDSo_0n
TxLVDSo_1p
TxLVDSo_1n
TxLVDSo_2p
TxLVDSo_2n
TxLVDSe_CLKp
TxLVDSe_CLKn
TxLVDSe_4p
TxLVDSe_4n

VDSe_1p

TxL
TxLVDSe_1n
TxLVDSo_CLKp
TxLVDSo_CLKn

+3V3_FPGA

+2V5out-FPGA

+2V5in-FPGA

+1V2-FPGA

+1V2-PLL

D13

IO_D13|LVDS29p

C14

IO_C14|LVDS29n

D16

IO_D16|LVDS30p

D15

IO_D15|LVDS30n

G13

IO_G13|LVDS31p

G12

IO_G12|LVDS31n

H11

IO_H11|LVDS32p

J11

IO_J11|LVDS32n

F16

IO_F16|L

F15

IO_F15|L

G15

IO_G15|LVDS34p

G16

IO_G16|LVDS34n

J12

IO_J12|LVDS35p

H12

IO_H12|LVDS35n

K15

IO_K15|LVDS36p

K16

IO_K16|LVDS36n

L16

IO_L16|LVDS37p

L15

IO_L15|LVDS37n

7700-4

EP2C5F256C7N

Φ

BANK3

IO_M16|LVDS38p
IO_M15|LVDS38n
IO_N16|LVDS39p
IO_N15|LVDS39n

IO_P16|LVDS40p

IO_P15|LVDS40n
IO_N14|LVDS41p
IO_N13|LVDS41n
IO_M12|LVDS42p

VDS33p

IO_N12|LVDS42n

VDS33n

IO_M14|VREFB3N1

IO_H13|VREFB3N0
IO_E14|PLL2_OUTp
IO_D14|PLL2_OUTn

OUTPUT BANK

EP2C5F256C7N

C4

IO_C4|LVDS10p

C5

IO_C5|LVDS10n

G7

IO_G7|LVDS11p

G6

IO_G6|LVDS11n

F9

IO_F9|LVDS12p

F10

VDS12n

IO_F10|L

E6

IO_E6|LVDS13p

F6

VDS13n

IO_F6|L

A3

IO_A3|LVDS14p

B3

IO_B3|LVDS14n

A4

IO_A4|LVDS15p

B4

IO_B4|LVDS15n

A5

IO_A5|LVDS16p

B5

IO_B5|LVDS16n

C6

IO_C6|LVDS17p

D6

IO_D6|LVDS17n

A6

IO_A6|LVDS18p

B6

IO_B6|LVDS18n

F8

IO_F8|LVDS19p

F7

IO_F7|LVDS19n

B7

IO_B7|LVDS20p

A7

IO_A7|LVDS20n

EP2C5F256C7N

B1
G3

VCCIO1

K3
R1

A15
A2
C10

VCCIO2

C7
E10
E7

B16
G14

VCCIO3

K14
R16

M10
M7
P10

VCCIO4

P7
T15
T2

G9
H10

VCCINT

H7
J7

M5

1

VCCA_PLL

E12

2

L6

1

VCCD_PLL

F11

2

M16
M15
N16
N15

P16

P15
N14
N13

NC

M12
N12
M14
H13

E14
D14

E16

IO_E16

L14

IO_L14

P14

IO_P14

7700-3

Φ

BANK2

IO_B9|LVDS21p

IO_A9|LVDS21n
IO_D10|LVDS22p
IO_D11|LVDS22n
IO_A10|LVDS23p
IO_B10|LVDS23n

IO_G11|LVDS24p
IO_G10|LVDS24n

IO_A12|LVDS25p
IO_B12|LVDS25n
IO_A13|LVDS26p
IO_B13|LVDS26n
IO_C12|LVDS27p
IO_C13|LVDS27n
IO_A14|LVDS28p
IO_B14|LVDS28n

IO_D8|VREFB2N1

IO_C11|VREFB2N0

7700-6

Φ

POWER

GND_PLL1

GND_PLL2

GNDA_PLL

NC

IO_A8
IO_A11
IO_B11

GND

GND

GND

B8

C15

C16

D1

D2

D7

D9

E13

E15

F13

F14

F5

G4

1
2

B9

A9
D10
D11
A10
B10

G11
G10

NC

A12
B12
A13
B13
C12
C13
A14
B14

D8

C11

A8
A11
B11

A1
A16
B15

B2

C8

C9

E8

E9

G8

H14

H3

H8

H9

J14

J3
J8
J9

K9

M8
M9

P8

P9
R15

R2

T1
T16

L5

N5
D12

F12

M6

E11

7700-7

EP2C5F256C7N

Φ

NC

NCNC

TxLVDSo_3p
TxLVDSo_3n

TxLVDSo_4p
TxLVDSo_4n

H6

J10

J6

K13

K6
K7

K8
N3
N4
N6
N7

P6
R6

2700 H1
2701 B2
2702 B3
2703 B4
2704 B4
2705 B4
2706 C2
2707 C2
2708 C2
2709 C3
2710 C3

A

2711 C3
2712 C4

TO LVDS

NC

2713 C4
2714 C4
2715 C4
2717 C2
2718 C2
2719 C2
2720 C3
2721 C3
2724 D2
2725 D3

B

2726 D3
2729 E2
2730 E3
2734 G8
3700 F10
3701 F10
3702 G11
3703 F9
3713 G7
3714 F7
3720 B10
3721 B10

C

3722 B10
3723 B10
3724 B10
3725 C10
3726 C10
3727 C10
3728 C10
3729 C10
3730 D10
3731 D10
3732 E10

D

3733 E10
3734 E10
3735 C6
3736 C7
3737 C6
3738 B6
3739 B7
3740 B6
3741 C6
3742 C7
3743 C6
3744 D6

E

3745 D7
3746 D6
3747 B6
3748 B7
3749 B6
3750 F6
3751 F6
3752 G6
3753 G6
4700 F10
4701 G10
4703 C12

F

4704 C12
4705 C12
4706 C12
4707 C12
4708 C12
4709 C12
4710 C12
4711 C12
4712 C12
4713 D12
4714 D12

G

4715 D12
4716 D12
4717 D12
4718 D12
4719 D12
4720 D12
4721 D12
4722 D12
4723 C12
4724 D12
4725 D12
4726 E12

H

5700 B1
5701 B1
5702 C1
5703 D1
5704 E1
5705 E2
7700-1 F8
7700-2 G3
7700-3 B14
7700-4 H13
7700-5 B8
7700-6 E14

I

7700-7 I15
F701 B2
F702 B2
F703 C2
F704 E2
F705 E2
F706 F9
F733 G9
F734 F9
I705 G4
I712 G4

J

I713 H2
I728 H2

3139 123 6273.1

H_17370_014.eps

12345678910111213141516

010804

SSB: Audio Processor

Circuit Diagrams and PWB Layouts

58LC7.5E LA 7.

123456789

B06A B06A

+12V_DISP

A

+5V_SW

B

C

D

E

F

3139 123 6273.1

3402

1R0

RES

4401

4402

5401

120R

5402

120R

RST_AUD

IIC_SCL_up
IIC_SDA_up

MOJO_I2S_OUT_SCK
MOJO_I2S_OUT_WS

HDMI_SCK
HDMI_WS

MOJO_I2S_OUT_SD
HDMI_SD

SIF

SC1_AUDIO_IN_R
SC1_AUDIO_IN_L

SC2_AUDIO_IN_R
SC2_AUDIO_IN_L

COMP_AUDIO_IN_R
COMP_AUDIO_IN_L

SIDE_AUDIO_IN_R
SIDE_AUDIO_IN_L

HDMI_AUDIO_IN_R
HDMI_AUDIO_IN_L

2411

10u

2414

10u

+5V_AUD

RES

+AUDIO_POWER_+12V_DISP

+5V_D

+5V_AUD

100n 2419

RES

RES

I429
I430

I432

3416 470R

2439

2440

2415

3p3

2416

3p3

3410 100R

2446
2447

4409
4410

4412

56p2432

22u5403

I426

470n 470n

4

2

100R3411

100p
100p

1V4
1V6

2433 330p

UAB-09

2436

7410

L78L08ACU

+5V_AUD

1

1411

18M432

3

I412
I413

RES
RES

RES

OUTIN

3

COM

2

2412

MSP4450P-VK-E8 000

XTALIN

XTALOUT

4408
4407

4411

I421I420
I422

330p2434

330p2435

I423

10u

I424

100n2445

AUDIO PROCESSOR

2V4

2V4

I427
I428

I431

1V5

2V6

1

2441

220p

UAB-09

2437

10u

220u

2410

7411

67

68

19
80
66
69

2
3
79

4
5

17
18

8
9
10
11

7
16
20
21

6
63

64
65

56

55
54

53
52

51
50

49
48

58
57

25V

1n5

2442

IN

OUT

RESETQ
STNDBYQ
TESTEN
TP

CL
DA
ADR_SEL

CL
WS

CL3
WS3

IN
OUT
CL
WS

1
2
3
4

DA_OUT

IN1+
IN­IN2+

VREFTOP

R
L

L

R
L

R
L

R
L

I425

+8V

F401

2408 470p

2409 1n5

F402 F403

470p

61

62

39

AH

A

XTAL

DEL

DA

ANA

SC1_IN

SC2_IN

SC3_IN

SC4_IN

SC5_IN

AGNDC

45

2438

SUP

I2C

I2S

100n

Φ

MULTISTANDARD

SOUND PROCESSOR

VSS VREF

AD

59

60

43

+5V_D

1n5

2444

2443

2413

220p

13

DVSUP

AUD_CL_OUT

R

L

C

DACM

SUB

SR

SL

R

DACA

L

M

CAPL

A

SPDIF_OUT

SC1_OUT

SC2_OUT

SC3_OUT

NC

1R2AH

35

25

0
1

R

L

R

L

R

L

DCTR_IO

14

15 12

44

470p

70

0V6

26

0V6

27

28
29

30
31

0V2

23

0V2

24

6V7

40

I414

6V3

38

I415

78
77

76

3V8

36

3V8

37

3V8

33

3V8

34

41
42

1
22
32
46
47
71
72
73
74
75

I416
I417

I418
I419

100p 100p

16V10u2420

16V2423 10u

+8V

2429

2417

2418

330p

330p

2421

2422

330p

330p

2424 10u

2430

24312428

100p 100p

HP_AUDIO_OUT_R

HP_AUDIO_OUT_L

10u2425

10u2426
10u2427

3418 100R

3420 100R

100R3417

100R3419

SC1_AUDIO_OUT_R

SC1_AUDIO_OUT_L

SC2_AUDIO_OUT_R

SC2_AUDIO_OUT_L

123456789

AUDIO_LS_R

AUDIO_LS_L

H_17370_015.eps

010804

A

B

C

D

E

F

1411 B3
2408 A4
2409 A4
2410 A4
2411 A2
2412 A4
2413 A5
2414 B2
2415 B3
2416 B3
2417 B7
2418 B7
2419 C3
2420 C6
2421 C7
2422 C7
2423 C6
2424 D7
2425 D7
2426 D7
2427 D7
2428 D6
2429 D7
2430 D7
2431 D7
2432 D2
2433 D3
2434 D3
2435 E3
2436 E3
2437 F4
2438 F4
2439 A3
2440 A3
2441 A4
2442 A4
2443 A6
2444 A6
2445 E3
2446 C3
2447 C3
3402 A1
3410 C3
3411 C3
3416 D2
3417 D8
3418 D8
3419 D8
3420 D8
4401 A1
4402 A1
4407 C3
4408 C3
4409 D3
4410 D3
4411 D3
4412 D3
5401 A1
5402 B1
5403 E2
7410 A3
7411 B4
F401 A4
F402 A4
F403 A5
I412 C3
I413 C3
I414 C6
I415 C6
I416 D6
I417 D6
I418 D6
I419 D6
I420 D3
I421 D4
I422 D4
I423 E4

I424 E4
I425 F4
I426 A3
I427 C4
I428 C4
I429 C2
I430 C2
I431 D4
I432 D2

SSB: Audio

Circuit Diagrams and PWB Layouts

59LC7.5E LA 7.

1234567891011

B06B B06B

A

B

C

D

E

F

G

3139 123 6273.1

1
2
3

440054-3

TO / FROM PSU

AUDIO_LS_L

AUDIO_LS_R

ENGAGE

STANDBYn

AUDIO

10n2A50

1n0

RES

2A51

GNDSND

1A03

FA13
FA15
FA17

FA14
FA16
FA18

-12V2

+12V2

RES

2A54
100n

FA06

12

RES

GNDSND

FA05

FA09

FA12

2A52 10n

GNDSND

*

*

3A03

3A06
3A07

3A11

1n0

2A53

*

3A03
3A04
3A06
3A07
3A08
3A11

*

5A08 10u

*

LCD PDP
10K 6K8
12K 22K
10K 6K8
10K 6K8
12K 22K
10K 6K8

IA01

IA05

IA10

VSSA

VSSA

10u5A09

1u02A11

2A15

1u0

2A16

1u0

2A20 1u0

2A24

3A04

3A08

3A26

*

*

2A22

+AUDIO_POWER

-AUDIO_POWER GNDSND
+AUDIO_POWER

+A

UDIO_POWER

Φ

CLASS D

POWER

AMPLIFIER

VSSP

9

26

VSSA

GNDSND

2A09 100n

23

VDD

GNDSNDGNDSND

29

20

VDDP

VSSD|HW

1

16

100n2A34

100n

2A33

GNDSND

100n

2A10

BOOT1

BOOT2

STAB1

STAB2

17

OUT1

OUT2

DIAG

HVP1

HVP2

32

25

24

27

22

4

30

19

28

21

VSSA
VSS

2V6

NC

NC

8V9

3V9

IA18

-1V3

3A19

10K

IA02

IA12IA11

100n
100n

39K3A13

GNDSND

100n2A29

4K7

GNDSND

IA06

IA09

2A40

2A12
220p

2A19

IA19

IA21

470n

220p

IA33

IA22

IA13
IA15

NC

EMC
2A32

1n0

TDA8932T

2

-2V8
3

-2V8
15

-2V8
14

-2V8
12

-7V6
10

31

11

-8V2
18

4V7

5

3V2

6

-2V6
13

7A01

IN1P

IN1N

IN2P

IN2N

INREF

OSCREF

OSCIO

HVPREF

DREF

ENGAGE

POWERUP

TEST

CGND VSSA

7

GNDSND

VDDA

VDDA

8

2A30
100n

IA03

IA07

EMC

FA04

3A12

IA14
IA16

3A15

5A07

33R

FA01

VSS

2A46

2A47

2A18
1n0

GNDSND

IA41

47n 47n

3A01

5A05

1M0

15n2A25

15n2A27

1M0

RES

RES

4A01

4A02

30R

IA40

IA24

10R

GNDSND

IA26

GNDSND

IA23

IA20

+AUDIO_POWER_+12V_DISP

11V9

2A01

100n

12V2

2A04

220u 25V

5A03

22u

3A09

10R

IA35

2A21
1n0

IA36

2A35
1n0

GNDSND

5A04

22u

3A17

10R

IA38

2A31

1n0

IA39

2A36

1n0

GNDSND

VDD

A

-AUDIO_POWER

VDD

GNDSND

2A45

1n0

2A14

470n

2A28
470n

FA02

2A17

1n0

2A23

1n0

2A13

220n

2A26

220n

GNDSND

3A02

IA34

IA37

345678

10R

2A38

220n

IA25

GNDSND

IA27

30R5A06

GNDSND

2A37

220n

IA17

2A02
100n

2A08

IA04

-12V2

VSSA

+12V2

VSS

25V220u

3A14

22R

3A05

22R

GNDSND

GNDSND

3A27
220K

3A28
220K

IA29

2A41

GNDSND

TO SUBWOOFER OUT

TO SPEAKERS

VDD

3A29

IA30

47K 47K

3A30

IA31

7A06
BC847BW

7A07

GNDSND

1u0

BC847BW

DC-DETECTION

FA07
FA08

FA10
FA11

GNDSND

BC857BW

FA32

3A31

1A02

440054-3

1A01

440054-4

7A05

DC_PROT

10K

1
2
3

1
2
3
4

91011

LEFT +
GND
GND
RIGHT -

H_17370_016.eps

010804

A

B

C

D

E

F

G

1A01 D11
1A02 C11
1A03 B1
2A01 B7
2A02 B9
2A04 C6
2A08 C9
2A09 D5
2A10 D5
2A11 D3
2A12 D4
2A13 D8
2A14 D7
2A15 D3
2A16 E3
2A17 D8
2A18 E6
2A19 E4
2A20 E3
2A21 D7
2A22 E3
2A23 E8
2A24 E3
2A25 E6
2A26 E8
2A27 E6
2A28 E7
2A29 E3
2A30 F6
2A31 F7
2A32 F4
2A33 G5
2A34 G5
2A35 E7
2A36 F7
2A37 D8
2A38 E8
2A40 F3
2A41 G9
2A45 E7
2A46 A6
2A47 B6
2A50 B1
2A51 B1
2A52 B2
2A53 B2
2A54 B2
3A01 B6
3A02 B8
3A03 D2
3A04 D3
3A05 D9
3A06 D2
3A07 E2
3A08 E3
3A09 D7
3A11 E2
3A12 E6
3A13 E3
3A14 E9
3A15 E6
3A17 E7
3A19 F3
3A26 F3
3A27 F9
3A28 F9
3A29 E10
3A30 F10
3A31 F11
4A01 A6
4A02 A6
5A03 D7
5A04 E7
5A05 C6
5A06 C8
5A07 A6
5A08 B2
5A09 B2
7A01 D4
7A05 E11
7A06 F10
7A07 F10
FA01 C6
FA02 C8
FA04 E6
FA05 D2
FA06 E2
FA07 D1 1
FA08 D1 1
FA09 E2
FA10 D1 1

FA11 E11
FA12 E2
FA13 B1
FA14 B1
FA15 B1
FA16 B1
FA17 B1
FA18 B1
FA32 F11
IA01 D2
IA02 D3
IA03 D6
IA04 D9
IA05 D2
IA06 D3
IA07 D6
IA09 E3
IA10 E2
IA11 E2
IA12 E3
IA13 E4
IA14 E6
IA15 E4
IA16 E6
IA17 E9
IA18 E5
IA19 E4
IA20 E6
IA21 F4
IA22 F4
IA23 D6
IA24 B6
IA25 B9
IA26 C6
IA27 B9
IA29 F10
IA30 F10
IA31 F10
IA33 F4
IA34 D8
IA35 D7
IA36 E7
IA37 E8
IA38 F7
IA39 F7
IA40 A6
IA41 A6

Circuit Diagrams and PWB Layouts

SSB: Headphone Ampl. & Muting

1234567

B06C B06C

A

B

C

D

E

F

SC2_CVBS_MON_OUT_ITV

HP_AUDIO_OUT_R

ANTI_PLOP

POWER_DOWN

STANDBY

MUTEn

3139 123 6273.1

HEADPHONE AMP & MUTING

2901

33p

120K

3902

I913

ITV Connector E

I914

MUTING CIRCUIT

I911

RES

4902

BAT54 COL
RES
3937

0V

10K

RES

7919
BC847BW

10K

RES

3938

0V

HPIC_LINHP_AUDIO_OUT_L

RES

HPIC_RIN

3V3

+3V3_STBY

4K7

RES
2914

+3V3_STBY

7902

BC857BW

RES

3934

4K7

RES
7917

BC857BW

3901

47K

F901

3906

100K

3905

F904

47K

3907
100K

2907

470n

I912

0V

4901

RES

RES
6916

BAS316

0V

+3V3_STBY

RES

3940

2902

470n

1901

1
2
3
4

6

5

2904

470n

3911

10K

RES

6914

RES
3935

3V3

47u 6.3V

2V6
2
2V6
3

3908 120K

2V6

6

2V6

5

10K

3912

10K

6919

7901-1
TS482IDT

1

2V6

84

5V3

2905

33p

7901-2
TS482IDT

7

2V6

84

5V3

BAS316

3917

3918

3913

3914

3915

3916

1K0

1K0

1K0

1K0

1K0

1K0

HPIC_LOUT

+5V_SW

2908
220n

2913
220n

HPIC_ROUT

I930

I931

I932

I933

2915

47u6.3V

2916

47u6.3V

3

1

7911
BC847BW

2

3

1

7912
BC847BW

2

3

1

7913
BC847BW

2

3

1

7914
BC847BW

2

3

1

7915
BC847BW

2

3

1

7916
BC847BW

2

1234567

RES
3903

33R
3904

33R

RES
3909

33R
3910

33R

I919

I920

I921

I922

3942

10K

7922
BC847BW

3943

22K

HP_ROUT

SC1_AUDIO_MUTE_R

SC1_AUDIO_MUTE_L

SC2_AUDIO_MUTE_R

SC2_AUDIO_MUTE_L

HP_LOUT

ENGAGE

H_17370_017.eps

010804

60LC7.5E LA 7.

A

B

C

D

E

F

1901 B2
2901 A4
2902 A2
2904 B2
2905 B4
2907 C3
2908 B5
2913 B5
2914 E2
2915 A5
2916 C5
3901 A3
3902 A4
3903 A6
3904 A6
3905 B3
3906 B3
3907 C3
3908 B4
3909 B6
3910 C6
3911 D2
3912 D4
3913 D4
3914 E4
3915 E4
3916 F4
3917 C4
3918 D4
3934 D3
3935 E2
3937 E1
3938 E2
3940 F3
3942 F5
3943 F6
4901 D3
4902 D2
6914 E2
6916 E3
6919 F4
7901-1 A4
7901-2 B4
7902 D3
7911 C5
7912 D5
7913 D5
7914 E5
7915 E5
7916 F5
7917 E3
7919 E2
7922 F6
F901 B3
F904 B3
I911 D2
I912 D3
I913 A1
I914 B1
I919 D6
I920 E6
I921 E6
I922 F6
I930 D5
I931 E5
I932 E5
I933 F5

Personal Notes:

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

61LC7.5E LA 7.

SSB: YPBPR & SVHS

12345678

YPBPR & SVHS

B07A B07A

PEND NEW 12NC

A

PR

R

MSD-244V-131 NIDIP

RED_RED_RIGHT

B

L

PB

MSD-244V-131 NIDIP

BLUE_WHITE_LEFT

C

D

E

F

3139 123 6273.1

2

1615-2

3

1

1615-1

F614

5

6

4

F608

F609

ITV-Connector D

1619

1
2
3
4
5
6

78

BM06B-SRSS-TBT

16061610

16111613

RES

F612

F613

F605

F607

RES
6610

RES

6612

RES
6613

RES
6614

HD_PR_IN_ITV

HD_Y_IN_ITV

HD_PB_IN_ITV

RES

2602

PESD5V0S1BA

RES

2606

3607

150R

PESD5V0S1BA PESD5V0S1BA

3611

150R

PESD5V0S1BA

VGA_H

VGA_V

3601
75R

3605
75R

I623

I627

3617

33R

3619

33R

2608
3n3

2612
3n3

3608

33K

3612

33K

2607

2610

220n

220n

I610

I611

HD_PR_IN_ITV

HD_PR_IN

HD_PB_IN_ITV

HD_PB_IN

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

FRONT_Y_CVBS_IN_T

FRONT_CVBS_SVHS_Y_IN

FRONT_CVBS_SVHS_SEL

SVHS_C_IN

C_IN

PEND NEW 12NC

SVHS

1601-C

MSP-801V1-07-01-B NI FE

GND

8

1601-A

MSP-801V1-07-01-B NI FE

5

1601-B

6

Y

MSP-801V1-07-01-B NI FE

+5V_SW

7

2613

RES

3620

7603

PDTC114ET

4602 4601

4K7

1

3

4

2

F615

100n

F602

1609

75R

1608

3609

F604

3603

75R

1607

74LVC1G3157GW

74LVC1G3157GW

7601

6

4

RES

7602

6

4

F601

6611

RES

RES

RES
2600

RES
6604

PESD5V0S1BA

RES

6606

PESD5V0S1BA

RES
2603

PESD5V0S1BA

5

VCC

IN

COM

GND

2

5

VCC

IN

COM

GND

2

4603

NO

NC

NO

NC

3604
75R

1

3

1

3

RES

2609

5601

RES

5602

3600
100R

2614

2615

RES
2616

3602

100R

3618

33R

I615

I631

33R

100n

100n

33R

100n

HD_Y_IN_ITV

+5V_SW

+5V_SW

FRONT_C_IN_T

C_IN

Y_IN

HD_Y_IN

Y_IN

H_17370_018.eps

010804

A

B

C

D

E

F

1601-A B6
1601-B C5
1601-C A5
1606 B1
1607 D6
1608 C6
1609 B6
1610 C1
1611 C1
1613 D1
1615-1 B1
1615-2 A1
1619 F1
2600 A7
2602 A2
2603 D7
2606 B2
2607 C3
2608 C3
2609 C7
2610 D3
2612 D3
2613 D6
2614 D7
2615 E7
2616 E7
3600 A7
3601 A2
3602 C7
3603 D6
3604 A7
3605 C2
3607 C2
3608 C3
3609 C6
3611 D2
3612 D3
3617 A3
3618 C7
3619 B3
3620 E6
4601 E5
4602 F5
4603 F7
5601 D7
5602 E7
6604 B7
6606 C7
6610 B2
6611 D7
6612 C2
6613 C2
6614 D2
7601 D7
7602 F7
7603 F6
F601 A7
F602 B6
F604 C6
F605 A1
F607 B1
F608 C1
F609 D1
F612 F1
F613 F1
F614 B1
F615 B6
I610 C4
I611 D4
I615 A8
I623 C2
I627 D2
I631 C8

12345678

Circuit Diagrams and PWB Layouts

62LC7.5E LA 7.

SSB: I/O SCART 1&2

12345678910111213

B07B B07B

RES

A

B

C

D

E

F

G

H

I

ITV-Connector B

1526

1
2
3
4
5
6
7
8

9

10

3139 123 6273.1

IO - SCART 1 & 2

RES

ITV-Connector C

SC1_B_IN
SC1_G_IN
SC1_R_IN

SC1_FBL_IN

SC1_AUDIO_OUT_L
SC1_AUDIO_OUT_R

SCART 1

1504

Audio-R_out

Audio-R_in

Audio-L_out

Audio-L_in

RGB-B_in

Function_Sw

RGB-G_in

RGB-R_in

RGB-BL_in

Terr_CVBS_out

Video_in

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21

PPTV/55

12345678910111213

F511
F513

F515
F517

F524

F525

F526

F528

F519
F520

F521

1509

F522

1512

1
2
3
4
5

F531

1525

67

SC2_Y_CVBS_IN_ITV

6518

RESRESRESRES

1505 1502

6519

6504

RESRESRES

6507

1516 1511 1507

6514

1517

6520

6515

RES

1520 1519

6516

RES

1522

6521

1523

6517

RES

1524

6511

RES

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_C_IN_ITV

3503

150R

PESD5V0S1BA

3507

150R

PESD5V0S1BA

3510

150R

PESD5V0S1BA

3514
150R

PESD5V0S1BA

RES

2528

PESD5V0S1BA

3518

27K

PESD5V0S1BA

RES

2527

PESD5V0S1BAPESD5V0S1BA

RES

2529

RES

2531

PESD5V0S1BA

RES

2535

PESD5V0S1BA

RES

3546

2538

75R

PESD5V0S1BA

F534

330p

2508

F535

2514

330p

F536

3511

2517

1n0

33K

F537

3515

2523
1n0

33K

3516

100R

75R

3517

F539

6K8

3520

3523

F540

100R

3526

3528

100R

75R 75R

3532

1K0

75R

3533 3530

I550

68R3535

1K0

3536

3545

100R

F541

F542

2521
220n

6512

6513

2515
220n

1N4148

1N4148

F530

I540

I541

F538

SC1_AUDIO_MUTE_R

SC1_AUDIO_OUT_R

SC1_AUDIO_OUT_L

SC1_AUDIO_MUTE_L

SC1_AUDIO_IN_R

SC1_AUDIO_IN_L

SC1_B_IN

SC1_STATUS

SC1_G_IN

SC1_R_IN

SC1_FBL_IN

SC1_CVBS_IN

SCART 2

Audio-R_out

Audio-R_in

Audio-L_out

Audio-L_in

Function_Sw

RGB-R_out/YC-C_in

CVBS_out

Video/YC-Y_in

1506

PPTV/55

SC2_AUDIO_MUTE_R

SC2_AUDIO_OUT_R

SC2_AUDIO_OUT_L

SC2_AUDIO_MUTE_L

SC2_CVBS_MON_OUT

SC2_CVBS_MON_OUT_ITV

SC2_Y_CVBS_IN_ITV

SC1_RF_OUT_CVBS

SC1_CVBS_RF_OUT

3V

BC847B

2534
220n

7500

I543

2502

2506

2512

2520

3551

3519

15R

330p

I512

1n0 330p

1n0

6K8

3553

75R

3V7

BC857BW

100R

I553

I510

F544

7502

3552

100R

2533
220n

33K

3508

33K

3513

I545

+5V_SW

7503

BC847B

3538

I552

4K7

3524

F543

RES

4502

15R

I548

BC857BW

7504

3540

4K7

I549

I544

RES

4504

3521
1K0

3555

68R

3554

68R

2509
220n

2518
220n

I558

I517

I520

I557

I528

I556

I533

3537
1K0

I554

3500
150R

6522

RESRESRES

3502
150R

PESD5V0S1BA PESD5V0S1BA

6501

PESD5V0S1BA

RES

6505

PESD5V0S1BA

RES

6524 6523

PESD5V0S1BA

6509

RES

PESD5V0S1BA

I551

3525
1K0

2525
220n

RES
2530

3506
150R

3512
150R

3550

27K

I530

RES

2524

+5V_SW

5V2

3529

3531

75R

F510

1

F512

2

F514

3

F516

4
5

F518

6
7

F532

8
9

1510

10
11

1513

12
13
14
15
16
17
18

F527

19

F529

20
21

1518

1521

F523

6525

RES

6510

RES

1503 1500

1508 1501

1514

1515

2536
220n

3522

68R

RES
2526

PESD5V0S1BA

PESD5V0S1BA

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_STATUS

SC2_C_IN_ITV

SC2_C_IN

SC2_Y_CVBS_IN

H_17370_019.eps

010804

A

B

C

D

E

F

G

H

I

1500 C9
1501 C9
1502 C3
1503 D9
1504 C2
1505 C3
1506 D8
1507 D3
1508 E9
1509 D2
1510 E9
1511 D3
1512 E2
1513 E9
1514 E9
1515 F9
1516 E3
1517 E3
1518 G9
1519 F3
1520 G3
1521 H9
1522 G3
1523 H3
1524 H3
1525 A2
1526 A1
2502 C10
2506 C10
2508 B4
2509 D12
2512 D10
2514 C4
2515 C5
2517 D4
2518 D12
2520 E10
2521 D5
2523 D4
2524 F10
2525 G10
2526 G10
2527 F4
2528 E4
2529 F4
2530 H10
2531 G4
2533 I11
2534 I10
2535 H3
2536 G10
2538 H3
3500 B10
3502 C10
3503 B4
3506 D10
3507 C4
3508 D11
3510 C4
3511 D4
3512 D10
3513 E11
3514 D4
3515 D4
3516 E4
3517 E4
3518 E4
3519 G11
3520 E4
3521 G12
3522 G10
3523 F4
3524 I11
3525 G10
3526 F4
3528 F4
3529 H10
3530 G4
3531 H10
3532 G4
3533 G4
3535 G3
3536 H4
3537 I12
3538 G11
3540 I12
3545 H4
3546 H4
3550 E10
3551 E10
3552 F11
3553 F11
3554 I12
3555 H12
4502 G11
4504 I12
6501 D10
6504 D3
6505 E10
6507 D3
6509 F10
6510 H9
6511 H3
6512 G5
6513 G5
6514 E3
6515 F3
6516 G3
6517 H3
6518 C3
6519 C3
6520 E3
6521 G3
6522 C10

6523 C10
6524 E10
6525 G9
7500 G10
7502 G11
7503 I11
7504 I11
F510 D9
F511 C2
F512 D9
F513 C2
F514 D9
F515 C2
F516 D9
F517 C2
F518 D9
F519 D2
F520 D2
F521 D2
F522 D2
F523 F9
F524 E2
F525 E2
F526 F2
F527 F9
F528 F2
F529 F9
F530 H5
F531 E2
F532 E9
F534 B4
F535 C4
F536 C4
F537 D4
F538 E5
F539 E5
F540 F5
F541 F5
F542 G4
F543 C11
F544 D11
I510 B11
I512 C11
I517 D12
I520 D12
I528 G12
I530 G10
I533 H12
I540 C5
I541 D5
I543 G11
I544 G12
I545 E11
I548 I11
I549 I12
I550 G4
I551 G10
I552 G11
I553 I11
I554 I12
I556 H12
I557 F12
I558 I12

SSB: HDMI Main

B07C

A

B

Pend New 12NC

TO / FROM SIDE I/O

1N01

FI-RE21S-HF-R1500

1
2
3
4

C

D

E

F

G

5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21

2223
2425
2627
2829

HDMI_AUDIO_IN_R

HDMI_AUDIO_IN_L

3139 123 6273.1

Circuit Diagrams and PWB Layouts

63LC7.5E LA 7.

1234567891011

HDMI MAIN

HDMI_INT_MAIN

1n02N18

HDMI_RST_RX_BUF

HDMI-MUX_TSCL

HDMI-MUX_TSDA

HDMI-SIDE_TSCL

HDMI-SIDE_TSDA
IIC_SCL_SIDE

IIC_SDA_SIDE

+5VHDMI-MUX_TPWR
+5VHDMI-SIDE_TPWR

NC

NC

NC

HDMI-SIDE_TXC-

HDMI-SIDE_TXC+

HDMI-SIDE_TX0-

HDMI-SIDE_TX0+

HDMI-SIDE_TX1-

HDMI-SIDE_TX1+

HDMI-SIDE_TX2-

HDMI-SIDE_TX2+

HDMI-SIDE_CEC_A

HDMI-SIDE_TSCL
HDMI-SIDE_TSDA

+5VHDMI-SIDE_TPWR

HDMI_HOTPLUG_RESET

2N67
100n

100n

2N05

IN18

IN19

220R

220R

3N26

3N25

IN20

IN21

10n2N08

10n

2N07

2N06

47u 6.3V

10u2N09

10u2N10

2N03

IN16

IN17

47u

6.3V

12

14

16

9

+3V3_SW

3N27

100n

2N04

VREF_DAC

VOUTL

VOUTR

DEEM
CLKOUT

4

VDDD

1R0

+3V3_SW

Φ

DAC

VSSD

5

3N23

SYSCLK

SFOR

VSSA

15

13

VDDA

DAT AI

MUTE

1R0

2N11

BCK

PLL1

PLL0

0
1

WS

+3V3_ANA-MUX

4K7

3N35

+3V3_ANA-MUX

4K7

3N37

2N12

47u 6.3V

7N07
UDA1334ATS

1

6

3

10

11

7

2

8

3N36

3N38

+3V3_SW

100n

4K7

FN01

FN02

4K7

FN03

FN04

RES

3N18-1

3N18-4 4 5

3N18-3

3N18-2

4N03

4N04

4N05

4N06

4N07
4N08

4N01

33R

18

33R

33R

6

3

33R

27

RES

HDMI-MUX_TXC+
HDMI-MUX_TXC-

HDMI-MUX_TX0+
HDMI-MUX_TX0-

HDMI-MUX_TX1+
HDMI-MUX_TX1-

HDMI-MUX_TX2+
HDMI-MUX_TX2-

HDMI-SIDE_TXC+
HDMI-SIDE_TXC-

HDMI-SIDE_TX0+
HDMI-SIDE_TX0-

HDMI-SIDE_TX1+
HDMI-SIDE_TX1-

HDMI-SIDE_TX2+
HDMI-SIDE_TX2-

4N02

33R

33R

3N21

3N20

3N19

HDMI_SCK

HDMI_WS

2N13

18p

2N14

18p

33R

HDMI_SD

3N24

1M0

3N39 100R
3N40 100R

3N34

4K7

1N02

3N22

28M322

33R

7N01-1

SII9125CTU

INT

RESET

DSCL0
DSDA0

DSCL1
DSDA1

CSCL
CSDA

CI2CA

SCDT

R0PWR5V
R1PWR5V

+

R0XC

-

+

R0X0

-

+

R0X1

-

+

R0X2

-

+

R1XC

-

+

R1X0

-

+

R1X1

-

+

R1X2

-

IN

XTAL

OUT

MCLK

SCK

WS

SD

SPDIF

MUTEOUT

MAIN

RSVDNC

RSVDL

Q

HSYNC

VSYNC

EVNODD

ODCK

DE

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

0
1
2
3
4
5
6
7
8
9

55
76
77
82

NC

83
84
98

99

16

NC

15

NC

14

3N01

13

3N03 33R

10

3N02-1 33R
9
8

3N02-3 3 6
7
3
2

3N08-2 33R2
1

144

3N08-4 33R

141

NC

140

NC

139
138

3N07 33R

135

3N04-1 33R
134
133

3N04-3
132

3N04-4
129

3N06-2

128

3N06-3

127

3N06-4

126
123

NC

122

NC

121
120

3N10 33R
117
116

3N11-2 2 7

115

3N11-3

114

3N11-4
111
110
109
108

3N12-4 33R4

19

3N13

20

3N14

21

3N15

22

NC

5

3N16

7N01-3

SII9125CTU

146
147
148
149
150
151
152

3N33

4K7

18
27

453N02-4 33R

36
45

18
27
36
45
1

36
45

18

36
45
18
27

166

167

168

169

VIA
VIA

VIA

VIA

153

154

156

155

33R

7

8

5

33R

33R

33R

33R

33R3N02-2
33R

33R3N08-1 1 8

33R3N08-3

170

157

33R3N05

33R3N04-2
33R
33R
33R3N06-1

33R27
33R
33R

33R3N09
33R3N11-1

33R
33R
33R
33R3N12-1
33R3N12-2
33R3N12-3 3 6

HDMI_VCLK

VIA

158

HDMI_Cb(0)
HDMI_Cb(1)
HDMI_Cb(2)
HDMI_Cb(3)
HDMI_Cb(4)
HDMI_Cb(5)
HDMI_Cb(6)
HDMI_Cb(7)
HDMI_Cb(8)
HDMI_Cb(9)

HDMI_Y(0)
HDMI_Y(1)

HDMI_Y(2)

HDMI_Y(3)
HDMI_Y(4)
HDMI_Y(5)
HDMI_Y(6)
HDMI_Y(7)
HDMI_Y(8)
HDMI_Y(9)

HDMI_Cr(0)
HDMI_Cr(1)

HDMI_Cr(2)
HDMI_Cr(3)
HDMI_Cr(4)
HDMI_Cr(5)
HDMI_Cr(6)
HDMI_Cr(7)
HDMI_Cr(8)
HDMI_Cr(9)

HDMI_DE

HDMI_H

HDMI_V

159
160
161
162
163
164
165

106
118
130
142

103
112
124
136

145

36
41
45
49
53
59
63
67
71

93

11
23
79
90

4
17
31
73
87

SII9125CTU

AGND

DGND

CGNDIOGND

GND_HS

7N01-2

XTALVCC

POWER

REGVCC

DVCC18

37
54
72

38
42
46
50
56
60
64
68

96

92

12
24
25
80
91
107
119
131
143

6
18
32
74
88
104

IOVCC33 CVCC18 AVCC33 AVCC18

113
125
137

97

102

100

34
33

29
28

27
26

105

101

NC

35
30

40
39

44
43

48
47

52
51

58
57

62
61

66
65

70
69

95

94

89

NC

86

85

81

78

NC

75

1n0

2N15

1n0

2N25

2N28 1n0

1n0

2N66

1n0

2N342N60

1n0

2N38

1n0

2N42

1n0

2N51

1n0

1n0

2N31

1n0

2N39

1n0

2N45

1n0

2N54

100n

2N16

1n0

2N61

1n0

2N48

1n0

2N63

100n

2N17

1n0

2N26

1n0

2N41

1n0

2N59

100n

2N20

1n0

2N29

1n0

2N43

1n0

2N52

+1V8SWA

+3V3SWA

1n0

2N62

2N32

+3V3SWB

+1V8SWB

+1V8SWC

+1V8SWD

1n0

2N49

2N46

+3V3SWC

+3V3SWD

1n0

2N58

2N55

+3V3SWE

100n

1n0

1n0

1n0

100n

2N27

100n

2N33

100n

2N36

2N35 100n

100n

2N44

100n

2N50

100n

2N53

100n

2N64

2N30

100n

2N40

100n

2N47

100n

2N56

IN07

IN06

IN09

IN10

IN11

100n2N37

IN12

IN13

IN14

IN15

5N01

+1V8_SW

120R

+3V3_SW

5N02
120R

5N03

+3V3_SW

120R

5N04

+1V8_SW

120R

+1V8_SW

5N05
120R

5N06

+1V8_SW

120R

5N07

+3V3_SW

120R

5N08

+3V3_SW

120R

+3V3_SW

5N09
120R

H_17370_020.eps

010804

1234567891011

A

B

C

D

E

F

G

1N01 C1
1N02 G5
2N03 E2
2N04 E2
2N05 F1
2N06 F2
2N07 G1
2N08 G1
2N09 F2
2N10 F2
2N11 E3
2N12 E3
2N13 F4
2N14 G4
2N15 A9
2N16 A9
2N17 A10
2N18 A9
2N20 A10
2N25 A9
2N26 A10
2N27 A10
2N28 A9
2N29 A10
2N30 A11
2N31 A9
2N32 A10
2N33 B10
2N34 C9
2N35 C10
2N36 C10
2N37 C11
2N38 C9
2N39 C9
2N40 C11
2N41 D10
2N42 D9
2N43 D10
2N44 D10
2N45 D9
2N46 D10
2N47 D11
2N48 D9
2N49 D10
2N50 D10
2N51 E9
2N52 E10
2N53 E10
2N54 E9
2N55 E10
2N56 E11
2N58 E10
2N59 E10
2N60 F9
2N61 A9
2N62 A10
2N63 E9
2N64 F10
2N66 B9
2N67 D1
3N01 B7
3N02-1 B7
3N02-2 B7
3N02-3 B7
3N02-4 B7
3N03 B7
3N04-1 C7
3N04-2 C7
3N04-3 C7
3N04-4 C7
3N05 C7
3N06-1 C7
3N06-2 C7
3N06-3 C7
3N06-4 C7
3N07 C7
3N08-1 B7
3N08-2 B7
3N08-3 B7
3N08-4 C7
3N09 D7
3N10 D7
3N11-1 D7
3N11-2 D7
3N11-3 D7
3N11-4 D7
3N12-1 D7
3N12-2 D7
3N12-3 D7
3N12-4 D7
3N13 D7
3N14 E7
3N15 E7
3N16 E7

3N18-1 D4
3N18-2 E4
3N18-3 E4
3N18-4 E4
3N19 F4
3N20 F4
3N21 F4
3N22 G5
3N23 E3
3N24 G4
3N25 G1
3N26 G1
3N27 E2
3N33 B7
3N34 B5
3N35 A3
3N36 A3
3N37 B3
3N38 B3
3N39 B5
3N40 B5
4N01 D4
4N02 D4
4N03 A4
4N04 A4
4N05 B4
4N06 B4
4N07 B4
4N08 B4
5N01 A11
5N02 A11
5N03 A11
5N04 B11
5N05 C11
5N06 C11
5N07 D11
5N08 D11
5N09 E11
7N01-1 A6
7N01-2 B8
7N01-3 F7
7N07 F3
FN01 A4
FN02 A4
FN03 B4
FN04 B4
IN06 A11
IN07 A11
IN09 B11
IN10 B11
IN11 C11
IN12 C11
IN13 D11
IN14 D11
IN15 E11
IN16 F2
IN17 F2
IN18 F1
IN19 F2
IN20 G2
IN21 G1

SSB: HDMI Switch

1234567891011

A

1M01

10029449-002

1
2
3
4
5
6
7
8
9

B

10
11
12
13
14
15
16
17
18
19

C

HDMI 1

1M02

10029449-002

1
2
3
4

D

E

5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

HDMI 2

F

G

1M03

10029449-002

1

2

3

4

5

6

7

8

9
10
11
12
13
14
15
16
17
18
19

H

HDMI 3

3139 123 6273.1

123

Circuit Diagrams and PWB Layouts

HDMI SWITCH

FM05

47K3M35

FM01

FM02

FM03

FM07

FM08
FM10

FM11

FM12
FM13

3M36 47K

+5VHDMI_A

3M03

IM02

3M37 47K

+5VHDMI_B

3M07

3M40 47K

+5VHDMI_C

3M13

100R

47K3M38

100R

IM04

47K3M39

100R

IM11

NC

2021
2223

FM06

NC

2021
2223

FM15

NC

2021
2223

IM07

IM08

7M02

BC847BW

7M04

BC847BW

IM09

7M09

BC847BW

+5VHDMI_A

IM01

+5VHDMI_B

IM03

+5VHDMI_C

IM10

RES

4M01

A

RX2+A

RX2-A

RX1+A

RX1-A

RX0+A

RX0-A

RXC+A

RXC-A

DDC_SCLA

DDC_SDAA

HPD_RESET_A

DDC_RESET

3M04

2K2

HDMI-SIDE_CEC_A

RX2+B

RX2-B

RX1+B

RX1-B

RX0+B

RX0-B

RXC+B

RXC-B

DDC_SCLB
DDC_SDAB

HPD_RESET_B

DDC_RESET

3M08

2K2

RX2+C

RX2-C

RX1+C

RX1-C

RX0+C

RX0-C

RXC+C

RXC-C

DDC_SCLC

DDC_SDAC

HPD_RESET_C

DDC_RESET

3M31

2K2

64LC7.5E LA 7.

1M01 A1

A

B

C

D

E

F

G

H

1M02 D1
1M03 F1
2M01 B10
2M02 B10
2M03 B10
2M04 B10
2M05 B10
2M06 B10
2M07 D10
2M08 D10
2M09 D10
2M10 D10
2M11 A10
2M12 A9
2M15 C10
2M16 C10
2M17 C10
2M19 B11
2M20 B11
2M21 B11
3M03 C2
3M04 C3
3M07 F2
3M08 F3
3M09 D4
3M10 F4
3M11 G4
3M13 H2
3M14 E7
3M15 E7
3M18 B7
3M20 B5
3M21 B5
3M31 H3
3M32 C7
3M33 B5
3M34 C7
3M35 B2
3M36 B2
3M37 E2
3M38 E2
3M39 G2
3M40 G2
4M01 A3
4M02 B9
4M03 B9
4M04 B9
4M05 C9
4M07 E7
4M08 D7
4M09 D7
4M10 C9
4M11 C9
4M12 C7
5M01 C9
5M02 B9
5M03 B9
6M01 E7
6M02 D7
6M03 D7
6M04 E7
6M06 D7
6M07 D7
6M08 C7
7M01 A9
7M02 C2
7M04 F2
7M07 C5
7M09 H2
FM01 B2
FM02 B2
FM03 C2
FM05 A1
FM06 D1
FM07 E2
FM08 E2
FM10 E2
FM11 G2
FM12 G2
FM13 G2
FM15 F1
FM16 A10
FM17 B11
FM18 B11
FM19 C11
IM01 C3
IM02 C2
IM03 E3
IM04 F2
IM07 C2
IM08 E2
IM09 G2
IM10 H3
IM11 H2
IM12 C7

RES
7M01

LF18CD

13

+3V3_STBY

RES

2M12

+3V3_ANA-MUX

RES

RES

RES

4M02

4M03

4M04

4M05

4M10

4M11

4K7

RES

3M33

HDMI_INT_MUX

HDMI_RST_MUX

+3V3_ANA-MUX

+5VHDMI_A

BAT54 COL

BAT54 COL

+5VHDMI_B

BAT54 COL6M07

BAT54 COL

+5VHDMI_C

HPD_RESET_A
HPD_RESET_B
HPD_RESET_C

HDMI-MUX_TSCL
HDMI-MUX_TSDA

HDMI-MUX_TXC+

HDMI-MUX_TXC­HDMI-MUX_TX0+

HDMI-MUX_TX0-

HDMI-MUX_TX1+

HDMI-MUX_TX1-

HDMI-MUX_TX2+

HDMI-MUX_TX2-

IIC_SCL_up
IIC_SDA_up

CEC_D
DDC_SCLA
DDC_SCLB
DDC_SCLC

DDC_SDAA
DDC_SDAB
DDC_SDAC

+5V_SW

+5V_SW

+5V_SW

AVCC18

Φ

HDMI

SWITCH

66

100R

100R3M21

+5V_SW

4K7

RES

3M18

+5VHDMI-MUX_TPWR

IM12

4K7

3M34

33

73

DVCC18

A

HPD21

HPDIN

TSCL
TSDA

54
53

D

31

0

51

1

71

2

30

0

50

12DSDA

70

32

0

52

1

72

2

16

0

36
56
76

78
77

10

C+

11

C-

7

0+

8

0-

4

1+

5

1-

1

2+

2

2-

CEC

DSCL

RPWR

TX

DGND

34

74

80

RES RES

3M32

82K

3M14

IM14

100R

IM15

3M15

100R

RES

4M12

IM13

6M08

BAT54 COL

6M02 BAT54 COL

RES

4M09

6M03

RES

6M06

RES

4M08

RES

6M01

RES

4M07

6M04 BAT54 COL

RES

HDMI_HOTPLUG_RESET

3M20

+3V3_ANA-MUX +1V8_ANA-MUX +1V8_DIG-MUX

7M07

SII9185CTU

13

3M09

4K7

3M10
470R

RES

3M11

1K0

14

15

79

35

75

19
18
22
21
25
24
28
27

39
38
42
41
45
44
48
47

59
58
62
61
65
64
68
67

12

B

RXC+A
RXC-A
RX0+A
RX0-A
RX1+A
RX1-A
RX2+A
RX2-A

RXC+B
RXC-B
RX0+B
RX0-B
RX1+B
RX1-B
RX2+B
RX2-B

RXC+C
RXC-C
RX0+C
RX0-C
RX1+C
RX1-C

C

RX2+C
RX2-C

+1V8_ANA-MUX

234355

AVCC33

RESET

LSDA
EPSEL0
EPSEL1
LSCL

I2CADDR
TPWR
I2CSEL
INT
RSVDL

C+
C­0+
0-

R0X

1+
1­2+
2-

C+
C­0+
0-

R1X

1+
1­2+
2-

C+
C­0+
0-

R2X

1+
1­2+
2-

EXT_SWING

3

63

AGND

9

2026404660

6172937495769

+1V8_SW

+1V8_STBY

+3V3_SW

+3V3_STBY

45678

OUTIN

COM

100n

2

91011

5M02

220R

5M03

220R

5M01

220R

RES

2M11

FM16

16V100u

2M15 10u

2M07 10u 2M01 10u

+1V8_STBY

2M02 10u

100n2M16

2M08 10u

2M03 100n

2M17 100n

2M09 100n

2M04 100n

2M10 100n

2M05 100n

2M06 100n

100n2M19

B07DB07D

100n2M21

2M20 100n

+1V8_ANA-MUX

FM17

+1V8_DIG-MUX

FM18

+3V3_ANA-MUX

FM19

H_17370_021.eps

010804

IM13 C7
IM14 E7
IM15 E7

SSB: LVDS Connector

Circuit Diagrams and PWB Layouts

65LC7.5E LA 7.

B07E

A

FROM FPGA

B

C

D

<,,,annot_deleted,>

E

<,,,annot_deleted,>

F

G

3139 123 6273.1

12345678910

LVDS CONNECTOR

TxLVDSe_0n LVDSe_0n

TxLVDSe_0p

TxLVDSe_1n

TxLVDSe_1p

TxLVDSe_2n

TxLVDSe_2p

TxLVDSe_CLKn

TxLVDSe_CLKp

TxLVDSe_3n

TxLVDSe_3p
TxLVDSe_4n

TxLVDSe_4p

TxLVDSo_0n

TxLVDSo_0p

TxLVDSo_1n

TxLVDSo_1p

TxLVDSo_2n

TxLVDSo_2p

TxLVDSo_CLKn

TxLVDSo_CLKp

TxLVDSo_3n

TxLVDSo_3p

TxLVDSo_4n

TxLVDSo_4p

1R02

1R03

1R05 1R04

1R06

RESRES

1R07

1R09 1R08

1R11 1R10

1R12

1R13

12345678910

DLW21SDLW21S

DLW21S

DLW21S DLW21S

DLW21S

DLW21S

DLW21S DLW21S

DLW21S DLW21S

DLW21S

LVDSe_0p

LVDSe_1n

LVDSe_1p

LVDSe_2n

LVDSe_2p

LVDSe_CLKn

LVDSe_CLKp

LVDSe_3n

LVDSe_3p
LVDSe_4n

LVDSe_4p

LVDSo_0n

LVDSo_0p

LVDSo_1n

LVDSo_1p

LVDSo_2n

LVDSo_2p

LVDSo_CLKn

LVDSo_CLKp

LVDSo_3n

LVDSo_3p

VDSo_4

L

LVDSo_4p

n

BOLT_ON_SCL
BOLT_ON_SDA

FR03
FR04
FR05
FR06
FR07
FR08

FR09
FR10

FR11
FR12

FR13
FR14
FR15
FR16
FR17
FR18
FR19
FR20

FR21
FR22

FR31
FR30
FR29
FR28

3R25

1R02
1R03
1R04
1R05
1R06
1R07
1R08
1R09
1R10
1R11
1R12
1R13

8 Bit Single

LVD S

*

CTRL_DISP1
CTRL_DISP2
CTRL_DISP3
CTRL_DISP4

100R
100R3R26

--

--

--

--

--

-­Y
Y
Y
Y
Y

--

RES

FR02

FR23

100p

2R02

10 Bit Single

LVD S

--

--

--

--

--

-­Y
Y
Y
Y
Y
Y

+VDISP

FX15S-41S-0.5SH

100p

RES

2R01

1R01
48 49

46 47
44 45
42 43

8 Bit Dual

LVD S

41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

Y
Y
Y
Y
Y

-­Y
Y
Y
Y
Y

--

SINGLE

LVD S

10 Bit Dual

LVD S

Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y

CTRL-DISP1

CTRL-DISP2(LCD_PWR_on)

CTRL-DISP3(Rev_Standby)

CTRL-DISP4

+5V_STANDBY

4R01

RES

4R02

BZX384-C5V6

3R12

47R

+12V_DISP

4R04

4R03

IR01

3R10

47K

6R02

IR02

SI4835BDY

2R10

1u0

VDISP-SWITCH

7R07

PDTC114ET

3V2

CTRL_DISP1_up

LCD_PWR_ON

LCD PDP

100R

--

--

100R

--

100R

--

100R
Y
Y
Y
Y

IR05

--

--

--

--

STANDBYn

CTRL_DISP4_up

*

3R35
3R52
3R53
3R54
4R05
4R06
4R07
4R08

LGE

DISPEN
On time : H
Off time : Don’t care

7R05

IR06

3R13
47K

IR04

0V

+3V3_SW

3R35

***

100R
3R52

100R
3R53

100R
3R54

*

100R

4R05

RESET
Semi standby : H

Normal and off : L

IR08

RES

RES

4K7

4K7

3R48

100p

100p

4R07

4R06

*

*

2R21 3R49

2R20

5R01
220R

5R02
220R

5R03
220R

RES

4K7

3R50

100p

*

2R23

4R08

SDI

RES

RES

4K7

3R51

100p

*

2R24

12V1

2R11

FR24

FR25

FR26

FR27

FHP

CPU-GO
On time : H

Off time : Don’t care

PDWIN

On time : H

Off time : Don’t care

PDP-GO
On time : H

Semi standby : L

Off time : Don’t care

FR01

+VDISP

16V47u

100n

2R12

LCD

CTRL_DISP1

CTRL_DISP2

CTRL_DISP3

CTRL_DISP4

PDP

1080p

MAIN_RESET

H_17370_022.eps

010804

A

B

C

D

E

F

G

1R01 C5
1R02 B2
1R03 B2
1R04 C2
1R05 C2
1R06 D2
1R07 D2
1R08 D2
1R09 E2
1R10 E2
1R11 F2
1R12 F2
1R13 G2
2R01 F5
2R02 F5
2R10 D8
2R11 C10
2R12 C10
2R20 G9
2R21 G9
2R23 G9
2R24 G9
3R10 C8
3R12 D8
3R13 D9
3R25 F4
3R26 F4
3R35 F9
3R48 F9
3R49 F9
3R50 F9
3R51 F9
3R52 F9
3R53 F9
3R54 F9
4R01 C8
4R02 C8
4R03 C8
4R04 C8
4R05 G9
4R06 G9
4R07 G9
4R08 G9
5R01 C9
5R02 C9
5R03 C9
6R02 D8
7R05 C9
7R07 D8
FR01 C10
FR02 C5
FR03 D4
FR04 D4
FR05 D4
FR06 D4
FR07 D4
FR08 D4
FR09 D4
FR10 D4
FR11 D4
FR12 D4
FR13 E4
FR14 E4
FR15 E4
FR16 E4
FR17 E4
FR18 E4
FR19 E4
FR20 E4
FR21 E4
FR22 E4
FR23 F5
FR24 F10
FR25 F10
FR26 F10
FR27 F10
FR28 F4
FR29 F4
FR30 F4
FR31 E4
IR01 C8
IR02 D8
IR04 D9
IR05 F8

IR06 D9
IR08 C9

SSB: SRP List

Netname Schematic

+12V_DISP B01A (1x)
+12V_DISP B01B (2x)
+12V_DISP B02 (1x)
+12V_DISP B04 (1x)
+12V_DISP B06A (1x)
+12V_DISP B07E (1x)
+1V2_ADC B05C (5x)
+1V2_CORE B05C (2x)
+1V2_PLL B05C (4x)
+1V2_SW B01B (3x)
+1V2_SW B03C (2x)
+1V2_SW B05C (1x)
+1V2_SW B05E (1x)
+1V2-FPGA B05E (2x)
+1V2-PLL B05E (2x)
+1V8_ANA-MUX B07D (3x)
+1V8_DIG-MUX B07D (2x)
+1V8_STBY B07D (2x)
+1V8_SW B01B (1x)
+1V8_SW B03A (2x)
+1V8_SW B03E (1x)
+1V8_SW B04 (1x)
+1V8_SW B07C (4x)
+1V8_SW B07D (1x)
+1V8SWA B07C (1x)
+1V8SWB B07C (1x)
+1V8SWC B07C (1x)
+1V8SWD B07C (1x)
+2V5_SW B01B (3x)
+2V5_SW B05B (1x)
+2V5_SW B05E (1x)
+2V5_VDDMQ B05B (5x)
+2V5_VDDMQ B05C (2x)
+2V5in-FPGA B05E (2x)
+2V5out-FPGA B05E (2x)
+3V3 B03A (3x)
+3V3 B03B (3x)
+3V3 B03C (7x)
+3V3 B03D (2x)
+3V3 B03E (1x)
+3V3_ANA-MUX B07C (2x)
+3V3_ANA-MUX B07D (4x)
+3V3_BUF B03B (4x)
+3V3_CORE B03B (2x)
+3V3_FPGA B05D (8x)
+3V3_FPGA B05E (4x)
+3V3_NOR48 B03D (4x)
+3V3_STBY B01A (1x)
+3V3_STBY B04 (31x)
+3V3_STBY B06C (3x)
+3V3_STBY B07D (2x)
+3V3_STV B03B (10x)
+3V3_SW B01A (1x)
+3V3_SW B02 (2x)
+3V3_SW B03E (2x)
+3V3_SW B04 (9x)
+3V3_SW B05A (8x)
+3V3_SW B05C (9x)
+3V3_SW B05E (1x)
+3V3_SW B07C (8x)
+3V3_SW B07D (1x)
+3V3_SW B07E (1x)
+3V3_VDDP B03C (3x)
+3V3clean B03C (1x)
+3V3clean B03E (1x)
+3V3FE B03A (5x)
+3V3SWA B07C (1x)
+3V3SWB B07C (1x)
+3V3SWC B07C (1x)
+3V3SWD B07C (1x)
+3V3SWE B07C (1x)
+5V_AUD B06A (3x)
+5V_D B06A (2x)
+5V_IF B02 (7x)
+5V_STANDBY B01A (4x)
+5V_STANDBY B04 (4x)
+5V_STANDBY B05A (1x)
+5V_STANDBY B07E (1x)
+5V_SW B01A (3x)
+5V_SW B02 (2x)
+5V_SW B03A (9x)
+5V_SW B03B (2x)
+5V_SW B03D (3x)
+5V_SW B04 (2x)
+5V_SW B05A (2x)
+5V_SW B06A (1x)
+5V_SW B06C (1x)
+5V_SW B07A (3x)
+5V_SW B07B (2x)
+5V_SW B07D (4x)
+5VHDMI_A B07D (3x)
+5VHDMI_B B07D (3x)
+5VHDMI_C B07D (3x)
+5VHDMI-MUX_TPWR B07C (1x)
+5VHDMI-MUX_TPWR B07D (1x)
+5VHDMI-SIDE_TPWR B07C (2x)
+5VS B02 (4x)
+8V B06A (2x)
+AUDIO_POWER B06B (3x)
+AUDIO_POWER_+12V_DISP B06A (1x)
+AUDIO_POWER_+12V_DISP B06B (1x)
+VDISP B07E (2x)
+VTUN B01A (1x)
+VTUN B02 (1x)
10046_TDO B03A (1x)
10046_TDO B03C (1x)
4MHZ_CLK B02 (1x)
4MHZ_CLK B03A (1x)
4MHz_MOJO B03A (1x)
4MHz_MOJO B03C (1x)
A(0) B04 (2x)
A(0) B05A (1x)
A(0:7) B04 (1x)
A(1) B04 (2x)
A(1) B05A (1x)
A(1:7) B04 (1x)
A(10) B04 (2x)
A(11) B04 (2x)
A(12) B04 (2x)
A(13) B04 (2x)
A(14) B04 (2x)
A(15) B04 (2x)
A(16) B04 (2x)
A(17) B04 (2x)
A(18) B04 (2x)
A(19) B04 (2x)
A(2) B04 (2x)
A(2) B05A (1x)
A(3) B04 (2x)
A(3) B05A (1x)
A(4) B04 (2x)
A(4) B05A (1x)
A(5) B04 (2x)
A(5) B05A (1x)
A(6) B04 (2x)
A(6) B05A (1x)
A(7) B04 (2x)
A(7) B05A (1x)
A(8) B04 (2x)
A(8:19) B04 (2x)

3104 313 6073.5

Circuit Diagrams and PWB Layouts

A(9) B04 (2x)
A_MICLK B03B (2x)
A_MISTRT B03B (2x)
A_MIVAL B03B (2x)
A_MOCLK B03B (2x)
A_MOSTRT B03B (2x)
A_MOVAL B03B (2x)
AD(0) B04 (2x)
AD(0) B05A (1x)
AD(0:7) B04 (2x)
AD(1) B04 (2x)
AD(1) B05A (1x)
AD(2) B04 (2x)
AD(2) B05A (1x)
AD(3) B04 (2x)
AD(3) B05A (1x)
AD(4) B04 (2x)
AD(4) B05A (1x)
AD(5) B04 (2x)
AD(5) B05A (1x)
AD(6) B04 (2x)
AD(6) B05A (1x)
AD(7) B04 (2x)
AD(7) B05A (1x)
ALE_EMU B04 (1x)
ALE_EMU B05A (1x)
ambi_pwm(0) B05D (1x)
ambi_pwm(0) B05E (1x)
ambi_pwm(1) B05D
ambi_pwm(1) B05E (1x)
ambi_pwm(2) B05D (1x)
ambi_pwm(2) B05E (1x)
ambi_pwm(3) B05D (1x)
ambi_pwm(3) B05E (1x)
ambi_pwm(4) B05D (1x)
ambi_pwm(4) B05E (1x)
ambi_pwm(5) B05D (1x)
ambi_pwm(5) B05E (1x)
AMBI_SCL B05D (1x)
AMBI_SCL B05E (1x)

A B05D (1x)

AMBI_SD
AMBI_SDA B05E (1x)
ANTI_PLOP B04 (1x)
ANTI_PLOP B06C (1x)
ASDO B05D (2x)
ASDO B05E (1x)
AUDIO_LS_L B06A (1x)
AUDIO_LS_L B06B (1x)
AUDIO_LS_R B06A (1x)
AUDIO_LS_R B06B (1x)

-AUDIO_POWER B06B (2x)
BACKLIGHT_BOOST B01A (1x)
BACKLIGHT_BOOST B04 (1x)
BL_ADJUST B01A (1x)
BL_ADJUST B05A (1x)
BL_ON_OFF B01A (1x)
BL_ON_OFF B04 (1x)
BOLT_ON_SCL B04 (2x)
BOLT_ON_SCL B07E (1x)
BOLT_ON_SDA B04 (2x)
BOLT_ON_SDA B07E (1x)
C_IN B07A (2x)
CE B04 (1x)
CE B05E (1x)
CEC_D B04 (1x)
CEC_D B07D (1x)
CLK_OSC1 B05D (1x)
CLK_OSC1 B05E (1x)
COMP_AUDIO_IN_L B06A (1x)
COMP_AUDIO_IN_L B07A (1x)
COMP_AUDIO_IN_R B06A (1x)
COMP_AUDIO_IN_R B07A (1x)
CPU_RST B04 (1x)
CS B04 (1x)
CS B05A (1x)
CTRL_DISP1 B07E (2x)
CTRL_DISP1_up B04 (1x)
CTRL_DISP1_up B07E (1x)
CTRL_DISP2 B07E (2x)
CTRL_DISP3 B07E (2x)
CTRL_DISP4 B07E (2x)
CTRL_DISP4_up B04 (1x)
CTRL_DISP4_up B07E (1x)
CVBS_RF B02 (1x)
CVBS_RF B05A (1x)
DATA0 B05D (2x)
DATA0 B05E (1x)
DC_PROT B04 (1x)
DC_PROT B06B (1x)
DCLK B05D (2x)
DCLK B05E (1x)
DDC_RESET B04 (2x)
DDC_RESET B07D (3x)
DDC_SCLA B07D (2x)
DDC_SCLB B07D (2x)
DDC_SCLC B07D (2x)
DDC_SDAA B07D (2x)
DDC_SDAB B07D (2x)
DDC_SDAC B07D (2x)
DDR_VREF B05B (3x)
DDR_VREF B05C (1x)
DP_HS B05C (2x)
DVB_SW B02 (1x)
DVB_SW B04 (1x)
E_PAGE B04 (2x)
ENGAGE B06B (1x)
ENGAGE B06C (1x)
FE_LOCK B03A (1x)
FE_LOCK B03C (1x)
FPGA_BL_BOOST B05E (1x)
FPGA_BL_DIMMING B05A (1x)
FPGA_BL_DIMMING B05E (1x)
FRONT_C_IN_T B04 (1x)
FRONT_C_IN_T B07A (1x)
FRONT_CVBS_SVHS_SEL B04 (1x)
FRONT_CVBS_SVHS_SEL B07A (1x)
FRONT_CVBS_SVHS_Y_IN B05A (1x)
FRONT_CVBS_SVHS_Y_IN B07A (1x)
FRONT_Y_CVBS_IN_T B04 (1x)
FRONT_Y_CVBS_IN_T B07A (1x)
GNDDC B01A (1x)
GNDDC1V2 B01B (6x)
GNDDC2 B01B (13x)
GNDDC2V5 B01B (6x)
GNDSND B06B (25x)
GNDTUN B01A (1x)
HD_PB_IN B05A (1x)
HD_PB_IN B07A (1x)
HD_PB_IN_ITV B07A (2x)
HD_PR_IN B05A (1x)
HD_PR_IN B07A (1x)
HD_PR_IN_ITV B07A (2x)
HD_Y_IN B05A (1x)
HD_Y_IN B07A (1x)
HD_Y_IN_ITV B07A (2x)
HDMI_AUDIO_IN_L B06A (1x)
HDMI_AUDIO_IN_L B07C (1x)
HDMI_AUDIO_IN_R B06A (1x)
HDMI_AUDIO_IN_R B07C (1x)
HDMI_Cb(0) B05C (1x)
HDMI_Cb(0) B07C (1x)
HDMI_Cb(1) B05C (1x)

HDMI_Cb(1) B07C (1x)
HDMI_Cb(2) B05C (1x)
HDMI_Cb(2) B07C (1x)
HDMI_Cb(3) B05C (1x)
HDMI_Cb(3) B07C (1x)
HDMI_Cb(4) B05C (1x)
HDMI_Cb(4) B07C (1x)
HDMI_Cb(5) B05C (1x)
HDMI_Cb(5) B07C (1x)
HDMI_Cb(6) B05C (1x)
HDMI_Cb(6) B07C (1x)
HDMI_Cb(7) B05C (1x)
HDMI_Cb(7) B07C (1x)
HDMI_Cb(8) B05C (1x)
HDMI_Cb(8) B07C (1x)
HDMI_Cb(9) B05C (1x)
HDMI_Cb(9) B07C (1x)
HDMI_Cr(0) B05C (1x)
HDMI_Cr(0) B07C (1x)
HDMI_Cr(1) B05C (1x)
HDMI_Cr(1) B07C (1x)
HDMI_Cr(2) B05C (1x)
HDMI_Cr(2) B07C (1x)
HDMI_Cr(3) B05C (1x)
HDMI_Cr(3) B07C (1x)
HDMI_Cr(4) B05C (1x)
HDMI_Cr(4) B07C (1x)
HDMI_Cr(5) B05C (1x)
HDMI_Cr(5) B07C (1x)

(1x)

HDMI_Cr(6) B05C (1x)
HDMI_Cr(6) B07C (1x)
HDMI_Cr(7) B05C (1x)
HDMI_Cr(7) B07C (1x)
HDMI_Cr(8) B05C (1x)
HDMI_Cr(8) B07C (1x)
HDMI_Cr(9) B05C (1x)
HDMI_Cr(9) B07C (1x)
HDMI_DE B05C (1x)
HDMI_DE B07C (1x)
HDMI_H B05C (1x)
HDMI_H B07C (1x)
HDMI_HOTPLUG_RESET B04 (1x)
HDMI_HOTPLUG_RESET B07C (1x)
HDMI_HOTPLUG_RESET B07D (1x)
HDMI_INT_MAIN B04 (1x)
HDMI_INT_MAIN B07C (1x)
HDMI_INT_MUX B04 (1x)
HDMI_INT_MUX B07D (1x)
HDMI_INT_SIDE B04 (2x)
HDMI_RST_MUX B04 (1x)
HDMI_RST_MUX B07D (1x)
HDMI_RST_RX_BUF B04 (2x)
HDMI_RST_RX_BUF B07C (1x)
HDMI_SCK B06A (1x)
HDMI_SCK B07C (1x)
HDMI_SD B06A (1x)
HDMI_SD B07C (1x)
HDMI_V B05C (1x)
HDMI_V B07C (1x)
HDMI_VCLK B05C (1x)
HDMI_VCLK B07C (1x)
HDMI_WS B06A (1x)
HDMI_WS B07C (1x)
HDMI_Y(0) B05C (1x)
HDMI_Y(0) B07C (1x)
HDMI_Y(1) B05C (1x)
HDMI_Y(1) B07C (1x)
HDMI_Y(2) B05C (1x)
HDMI_Y(2) B07C (1x)
HDMI_Y(3) B05C (1x)
HDMI_Y(3) B07C (1x)
HDMI_Y(4) B05C (1x)
HDMI_Y(4) B07C (1x)
HDMI_Y(5) B05C (1x)
HDMI_Y(5) B07C (1x)
HDMI_Y(6) B05C (1x)
HDMI_Y(6) B07C (1x)
HDMI_Y(7) B05C (1x)
HDMI_Y(7) B07C (1x)
HDMI_Y(8) B05C (1x)
HDMI_Y(8) B07C (1x)
HDMI_Y(9) B05C (1x)
HDMI_Y(9) B07C (1x)
HDMI-MUX_TSCL B07C (1x)
HDMI-MUX_TSCL B07D (1x)
HDMI-MUX_TSDA B07C (1x)
HDMI-MUX_TSDA B07D (1x)
HDMI-MUX_TX0- B07C (1x)
HDMI-MUX_TX0- B07D (1x)
HDMI-MUX_TX0+ B07C (1x)
HDMI-MUX_TX0+ B07D
HDMI-MUX_TX1- B07C (1x)
HDMI-MUX_TX1- B07D (1x)
HDMI-MUX_TX1+ B07C (1x)
HDMI-MUX_TX1+ B07D (1x)
HDMI-MUX_TX2- B07C (1x)
HDMI-MUX_TX2- B07D (1x)
HDMI-MUX_TX2+ B07C (1x)
HDMI-MUX_TX2+ B07D (1x)
HDMI-MUX_TXC- B07C (1x)
HDMI-MUX_TXC- B07D (1x)
HDMI-MUX_TXC+ B07C (1x)
HDMI-MUX_TXC+ B07D (1x)
HDMI-SIDE_CEC_A B07C (1x)
HDMI-SIDE_CEC_A B07D (1x)
HDMI-SIDE_TSCL B07C (2x)
HDMI-SIDE_TSD
HDMI-SIDE_TX0- B07C (2x)
HDMI-SIDE_TX0+ B07C (2x)
HDMI-SIDE_TX1- B07C (2x)
HDMI-SIDE_TX1+ B07C (2x)
HDMI-SIDE_TX2- B07C (2x)
HDMI-SIDE_TX2+ B07C (2x)
HDMI-SIDE_TXC- B07C (2x)
HDMI-SIDE_TXC+ B07C (2x)
HP_AUDIO_OUT_L B06A (1x)
HP_AUDIO_OUT_L B06C (1x)
HP_AUDIO_OUT_R B06A (1x)
HP_AUDIO_OUT_R B06C (1x)
HP_DETECT_T B04 (2x)
HP_LOUT B04 (1x)
HP_LOUT B06C (1x)
HP_ROUT B04 (1x)
HP_ROUT B06C (1x)
HPD_RESET_A B07D (2x)
HPD_RESET_B B07D (2x)
HPD_RESET_C B07D (2x)
I2C_LOCAL_SCL B03A (1x)
I2C_LOCAL_SCL B03B (1x)
I2C_LOCAL_SCL B03C (1x)
I2C_LOCAL_SCL B03D (1x)
I2C_LOCAL_SDA B03A (1x)
I2C_LOCAL_SDA B03B (1x)
I2C_LOCAL_SDA B03C (1x)
I2C_LOCAL_SDA B03D (1x)
I2C_TDA_SCL B02 (1x)
I2C_TDA_SCL B03A (1x)
I2C_TDA_SDA B02 (1x)
I2C_TDA_SDA B03A (1x)
IBO_B_IN B03E (1x)
IBO_B_IN B05A (1x)
IBO_CVBS_IN B03E (1x)

A B07C (2x)

IBO_CVBS_IN B04 (1x)
IBO_CVBS_IN B05A (1x)
IBO_G_IN B03E (1x)
IBO_G_IN B05A (1x)
IBO_IRQ B03C (1x)
IBO_IRQ B04 (2x)
IBO_R_IN B03E (1x)
IBO_R_IN B05A (1x)
IF_AGC_IBO B02 (1x)
IF_AGC_IBO B03A (1x)
IF_ATV B02 (2x)
IIC_SCL B02 (1x)
IIC_SCL B04 (1x)
IIC_SCL B05A (1x)
IIC_SCL B07C (1x)
IIC_SCL_SIDE B04 (2x)
IIC_SCL_up B02 (1x)
IIC_SCL_up B03C (1x)
IIC_SCL_up B04 (2x)
IIC_SCL_up B05D (1x)
IIC_SCL_up B06A (1x)
IIC_SCL_up B07D (1x)
IIC_SDA B02 (1x)
IIC_SDA B04 (1x)
IIC_SDA B05A (1x)
IIC_SDA B07C (1x)
IIC_SDA_SIDE B04 (2x)
IIC_SDA_up B02 (1x)
IIC_SDA_up B03C (1x)
IIC_SDA_up B04 (2x)
IIC_SDA_up B05D (1x)
IIC_SDA_up B06A (1x)
IIC_SDA_up B07D (1x)
INT B04 (1x)
INT B05A (1x)
ITV_SPI_CLK B04 (2x)
ITV_SPI_DATA_IN B04 (2x)
JTAG_TCK B03A (1x)
JTAG_TCK B03B (1x)
JTAG_TCK B03C (1x)
JTAG_TCK B05D (1x)
JTAG_TMS B03A (1x)
JTAG_TMS B03B (1x)
JTAG_TMS B03C (1x)
JTAG_TMS B05D (1x)
JTAG_TRST B03A (1x)
JTAG_TRST B03B (1x)
JTAG_TRST B03C (1x)
KEYB B04 (2x)
LCD_PWR_ON B04 (1x)
LCD_PWR_ON B07E (1x)
LED1 B04 (2x)
LED2 B04 (2x)
MAIN_SCL B05D (1x)
MAIN_SCL B05E (1x)
MAIN_SDA B05D (1x)
MAIN_SDA B05E (1x)
MIU_ADDR(0) B03B (1x)
MIU_ADDR(0) B03C (1x)
MIU_ADDR(0:24) B03B (1x)
MIU_ADDR(0:24) B03C (1x)
MIU_ADDR(1) B03B (1x)
MIU_ADDR(1) B03C (1x)
MIU_ADDR(1) B03D (1x)
MIU_ADDR(10) B03B (1x)
MIU_ADDR(10) B03C (1x)
MIU_ADDR(10) B03D (1x)
MIU_ADDR(11) B03B (1x)
MIU_ADDR(11) B03C (1x)
MIU_ADDR(11) B03D (1x)
MIU_ADDR(12) B03B (1x)
MIU_ADDR(12) B03C (1x)
MIU_ADDR(12) B03D (1x)
MIU_ADDR(13) B03B (1x)
MIU_ADDR(13) B03C (1x)
MIU_ADDR(13) B03D (1x)
MIU_ADDR(14) B03B (1x)
MIU_ADDR(14) B03C (1x)
MIU_ADDR(14) B03D (1x)
MIU_ADDR(15) B03B (1x)
MIU_ADDR(15) B03C (1x)
MIU_ADDR(15) B03D (1x)
MIU_ADDR(16) B03B (1x)
MIU_ADDR(16) B03C (1x)
MIU_ADDR(16) B03D (1x)
MIU_ADDR(17) B03B (1x)
MIU_ADDR(17) B03C (1x)
MIU_ADDR(17) B03D (1x)
MIU_ADDR(18) B03B (1x)
MIU_ADDR(18) B03C (1x)
MIU_ADDR(18) B03D (1x)

(1x)

MIU_ADDR(19) B03B (1x)
MIU_ADDR(19) B03C (1x)
MIU_ADDR(19) B03D (1x)
MIU_ADDR(2) B03B (1x)
MIU_ADDR(2) B03C (1x)
MIU_ADDR(2) B03D (1x)
MIU_ADDR(20) B03B (1x)
MIU_ADDR(20) B03C (1x)
MIU_ADDR(20) B03D (1x)
MIU_ADDR(21) B03B (1x)
MIU_ADDR(21) B03C (1x)
MIU_ADDR(21) B03D (1x)
MIU_ADDR(22) B03B (1x)
MIU_ADDR(22) B03C (1x)
MIU_ADDR(22) B03D (1x)
MIU_ADDR(23) B03B (1x)
MIU_ADDR(23) B03C (1x)
MIU_ADDR(24) B03B (1x)
MIU_ADDR(24) B03C (1x)
MIU_ADDR(3) B03B (1x)
MIU_ADDR(3) B03C (1x)
MIU_ADDR(3) B03D (1x)
MIU_ADDR(4) B03B (1x)
MIU_ADDR(4) B03C (1x)
MIU_ADDR(4) B03D (1x)
MIU_ADDR(5) B03B (1x)
MIU_ADDR(5) B03C (1x)
MIU_ADDR(5) B03D (1x)
MIU_ADDR(6) B03B (1x)
MIU_ADDR(6) B03C (1x)
MIU_ADDR(6) B03D (1x)
MIU_ADDR(7) B03B (1x)
MIU_ADDR(7) B03C (1x)
MIU_ADDR(7) B03D (1x)
MIU_ADDR(8) B03B (1x)
MIU_ADDR(8) B03C (1x)
MIU_ADDR(8) B03D (1x)
MIU_ADDR(9) B03B (1x)
MIU_ADDR(9) B03C (1x)
MIU_ADDR(9) B03D (1x)
MIU_DATA(0) B03B (1x)
MIU_DATA(0) B03C (1x)
MIU_DATA(0) B03D (1x)
MIU_DATA(0:15) B03C (1x)
MIU_DATA(0:15) B03D (1x)
MIU_DATA(1) B03B (1x)
MIU_DATA(1) B03C (1x)
MIU_DATA(1) B03D (1x)
MIU_DATA(10) B03C (1x)
MIU_DATA(10) B03D (1x)
MIU_DATA(11) B03C (1x)

66LC7.5E LA 7.

MIU_DATA(11) B03D (1x)
MIU_DATA(12) B03C (1x)
MIU_DATA(12) B03D (1x)
MIU_DATA(13) B03C (1x)
MIU_DATA(13) B03D (1x)
MIU_DATA(14) B03C (1x)
MIU_DATA(14) B03D (1x)
MIU_DATA(15) B03C (1x)
MIU_DATA(15) B03D (1x)
MIU_DATA(2) B03B (1x)
MIU_DATA(2) B03C (1x)
MIU_DATA(2) B03D (1x)
MIU_DATA(3) B03B (1x)
MIU_DATA(3) B03C (1x)
MIU_DATA(3) B03D (1x)
MIU_DATA(4) B03B (1x)
MIU_DATA(4) B03C (1x)
MIU_DATA(4) B03D (1x)
MIU_D

A

TA(5) B03B (1x)
MIU_DATA(5) B03C (1x)
MIU_DATA(5) B03D (1x)
MIU_DATA(6) B03B (1x)
MIU_DATA(6) B03C (1x)
MIU_DATA(6) B03D (1x)
MIU_DATA(7) B03B (1x)
MIU_DATA(7) B03C (1x)
MIU_DATA(7) B03D (1x)
MIU_DATA(8) B03C (1x)
MIU_DATA(8) B03D (1x)
MIU_DATA(9) B03C (1x)
MIU_DATA(9) B03D (1x)
MIU_OEN B03B (1x)
MIU_OEN B03C (1x)
MIU_OEN B03D (1x)
MIU_RDY B03B (1x)
MIU_RDY B03C (1x)
MIU_WEN B03B (1x)
MIU_WEN B03C (1x)
MIU_WEN B03D (1x)
MOJO_I2S_OUT_SCK B03C (1x)
MOJO_I2S_OUT_SCK B06A (1x)
MOJO_I2S_OUT_SD B03C (1x)
MOJO_I2S_OUT_SD B06A (1x)
MOJO_I2S_OUT_WS B03C (1x)
MOJO_I2S_OUT_WS B06A (1x)
MUTEn B04 (1x)
MUTEn B06C (1x)
nCSO B05D (2x)
nCSO B05E (1x)
NOR_CS B03C (1x)
NOR_CS B03D (1x)
NOR_RYBY B03C (1x)
NOR_RYBY B03D (1x)
NOR_WP B03C (1x)
NOR_WP B03D (1x)
PC_VGA_H B05A (2x)
PC_VGA_V B05A (2x)
PCMCIA_5V B03B (4x)
PCMCIA_AVCC B03B (3x)
PCMCIA_VPP B03B (3x)
POWER_DOWN B01A (1x)
POWER_DOWN B04 (1x)
POWER_DOWN B06C (1x)
RD B04 (1x)
RD B05A (1x)
REMOTE B04 (3x)
RESET_FE_n B03A (1x)
RESET_FE_n B03C (1x)
RESET_n B03C (1x)
RESET_n B03D (1x)
RESET_n B04 (2x)
RESET_STV B03B (1x)
RESET_STV B03C (1x)
RF_AGC B02 (2x)
RF_AGC_IBO B02 (1x)
RF_AGC_IBO B03A (1x)
RST_AUD B04 (1x)
RST_AUD B06A (1x)
RST_H B04 (1x)
RST_H B05A (1x)
RX0+A B07D (2x)
RX0+B B07D (2x)
RX0+C B07D (2x)
RX0-A B07D (2x)
RX0-B B07D (2x)
RX0-C B07D (2x)
RX1+A B07D (2x)
RX1+B B07D (2x)
RX1+C B07D (2x)
RX1-A B07D (2x)
RX1-B B07D (2x)
RX1-C B07D (2x)
RX2+A B07D (2x)
RX2+B B07D (2x)
RX2+C B07D (2x)
RX2-A B07D (2x)
RX2-B B07D (2x)
RX2-C B07D (2x)
RXC+A B07D (2x)
RXC+B B07D (2x)
RXC+C B07D (2x)
RXC-A B07D (2x)
RXC-B B07D (2x)
RXC-C B07D (2x)
RXD0 B03C (1x)
RXD0 B03E (1x)
SAW_SW B02 (1x)
SAW_SW B04 (1x)
SC1_AUDIO_IN_L B06A (1x)
SC1_AUDIO_IN_L B07B (1x)
SC1_AUDIO_IN_R B06A (1x)
SC1_AUDIO_IN_R B07B (1x)
SC1_AUDIO_MUTE_L B06C (1x)
SC1_AUDIO_MUTE_L B07B (1x)
SC1_AUDIO_MUTE_R B06C (1x)
SC1_AUDIO_MUTE_R B07B (1x)
SC1_AUDIO_OUT_L B06A (1x)
SC1_AUDIO_OUT_L B07B (2x)
SC1_AUDIO_OUT_R B06A (1x)
SC1_AUDIO_OUT_R B07B (2x)
SC1_B_IN B05A (1x)
SC1_B_IN B07B (2x)
SC1_CVBS_IN B05A (1x)
SC1_CVBS_IN B07B (1x)
SC1_CVBS_RF_OUT B04 (1x)
SC1_CVBS_RF_OUT B07B (1x)
SC1_FBL_IN B05A (1x)
SC1_FBL_IN B07B (2x)
SC1_G_IN B05A (1x)
SC1_G_IN B07B (2x)
SC1_R_IN B05A (1x)
SC1_R_IN B07B (2x)
SC1_RF_OUT_CVBS B05A (1x)
SC1_RF_OUT_CVBS B07B (1x)
SC1_STATUS B04 (1x)
SC1_STATUS B07B (1x)
SC2_AUDIO_IN_L B06A (1x)
SC2_AUDIO_IN_L B07B (2x)
SC2_AUDIO_IN_R B06A (1x)
SC2_AUDIO_IN_R B07B (2x)
SC2_AUDIO_MUTE_L B06C (1x)
SC2_AUDIO_MUTE_L B07B (1x)

SC2_AUDIO_MUTE_R B06C (1x)
SC2_AUDIO_MUTE_R B07B (1x)
SC2_AUDIO_OUT_L B06A (1x)
SC2_AUDIO_OUT_L B07B (1x)
SC2_AUDIO_OUT_R B06A (1x)
SC2_AUDIO_OUT_R B07B (1x)
SC2_C_IN B05A (1x)
SC2_C_IN B07B (1x)
SC2_C_IN_ITV B07B (2x)
SC2_CVBS_MON_OUT B05A (1x)
SC2_CVBS_MON_OUT B07B (1x)
SC2_CVBS_MON_OUT_ITV B06C (1x)
SC2_CVBS_MON_OUT_ITV B07B (1x)
SC2_STATUS B04 (1x)
SC2_STATUS B07B (1x)
SC2_Y_CVBS_IN B05A (1x)
SC2_Y_CVBS_IN B07B (1x)
SC2_Y_CVBS_IN_ITV B07B (2x)
SDRAM_ADDR(0) B03C (1x)
SDRAM_ADDR(0) B03D (1x)
SDRAM_ADDR(0:14) B03C (1x)
SDRAM_ADDR(0:14) B03D (1x)
SDRAM_ADDR(1) B03C (1x)
SDRAM_ADDR(1) B03D (1x)
SDRAM_ADDR(10) B03C (1x)
SDRAM_ADDR(10) B03D (1x)
SDRAM_ADDR(11) B03C (1x)
SDRAM_ADDR(11) B03D (1x)
SDRAM_ADDR(12) B03C (1x)
SDRAM_ADDR(12) B03D (1x)
SDRAM_ADDR(13) B03C (1x)
SDRAM_ADDR(13) B03D (1x)
SDRAM_ADDR(14) B03C (1x)
SDRAM_ADDR(14) B03D (1x)
SDRAM_ADDR(2) B03C (1x)
SDRAM_ADDR(2) B03D (1x)
SDRAM_ADDR(3) B03C (1x)
SDRAM_ADDR(3) B03D (1x)
SDRAM_ADDR(4) B03C (1x)
SDRAM_ADDR(4) B03D (1x)
SDRAM_ADDR(5) B03C (1x)
SDRAM_ADDR(5) B03D (1x)
SDRAM_ADDR(6) B03C (1x)
SDRAM_ADDR(6) B03D (1x)
SDRAM_ADDR(7) B03C (1x)
SDRAM_ADDR(7) B03D (1x)
SDRAM_ADDR(8) B03C (1x)
SDRAM_ADDR(8) B03D (1x)
SDRAM_ADDR(9) B03C (1x)
SDRAM_ADDR(9) B03D (1x)
SDRAM_CAS B03C (1x)
SDRAM_CAS B03D (1x)
SDRAM_CKE B03C (1x)
SDRAM_CKE B03D (1x)
SDRAM_CLK B03C (1x)
SDRAM_CLK B03D (1x)
SDRAM_DATA(0) B03C (1x)
SDRAM_DATA(0) B03D (1x)
SDRAM_DATA(0:15) B03C (1x)
SDRAM_DATA(1) B03C (1x)
SDRAM_DATA(1) B03D (1x)
SDRAM_DATA(10) B03C (1x)
SDRAM_DATA(10) B03D (1x)
SDRAM_DATA(11) B03C (1x)
SDRAM_DATA(11) B03D (1x)
SDRAM_DATA(12) B03C (1x)
SDRAM_DATA(12) B03D (1x)
SDRAM_DATA(13) B03C (1x)
SDRAM_DATA(13) B03D (1x)
SDRAM_DATA(14) B03C (1x)
SDRAM_DATA(14) B03D (1x)
SDRAM_DATA(15) B03C (1x)
SDRAM_DATA(15) B03D (1x)
SDRAM_DATA(2) B03C (1x)
SDRAM_DATA(2) B03D (1x)
SDRAM_DATA(3) B03C (1x)
SDRAM_DATA(3) B03D (1x)
SDRAM_DATA(4) B03C (1x)
SDRAM_DATA(4) B03D (1x)
SDRAM_DATA(5) B03C (1x)
SDRAM_DATA(5) B03D (1x)
SDRAM_DATA(6) B03C (1x)
SDRAM_D

A

TA(6) B03D (1x)
SDRAM_DATA(7) B03C (1x)
SDRAM_DATA(7) B03D (1x)
SDRAM_DATA(8) B03C (1x)
SDRAM_DATA(8) B03D (1x)
SDRAM_DATA(9) B03C (1x)
SDRAM_DATA(9) B03D (1x)
SDRAM_DQM0 B03C (1x)
SDRAM_DQM0 B03D (1x)
SDRAM_DQM1 B03C (1x)
SDRAM_DQM1 B03D (1x)
SDRAM_RAS B03C (1x)
SDRAM_RAS B03D (1x)
SDRAM_WE B03C (1x)
SDRAM_WE B03D (1x)
SIDE_AUDIO_IN_L B04 (1x)
SIDE_AUDIO_IN_L B06A (1x)
SIDE_AUDIO_IN_R B04 (1x)
SIDE_AUDIO_IN_R B06A (1x)
SIF B02 (1x)
SIF B06A (1x)
SIF1 B02 (2x)
SIF2 B02 (2x)
STANDBY B01A (2x)
STANDBY B04 (2x)
STANDBY B06C (1x)
STANDBYn B04 (1x)
STANDBYn B06B (1x)
STANDBYn B07E (1x)
STV_A25 B03B (1x)
STV_A25 B03C (1x)
STV_CS B03B (1x)
STV_CS B03C (1x)
STV_INT B03B (1x)
STV_INT B03C (1x)
STV_TDO B03A (1x)
STV_TDO B03B (1x)
SVHS_C_IN B05A (1x)
SVHS_C_IN B07A (1x)
TCK_FPGA B05D (1x)
TCK_FPGA B05E (1x)
TDA_CLK B03A (1x)
TDA_CLK B03B (1x)
TDA_DAT(0) B03A (1x)
TDA_DAT(0) B03B (1x)
TDA_DAT(0:7) B03A (1x)
TDA_DAT(0:7) B03B (1x)
TDA_DAT(1) B03A (1x)
TDA_DAT(1) B03B (1x)
TDA_DAT(2) B03A (1x)
TDA_DAT(2) B03B (1x)
TDA_DAT(3) B03A (1x)
TDA_DAT(3) B03B (1x)
TDA_DAT(4) B03A (1x)
TDA_DAT(4) B03B (1x)
TDA_DAT(5) B03A (1x)
TDA_DAT(5) B03B (1x)
TDA_DAT(6) B03A (1x)
TDA_DAT(6) B03B (1x)
TDA_DAT(7) B03A (1x)

TDA_DAT(7) B03B (1x)
TDA_SYNC B03A (1x)
TDA_SYNC B03B (1x)
TDA_VALID B03A (1x)
TDA_VALID B03B (1x)
TDI_FPGA B05D (1x)
TDI_FPGA B05E (1x)
TDO_FPGA B05D (1x)
TDO_FPGA B05E (1x)
TMS_FPGA B05D (1x)
TMS_FPGA B05E (1x)
TS_CLK B03B (1x)
TS_CLK B03C (1x)
TS_DATA(0) B03B (1x)
TS_DATA(0) B03C (1x)
TS_DATA(0:7) B03C (1x)
TS_DATA(1) B03B (1x)
TS_DATA(1) B03C (1x)
TS_DATA(2) B03B (1x)
TS_DATA(2) B03C (1x)
TS_DATA(3) B03B (1x)
TS_DATA(3) B03C (1x)
TS_DATA(4) B03B (1x)
TS_DATA(4) B03C (1x)
TS_DATA(5) B03B (1x)
TS_DATA(5) B03C (1x)
TS_DATA(6) B03B (1x)
TS_DATA(6) B03C (1x)
TS_DATA(7) B03B (1x)
TS_DATA(7) B03C (1x)
TS_SYNC B03B (1x)
TS_SYNC B03C (1x)
TS_VALID B03B (1x)
TS_VALID B03C (1x)
TXD0 B03C (1x)
TXD0 B03E (1x)
TxFPGAe_0n B05A (1x)
TxFPGAe_0n B05E (1x)
TxFPGAe_0p B05A (1x)
TxFPGAe_0p B05E (1x)
TxFPGAe_1n B05A (1x)
TxFPGAe_1n B05E (1x)
TxFPGAe_1p B05A (1x)
TxFPGAe_1p B05E (1x)
TxFPGAe_2n B05A (1x)
TxFPGAe_2n B05E (1x)
TxFPGAe_2p B05A (1x)
TxFPGAe_2p B05E (1x)
TxFPGAe_3n B05A (1x)
TxFPGAe_3n B05E (1x)
TxFPGAe_3p B05A (1x)
TxFPGAe_3p B05E (1x)
TxFPGAe_4n B05A (1x)
TxFPGAe_4n B05E (1x)
TxFPGAe_4p B05A (1x)
TxFPGAe_4p B05E (1x)
TxFPGAe_CLKn B05A (1x)
TxFPGAe_CLKn B05E (1x)
TxFPGAe_CLKp B05A (1x)
TxFPGAe_CLKp B05E (1x)
TxFPGAo_0n B05A (1x)
TxFPGAo_0n B05E (1x)
TxFPGAo_0p B05A (1x)
TxFPGAo_0p B05E (1x)
TxFPGAo_1n B05A (1x)
TxFPGAo_1n B05E (1x)
TxFPGAo_1p B05A (1x)
TxFPGAo_1p B05E (1x)
TxFPGAo_2n B05A (1x)
TxFPGAo_2n B05E (1x)
TxFPGAo_2p B05A (1x)
TxFPGAo_2p B05E (1x)
TxFPGAo_3n B05A (1x)
TxFPGAo_3n B05E (1x)
TxFPGAo_3p B05A (1x)
TxFPGAo_3p B05E (1x)
TxFPGAo_4n B05A (1x)
TxFPGAo_4n B05E (1x)
TxFPGAo_4p B05A (1x)
TxFPGAo_4p B05E (1x)
TxFPGAo_CLKn B05A (1x)
TxFPGAo_CLKn B05E (1x)
TxFPGAo_CLKp B05A (1x)
TxFPGAo_CLKp B05E (1x)
TxLVDSe_0n B05E (1x)
TxLVDSe_0n B07E (1x)
TxLVDSe_0p B05E (1x)
TxLVDSe_0p B07E (1x)
TxLVDSe_1n B05E (1x)
TxLVDSe_1n B07E (1x)
TxLVDSe_1p B05E (1x)
TxLVDSe_1p B07E (1x)
TxLVDSe_2n B05E (1x)
TxLVDSe_2n B07E (1x)
TxLVDSe_2p B05E (1x)
TxLVDSe_2p B07E (1x)
TxLVDSe_3n B05E (1x)
TxLVDSe_3n B07E (1x)
TxLVDSe_3p B05E (1x)
TxLVDSe_3p B07E (1x)
TxLVDSe_4n B05E (1x)
TxLVDSe_4n B07E (1x)
TxLVDSe_4p B05E (1x)
TxLVDSe_4p B07E (1x)
TxLVDSe_CLKn B05E (1x)
TxLVDSe_CLKn B07E (1x)
TxLVDSe_CLKp B05E (1x)
TxLVDSe_CLKp B07E (1x)
TxLVDSo_0n B05E (1x)
TxLVDSo_0n B07E (1x)
TxLVDSo_0p B05E (1x)
TxLVDSo_0p B07E (1x)
TxLVDSo_1n B05E (1x)
TxLVDSo_1n B07E (1x)
TxLVDSo_1p B05E (1x)
TxLVDSo_1p B07E (1x)
TxLVDSo_2n B05E (1x)
TxLVDSo_2n B07E (1x)
TxLVDSo_2p B05E (1x)
TxLVDSo_2p B07E (1x)
TxLVDSo_3n B05E (1x)
TxLVDSo_3n B07E (1x)
TxLVDSo_3p B05E (1x)
TxLVDSo_3p B07E (1x)
TxLVDSo_4n B05E (1x)
TxLVDSo_4n B07E (1x)
TxLVDSo_4p B05E (1x)
TxLVDSo_4p B07E (1x)
TxLVDSo_CLKn B05E (1x)
TxLVDSo_CLKn B07E (1x)
TxLVDSo_CLKp B05E (1x)
TxLVDSo_CLKp B07E (1x)
user_EEPROM_WP B03C (1x)
user_EEPROM_WP B03D (1x)
VCCEN B03B (2x)
VDD B06B (3x)
VDDA B06B (2x)
VGA_H B05A (1x)
VGA_H B07A (1x)
VGA_V B05A (1x)
VGA_V B07A (1x)
VIF1 B02 (2x)

VIF2 B02 (2x)
VIM_IBO B02 (1x)
VIM_IBO B03A (1x)
VIP_IBO B02 (1x)
VIP_IBO B03A (1x)
VSS B06B (3x)
VSSA B06B (5x)
WAGC_SW B02 (1x)
WAGC_SW B04 (1x)
WR B04 (1x)
WR B05A

VCC B05A (2x)

WX_A
WX_BA0 B05B (2x)
WX_BA0 B05C (1x)
WX_BA1 B05B (2x)
WX_BA1 B05C (1x)
WX_CAS# B05B (2x)
WX_CAS# B05C (1x)
WX_CLKE B05B (2x)
WX_CLKE B05C (1x)
WX_CS0# B05B (2x)
WX_CS0# B05C (1x)
WX_DQM0 B05B (1x)
WX_DQM0 B05C (1x)
WX_DQM1 B05B (1x)
WX_DQM1 B05C (1x)
WX_DQM2 B05B (1x)
WX_DQM2 B05C (1x)
WX_DQM3 B05B (1x)
WX_DQM3 B05C (1x)
WX_DQS0 B05B (1x)
WX_DQS0 B05C (1x)
WX_DQS1 B05B (1x)
WX_DQS1 B05C (1x)
WX_DQS2 B05B (1x)
WX_DQS2 B05C (1x)
WX_DQS3 B05B (1x)
WX_DQS3 B05C (1x)
WX_MA0 B05B (2x)
WX_MA0 B05C (1x)
WX_MA1 B05B (2x)
WX_MA1 B05C (1x)
WX_MA10 B05B (2x)
WX_MA10 B05C (1x)
WX_MA11 B05B (2x)
WX_MA11 B05C (1x)
WX_MA2 B05B (2x)
WX_MA2 B05C (1x)
WX_MA3 B05B (2x)
WX_MA3 B05C (1x)
WX_MA4 B05B (2x)
WX_MA4 B05C (1x)
WX_MA5 B05B (2x)
WX_MA5 B05C (1x)
WX_MA6 B05B (2x)
WX_MA6 B05C (1x)
WX_MA7 B05B (2x)
WX_MA7 B05C (1x)
WX_MA8 B05B (2x)
WX_MA8 B05C (1x)
WX_MA9 B05B (2x)
WX_MA9 B05C (1x)
WX_MCK0 B05B (2x)
WX_MCK0 B05C (1x)
WX_MCK0# B05B (2x)
WX_MCK0# B05C (1x)
WX_MD0 B05B (1x)
WX_MD0 B05C (1x)
WX_MD1 B05B (1x)
WX_MD1 B05C (1x)
WX_MD10 B05B (1x)
WX_MD10 B05C (1x)
WX_MD11 B05B (1x)
WX_MD11 B05C (1x)
WX_MD12 B05B (1x)
WX_MD12 B05C (1x)
WX_MD13 B05B (1x)
WX_MD13 B05C (1x)
WX_MD14 B05B (1x)
WX_MD14 B05C (1x)
WX_MD15 B05B (1x)
WX_MD15 B05C (1x)
WX_MD16 B05B (1x)
WX_MD16 B05C (1x)
WX_MD17 B05B (1x)
WX_MD17 B05C (1x)
WX_MD18 B05B (1x)
WX_MD18 B05C (1x)
WX_MD19 B05B (1x)
WX_MD19 B05C (1x)
WX_MD2 B05B (1x)
WX_MD2 B05C (1x)
WX_MD20 B05B (1x)
WX_MD20 B05C (1x)
WX_MD21 B05B (1x)
WX_MD21 B05C (1x)
WX_MD22 B05B (1x)
WX_MD22 B05C (1x)
WX_MD23 B05B (1x)
WX_MD23 B05C (1x)
WX_MD24 B05B (1x)
WX_MD24 B05C (1x)
WX_MD25 B05B (1x)
WX_MD25 B05C (1x)
WX_MD26 B05B (1x)
WX_MD26 B05C (1x)
WX_MD27 B05B (1x)
WX_MD27 B05C (1x)
WX_MD28 B05B (1x)
WX_MD28 B05C (1x)
WX_MD29 B05B (1x)
WX_MD29 B05C (1x)
WX_MD3 B05B (1x)
WX_MD3 B05C (1x)
WX_MD30 B05B (1x)
WX_MD30 B05C (1x)
WX_MD31 B05B (1x)
WX_MD31 B05C (1x)
WX_MD4 B05B (1x)
WX_MD4 B05C (1x)
WX_MD5 B05B (1x)
WX_MD5 B05C (1x)
WX_MD6 B05B (1x)
WX_MD6 B05C (1x)
WX_MD7 B05B (1x)
WX_MD7 B05C (1x)
WX_MD8 B05B (1x)
WX_MD8 B05C (1x)
WX_MD9 B05B (1x)
WX_MD9 B05C (1x)
WX_PAVDD1 B05A (1x)
WX_PAVDD1 B05C (1x)
WX_PAVDD2 B05A (1x)
WX_PAVDD2 B05C (1x)
WX_PVCC B05A (2x)
WX_RAS# B05B (2x)
WX_RAS# B05C (1x)
WX_REGVCC B05A (2x)
WX_WE# B05B (2x)
WX_WE# B05C (1x)
Y_IN B07A (2x)

H_17370_034.eps

(1x)

080807

Circuit Diagrams and PWB Layouts

Layout SSB (Overview Top Side)

1001 B10
1002 B9
1101 E3
1102 E6
1103 E6
1104 D6
1201 A4
1202 A4
1203 A5
1301 D7
1302 B9
1303 B9
1304 A9
1305 A3
1306 A8

1307 A8
1308 A8
1309 A8
1310 A8
1312 B8
1313 A1
1314 B9
1500 E10
1501 E10
1502 E9
1503 E10
1504 D9
1505 E9
1506 D10
1507 E9

1508 D10
1509 D9
1510 D10
1511 D9
1512 D9
1513 D10
1514 D10
1515 D10
1516 D9
1517 D9
1518 C10
1519 D9
1520 D9
1521 C10
1522 D9

3139 123 6273.1

1523 C9
1524 C9
1525 B10
1526 E10
1601 F9
1606 F10
1607 F9
1608 F9
1609 F8
1610 F9
1611 F9
1613 F10
1615 F9
1619 E9
1901 B9

1A01 A10
1A02 A7
1A03 A9
1B12 A2
1B13 A2
1C24 C4
1J14 B10
1K00 E5
1L20 A8
1M01 F6
1M02 F7
1M03 F8
1N01 F10
1N02 D8
1R01 A6

1R02 A6
1R03 A6
1R04 A6
1R05 A6
1R06 A6
1R07 A6
1R08 A7
1R09 A7
1R10 A7
1R11 A7
1R12 A7
1R13 A7
2117 F6
2119 E6
2127 D6

2142 E6
2201 A6
2202 A6
2211 B7
2212 B7
2213 B7
2310 D7
2312 C7
2313 B7
2314 D7
2316 D7
2317 D7
2318 C7
2323 C8
2338 B8

2341 C8
2408 B8
2409 B8
2410 A8
2411 B8
2412 B8
2413 B8
2414 B8
2417 B8
2418 B8
2419 B8
2420 B8
2421 B8
2422 B7
2423 A8

2432 B8
2433 B8
2434 B8
2435 B8
2436 B8
2437 B8
2438 B8
2439 A7
2440 A7
2441 B8
2442 B8
2443 B8
2444 B8
2445 B8
2446 B8

2447 B8
2700 A6
2702 A6
2718 A6
2721 A6
2724 B7
2734 A6
2901 A7
2902 B7
2904 B7
2905 A7
2907 B7
2908 B7
2913 B7
2914 B7

2915 A7
2916 A7
2A01 A9
2A02 A9
2A04 B9
2A08 A9
2A09 A9
2A10 B9
2A11 A9
2A12 A9
2A15 A8
2A16 B8
2A18 A9
2A19 B9
2A20 B8

2A22 B9
2A24 B9
2A29 B9
2A30 A9
2A32 B9
2A33 A9
2A34 A9
2A40 A9
2A41 A9
2B10 A2
2B12 B1
2B18 A1
2B19 B2
2B21 B1
2B22 A1

Part 1

H_17370_023a.eps

Part 3

H_17370_023c.eps

2B24 B1
2B25 A2
2B26 A2
2B27 A2
2B65 A2
2B66 B2
2B67 A2
2C01 C4
2C02 C4
2C03 D4
2C04 D5
2C05 D5
2C06 D5
2C07 D5
2C08 D5

2C09 D5
2C10 D5
2C11 D5
2C12 D5
2C13 D5
2C14 D4
2C15 D4
2C18 D5
2C19 D5
2C22 B4
2C23 C4
2C28 C4
2C29 C4
2C33 C4
2C81 C4

67LC7.5E LA 7.

2C82 C4
2D31 A4
2D32 C4
2D71 A4
2D72 A4
2E01 D4
2E02 D4
2E09 C4
2E10 C4
2E11 C4
2E12 C4
2E13 D5
2E14 D5
2E15 D5
2E16 D5

2E17 D5
2E18 D5
2E19 D4
2E20 D4
2E23 C4
2E24 C4
2E25 C4
2E26 C4
2F10 D3
2F11 D3
2F12 F3
2F13 F3
2F20 D3
2F21 D3
2F22 E3

2G02 C3
2G17 B1
2G18 C1
2G22 D3
2G23 D1
2G24 B1
2G33 B2
2H06 C3
2H07 D1
2H08 D3
2J01 B1
2J04 D3
2J05 D3
2J06 D3
2K06 F1

Part 2

H_17370_023b.eps

2K07 E1
2K11 D3
2K13 D3
2K14 F2
2K16 F3
2K17 F3
2L20 A8
2L21 A7
2L22 A7
2L23 A8
2L24 A8
2L25 A8
2L26 A8
2L27 A8
2L28 A8

2L29 A8
2L30 A8
2L31 A8
2L32 A8
2L33 A8
2L34 A8
2L35 A8
2M11 F6
2N03 E8
2N06 E8
2N11 E8
2N13 D8
2N14 E8
2N67 E10
2P28 A3

2P29 B3
2P30 B3
2P34 A3
2P46 B3
2P55 C3
2P56 C4
2P59 B3
2P61 B3
2P68 B3
2P72 A4
2R01 A7
2R02 A7
2R11 A5
2R20 A6
2R21 A6

2R23 A6
2R24 A6
3113 E6
3117 F6
3118 E6
3119 E6
3188 E6
3192 D6
3201 A6
3202 A6
3303 C6
3309 B8
3310 C6
3311 B8
3313 C7

3314 D7
3315 C7
3317 C7
3320 C6
3322 C7
3324 C7
3329 D7
3330 C6
3343 B9
3345 B9
3347 D8
3348 D8
3349 D8
3350 D7
3351 C8

3352 C8
3354 C8
3359 C8
3360 C8
3361 C8
3362 C8
3380 C6
3382 C8
3384 C8
3386 C8
3387 C6
3388 D7
3393 B7
3395 B8
3396 C6

Part 4

H_17370_023d.eps

3397 D7
3398 B8
3399 B7
3402 B8
3410 B7
3411 B7
3416 B8
3702 B7
3713 B6
3714 B6
3720 B6
3721 B6
3722 B6
3723 A6
3724 A6

3725 A6
3726 A6
3727 A6
3728 A6
3729 A6
3730 A6
3731 A6
3732 B6
3733 B6
3734 B6
3735 B6
3736 B6
3737 B6
3738 B6
3739 B6

3740 B6
3741 B6
3742 B6
3743 B6
3744 B6
3745 B6
3746 B6
3747 B6
3748 B6
3749 B6
3750 B6
3751 B6
3752 B6
3753 B6
3901 B7

3902 B7
3903 A7
3904 A7
3905 B7
3906 B7
3907 B7
3908 A7
3909 A7
3910 A7
3934 B7
3935 B7
3937 B7
3938 B7
3A01 A9
3A02 A9

3A03 A8
3A04 A9
3A06 A8
3A07 B8
3A08 B9
3A11 B8
3A13 B9
3A19 A9
3A26 A8
3A27 A9
3A28 A9
3A29 A9
3A30 A9
3A31 A9
3B10 A2

H_17370_023.eps

3B12 A1
3B17 A1
3B18 A1
3B19 A1
3B65 A2
3B66 A1
3C01 C4
3C02 D4
3C03 C6
3C04 C6
3C05 C6
3C06 C6
3C29 C4
3C30 C4
3C31 C4

070804

3C32 C3
3C33 C3
3C34 C3
3C36 D3
3C37 D3
3D01 B5
3D02 B5
3D05 B5
3D06 B5
3D09 B5
3D11 B5
3D38 B4
3D40 B4
3D43 B4
3D44 B5

3D47 B4
3D48 B4
3E02 C4
3E04 C4
3G15 B1
3G19 B1
3G48 B1
3G56 D1
3G57 D1
3G58 D1
3G59 D1
3J01 D3
3J02 D3
3J03 D3
3J14 B9
3J15 B9
3K00 F2
3K01 F2
3K02 E3
3K03 F3
3K05 F3
3K09 F2
3K12 F2
3K15 E1
3K16 E2
3K18 F1
3K21 F2
3K25 E2
3K26 E2
3K27 F1
3K28 E2
3K29 F1
3K30 E2
3K31 E2
3K32 E2
3K33 E1
3K34 F1
3K49 E2
3K50 E2
3K51 F1
3K52 F1
3L01 C8
3L02 C8
3L03 C8
3L04 B7
3L05 C7
3L06 C8
3L07 C8
3L08 C8
3L09 C8
3L11 C6
3L12 C8
3L13 C8
3L15 C8
3L17 B7
3L20 A7
3L21 A8
3L22 A8
3L23 A8
3L24 A8
3L25 A8
3L27 A8
3L28 D8
3L53 C8
3L55 D8
3L56 D8
3L58 D8
3L59 C6
3L61 C8
3L62 C8
3L63 D8
3L67 D7
3L71 C8
3L72 B8
3L73 C8
3L75 C8
3L76 C8
3L79 D8
3L86 B7
3L94 C8
3L95 C8
3N01 E7
3N02 D7
3N03 E7
3N04 D7
3N05 D7
3N06 D7
3N07 D7
3N08 D7
3N09 D7
3N10 D7
3N11 D8
3N12 D8
3N13 E7
3N14 E7
3N15 E7
3N16 D7
3N22 D8
3N24 D8
3N33 D8
3N34 D8
3N39 E7
3N40 E7

3R25 A7
3R26 A7
3R35 A6
3R48 A6
3R49 A6
3R50 A6
3R51 A6
3R52 A6
3R53 A6
3R54 A6
4113 D6
4117 E5
4120 E5
4301 A7
4313 C8
4323 C8
4401 A7
4402 A7
4407 B7
4408 B7
4409 B7
4410 B7
4411 B7
4412 B7
4902 B7
4H01 D2
4H02 D2
4H03 D3
4H04 D2
4H05 D2
4J14 B9
4J15 B9
4L03 C8
4L20 A7
4L21 A8
4L24 A8
4L25 A8
4L26 A8
4N03 E7
4N04 E7
4N05 E7
4R05 A6
4R06 A6
4R07 A6
4R08 A6
5111 F6
5117 E6
5201 B7
5301 B7
5306 C8
5401 B8
5402 B8
5403 B8
5700 A6
5A03 A10
5A04 B10
5A05 A9
5A06 A9
5B01 B1
5B05 B2
5B08 A2
5C06 C4
5C08 C4
5D03 A4
5E04 C4
5E05 C4
5E06 D4
5E16 D4
5F10 D3
5F11 D3
5G01 C3
5G02 C3
5G04 D3
5G06 C3
5G07 C3
5H01 D3
5H02 D1
5K03 F1
5K04 D2
5K05 D3
5P01 A3
5P02 A2
5P09 B3
6103 E6
6306 B9
6307 B9
6317 B7
6318 B8
6914 B7
6B30 B2
6J03 D3
6J14 B9
6J15 B9
7109 E6
7113 D6
7201 B7
7302 C8
7303 C8
7308 B7
7311 C7
7317 B7
7322 C6
7323 C8

7410 A8
7700 B6
7901 B7
7917 B7
7919 B7
7A01 A9
7A05 A9
7A06 A9
7A07 A9
7B01 B1
7B02 A1
7C01 C5
7C03 C3
7D01 B5
7D02 B4
7G00 C2
7H00 D2
7H02 C3
7J04 D3
7J05 D3
7K00 F2
7K04 F3
7L10 B8
7M07 F7
7N01 E7
7P06 A3
7P07 B3

Circuit Diagrams and PWB Layouts

Layout SSB ( Part 1 Top Side)

68LC7.5E LA 7.

Part 1

H_17370_023a.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB ( Part 2 Top Side)

69LC7.5E LA 7.

Part 2

H_17370_023b.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB ( Part 3 Top Side)

70LC7.5E LA 7.

Part 3

H_17370_023c.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB ( Part 4 Top Side)

71LC7.5E LA 7.

Part 4

H_17370_023d.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB (Overview Bottom Side)

1204 A4

2129 D5
2130 E5
2131 E7
2132 E7
2133 E5
2134 D5
2135 D5
2136 D5
2137 E5
2138 E5
2139 E5
2140 D5
2141 D5
2143 E5
2144 E5
2145 E5
2146 F6

2147 E6
2148 E7
2149 F7
2203 A5
2204 A5
2205 A6
2206 A7
2207 A7
2208 A7
2209 A7
2210 A7
2214 B4
2311 C4
2315 D5
2319 C3
2320 C3
2324 C3

1311 F7
1411 B3
1G01 C10
2112 F7
2113 E7
2115 F6
2116 F6
2118 E6
2120 E6
2121 F6
2122 E6
2123 D5
2124 D5
2125 D5
2126 D5
2128 D5

H_17370_024a.eps

3139 123 6273.1

2327 A3
2329 A3
2330 A3
2331 A3
2332 A3
2333 A3
2335 A3
2336 A3
2337 A4
2339 A3
2340 A3
2415 B3
2416 B3
2424 A3
2425 A3
2426 A3
2427 A3

Part 1

2428 A3
2429 A3
2430 A3
2431 A3
2502 E2
2506 E2
2508 E3
2509 E1
2512 E1
2514 E3
2515 E2
2517 E2
2518 D1
2520 D1
2521 E2
2523 E2
2524 D2

2525 C2
2526 C2
2527 D3
2528 D3
2529 D3
2530 C1
2531 D2
2533 C3
2534 D3
2535 C3
2536 C2
2538 C2
2600 F2
2602 F1
2603 F2
2606 F2
2607 E2

2608 F2
2609 F2
2610 E1
2612 F1
2613 E3
2614 E3
2615 E2
2616 E2
2701 A5
2703 A5
2704 A5
2705 A4
2706 B4
2707 B5
2708 B5
2709 B5
2710 B5

2711 B5

2A25 A2
2A26 A1
2A27 B2
2A28 A1
2A31 B2
2A35 A2
2A36 B2
2A37 A1
2A38 A1
2A45 A1
2A46 A2
2A47 A2
2A50 A1
2A51 A1
2A52 A2
2A53 A2
2A54 A1

2B06 A9
2B20 B9
2B63 A9
2B68 A9
2C17 C6
2C20 C6
2C21 C6
2C24 C7
2C25 C7
2C26 C7
2C27 C7
2C30 C5
2C73 C5
2C74 B5
2D02 B6
2D03 B6
2D04 A6

2712 B4
2713 B5
2714 B5
2715 A4
2717 A5
2719 B5
2720 B5
2725 B5
2726 B5
2729 B5
2730 B5
2A13 A1
2A14 A1
2A17 A1
2A21 A2
2A23 A1

Part 3

H_17370_024c.eps

2D08 B6
2D09 B6
2D10 B6
2D11 B6
2D12 B6
2D14 A6
2D18 B6
2D33 B6
2D34 B6
2D37 B7
2D38 B7
2D39 B7
2D43 B7
2D46 A6
2D57 A7
2D58 B7
2D59 B7

2D60 B7
2E03 C6
2E04 C6
2E05 C6
2E06 C6
2E07 C6
2E08 C6
2E21 C7
2E22 C7
2E27 C6
2E28 C7
2E29 C6
2E30 C6
2E31 C6
2E32 C6
2E33 C6
2E34 C6

2E35 C6
2E36 C6
2E37 C6
2E38 C6
2E39 C6
2E40 C6
2E41 C7
2E42 C6
2E43 C6
2E44 C6
2E45 C6
2E46 C6
2E47 C6
2E48 C6
2E49 C6
2E50 C6
2E51 C6

2E52 C6
2E53 C6
2E54 C6
2E55 C6
2E56 C6
2E57 C6
2E58 C6
2E66 C6
2E67 C7
2E68 C7
2E69 C6
2E70 B6
2E71 C5
2E72 C6
2E75 C6
2E76 C6
2E77 C6

2F14 E8
2F15 E8
2F16 E8
2F17 E8
2F18 E7
2F19 F8
2F23 F8
2F24 E8
2F25 E8
2F26 F7
2F27 E7
2F28 E7
2F29 E7
2F30 E7
2F31 E7
2F32 E7
2F33 E7

2G03 C9
2G04 D9
2G05 D10
2G06 C9
2G07 C9
2G08 C9
2G09 C10
2G10 C10
2G11 D9
2G12 C9
2G13 D9
2G14 C9
2G15 C9
2G16 C10
2G19 B9
2G20 B9
2G21 C9

72LC7.5E LA 7.

2G31 C9
2G32 C9
2H03 C8
2H04 D9
2H09 C8
2H10 C8
2H11 C8
2H12 C8
2H13 C8
2H14 B9
2H15 B9
2J02 B9
2J60 C9
2J62 C9
2J63 C9
2J64 C9
2J66 C9

2J67 C9

2K15 D10
2M01 F4
2M02 F4
2M03 F4
2M04 F4
2M05 F4
2M06 F4
2M07 E4
2M08 F4
2M09 F4
2M10 F4
2M12 F5
2M15 F4
2M16 F4
2M17 F4
2M19 F4
2M20 F4

2M21 E4
2N04 E3
2N05 E3
2N07 E3
2N08 E3
2N09 E3
2N10 E3
2N12 E3
2N15 E4
2N16 E4
2N17 E4
2N18 E4
2N20 E3
2N25 E4
2N26 E4
2N27 E4
2N28 E4

2J68 C8
2J69 C8
2J70 C8
2J71 C9
2J72 C9
2J73 C9
2K00 D10
2K01 D9
2K02 E9
2K03 E9
2K04 D9
2K05 E9
2K08 F9
2K09 F9
2K10 F9
2K12 F9

Part 2

H_17370_024b.eps

2N46 E3
2N47 D3
2N48 D4
2N49 E3
2N50 E4
2N51 E4
2N52 D4
2N53 E3
2N54 D4
2N55 D4
2N56 E3
2N58 D4
2N59 D3
2N60 D3
2N61 E4
2N62 E4
2N63 D3

2N64 D3
2N66 D3
2P07 A8
2P31 B8
2P32 A8
2P33 A8
2P35 A9
2P36 A8
2P37 B9
2P38 A9
2P39 A8
2P40 A8
2P41 B8
2P42 B8
2P43 B8
2P48 B8
2P49 A8

2N29 E3
2N30 E3
2N31 E4
2N32 E3
2N33 D3
2N34 E3
2N35 E4
2N36 E3
2N37 E4
2N38 E4
2N39 E4
2N40 E4
2N41 D3
2N42 E3
2N43 D4
2N44 D4
2N45 D4

Part 4

H_17370_024d.eps

2P52 B9
2P53 B9
2P54 B8
2P58 B8
2P73 B8
2P78 A8
2R10 A6
2R12 A6
3110 E7
3111 E7
3115 E7
3120 E6
3123 D5
3124 D5
3125 D5
3126 D5
3127 E5

3133 D5
3134 E7
3135 D5
3136 E6
3137 E7
3140 E5
3146 F6
3151 D5
3152 D5
3187 E5
3190 E6
3191 F6
3193 E5
3194 E5
3195 E5
3203 A5
3204 A5

3205 A5
3206 A5
3207 A7
3222 A7
3224 A7
3225 A7
3231 A6
3232 A6
3234 A6
3235 A6
3236 B4
3238 A6
3240 A6
3246 A6
3247 A7
3248 A7
3300 C4

3301 D4
3306 C3
3307 C3
3316 D5
3318 D5
3319 C5
3321 D5
3323 D5
3325 C5
3326 C3
3336 C3
3338 C4
3339 C4
3340 C4
3341 C4
3346 D3
3353 C3

3355 C3
3356 C5
3357 C5
3389 A3
3390 A3
3391 A3
3417 A3
3418 A3
3419 A3
3420 A3
3500 E2
3502 E2
3503 E3
3506 E1
3507 E3
3508 E1
3510 E2

H_17370_024.eps

3511 E2
3512 D1
3513 D1
3514 E2
3515 E2
3516 D3
3517 D3
3518 D2
3519 C2
3520 D2
3521 C2
3522 C2
3523 D3
3524 C3
3525 C2
3526 D3
3528 D3

070804

3529 C1
3530 D3
3531 C1
3532 D2
3533 D2
3535 C3
3536 C3
3537 C3
3538 C2
3540 C3
3545 C2
3546 C2
3550 D2
3551 D2
3552 D2
3553 D2
3554 C3

3555 C2
3600 E2
3601 F1
3602 E2
3603 F2
3604 F2
3605 F2
3607 F2
3608 F2
3609 F2
3611 F1
3612 F1
3617 E1
3618 E2
3619 E2
3620 E2
3700 B5
3701 B5
3703 A5
3911 B4
3912 B4
3913 E1
3914 E1
3915 E1
3916 E1
3917 A4
3918 A4
3940 B4
3942 B4
3943 B4
3A05 A1
3A09 A2
3A12 A2
3A14 A1
3A15 B2
3A17 B2
3B15 B9
3B67 B9
3B68 A9
3C07 C5
3C08 C6
3C09 C6
3C10 C5
3C19 C6
3C20 C6
3C22 C5
3C23 C5
3C24 B5
3C25 C5
3C39 C6
3C40 C6
3C41 D6
3C42 C6
3C43 C6
3C44 C6
3D10 A6
3D14 A6
3D15 B6
3D16 B6
3E05 C6
3E06 C6
3E07 C6
3F10 C9
3F11 C8
3F12 C9
3F13 C9
3F14 F7
3F15 F7
3F16 F7
3F17 F7
3F18 F7
3F19 E7
3F20 E7
3F21 F8
3F22 E7
3F23 E7
3F24 E7
3F25 E7
3F26 E7
3F27 E7
3F28 E7
3F29 E7
3F30 F8
3F31 F8
3F32 F8
3F33 F8
3F34 F8
3F40 F7
3F41 E7
3F42 E7
3F44 F7
3F46 E7
3F48 E7
3G11 B10
3G12 D10
3G16 C10
3G17 C10
3G18 C10
3G20 D9
3G28 C9
3G29 C9
3G30 C9
3G31 C9
3G33 B10
3G34 B10
3G35 C10

3G36 C9
3G37 C9
3G38 B10
3G40 C9
3G41 C10
3G43 C10
3G44 C10
3G46 C10
3G47 C10
3G51 C9
3G54 B9
3G55 B9
3G60 D9
3G61 D10
3G62 D9
3G63 C10
3H00 D9
3H05 D10
3H09 B9
3H10 B9
3H11 B9
3H12 B9
3H13 B9
3H14 C9
3J59 C9
3J60 C9
3J61 C9
3J62 C8
3J63 C8
3J64 C8
3J65 C9
3J66 C9
3K04 E9
3K06 E9
3K07 E8
3K08 D8
3K10 E9
3K11 F9
3K13 F9
3K17 E8
3K19 E9
3K20 E9
3K22 F9
3K23 D10
3K24 D10
3K38 E9
3K39 E8
3K40 E8
3K41 E8
3K42 E8
3K43 E8
3K44 E10
3K45 E10
3K46 E9
3K47 E9
3K48 E9
3L10 A4
3L14 C3
3L16 C3
3L26 D3
3L54 C3
3L57 C4
3L60 D3
3L93 C3
3L96 C5
3M03 F5
3M04 F5
3M07 F4
3M08 F4
3M09 F4
3M10 E4
3M11 E4
3M13 F3
3M14 E3
3M15 E4
3M18 E3
3M20 E4
3M21 E4
3M31 F3
3M32 F3
3M33 F4
3M34 E3
3M35 F4
3M36 F4
3M37 F4
3M38 F4
3M39 F3
3M40 F3
3N18 E3
3N19 E3
3N20 E3
3N21 E3
3N23 E3
3N25 E3
3N26 E3
3N27 E3
3N35 E3
3N36 E4
3N37 E3
3N38 E3
3P13 B8
3P20 B8
3P23 A8
3P25 A8
3P26 A8
3P32 B8

3P34 A8
3P37 A8
3P38 A8
3P40 B8
3P41 A8
3P45 B8
3P47 A8
3P48 A8
3P49 A8
3P50 B8
3P51 B8
3P52 B8
3P53 B8
3P54 A8
3P56 A8
3P59 B8
3P61 B9
3P64 A8
3P68 A8
3P69 B8
3P70 B8
3P71 B8
3P72 B8
3P74 A8
3P77 B8
3P78 B8
3P79 B7
3R10 A6
3R12 A6
3R13 A6
4112 E7
4114 F6
4115 F6
4116 E6
4118 E6
4119 E6
4121 E6
4122 F6
4123 F6
4124 D5
4125 F7
4126 E5
4201 A7
4202 A7
4203 A7
4204 A7
4205 A7
4302 A4
4303 A4
4304 C3
4305 C3
4306 C3
4307 C3
4309 A3
4310 A3
4314 C3
4315 C3
4316 C3
4326 D3
4327 D3
4328 D3
4502 C2
4504 C3
4601 E3
4602 E2
4603 E2
4700 B5
4701 B5
4703 B5
4704 B5
4705 B5
4706 B5
4707 B5
4708 B5
4709 B5
4710 B5
4711 B5
4712 B5
4713 A5
4714 A5
4715 A5
4716 A5
4717 A5
4718 A5
4719 B5
4720 B5
4721 B5
4722 B5
4723 B5
4724 B5
4725 B5
4726 B5
4901 B4
4A01 A2
4A02 A2
4B04 A9
4B05 A9
4B06 A9
4B07 A9
4B08 A9
4B09 A9
4B10 A9
4B11 A9
4B12 A9
4C07 C5
4C08 C5

4F11 E7
4F12 E7
4G01 C10
4G02 C10
4G03 C10
4G04 C10
4G05 C10
4G09 D9
4G10 C10
4G31 C9
4H00 D9
4H12 B9
4H15 D10
4M01 F3
4M02 E4
4M03 E4
4M04 E4
4M05 E4
4M07 F3
4M08 F4
4M09 F4
4M10 E4
4M11 E4
4M12 F3
4N01 E3
4N02 E3
4N06 E4
4N07 E4
4N08 E4
4P01 A8
4P02 B9
4R01 A6
4R02 A5
4R03 A6
4R04 A6
5112 E6
5114 D5
5115 E7
5116 D5
5118 D7
5120 E6
5121 F6
5202 A4
5302 C4
5304 A4
5601 E2
5602 E2
5701 B4
5702 A5
5703 B5
5704 B5
5705 B5
5A07 A2
5A08 A2
5A09 B2
5B06 B9
5C07 C7
5E03 C6
5E07 C7
5E08 C7
5E09 C7
5E10 C6
5E11 D7
5E12 D7
5E13 B6
5E14 C5
5E17 C6
5G03 B9
5G05 B9
5H03 C9
5J01 B9
5J52 C9
5J53 C9
5J54 C8
5J55 C9
5K01 E9
5K02 E9
5M01 F4
5M02 F4
5M03 F4
5N01 E4
5N02 E4
5N03 E3
5N04 E3
5N05 E4
5N06 D4
5N07 E4
5N08 D4
5N09 D3
5R01 A6
5R02 A6
5R03 A6
6110 E7
6301 C5
6308 A3
6309 A3
6310 A3
6311 A3
6312 A3
6501 E1
6504 E2
6505 D1
6507 E2
6509 D2
6510 C1
6511 C2

6512 D2
6513 D2
6514 D3
6515 D3
6516 D3
6517 D3
6518 E3
6519 D3
6520 D2
6521 D2
6522 E1
6523 E2
6524 D2
6525 C2
6604 F2
6606 F2
6610 F1
6611 F2
6612 F2
6613 F2
6614 F1
6916 B4
6919 B4
6B02 B9
6B03 B9
6J60 C9
6J61 C8
6J62 C8
6J63 C9
6M01 F3
6M02 F4
6M03 F4
6M04 F3
6M06 F4
6M07 F4
6M08 F4
6P05 B8
6P12 B8
6P13 A8
6P14 A8
6P15 A8
6R02 A6
7111 F7
7114 D5
7131 E6
7132 F6
7133 D7
7134 E5
7202 B4
7310 C4
7312 C5
7314 D3
7411 B3
7500 C2
7502 C2
7503 C3
7504 C3
7601 E2
7602 E2
7603 E2
7902 B4
7911 A4
7912 A4
7913 E2
7914 E1
7915 E1
7916 E1
7922 B4
7B12 B10
7B13 B9
7C02 C5
7C04 C5
7F01 F8
7F02 C8
7F03 F7
7F04 E7
7H03 B10
7K01 D9
7K02 D9
7K03 D10
7K05 F9
7L23 C3
7M01 F5
7M02 F5
7M04 F4
7M09 F3
7N07 E3
7P05 A8
7P08 B8
7P09 B8
7P11 B8
7R05 A6
7R07 A6

Circuit Diagrams and PWB Layouts

Layout SSB (Part 1 Bottom Side)

73LC7.5E LA 7.

Part 1

H_17370_024a.eps

070804

H_17370_024a.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB (Part 2 Bottom Side)

74LC7.5E LA 7.

Part 2

H_17370_024c.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB (Part 3 Bottom Side)

75LC7.5E LA 7.

Part 3

H_17370_024c.eps

070804

Circuit Diagrams and PWB Layouts

Layout SSB (Part 4 Bottom Side)

76LC7.5E LA 7.

Part 4

H_17370_024d.eps

070804

Circuit Diagrams and PWB Layouts

77LC7.5E LA 7.

Side I/O Panel (32”): HDMI

12345678910

SIDE HDMI

D1 D1

A

B

C

D

E

F

+3V3_SW

+1V8_SW

1Q01

DC1R019JBAR190

1
2
3
4
5
6
7
8

9
10
11
12
13
14

NC

15

SIDE HDMI

16
17
18
19

2021
2223

FQ05

5Q01

220R

5Q02

220R

5Q03

220R

FQ18

FQ01
FQ02

FQ03
IQ04

2Q012Q04

2Q08

10u

2Q02

10u

2Q05

10u

2Q09

3Q03 100R

100n

10u

100n

2Q03

2Q06

2Q10

47K3Q14
47K3Q15

100n

100n

2Q07

100n

+5VHDMI_S

IQ02

FQ15

FQ16

100n

FQ17

7Q02

BC847BW

+3V3_ANA-SIDE

+1V8_ANA-SIDE

+1V8_DIG-SIDE

RX2+S

RX2-S

RX1+S

RX1-S

RX0+S

RX0-S

RXC+S

RXC-S

HDMI_SIDE_CEC_A

+5VHDMI_S

DDC_SCLS
DDC_SDAS

HPD_RESET_S

IQ01

3Q04 2K2

DDC_RESET

+5V_SW

4K7

3Q09

+5VHDMI_SIDE_TPWR

RES

3Q12

4K7

RXC+S
RXC-S
RX0+S
RX0-S
RX1+S
RX1-S
RX2+S
RX2-S

+1V8_ANA-SIDE

3Q06

1K0

3Q07

1K0

3Q05

4K7

IQ07

SII9181CNU

11

IQ05

12

IQ06

13

54

24

50

28
27
30
29
33
32
35
34

10

+3V3_ANA-SIDE +1V8_ANA-SIDE +1V8_DIG-SIDE

7Q03-1

26

31

42

AVCC3 3

RESET

LSDA
EPSEL0
EPSEL1
LSCL

I2CADDR
TPWR
I2CSEL
INT
RSVDL

C+
C­0+
0-

RX

1+
1­2+
2-

EXT_SWING

AGND AGND

151617

14

18

192021

36

AVCC1 8

Φ

HDMI

BUFFER

43 5

4445464755

22

DVCC18

56

48

CEC

TX

GND_HS

57

DSCL

DSDA

RPWR

HPD

HPDIN

TSCL

TSDA

DGND

23

+3V3_SW

4K7

3Q13

HDMI_INT_SIDE

3Q10
3Q11

2Q11

RES

6Q02

BAT54 COL

IQ03

4Q03

HDMI_HOTPLUG_RESET

1n0

RES

+5V_SW

41

NC

A

40

NC

D

38
37
39

6Q01

BAT54 COL

25

51

53
52

8

C+

9

C-

6

0+

7

0-

3

1+

4

1-

1

2+

2

2-

49

100R
100R
330R3Q16

DDC_SCLS

DDC_SDAS

+5VHDMI_S

HPD_RESET_S

HDMI_SIDE_TSCL

HDMI_SIDE_TSDA

HDMI_SIDE_TXC+

HDMI_SIDE_TXC­HDMI_SIDE_TX0+

HDMI_SIDE_TX0-

HDMI_SIDE_TX1+

HDMI_SIDE_TX1-

HDMI_SIDE_TX2+

HDMI_SIDE_TX2-

+3V3_SW

+1V8_SW

IIC_SCL
IIC_SDA

HDMI_RST_RX_BUF

+5V_SW

DDC_RESET

FI-RE21S-HF-R1500

HDMI_HOTPLUG_RESET

+5VHDMI_SIDE_TPWR

HDMI_SIDE_TSDA
HDMI_SIDE_TSCL

HDMI_SIDE_CEC_A
HDMI_SIDE_TX2+

HDMI_SIDE_TX2­HDMI_SIDE_TX1+

HDMI_SIDE_TX1­HDMI_SIDE_TX0+

HDMI_SIDE_TX0­HDMI_SIDE_TXC+

HDMI_SIDE_TXC-

FQ06
FQ07
FQ08
FQ09
FQ10
FQ11
FQ12
FQ13
FQ14

B10P-PH-K-S

1Q03

1Q02

22 23
24 25
26 27
28 29

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

HDMI-SIDE FROM SSB

HDMI-SIDE TO SSB

7Q03-2

SII9181CNU

58
59
60
61
62

GND_VIA GND_VIA
63
64
65
66

GND_VIA

6768697071

82
81
80
79
78
77
76
75

73

74

72

A

B

C

D

E

F

1Q01 D1
1Q02 B8
1Q03 D8
2Q01 B2
2Q02 B2
2Q03 B2
2Q04 B2
2Q05 B2
2Q06 B2
2Q07 B2
2Q08 C2
2Q09 C2
2Q10 C2
2Q11 C6
3Q03 E2
3Q04 E3
3Q05 D4
3Q06 E4
3Q07 E4
3Q09 D3
3Q10 C7
3Q11 C7
3Q12 D3
3Q13 B6
3Q14 E2
3Q15 E2
3Q16 C7
4Q03 D6
5Q01 A1
5Q02 B1
5Q03 C1
6Q01 D6
6Q02 C6
7Q02 F2
7Q03-1 C4
7Q03-2 E10
FQ01 E1
FQ02 E1
FQ03 E1
FQ05 D1
FQ06 C8
FQ07 C8
FQ08 C8
FQ09 C8
FQ10 C8
FQ11 C8
FQ12 C8
FQ13 C8
FQ14 C8
FQ15 A2
FQ16 B2
FQ17 C2
FQ18 E1
IQ01 E3
IQ02 E2
IQ03 D6
IQ04 E1
IQ05 D4
IQ06 D4
IQ07 E4

G

3139 123 6295.1

G

H_17370_030.eps

080807

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Side I/O Panel (32”)

Circuit Diagrams and PWB Layouts

78LC7.5E LA 7.

12

3456

789

SIDE IO

D2 D2

A

B

C

D

E

CVBS

1R20-3

MTJ-032-37AAA-432 NIDIP

L

R

PARTLIST: 2422 026 05983
MTJ-032-37BBB-234 NI

RED

MTJ-032-37AAA-432 NIDIP

1R20-2

WHITE

MTJ-032-37AAA-432 NIDIP

1R20-1

YELLOW

FR04

8
9
7

5
6
4

2
3
1

1R03

HEADPHONE

MSJ-035-10A B AG PPO

3R08 2R04

75R

1R11

IR08

1R12

4R04

4R03
RES

RES

IR09

1R19

5
4
2

3
7
8
1

6R03

PESD5V0S1BA

IR10

1R16

1R17

RES

6R04

12

PESD5V0S1BA

6R05

12

PESD5V0S1BA

IR11

IR12

1R18

6R06

PESD5V0S1BA

12

RES

2R05 3R11

1n0

33K

RES

2R07

3R14

1n0 33K

3R18
100R

2

6R07

6R08

PESD5V0S1BA

12

PESD5V0S1BA

1

22n

3R04

10R

3R10
150R

3R17
150R

5R02

5R03

2R132R11
22n

3R16

3R15

33K

2R06

2R08

120R

120R

2R09

1n033K

1n0

+3V3_SW

3R22

10n10n

10K

IR02

3R122R10

IR03

3R13
10K10K

IR14

IR16

IR17

IR18

IR19
IR20

FRONT_CVBS_IN

L_FRONT_IN
HP_DETECT
R_FRONT_IN

HEAD_PH_L
HEAD_PH_R

IR21

1R04

B11B-PH-K

1
2
3
4
5
6
7
8
9

TO LC07S SSB

10
11

A

B

C

D

E

1R03 D2
1R04 B9
1R11 B2
1R12 C2
1R16 E2
1R17 E2
1R18 E3
1R19 D2
1R20-1 D1
1R20-2 C1
1R20-3 B1
2R04 B3
2R05 C3
2R06 C5
2R07 D3
2R08 D5
2R09 E5
2R10 E5
2R11 E4
2R13 E4
3R04 B4
3R08 B2
3R10 C4
3R11 C4
3R12 E5
3R13 E5
3R14 D4
3R15 D4
3R16 C4
3R17 D4
3R18 D3
3R22 D5
4R03 C2
4R04 C2
5R02 E4
5R03 E4
6R03 B2
6R04 C3
6R05 D3
6R06 E3
6R07 E3
6R08 E3
FR04 B2
IR02 E5
IR03 E5
IR08 C2
IR09 D2
IR10 E2
IR11 E3
IR12 E3
IR14 B7
IR16 B7
IR17 B7
IR18 B7
IR19 B7
IR20 B7
IR21 B9

F

3139 123 6295.1

H_17370_031.eps

080807

123456789

F

Circuit Diagrams and PWB Layouts

79LC7.5E LA 7.

Layout Side I/O Panel (32”) (Top Side)

1Q01 D1
1Q02 B1
1Q03 C1
1R03 C1
1R04 B1
1R20 B1
2Q06 D1
2Q08 C1
2Q09 C1
2Q10 D1
2R10 C1
3Q05 C1
3Q13 C1
3R13 C1
5Q03 C1
5R03 C1
7Q03 D1

Layout Side I/O Panel (32”) (Bottom Side)

1R11 A1
1R12 B1
1R16 C1
1R17 C1
1R18 C1
1R19 B1
2Q01 C1
2Q02 D1
2Q03 D1
2Q04 C1
2Q05 C1
2Q07 D1
2Q11 D1
2R04 A1
2R05 B1
2R06 B1
2R07 B1
2R08 B1
2R09 C1
2R11 C1
2R13 C1
3Q03 D1
3Q04 D1
3Q06 D1
3Q07 D1
3Q09 C1
3Q10 D1
3Q11 D1
3Q12 C1
3Q14 D1
3Q15 D1
3Q16 D1
3R04 A1
3R08 A1
3R10 B1
3R11 B1
3R12 C1
3R14 B1
3R15 B1
3R16 B1
3R17 B1
3R18 C1
3R22 C1
4Q03 C1
4R03 B1
4R04 B1
5Q01 C1
5Q02 C1
5R02 C1
6Q01 C1
6Q02 C1
6R03 A1
6R04 B1
6R05 B1
6R06 C1
6R07 C1
6R08 C1
7Q02 D1

3139 123 6295.1

H_17370_032.eps

080807

3139 123 6295.1

H_17370_033.eps

080807

Circuit Diagrams and PWB Layouts

Side I/O Panel (42” & 52”): HDMI

80LC7.5E LA 7.

1

2345

678910

SIDE HDMI

D1 D1

A

B

C

D

E

F

+3V3_SW

+1V8_SW

1Q01

DC1R019JBAR190

1
2
3
4
5
6
7
8

9
10
11
12
13
14

NC

15

SIDE HDMI

16
17
18
19

2021
2223

FQ05

5Q01

220R

5Q02

220R

5Q03

220R

FQ18

FQ01
FQ02

FQ03
IQ04

2Q012Q04

2Q08

10u

2Q02

10u

2Q05

10u

2Q09

3Q03 100R

100n

10u

100n

2Q03

2Q06

2Q10

47K3Q14
47K3Q15

100n

100n

2Q07

100n

+5VHDMI_S

IQ02

FQ15

FQ16

100n

FQ17

7Q02

BC847BW

+3V3_ANA-SIDE

+1V8_ANA-SIDE

+1V8_DIG-SIDE

RX2+S

RX2-S

RX1+S

RX1-S

RX0+S

RX0-S

RXC+S

RXC-S

HDMI_SIDE_CEC_A

+5VHDMI_S

DDC_SCLS

DDC_SDAS

HPD_RESET_S

IQ01

3Q04 2K2

DDC_RESET

+5V_SW

4K7

3Q09

+5VHDMI_SIDE_TPWR

RES

3Q12

4K7

RXC+S
RXC-S
RX0+S
RX0-S
RX1+S
RX1-S
RX2+S
RX2-S

+1V8_ANA-SIDE

3Q06

1K0

3Q07

1K0

3Q05

4K7

IQ05

IQ06

IQ07

7Q03-1

SII9181CNU

11

12

13

54

24

50

28
27
30
29
33
32
35
34

10

+3V3_ANA-SIDE

31

42

AVCC33

RESET

LSDA
EPSEL0
EPSEL1
LSCL

I2CADDR
TPWR
I2CSEL
INT
RSVDL

C+
C­0+
0-

RX

1+
1­2+
2-

EXT_SWING

AGND AGND

151617

18

14

+1V8_ANA-SIDE +1V8_DIG-SIDE

26

36

AVCC18

DVCC18

Φ

HDMI

BUFFER

192021

43 5

4445464755

56

22

48

CEC

HPDIN

TX

DGND

GND_HS

57

DSCL
DSDA

RPWR

HPD

TSCL

TSDA

23

+3V3_SW

4K7

3Q13

3Q10
3Q11 100R

+5V_SW

41

NC

A

40

NC

D

38
37

IQ03

39

6Q01

BAT54 COL

25

51

53
52

8

C+

9

C-

6

0+

7

0-

3

1+

4

1-

1

2+

2

2-

49

2Q11
1n0

6Q02

BAT54 COL

RES

4Q03

RES

HDMI_HOTPLUG_RESET

HDMI_SIDE_TSCL

HDMI_SIDE_TSDA

HDMI_SIDE_TXC+

HDMI_SIDE_TXC­HDMI_SIDE_TX0+

HDMI_SIDE_TX0-

HDMI_SIDE_TX1+

HDMI_SIDE_TX1-

HDMI_SIDE_TX2+

HDMI_SIDE_TX2-

100R

330R3Q16

DDC_SCLS
DDC_SDAS

+5VHDMI_S

HPD_RESET_S

HDMI_INT_SIDE

IIC_SDA

HDMI_RST_RX_BUF

+3V3_SW

+1V8_SW

+5V_SW

DDC_RESET

HDMI_HOTPLUG_RESET

+5VHDMI_SIDE_TPWR

HDMI_SIDE_TSDA
HDMI_SIDE_TSCL

HDMI_SIDE_CEC_A
HDMI_SIDE_TX2+

HDMI_SIDE_TX2­HDMI_SIDE_TX1+

HDMI_SIDE_TX1­HDMI_SIDE_TX0+

HDMI_SIDE_TX0­HDMI_SIDE_TXC+

HDMI_SIDE_TXC-

IIC_SCL

FI-RE21S-HF-R1500

FQ06
FQ07
FQ08
FQ09
FQ10
FQ11
FQ12
FQ13
FQ14

B10P-PH-K-S

1Q03

1Q02

22 23
24 25
26 27
28 29

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

HDMI-SIDE FROM SSB

HDMI-SIDE TO SSB

SII9181CNU

58
59
60
61
62

GND_VIA GND_VIA
63
64
65
66

6768697071

7Q03-2

GND_VIA

82
81
80
79
78
77
76
75

73

74

72

A

B

C

D

E

F

1Q01 D1
1Q02 B8
1Q03 D8
2Q01 B2
2Q02 B2
2Q03 B2
2Q04 B2
2Q05 B2
2Q06 B2
2Q07 B2
2Q08 C2
2Q09 C2
2Q10 C2
2Q11 C7
3Q03 E2
3Q04 E3
3Q05 D4
3Q06 E4
3Q07 E4
3Q09 D4
3Q10 C7
3Q11 C7
3Q12 D3
3Q13 B6
3Q14 E2
3Q15 E2
3Q16 C7
4Q03 D6
5Q01 A1
5Q02 B1
5Q03 C1
6Q01 D6
6Q02 C6
7Q02 F2
7Q03-1 C4
7Q03-2 E10
FQ01 E1
FQ02 E1
FQ03 E1
FQ05 D1
FQ06 B8
FQ07 C8
FQ08 C8
FQ09 C8
FQ10 C8
FQ11 C8
FQ12 C8
FQ13 C8
FQ14 C8
FQ15 A2
FQ16 B2
FQ17 C2
FQ18 E1
IQ01 E3
IQ02 E2
IQ03 D6
IQ04 E1
IQ05 D4
IQ06 D4
IQ07 F4

G

3139 123 6271.1

12345678

H_17370_026.eps

080807

910

G

Circuit Diagrams and PWB Layouts

81LC7.5E LA 7.

Side I/O Panel (42” & 52”)

12345678910

SIDE IO

D2 D2

A

IR21

1R04

B11B-PH-K

1R06

B7B-PH-K

220R5R01

1
2
3
4
5
6
7
8
9

TO LC07S SSB

10
11

1
2
3
4
5
6
7

TO BOLT-ON USB

2R12
100u

16V

2R19

100n

B

C

D

E

F

3139 123 6271.1

CVBS

1R20-3

MTJ-032-37AAA-432 NIDIP

L

R

PARTLIST: 2422 026 05983
MTJ-032-37BBB-234 NI

RED

MTJ-032-37AAA-432 NIDIP

1R20-2
WHITE

MTJ-032-37AAA-432 NIDIP

1R20-1

YELLOW

FR04

8
9
7

5
6
4

2
3
1

1R11

1R03

HEADPHONE

MSJ-035-10A B AG PPO

4R03
RES

3R08

75R

4R04
RES

5
4
2

3
7
8
1

IR08

1R12

IR09

1R19

6R03

PESD5V0S1BA

IR10

1R16

1R17

RES

2R04

6R04

PESD5V0S1BA

12

6R05

12

PESD5V0S1BA

IR11

IR12

1R18

6R06

PESD5V0S1BA

12

RES

2R05

3R11

1n0 33K

RES

2R07

3R14

1n0

33K

3R18
100R

6R07

6R08

PESD5V0S1BA

12

PESD5V0S1BA

12

3R04

10R

3R10
150R

3R17
150R

2R11
22n

5R02

5R03

2R13
22n

33K

3R15

2R063R16

1n0

2R08

1n033K

+3V3_SW

120R

120R

2R09

3R22

10K

2R10

IR02

10K10n 10n

IR03

3R133R12
10K

IR14

IR16

IR17

IR18

IR19
IR20

1R07

1
2

USB

3
4

5401-032-100-70

56

D-

D+

USB_GND

2R17

10u

2R18

100n

IR25
IR26
IR27
IR28

4R05

+5V_SW

3R20

RES

3R21

0R

+5V_USB

1R15

1R14

4

2

3

1R13

FRONT_CVBS_IN

L_FRONT_IN
HP_DETECT
R_FRONT_IN

HEAD_PH_L
HEAD_PH_R

+5V_SW

4R11
4R09

4R10

7R02

TPS2041BD

EN_

1

IN

2

OC_

GND

1

4R12

1
23OUT

IR31
IR32

IIC_SCL
IIC_SDA

6

7

8

5

NC

+5V_USB

H_17370_027.eps

080807

A

B

C

D

E

F

1R03 D2
1R04 B10
1R06 C9
1R07 C7
1R11 B2
1R12 C2
1R13 D8
1R14 D8
1R15 D8
1R16 E2
1R17 E3
1R18 E3
1R19 D2
1R20-1 D1
1R20-2 C1
1R20-3 B1
2R04 B3
2R05 C4
2R06 C5
2R07 D4
2R08 D5
2R09 E5
2R10 E5
2R11 E4
2R12 F10
2R13 E4
2R17 E8
2R18 E8
2R19 F10
3R04 B4
3R08 B2
3R10 B4
3R11 C4
3R12 E5
3R13 E5
3R14 D4
3R15 D5
3R16 C5
3R17 C4
3R18 D4
3R20 E8
3R21 F8
3R22 D5
4R03 C2
4R04 C2
4R05 D8
4R09 C9
4R10 D9
4R11 C9
4R12 C9
5R01 E9
5R02 E4
5R03 E4
6R03 B2
6R04 C3
6R05 D3
6R06 E3
6R07 E3
6R08 E4
7R02 E9
FR04 B2
IR02 D5
IR03 E5
IR08 B2
IR09 C2
IR10 D3
IR11 D3
IR12 E3
IR14 B7
IR16 B7
IR17 B7
IR18 B7
IR19 B7
IR20 B7
IR21 B9
IR25 C8
IR26 C8
IR27 C8
IR28 D8
IR31 C9
IR32 C9

1234

56789

10

Circuit Diagrams and PWB Layouts

82LC7.5E LA 7.

Layout Side I/O Panel (42” & 52”) (Top Side)

1Q01 C1
1Q02 B1
1Q03 C1
1R03 B1
1R04 A1
1R06 D1
1R07 D1
1R13 D1
1R20 A1
2Q06 C1
2Q08 C1
2Q09 C1
2Q10 C1
2R10 B1
2R12 D1
2R19 C1
3Q05 C1
3Q13 B1
3R13 B1
4R05 C1
4R11 D1
4R12 C1
5Q03 C1
5R01 D1
5R03 B1
7Q03 C1

Layout Side I/O Panel (42” & 52”) (Bottom Side)

1R11 A1
1R12 A1
1R14 D1
1R15 D1
1R16 B1
1R17 B1
1R18 B1
1R19 B1
2Q01 C1
2Q02 C1
2Q03 C1
2Q04 C1
2Q05 C1
2Q07 C1
2Q11 C1
2R04 A1
2R05 A1
2R06 A1
2R07 B1
2R08 B1
2R09 B1
2R11 B1
2R13 B1
2R17 C1
2R18 C1
3Q03 C1
3Q04 C1
3Q06 C1
3Q07 C1
3Q09 C1
3Q10 C1
3Q11 C1
3Q12 C1
3Q14 C1
3Q15 C1
3Q16 C1
3R04 A1
3R08 A1
3R10 A1
3R11 A1
3R12 B1
3R14 B1
3R15 B1
3R16 A1
3R17 B1
3R18 B1
3R20 D1
3R21 D1
3R22 B1
4Q03 C1
4R03 B1
4R04 A1
4R09 D1
4R10 D1
5Q01 C1
5Q02 C1
5R02 B1
6Q01 C1
6Q02 C1
6R03 A1
6R04 A1
6R05 B1
6R06 B1
6R07 B1
6R08 B1
7Q02 C1
7R02 D1

3139 123 6271.1

H_17370_028.eps

080807

3139 123 6271.1

H_17370_028.eps

080807

Keyboard Control Panel

Circuit Diagrams and PWB Layouts

83LC7.5E LA 7.

A

B

C

D

1234

E E

6014 BZX384-C5V6

KEYBOARD CONTROL

560R

0R

BZX384-C5V66017

I118I116 I117

1004

3014

820R

3017

1014

SKQNAB

VOLUME-

0R

1001

3013

150R

1011

BZX384-C5V66015

SKQNAB

CHANNEL+

Diversity Resistor

F310 F311

1002

3010

390R

0R

3015

1012

SKQNAB

CHANNEL-

3099

RES

3011

3016

1013

MENU

6016 BZX384-C5V6

1003

SKQNAB

3012

I115I114I112 I113I111

1015

6018 BZX384-C5V6

1005

VOLUME+

KEYBOARD

1K8

1016

SKQNAB

ON / OFF

6011

I110

SKQNAB

BZX384-C3V9

6012

BZX384-C3V9

3010

3011

3012

3013

3014

6011

6012

6013

F002

6013

*

2001

470p

F001

BZX384-C3V9

LC06

390R

560R

1K8

150R

820R

YES

YES

NO

RES

5001

Jaguar

390R

560R

1K8

150R

820R

NO

NO

YES

270R

4001

1M01
1
2
3

S3B-PH-K

A

B

C

D

1001 C1

Personal Notes:

1002 C1
1003 C1
1004 C2
1005 C2
1011 C1
1012 C1
1013 C2
1014 C2
1015 C2
1016 C3
1M01 A4
2001 B3
3010 B1
3011 B2
3012 B2
3013 B1
3014 B2
3015 B1
3016 B2
3017 B2
3099 D1
4001 B4
5001 B4
6011 B3
6012 C3
6013 B3
6014 C1
6015 C1
6016 C1
6017 C2
6018 C2
F001 B4
F002 B3
F310 D1
F311 D1
I110 B3
I111 B1
I112 B1
I113 B2
I114 B2
I115 B2
I116 C1
I117 C2
I118 C2

3139 123 6219.1

1234

G_16850_024.eps

110107

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

Layout Keyboard Control Panel (Top Side)

1011 A5 1012 A6 1013 A3 1014 A2 1015 A1 1016 A7 1M01 A8

3139 123 6219.1

84LC7.5E LA 7.

G_16850_028.eps

120107

Layout Keyboard Control Panel (Bottom Side)

2001 A1
3010 A4

3011 A6
3012 A8

3013 A5
3014 A7

3139 123 6219.1

3015 A3
3016 A6

3017 A7
3099 A8

4001 A1
5001 A1

6011 A2
6012 A3

6013 A1
6014 A4

6015 A3
6016 A5

6017 A6
6018 A8

G_16850_029.eps

020207

Front IR / LED Panel

Circuit Diagrams and PWB Layouts

85LC7.5E LA 7.

A

B

C

D

E

F

12345

IR/LED/LIGHT-SENSOR

J J

7010

GP1UE260RKVF

VS

OUT

GND

4

5

1M21

1
2
3
4
5
6

S6B-PH-K

S7B-PH-K

1
2
3

S3B-PH-K

1M20

1M01

2

1

3

F010

1
2
3
4
5
6
7

+5V_STANDBY

3010
330R

3011

10K 6K8

3014

+5V_STANDBY+5V_STANDBY

3015

0R

7014

BC847B

4016

3017

2002

10K

LIGHT_SENSOR

6014

F011
F012
F013
F014

+5V_STANDBY
F015
F016

1u0

RESERVED

BZX384-C5V6

FOR LIGHT SENSOR ONLY

RC

LED2

LED1

RES

KEYBOARD

22u

2001

RC

6012

LS

7013

BPW34

6015

RES

BZX384-C4V7

BZX384-C4V7

3016
2M2

3018
4M7

3019 150R

6016

BZX384-C4V7

150R3020

+5V_STANDBY +5V_STANDBY

MFD

IR Tx

RES

6013

L-934F3BT

1

RES

3021

4012

MFD

ITV

10K

1

6010

2

L-174A2PBC-A

4017 4010

3012

3

2

RES

4013

32

GREEN

6001-2

BLUE

MFD

6K8

7011
BC847B

ITV

SPR-325MVW

ITV

6002

Bi- LED

ITV

RES

MFD ITVREF

3012

3K3 82R
820R 180R3013

YN4010
NY4011
YN4012
NY4013
NY4014
YN4015
YN4017

YN4019
N Bi-GR/RD6001
N IR ED6002

BLUE LED N6010

RED LED N6011

1

2

L-174A2F3BT

ITV

4018

YN4018

6011

L-174A2IT

1

2

4019

3013

RES

4014

12

RED

6001-1

RES

RED

MFD

820R

7012

BC847B

ITV

SPR-325MVW

4011

RES

4015

ITV

3022

10K

MFD

A

B

C

D

E

F

1M01 E1
1M20 E1
1M21 E1
2001 A2
2002 D2
3010 A2
3011 A2
3012 B4
3013 B4
3014 B2
3015 C2
3016 C3
3017 D2
3018 D3
3019 E3
3020 E3
3021 C3
3022 C5
4010 A4
4011 B5
4012 D3
4013 D4
4014 D5
4015 D5
4016 D2
4017 B4
4018 B4
4019 B5
6001-1 D5
6001-2 D4
6002 B4
6010 B3
6011 B4
6012 B2
6013 B3
6014 D2
6015 E2
6016 E2
7010 B1
7011 C4
7012 B5
7013 C2
7014 C2
F010 E2
F011 E2
F012 E2
F013 E2
F014 E2
F015 E2
F016 E2

Personal Notes:

3139 123 6210.1

12345

G_16850_025.eps

110107

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

86LC7.5E LA 7.

Layout Front IR / LED Panel (Top Side)

1M01 D4
1M20 D2
1M21 D2

6001 B2
6002 B1
6010 B2

6011 B1
6013 A1
7010 A3

7013 B4

Layout Front IR / LED Panel (Bottom Side)

2001 C2
2002 B1
3010 C2
3011 C3
3012 B4
3013 B4

3014 B2
3015 B1
3016 A2
3017 C1
3018 B1
3019 C3

3020 C3
3021 C3
3022 C3
4001 D3
4002 C3
4004 C2

4005 C2
4010 A3
4011 B4
4012 B3
4013 B3
4014 B4

4015 C4
4016 C1
4017 A4
4018 A3
4019 B4
6012 D3

6014 D4
6015 C3
6016 C2
7011 B3
7012 C4
7014 C1

3139 123 6210.1

G_16850_030.eps

020207

3139 123 6210.1

G_16850_031.eps

020207

8. Alignments

Alignments

EN 87LC7.5E LA 8.

Index of this chapter:

8.1 General Alignment Conditions

8.2 Hardware Alignments

8.3 Software Alignments

8.4 Option Settings

Note: Figures below can deviate slightly from the actual
situation, due to the different set executions.

General: The Service Default Mode (SDM) and Service
Alignment Mode (SAM) are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or
RIGHT keys of the remote control transmitter.

8.1 General Alignment Conditions

Perform all electrical adjustments under the following
conditions:

• Power supply voltage (depends on region):
– AP-NTSC: 120 V
– AP-PAL-multi: 120 - 230 V
– EU: 230 V
– LATAM-NTSC: 120 - 230 V
– US: 120 V

• Connect the set to the mains via an isolation transformer
with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground.

• Test probe: Ri > 10 Mohm, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform
alignments.

AC

AC

or 230 VAC / 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

/ 60 Hz (± 10%).

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

Specifications
(V)

Description

+3V3_FE FF14 3.2 3.27 3.4 B03A_DVB-

+1V2_CORE FE08 1.14 1.24 1.34 B05C_WX_POW

Test
Point

Max
.

DiagramMin. Typ.

Demod

ER

8.3 Software Alignments

With the software alignments of the Service Alignment Mode
(SAM) the Tuner and RGB settings can be aligned.
To store the data: Use the RC button “Menu” to switch to the
main menu and next, switch to “Stand-by” mode.

8.3.1 Tuner Adjustment (RF AGC Take Over Point)

Purpose: To keep the tuner output signal constant as the input

signal amplitude varies.

The LC7.5x chassis comes with the TD1316AF tuner. No
alignment is necessary, as the AGC alignment is done
automatically (standard value: “15”), even during analogue
reception.

8.3.2 RGB Alignment

Before alignment, choose “TV MENU” -> “Picture” and set:

• “Brightness” to “50”.

• “Colour” to “50”.

• “Contrast” to “100”.

8.2 Hardware Alignments

There are no hardware alignments foreseen for this chassis,
but below find an overview of the most important DC voltages
on the SSB. These can be used for checking proper functioning
of the DC/DC converters.

Specifications
(V)

Test

Description

+AUDIO_PO
WER

­AUDIO_POW
ER

+12V_DISP FB34 11.4012.0012.60B01A_DC-DC

+8V F401 7.60 8.00 8.40 B06A_Audio Proc.
+5V_STANDBYFB28 4.94 5.20 5.46 B01A_DC-DC

+5V_SW FB40 4.93 5.19 5.45 B01A_DC-DC
+5V_D F403 4.75 5.00 5.25 B06A_Audio Proc.
+5V_AUD F402 4.75 5.00 5.25 B06A_Audio Proc.
+5V_TUN F133 4.75 5.00 5.25 B02_Tuner IF
+3V3_STBY FB13 3.10 3.30 3.50 B01A_DC-DC
+3V3_SW FB11 3.1 3.3 3.5 B01A_DC-DC
+1V8_SW FP06 1.72 1.82 1.92 B01B_DC-DC
+1V2_SW FP03 1.18 1.25 1.31 B01B_DC-DC
+2V5_SW FP05 2.37 2.5 2.63 B01B_DC_DC
+3V3 FJ01 3.2 3.27 3.4 B03E_DVB-

Point

FA16 11.4012.0012.60B06B_Audio

FA14 11.4012.0012.60B06B_Audio

Max
.

DiagramMin. Typ.

MOJO

White Tone Alignment:

• Activate SAM.

• Select “RGB Align.” -> “White Tone” and choose a colour
temperature.

• Use a 100% white screen as input signal and set the
following values:
– All “White point” values initial to “256”.
– All “BlackL Offset” values to “0”.

In case you have a colour analyser:

• Measure with a calibrated (phosphor- independent) colour
analyser (e.g. Minolta CA-210) in the centre of the screen.
Consequently, the measurement needs to be done in a
dark environment.

• Adjust the correct x,y coordinates (while holding one of the
White point registers R, G or B on “256”) by means of
decreasing the value of one or two other white points to the
correct x,y coordinates (see table “White D alignment
values”). Tolerance: dx: ± 0.004, dy: ± 0.004.

• Repeat this step for the other colour Temperatures that
need to be aligned.

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Table 8-1 White D alignment values

Cool

Value

x 0.278 0.289 0.314
y 0.278 0.291 0.319

(11000 K)

Normal
(9000 K)

Warm
(6500 K)

EN 88 LC7.5E LA8.

Alignments

If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).

• Set the RED, GREEN and BLUE default values per
temperature according to the values in the “Tint settings”
table.

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Table 8-2 Tint settings

Alignment 32" 42" 52"

COOL_RED 250 249 255
COOL_GREEN 251 241 254
COOL_BLUE 246 246 238

NORMAL_RED 252 251 255
NORMAL_GREEN 246 238 247
NORMAL_BLUE 228 229 219

WARM_RED 252 246 255
WARM_GREEN 232 222 233
WARM_BLUE 197 199 179

Black Level Offset Alignment

• Activate SAM.

• Select “RGB Align.” -> “BlackL Offset” and choose a colour.

• Set all “BlackL Offset” values to “0”.

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Note: For models with “Pixel Plus”, the “Black Offset” (black
level offset) should NOT be changed in SAM. These offset
values of RGB should be set to “0”, and should NOT be
adjusted. Any adjustment of these values will affect the low
light white balance.

ADC YPbPr Gray Scale Alignment

When the grey scale is not correct, use this alignment:

• Activate SAM.

• Select “NVM Editor”.

• Enter address “26(dec)” (ADR).

• Set value (VAL) to “197(dec) ± 25”.

• Store (STORE) the value.

8.4 Option Settings

8.4.1 Introduction

The microprocessor communicates with a large number of I
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence/absence of these specific
ICs (or functions) is made known by the option codes.

Notes:

• After changing the option(s), save them with the STORE
command.

• The new option setting becomes active after the TV is
switched "off" and "on" again with the mains switch (the
EAROM is then read again).

8.4.2 How To Set Option Codes

When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set all option numbers. You can find the correct option
numbers in table “Option Codes OP1...OP7“ below.

How to Change Options Codes

An option code (or “option byte”) represents eight different
options (bits). When you change these numbers directly, you
can set all options very quickly. All options are controlled via
seven option bytes (OP1... OP7).
Activate SAM and select “Options”. Now you can select the
option byte (OP1.. OP7) with the CURSOR UP/ DOWN keys,
and enter the new 3 digit (decimal) value. For the correct
factory default settings, see the next table “Option codes
OP1...OP7“. For more detailed information, see the second
table “Option codes at bit level“. If an option is set (value “1”), it
represents a certain decimal value.
When all the correct options (bits) are set, the sum of the
decimal values of each Option Byte (OP) will give the option
code.

2

C

Alignments

EN 89LC7.5E LA 8.

Sets 12NC Sets Type

Ambilight

8670 000 32646 32PFL7962D/05

8670 000 32656 42PFL7962D/05

Non Ambilight Group 1

8670 000 32644 32PFL7762D/05

8670 000 32638 42PFL7762D/05

8670 000 32635 52PFL7762D/05

Ambilight Group 1 Group 2

8670 000 32647 32PFL7962D/12

8670 000 32655 42PFL7962D/12

Non Ambilight Group 1

8670 000 32645 32PFL7762D/12

8670 000 32639 42PFL7762D/12

Panel Type

CMO: V315B1-L05 9322 248 65682 069

Reserved Reserved Reserved
Reserved Reserved Reserved

AUO: T420HW01V2 9322 254 10682 110

LPL: LC420WU3-XXXX not available not available

Reserved Reserved Reserved

CMO: V315B1-L05 9322 248 65682 069

Reserved Reserved Reserved
Reserved Reserved Reserved

AUO: T420HW01V2 9322 254 10682 110

LPL: LC420WU3-XXXX not available not available

Reserved Reserved Reserved

Sharp: LK520D3LZ13 9322 254 45682 098

Reserved Reserved Reserved
Reserved Reserved Reserved

CMO: V315B1-L05 9322 248 65682 069

Reserved Reserved Reserved
Reserved Reserved Reserved

AUO: T420HW01V2 9322 254 10682 110

LPL: LC420WU3-XXXX not available not available

Reserved Reserved Reserved

CMO: V315B1-L05 9322 248 65682 069

Reserved Reserved Reserved
Reserved Reserved Reserved

AUO: T420HW01V2 9322 254 10682 110

LPL: LC420WU3-XXXX not available not available

Reserved Reserved Reserved

Panel Code

Panel 12NC (Dec)

1

147 055 042 223 077 242 006

147 055 042 223 077 242 006

1 2 3 4

147 023 042 223 077 242 006

147 023 042 223 077 242 006

147 023 042 223 077 242 005

1 2 3

147 055 042 223 077 242 006

147 055 042 223 077 242 006

1

147 023 042 223 077 242 006

147 023 042 223 077 242 006

Option Byte

Group 1 Group 2
2 3 4

3 4 5 6

2

4

5 6

Group 2

6 7

5

5 6 7

Group 2

H_17370_060.eps

7

7

100807

Figure 8-1 Option codes OP1...OP7

EN 90 LC7.5E LA8.

Alignments

Option Bit Overview

Below find an overview of the Option Codes on bit level.

Table 8-3 Option codes at bit level (OP1-OP4)

Option Byte & Bit Dec. Value Option Name Description

Byte OP1
Bit 7 (MSB) 128 BBE ON = BBE is available OFF = BBE is not available
Bit 6 64 CHINA ON = SW is for CHINA only OFF = SW is for Non-China AP cluster
Bit 5 32 DTV_CHINA ON = DTV_CHINA will be available (Reserved) OFF = DTV_CHINA will not be availab le
Bit 4 16 DTV_EU ON = DTV will be available OFF = DTV will not be available
Bit 3 8 UK_PNP ON = UK PNP is available (for analogue TV only) OFF = UK PNP is not available (for analogue TV

Bit 2 4 VIRGIN_MODE ON = Virgin Mode (PNP) is available OFF = Virgin Mode (PNP) is not available
Bit 1 2 ACI ON = ACI is available OFF = ACI is not available
Bit 0 (LSB) 1 ATS ON = ATS is available OFF = ATS is not available
Total DEC Value
Byte OP2
Bit 7 (MSB) 128 1080P ON = 1080p is available OFF = 1080p is not available
Bit 6 64 LIGHT_SENSOR ON = Light Sensor is available OFF = Light Sensor is not available
Bit 5 32 AMBILIGHT ON = Ambilight Feature will be available OFF = Ambilight Feature will not be available
Bit 4 16 BACKLIGHT_DIMMING ON = Backlight Dimming is available OFF = Backlight Dimming is not available
Bit 3 8 HUE ON = Hue is available OFF = Hue is not available
Bit 2 4 2D3DCF ON = 3D Comb Filter is available OFF = 2D Comb Filter is available
Bit 1 2 WSSB ON = WSS is available OFF = WSS is not available
Bit 0 (LSB) 1 WIDE_SCREEN ON = TV is 16x9 set OFF = TV is 4x3 set
Total DEC Value
Byte OP3
Bit 7 (MSB) 128 CVI1 ON=CVI1 (YPbPr) (For ROW)
Bit 6 64 HDMI3 ON = HDMI3 (rear) is available OFF = HDMI3 (rear) is not available
Bit 5 32 HDMI4 ON = HDMI4 (side) is available OFF = HDMI4 (side) is not available
Bit 4 16 VCHIP ON = VChip is available OFF = VChip is not available
Bit 3 8 VIDEO_TEXT ON = Video-TXT is available OFF = Video-TXT is not available
Bit 2 4 STEREO_DBX ON = Stereo DBX detection is available (LATAM) OFF = Stereo DBX detection is not available
Bit 1 2 STEREO_NICAM_2CS ON = Stereo NICAM 2CS detection is available (EU/AP/China) OFF = Stereo NICAM 2CS

Bit 0 (LSB) 1 LIP_SYNC ON = Lip Sync is available OFF = Lip Sync is not available
Total DEC Value
Byte OP4
Bit 7 (MSB) 128 HDMI2 ON = HDMI2 is available OFF = HDMI2 is not available
Bit 6 64 HDMI1 ON = HDMI1 is available OFF = HDMI1 is not available
Bit 5 32 VGA ON = VGA is available OFF = VGA is not available
Bit 4 16 SVHS3 ON = SVHS3 is available OFF = SVHS3 is not available
Bit 3 8 AV3 ON = AV3 is available OFF = AV3 is not available
Bit 2 4 CVI ON = CVI is available OFF = CVI is not available
Bit 1 2 SVHS2 ON = SVHS2 is available OFF = SVHS2 is not available
Bit 0 (LSB) 1 AV2 ON = AV2 is available OFF = AV2 is not available
Total DEC Value

only)

detection is not available

Alignments

EN 91LC7.5E LA 8.

Table 8-4 Option codes at bit level (OP5-OP7)

Option Byte & Bit Dec. Value Option Name Description

Byte OP5
Bit 7 (MSB) 128 NVM_CHECK ON = NVM (range) checking is availa ble OFF = NVM (range) checking is not availa ble
Bit 6 64 DNM ON = DNM is available OFF = DNM is not available
Bit 5 32 SUBWOOFER ON = Subwoofer is available OFF = Subwoofer is not available
Bit 4 16 MP_AL IGN ON = Using multi-point alignment for Gamma & White Point OFF = Using old way for Gamma (pre-

Bit 3 8 SYS_RECVRY ON = System Recovery is available OFF = System Recovery is not available
Bit 2 4 ED_HD_DNM ON = DNM not available on ED and HD signal OFF = DNM available on ED and HD signal
Bit 1 2 HOTEL ON = Hotel/BDS is available OFF = Hotel/BDS is not available
Bit 0 (LSB) 1 SS_DEMO ON = Split Screen Demo is available OFF = Split Screen Demo is not available
Total DEC Value
Byte OP6
Bit 7 (MSB) 128 BACKLIGHT_BOOST ON = iLAB Backlight boost feature is available OFF = iLAB Backlight boost feature is not available
Bit 6 64 STATIC _DIMMING ON = iLAB Static Dimming feature is available OFF = iLAB Static Dimming feature is not available
Bit 5 32 CEC ON = CEC feature available OFF = CEC feature not available
Bit 4 16 AUTO_HDMI ON = Auto HDMI feature available OFF = Auto HDMI feature not available
Bit 3 8 TUNER PROFILE 0 = ATV_EU_PHILIPS UV1318S/AIH-3 1 = ATV_EU_Panasonic EN57K28G3F2 =
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1

Total DEC Value
Byte OP7
Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 CABINET PROFILE 0 = Cabinet_Profile_26_LCD_ME7 1 = Cabinet_Profile_32_LCD_ME7 2 =
Bit 3 8
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
Total DEC Value

defined) & WP alignment

DTV_EU_PHILIPS TD1316AF/IHP-24 = ATV_AP_PHILIPS UV1316E /AIH-45 = ATV_AP_Tu ner2
(Reserved)6 = ATV_CHINA_ALPS TEDE9-286B7 = ATV_CHINA_Tuner2 (Reserved)8 =
ATV_LATAM_PHILIPS UV1338/AIH-4 9 = ATV_LATAM_Tuner2 (Reserved)10 =
DTV_CHINA_Tuner1 (Reserved)11 = DTV _CHINA_Tuner2 (Reserved)12 = Not Used
(Reserved)13 = Not Used (Reserved)14 = Not Used (Reserved)15 = Not Used (Reserved)

Cabinet_Profile_37_42_ 47 _LC D _ ME73 = Cabinet_Profile_42_50_PDP_ME7 4 =
Cabinet_Profile_26_LCD_ME5P 5 = Cabinet_Profile_52_LCD_ME7 6 =
Cabinet_Profile_Supernova7- 32 = Reserved

EN 92 LC7.5E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

Index of this chapter:

9.1 Introduction

9.2 LCD Power Supply

9.3 DC/DC converters

9.4 Front-End

9.5 DVB-T Signal Processing

9.6 Video Processing

9.7 Audio Processing

9.8 HDMI

9.9 Abbreviation List

9.10 IC Data Sheets

Notes:

•Only new circuits (circuits that are not published recently)
are described.

• Figures can deviate slightly from the actual situation, due
to different set executions.

• For a good understanding of the following circuit
descriptions, please use the Wiring, Block (chapter 6) and
Circuit Diagrams (chapter 7). Where necessary, you will
find a separate drawing for clarification.

9.1.1 SSB Cell Layout

9.1 Introduction

The LC7.5x chassis (development name “LC07S”) is a digital
derivative from the digital LC7.2x chassis (development name
“LC07”). It covers screen sizes of 32" and 42" with a new styling
called “SuperNova” and 52" with existing styling “ME7”.
Some delta’s with respect to the LC7.2x chassis are:

• Video: Video processing is performed by the Trident video
processor SVP WX86 (item 7C01) which outputs a signal
of 1080p (no additional 1080p panel needed), introduces
Digital Natural Motion (DNM) and supports MPEG Artifact
Reduction.

• AmbiLight: FPGA-based AmbiLight controller integrated on
SSB (no additional AmbiLight panel needed).

• Audio: introducing BBE
intelligibility and music performance with an additional
subwoofer.

• HDMI: Additional HDMI connector with on-board switch
has been added.

• On-board DC-DC converters: DC-DC-converters on­board the SSB have been changed.

For (other) features of the chassis, please refer to the
LC7.2E LA Service Manual.

®

technology for increased speech

DC-DC CONVERSION

MOJO

FLASH

MEM

COMMON INTERFACE

PCMCIA

CONTROLLER

SDRAM

VIDEO PROCESSING

HYBRID TUNER

TRIDENT

VIDEO
PROC.

AMBILIGHT

DRIVER

IF

DEMODU

LATOR

SIF SAW

VIF SAW

RENEAS

uP

HDMI

RECEIVER

HDMI

SWITCH

AUDIO CLASS D

Figure 9-1 SSB top view

H_17370_061.eps

100807

Circuit Descriptions, Abbreviation List, and IC Data Sheets

MICRONAS

AUDIO PROC.

FLASH

MEM

EN 93LC7.5E LA 9.

COMMON INTERFACE

9.2 LCD Power Supply

The Power Supply Unit (PSU) in this chassis is a buy-in and is
a black-box for Service. When defective, a new panel must be
ordered and the defective panel must be returned for repair,
unless the main fuse of the unit is broken. Always replace the
fuse with one of the correct specifications! This part is
commonly available in the regular market.

Three different PSU can be used in this chassis:

• 32" sets use a “Delta” PSU

• 42" sets use a “PPS” (Philips Power Solutions) PSU

• 52" sets use a “Delta” PSU.

Figure “Overview of PSU connectivity” shows the connectivity
of the Power Supply Unit with the other panels in the set.

CHANNEL
DECODER

H_17370_062.eps

100807

Figure 9-2 SSB bottom view

All Power Supply Units deliver the following voltages to the
chassis:

• +24 V to the inverters

• +12 V to SSB

• +12 V and -12 V to Audio Supply

• +12 V to Bolt-on Supply (where applicable)

• +5.2 V Standby voltage.

9.3 DC/DC converters

A switch (mounted on-board the SSB) generates the +5 V
(+5V_SW) from the +5 V (+5V_STANDBY) supply voltage.
They deliver the following voltages to the board:

• +3.3 V (+3V3_STBY)

• +5 V (+5V_SW)

• +3.3 V (+3V3_SW)

• +34 V (+VTUN)

• +2.5 V (+2V5_SW)

• +1.8 V (+1V8_SW)

• +1.2 V (+1V2_SW)

Figure 9-3 Overview of PSU connectivity

G_16860_051.eps

310107

An overview can be found in figure “DC-DC converter block
diagram”.

EN 94 LC7.5E LA9.

g

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.5 DVB-T Signal Processing

LCD
only

LD1117DT3

STANDBY

Tuner / Audio

DC_DC
L5973D

UP
CONVERTER

DC_DC
NCP5422
ADR2G

L78L08
ACU

L78M05
CDT

LF18CDT

CEC

Linear re

+5V_STANDBY

+5V_SW (for PDP only)

+12V_DISP

Figure 9-4 DC-DC converter block diagram

+3V3_STBY

+1V8_STBY

+5V_SW

+ 3.3V SW

+VTUN

+2.5V SW

+1V8_SW

+

+8V

5Vtun

H_17370_059.eps

090807

Refer to the LC7.2E LA Service Manual.

9.5.1 Common Interface (CI)

Refer to the LC7.2E LA Service Manual.

9.5.2 Supply

The internal voltages that are used are:

• +5 V (+5V_SW)

• +3.3 V (+3V3_SW)

• +1.2 V (+1V2_SW)

• +1.8 V (+1V8S_SW).

During start-up, it is important that the +1V8S_SW line comes
up earlier than the +3V3_MOJO line. In order to implement this,
a delay circuit is added which is shown in figure “Delay
circuitry”.

+3V3_SW

Figure 9-5 Delay circuitry

H_17370_064.eps

100807

9.4 Front-End

Refer to the LC7.2E LA Service Manual.

Item 7J05 switches the MOSFET “on” and “off” (item 7J04).
The diode (item 6J03) performs a short-circuit protection for the
+3V3 output stage.

9.6 Video Processing

The video processing is completely handled by the Trident SVP
WX68 video processor which features:

• CVBS-input for analogue signals.

• RGB-input for digital (DVB-T) signals.

• Motion and “edge-adaptive” de-interlacing.

• Integrated ADC.

• Built-in 8-bit LVDS transmitter.

• Colour stretch.

• Skin colour enhancement.

• 3D Digital Comb Video Decoder.

• Interlaced and Progressive Scan refresh.

• TeleText decoding.

• OSD and VBI/Closed Caption.

• Digital Natural Motion (DNM).

• MPEG Artifact reduction.

9.6.1 System Overview

Refer to figure “System Overview” for details.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 95LC7.5E LA 9.

System overview

ATV - RF CVBS input

ATV - RF CVBS input

Scart 1 CVBS/RGB/FB input

Scart 1 CVBS/RGB/FB input

Scart 2 CVBS/YC input

Scart 2 CVBS/YC input

Front/Rear CVBS/YC input

Front/Rear CVBS/YC input

DTV - IBO RGB/CVBS input

DTV - IBO RGB/CVBS input

YPbPr input

YPbPr input

HD

HD

HDMI 30 bit input

HDMI 30 bit input

LC07 uses 24 bit inputLC07 uses 24 bit input

Figure 9-6 System Overview

9.6.2 Video Application

Video I/O

Scart1/Ext1

Scart1/Ext1

Scart2/Ext2

Scart2/Ext2

SideAV/Ext3 or

SideAV/Ext3 or

USB Y_IN (Provision)

USB Y_IN (Provision)

Ext4 YC

Ext4 YC

USB C_IN (Provision)

USB C_IN (Provision)

YPbPr/Ext4

YPbPr/Ext4

Side HDMII

Side HDMII

HDMI1

HDMI1
HDMI2

HDMI2

Y_IN

Y_IN
C_IN

C_IN

RF CVBS

RF CVBS

Digital RF

Digital RF
DVB

DVB

SW

SW

1.2V 2.5V 3.3V 5V

1.2V 2.5V 3.3V 5V

SC2_Y_CVBS_IN

SC2_Y_CVBS_IN

FRONT_CVBS_SVHS_Y_IN

FRONT_CVBS_SVHS_Y_IN

SW

SW

Sil9185

Sil9185

Sil9185

Sil9185

WX68

WX68

IBO_R_IN

IBO_R_IN
IBO_G_IN

IBO_G_IN

IBO_B_IN

IBO_B_IN

IBO_CVBS_IN

IBO_CVBS_IN

SC1_R_IN

SC1_R_IN
SC1_G_IN

SC1_G_IN
SC1_B_IN

SC1_B_IN

SC1_CVBS_IN

SC1_CVBS_IN

SC1_FBL_IN

SC1_FBL_IN

SC2_C_IN

SC2_C_IN

SVHS_C_IN

SVHS_C_IN

HD_Y_IN

HD_Y_IN

HD_PB_IN

HD_PB_IN
HD_PR_IN

HD_PR_IN

24/30bit

24/30bit

YCbCr

YCbCr

CVBS1

CVBS1

PC_R

PC_R
PC_G

PC_G
PC_B

PC_B
FS1

FS1

PR_R2

PR_R2
Y_G2

Y_G2
PB_B2

PB_B2
PB_B3

PB_B3
FB1

FB1

PR_R3

PR_R3
FS2

FS2

Y_G3

Y_G3

C

C

Y_G1

Y_G1
PB_B1

PB_B1
PR_R1

PR_R1

Address (0:7)

Address (0:7)

Data (0:7)

Data (0:7)

Address

Address

Data

Data

Trident

Trident

WX68

WX68

2M x 16Bit x 4 Banks

2M x 16Bit x 4 Banks

CVBS_OUT1

CVBS_OUT1

CVBS_OUT2

CVBS_OUT2

Scart 1 CVBS output

Scart 1 CVBS output
Scart 2 CVBS output

Scart 2 CVBS output
BL Dimming PWM output

BL Dimming PWM output
Single/Dual LVDS output

Single/Dual LVDS output

Flash Memory

Flash Memory

Address (0:7)Data (0:19)

Address (0:7)Data (0:19)

Microprocessor

Microprocessor

2x DDRs

2x DDRs

2.5V

2.5V

H_17370_065.eps

100807

Scart1 Ouput

Scart1 Ouput

Scart2 Output

Scart2 Output

H_17370_066.eps

9.7 Audio Processing

Refer to the LC7.2E LA Service Manual.

100807

Figure 9-7 Block diagram video processing

“Block diagram video processing” shows the input and output
signals to and from the Trident Video Processor.

During analogue reception, a CVBS signal coming from the
analogue front-end is fed to the video processor via pin
CVBS1. During digital reception, the video signal coming from
the MPEG decoder (MOJO) is fed to the video processor via
pins FS1, PC_B, PC_G and PC_R.

The video processor also interfaces the SCART1 & 2 input,
side AV, EXT4 (HD where applicable) and HDMI1 & 2 and Side
HDMI input. Through the SCART1 & 2 connectors, a monitor
output is foreseen.

EN 96 LC7.5E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.8 HDMI

9.8.1 Introduction

Refer to the LC7.2E LA Service Manual.

9.8.2 Implementation

The main HDMI receiver which is used is the Sil 9125 (Silicon
Image) third generation HDMI receiver (item 7N01 on the
SSB). In addition, the Sil 9185 HDMI switch (item 7M07) and
Sil 9181 HDMI buffer (item 7Q03) are used for switching the 3
HDMI inputs and buffering to ensure good signal quality. Refer
to figure “HDMI implementation” for details.

Side

HDMI

Input

Rear HDM1 Input 1

Rear HDMI Input 2

Rear HDMI Input 3

Future CEC

9181
HDMI
buffer

9185 HDMI
Switch
Multiplexer

Side Panel

Port A

Port B

9125
HDMI
Main
Receiver

Main SSB Panel

Video

Processor

WX68

H_17370_067.eps

100807

(+5V)

HDMI 1

HPD

HDMI 2

(+5V)

HPD

(+5V)

HDMI 3

HPD

(+5V)

Side

HDMI

HPD

COMP_AUDIO LR
for DVI audio input
only through Side
AV

Input source

RGB, YCbCr 422

or YCbCr444

RESET MUX

DDC Reset

RESET RX BUF

HDMI
switch
Sil9185

HDMI
buffer
Sil9181

(+5V)

(+5V)

(Port A)

HDMI Receiver
Sil9125

(Port B)

I2S

HDMI_Audio LR

I2S DAC

24 to 36 bits

Figure 9-9 HDMI signal flow diagram

HDMI
Receiver
Sil9125

24 to 36 bits YCbCr 444

HDMI DE

HDMI H and V

Microprocessor

YCbCr 444

Audio Processor

Micronas MSP4450P

H_17370_068.eps

Trident WX68
Video

Processor

Trident
WX68

100807

Figure 9-8 HDMI implementation

The implementation supports:

• Three HDMI input connectors to the TV via “HDMI rear” as
“HDMI1”, “HDMI2” and “HDMI3”.

• One HDMI input connector to the TV via “HDMI side” as
“Side HDMI”.

• All EDID is stored in the internal EEPROM which is
integrated inside the Sil9185 multiplexer and Sil9181 buffer
IC.

2

S output for connection to low-cost DACs at a frequency

•I
of 32 to 192 kHz.

• Pre-programmed HDCP keys providing the highest level of
security and simplicity during manufacturing.

When the HDMI receiver Sil9125 receives either RGB or
YCbCr 4:2:2 input signals, it will convert these signals to 24-36­bit YCbCr 4:4:4 output signals. When it receives an YCbCr
4:4:4 input signal, it will just bypass this signal to the Trident
WX68 video processor.

Refer to figures “HDMI signal flow diagram” and “HDMI
interface to Video Processor” for details.

HDMI VCLK

H_17370_069.eps

100807

Figure 9-10 HDMI interface to Video Processor

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 97LC7.5E LA 9.

9.9 Abbreviation List

1080i 1080 visible lines, interlaced
1080p 1080 visible lines, progressive scan
2CS 2 Carrier Sound
2DNR Spatial (2D) Noise Reduction
3DNR Temporal (3D) Noise Reduction
480i 480 visible lines, interlaced
480p 480 visible lines, progressive scan
AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to
remove horizontal black bars; keeping
up the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels
directly from a cable network by

means of a predefined TXT page
ADC analogue to Digital Converter
AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency
AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box
AM Amplitude Modulation
AUO Acer Unipack Optronics
AP Asia Pacific
AR Aspect Ratio: 4 by 3 or 16 by 9
ASD Automatic Standard Detection
AV Audio Video
B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz
BTSC Broadcast Television System

Committee
CAM Conditional Access Module
CBA Circuit Board Assembly (or PWB)
CEC Consumer Electronics Control bus;

remote control bus on HDMI

connections
CI Common Interface; E.g PCMCIA slot

for a CAM in a set top box
CL Constant Level: audio output to

connect with an external amplifier
CLUT Colour Look Up Table
ComPair Computer aided rePair
COFDM Coded Orthogonal Frequency Division

Multiplexing; A multiplexing technique

that distributes the data to be

transmitted over many carriers
CSM Customer Service Mode
CVBS Composite Video Blanking and

Synchronisation
CVBS-MON CVBS monitor signal
CVBS-TER-OUT CVBS terrestrial out
CVI Component Video Input
DAC Digital to analogue Converter
DBE Dynamic Bass Enhancement: extra

low frequency amplification
DDC Display Data Channel; is a part of the

"Plug and Play" feature
DFU Directions For Use: owner's manual
DNR Dynamic Noise Reduction
DRAM Dynamic RAM
DSP Digital Signal Processing
DST Dealer Service Tool: special

(European) remote control designed

for service technicians
DTS Digital Theatre Sound
DVB(T) Digital Video Broadcast; An MPEG2

based standard for transmitting digital

audio and video. T= Terrestrial
DVD Digital Versatile Disc
DVI Digital Visual Interface
DW Double Window

ED Enhanced Definition: 480p, 576p
EDID Extended Display Identification Data

EEPROM Electrically Erasable and

EU EUrope
EXT EXTernal (source), entering the set by

FBL Fast Blanking: DC signal

FBL-TXT Fast Blanking Teletext
FLASH FLASH memory
FM Field Memory / Frequency Modulation
FMR FM Radio
FRC Frame Rate Converter
FTV Flat TeleVision
H H_sync to the module
HD High Definition: 720p, 1080i, 1080p
HDCP High-bandwidth Digital Content

HDMI High Definition Multimedia Interface,

HP Head Phone
I Monochrome TV system. Sound

I2C Integrated IC bus
I2S Integrated IC Sound bus
IBO(Z) Intelligent Bolt On module. Z= Zapper;

IC Integrated Circuit
IF Intermediate Frequency
IR Infra Red
IRQ Interrupt ReQuest
Last Status The settings last chosen by the

LATAM
LC07 Philips chassis name for LCD TV 2007

LCD Liquid Crystal Display
LED Light Emitting Diode
L/L' Monochrome TV system. Sound

LPL LG Philips LCD
LS Loud Speaker
LVDS Low Voltage Differential Signalling,

M/N Monochrome TV system. Sound

MOSFET Metal Oxide Semiconductor Field

MPEG Motion Pictures Experts Group
MSP Multi-standard Sound Processor: ITT

MUTE MUTE Line
NAFTA North American Free Trade

NC Not Connected

(VESA standard)

Programmable Read Only Memory

SCART or by cinches (jacks)

accompanying RGB signals

Protection; A "key" encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a "snow vision"
mode or changed to a low resolution.
For normal content distribution, the
source and the display device must be
enabled for HDCP "software key"
decoding

digital audio and video interface

carrier distance is 6.0 MHz

module for DVB reception.

customer and read and stored in RAM
or in the NVM. They are called at start­up of the set to configure it according
the customers wishes

ATin AMerica

L

project

carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I

data transmission system for high
speed and low EMI communication.

carrier distance is 4.5 MHz

Effect Transistor

sound decoder

Association: Trade agreement
between Canada, USA and Mexico

EN 98 LC7.5E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

NICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital
sound system, used mainly in Europe.

NTSC National Television Standard

Committee. Colour system used
mainly in North America and Japan.
Colour carrier NTSC M/N = 3.579545
MHz, NTSC 4.43 = 4.433619 MHz
(this is a VCR norm, it is not
transmitted off-air)

NVM Non Volatile Memory: IC containing

TV related data (for example, options)
O/C Open Circuit
ON/OFF LED On/Off control signal for the LED
OAD Over the Air Download
OSD On Screen Display
PAL Phase Alternating Line. Colour system

used mainly in Western Europe

(colour carrier = 4.433619 MHz) and

South America (colour carrier PAL M =

3.575612 MHz and PAL N = 3.582056

MHz)
PC Personal Computer
PCB Printed Circuit Board (or PWB)
PDP Plasma Display Panel
PIG Picture In Graphic
PIP Picture In Picture
PLL Phase Locked Loop. Used, for

example, in FST tuning systems. The

customer can directly provide the

desired frequency
PSU Power Supply Unit
PWB Printed Wiring Board (or PCB)
RAM Random Access Memory
RC Remote Control transmitter
RC5 (6) Remote Control system 5 (6), the

signal from the remote control receiver
RF Radio Frequency
RGB Red, Green, and Blue. The primary

colour signals for TV. By mixing levels

of R, G, and B, all colours (Y/C) are

reproduced.
RGBHV Red, Green, Blue, Horizontal sync,

and Vertical sync
ROM Read Only Memory
SAM Service Alignment Mode
SC SandCastle: two-level pulse derived

from sync signals
SC1-OUT SCART output of the MSP audio IC
SC2-OUT SCART output of the MSP audio IC
S/C Short Circuit
SCL Clock signal on I2C bus
SD Standard Definition: 480i, 576i
SDA Data signal on I2C bus
SDI Samsung Display Industry
SDM Service Default Mode
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Memoire.

Colour system used mainly in France

and Eastern Europe. Colour carriers =

4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switch Mode Power Supply
SND SouND
SOPS Self Oscillating Power Supply
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SSB Small Signal Board
STBY Stand-by
SVHS Super Video Home System
SW Sub Woofer / SoftWare / Switch
THD Total Harmonic Distortion
TXT TeleteXT
uP Microprocessor

VL Variable Level out: processed audio

output toward external amplifier
VCR Video Cassette Recorder
VGA Video Graphics Array
WD Watch Dog
WYSIWYR What You See Is What You Record:

record selection that follows main

picture and sound
XTAL Quartz crystal
YPbPr Component video (Y= Luminance, Pb/

Pr= Colour difference signals B-Y and

R-Y, other amplitudes w.r.t. to YUV)
Y/C Video related signals: Y consists of

luminance signal, blanking level and

sync; C consists of colour signal.
Y-OUT Luminance-signal
YUV Baseband component video (Y=

Luminance, U/V= Colour difference

signals)

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10 IC Data Sheets

This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).

9.10.1 Diagram B03A, Type TDA10046AHT (IC7F01), COFDM Channel Decoder

EN 99LC7.5E LA 9.

Block Diagram

ANALOG

VIM

VIP

SACLK

XIN

O

XOUT

SCL_TUN
SDA_TUN

SCL
SDA

SADDR(1:0)

GPIO(3:0)

S
C

A
D
C

Fsamp

PLL

spare inputs

Interface

ΔΣ

I2C

AGC_TUN

Dual AGC

10

Carrier

Recovery

Time

Recovery

ΔΣ

ΔΣ

ACI

Filtering

DSP CORE

AGC_IF

DIGITAL FRONT-END

DEMODULATION

Digital

AGC

AND OFDM

FFT

2K/8K

Coarse

Time

Estimator

Dynamic
TimeShift

CHANNEL ESTIMATION

AND CORRECTION

OFDM Spectrum

CPE

calculation

Partial

Channel

Estimation

Time

Interpolation

Frequency

Interpolation

SYNCHRONISATION

ΔΣ

ΔΣ

ΔΣ

Frequency, Time, Frame Recovery

FFT Window positioning

TPS decoding

Confidence
Calculation

Channel

Correction

MPEG-TS

(parallel)

MPEG-TS

(serial)

MPEG2

Output

Interface

Pin Configuration

Outer

Descrambler RS decoder Demapper

Forney

Deinterleaver

CPT_UNCOR

VBER

Viterbi

Decoder

CBER

Bit

Deinterleaver

CHANNEL DECODER

VDDI18

VSS

SACLK

XIN

VSSA_OSC

XOUT

VDDA18_PLL

VSS

GPIO[2]

GPIO[3]

2725232119 29

S_UNCOR

VDDA18_OSC

5155 53575961

VSS

S_DEN

S_PSYNC

49

S_OCLK

DO[7]

S_DO

DO[6]
VDDE33
DO[5]
VSS
DO[4]
DO[3]
VDDI18
DO[2]
VSS
DO[1]
DO[0]
OCLK
DEN
PSYNC

35 37 39 41 43 45

VDDE33

UNCOR

33 48

AGC_TUN

AGC_IF
SCL_TUN
SDA_TUN

VDDI18

CLR#
SADDR[1]
SADDR[0]

TEST

ENSERI

SCL
VSS
SDA

TRST

VSS

VDD18_PLL_ADC

VIP

VIM

VDDA33_ADC

VSS_PLL_ADC

64

1 16

31311975

VSSA_ADC

VDD33_ADC

TDA10046

TQFP 64

VSS 0 V
VDD 1.8 V

TMS

17 32

TDI

VDD 3.3 V

TCK

TDO

VDDI18

VDDE33

GPIO[0]

GPIO[1]

Confidence

Inner

Frequency

Deinterleaver

G_16860_044.eps

(I,Q)

300107

Figure 9-11 Internal block diagram and pin configuration

EN 100 LC7.5E LA9.

9.10.2 Diagram B03B, Type STV0700 (IC7K00), PCMCIA Controller

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

Block Diagram

Pin Configuration

H_16861_001.eps

060307

Figure 9-12 Internal block diagram and pin configuration