Philips LC7.1L LA, 42PFL3322 Schematic

Page 1
Color Television Chassis
ME5P
ME7
LC7.1L
ME5P
ME7
H_17260_000.eps
Contents Page Contents Page
1. Technical Specifications, Connections, and Chassis Overview 2
2. Safety Instructions, Warnings, and Notes 5
3. Directions for Use 7
4. Mechanical Instructions 8
5. Service Modes, Error Codes, and Fault Finding 15
6. Block Diagrams, Test Point Overview, and
Waveforms
Wiring Diagram 26” (ME5P) 27 Wiring Diagram 32” (ME7) 28 Block Diagram Supply 29 Block Diagram Video 30 Block Diagram Audio 31 Block Diagram Control & Clock Signals 32 Test Point Overview SSB (Overview Bot. Side) 33-37 I2C IC’s Overview 38 Supply Lines Overview 39
7. Circuit Diagrams and PWB Layouts Diagram PWB SSB: DC/DC (B02) 46 57-66 SSB: Tuner & Demodulator (B03A) 47 57-66 SSB: Micro Processor (B04A) 48 57-66 SSB: Video Processor (B04B) 49 57-66 SSB: PNX2015: Audio Processor (B04C) 50 57-66 SSB: YPBPR & Rear IO (B06A) 51 57-66 SSB: I/O Scart 1 & 2 (B06B) 52 57-66 SSB: HDMI (B06C) 53 57-66 SSB: Headphone Amp & Muting (B06D) 54 57-66 SSB: Audio (B07) 55 57-66 SSB: SRP List 56 57-66 Side A/V Panel(D) 67 68 Keyboard Control Panel (ME7) (E) 69 70 Keyboard Control Panel (ME5P) (E) 71 72 Front IR / LED Panel (ME7) (J) 81 82 Front IR / LED Panel (ME5P) (J) 83 84
©
Copyright 2007 Philips Consumer Electronics B.V. Eindhoven, The Netherlands. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.
8. Alignments 85
9. Circuit Descriptions, Abbreviation List, and IC Data Sheets 89 Abbreviation List 95 IC Data Sheets 98
10. Spare Parts List 103
11. Revision List 107
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Published by WS 0767 BU CD Customer Service Printed in the Netherlands Subject to modification EN 3122 785 17260
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EN 2 LC7.1L LA1.
Technical Specifications, Connections, and Chassis Overview

1. Technical Specifications, Connections, and Chassis Overview

Index of this chapter:

1.1 Technical Specifications

1.2 Connection Overview
1.3 Chassis Overview
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
1.1 Technical Specifications

1.1.1 Vision

Display type : LCD Screen size : 26" (66 cm), 16:9
Resolution (H × V pixels) : 1366 × 768 Min. contrast ratio : 3500:1 (26")
Min. light output (cd/m Typ. response time (ms) : 8 Viewing angle (HxV degrees) : 178x178 Tuning system : PLL TV Color systems : PAL M/N
Video playback : PAL
Supported computer formats : 1024 × 768 @ 60, 70,
Supported video formats : 640 × 480i - 1fH
Presets/channels : 125 presets Tuner bands : VHF
2
) : 500
: 32" (81 cm), 16:9
: 4000:1 (32")
:NTSC
:NTSC
75, 85 Hz
: 640 × 480 @ 60, 72,
75, 85 Hz
: 720 × 400 @ 70 Hz
: 720 × 576i - 1fH : 640 × 480p - 2fH : 720 × 576p - 2fH : 1920 × 1080p - 3fH : 1280 × 720p - 3fH
: UHF : S-band : Hyper-band
- Stand-by (W) : < 1
Dimensions (W × H × D cm) : 69.8 × 49.5 × 10.0
(26")
: 80.5 × 54.7 × 11.6
(32")
Weight (kg) : 11.2 (26")
: 14.2 (32")

1.1.2 Sound

Sound systems : SAP Equalizer : 5-bands (26")
Maximum power (W Sound enhancement : Auto Volume Leveller

1.1.3 Miscellaneous

Power supply:
- Mains voltage (V
- Mains frequency (Hz) : 50 / 60
Ambient conditions:
- Temperature range (°C) : +5 to +40
- Maximum humidity : 90% R.H.
Power consumption (values are indicative)
- Normal operation (W) : 120 (26")
):2×10
RMS
) : 100 - 240
AC
: 7-bands (32")
: Virtual Surround
Sound (26")
: Incredible Surround
(32")
: 150 (32")
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Technical Specifications, Connections, and Chassis Overview

1.2 Connection Overview

Figure 1-1 Side and rear I/O connections

H_17260_033.eps
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EN 3LC7.1L LA 1.
Note: The following connector color abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, and Ye= Yellow.

1.2.1 Side Connections

Headphone - Out
Bk - Headphone 32 - 600 ohm / 10 mW rt
Cinch: Video CVBS - In, Audio - In
Rd - Audio R 0.5 V Wh - Audio L 0.5 V Ye - Video CVBS 1 V
/ 10 kohm jq
RMS
/ 10 kohm jq
RMS
/ 75 ohm jq
PP
S-Video (Hosiden): Video Y/C - In
1 -Ground Y Gnd H 2 -Ground C Gnd H 3 - Video Y 1 V 4 - Video C 0.3 V
/ 75 ohm j
PP
P / 75 ohm j
PP

1.2.2 Rear Connections

CVI-1: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 ohm jq
PP
/ 75 ohm jq
PP
/ 75 ohm jq
PP
/ 10 kohm jq
RMS
/ 10 kohm jq
RMS
Aerial - In
- - F-type (US) Coax, 75 ohm D
Service Connector (ComPair)
1 - SDA-S I 2 - SCL-S I
2
C Data (0 - 5 V) jk
2
C Clock (0 - 5 V) j
3 - Ground Gnd H
AV: Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 ohm jq
PP
/ 10 kohm jq
RMS
/ 10 kohm jq
RMS
3 - Video Y 1 V 4 - Video C 0.3 V
/ 75 ohm j
PP
P / 75 ohm j
PP
HDMI 1 & 2: Digital Video, Digital Audio - In
19
18 2
1
E_06532_017.eps
250505
Figure 1-2 HDMI (type A) connector
1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j 4 - D1+ Data channel j 5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - n.c. 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H
CVI-2: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 ohm jq
PP
/ 75 ohm jq
PP
/ 75 ohm jq
PP
/ 10 kohm jq
RMS
/ 10 kohm jq
RMS
AV: S-Video (Hosiden): Video Y/C - In
1 - Ground Y Gnd H 2 - Ground C Gnd H
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EN 4 LC7.1L LA1.
Technical Specifications, Connections, and Chassis Overview
PC - VGA: Video 2fH RGB/YPbPr - In
1
5
6
11
10
15
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Figure 1-3 VGA Connector
1 - Video Red/Pr 0.7 V 2 - Video Green/Y 0.7 V 3 - Video Blue/Pb 0.7 V 4-n.c.
/ 75 ohm j
PP
/ 75 ohm j
PP
/ 75 ohm j
PP
5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H

1.3 Chassis Overview

POWER SUPPLY UNIT
9-+5V 10 - Ground Sync Gnd H
+5 V j
DC
11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j
PC - Mini Jack: Audio - In
Bk - Audio R + L 0.5 V
/ 10 kohm oj
RMS
AV Out - Cinch: Video CVBS - Out, Audio - Out
Rd - Audio R 0.5 V Wh - Audio L 0.5 V Ye - Video CVBS 1 V
/ 10 kohm kq
RMS
/10 kohm kq
RMS
/ 75 ohm kq
PP
CONTROL BOARD
E
SMALL SIGNAL
B
BOARD
POWER SUPPLY UNIT
SMALL SIGNAL
B
BOARD

Figure 1-4 PWB/CBA locations (26" models, ME5P styling)

SIDE I/O PANEL
LED PANEL
H_17260_034.eps
SIDE I/O PANEL
CONTROL BOARD
LED PANEL
H_17260_035.eps
D
J
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D
E
J
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Figure 1-5 PWB/CBA locations (32" models, ME7 styling)

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Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes

EN 5LC7.1L LA 2.
Index of this chapter:

2.1 Safety Instructions

2.2 Warnings

2.3 Notes

2.1 Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).
Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:
Route the wire trees correctly and fix them with the mounted cable clamps.
Check the insulation of the Mains/AC Power lead for external damage.
Check the strain relief of the Mains/AC Power cord for proper function.
Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the "on" position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 Mohm and 12 Mohm.
4. Switch "off" the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any inner parts by the customer.
Service Default Mode (see chapter 5) with a color bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or
61.25 MHz for NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.
Manufactured under license from Dolby Laboratories. “Dolby”, “Pro Logic” and the “double-D symbol”, are trademarks of Dolby Laboratories.

2.3.2 Schematic Notes

All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kohm).
Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ohm).
All capacitor values are given in micro-farads (μ= ×10 nano-farads (n= × 10
Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).
An "asterisk" (*) indicates component usage varies. Refer to the diversity tables for the correct values.
The correct component values are listed in the Spare Parts List. Therefore, always check this list when there is any doubt.

2.3.3 BGA (Ball Grid Array) ICs

Introduction
For more information on how to handle BGA devices, visit this URL: www.atyourservice.ce.philips.com (needs subscription, not available for all regions). After login, select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.
-9
), or pico-farads (p= × 10
-12
-6
),
).
2.2 Warnings
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Available ESD protection equipment: – Complete kit ESD3 (small tablemat, wristband,
connection box, extension cable and earth cable) 4822 310 10671.
– Wristband tester 4822 344 13999.
Be careful during measurements in the high voltage section.
Never replace modules or other components while the unit is switched "on".
When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
2.3 Notes

2.3.1 General

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile, which is coupled to the 12NC. For an overview of these profiles, visit the website www.atyourservice.ce.philips.com (needs subscription, but is not available for all regions). You will find this and more technical information within the “Magazine”, chapter “Repair downloads”. For additional questions please contact your local repair help desk.

2.3.4 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:
Use only lead-free soldering tin Philips SAC305 with order code 0622 149 00106. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.
Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed.
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EN 6 LC7.1L LA2.
To avoid wear-out of tips, switch “off” unused equipment or reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

2.3.5 Alternative BOM identification

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
Safety Instructions, Warnings, and Notes
Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production center (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
MODEL :
PROD.NO:
32PF9968/10
AG 1A0617 000001
MADE IN BELGIUM
220-240V 50/60Hz
~
VHF+S+H+UHF
BJ3.0E LA
S
E_06532_024.eps
Figure 2-1 Serial number (example)

2.3.6 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!
128W
130606

2.3.7 Practical Service Precautions

It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
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3. Directions for Use

You can download this information from the following websites:
http://www.philips.com/support http://www.p4c.philips.com
Directions for Use
EN 7LC7.1L LA 3.
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EN 8 LC7.1L LA4.
Mechanical Instructions

4. Mechanical Instructions

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions
4.3 Assy/Panel Removal
4.4 Set Re-assembly
4.1 Cable Dressing
Notes:
Figures below can deviate slightly from the actual situation, due to the different set executions.
Follow the disassemble instructions in described order. They apply to the 32" sets.

Figure 4-1 Cable dressing (26" models)

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Mechanical Instructions
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Figure 4-2 Cable dressing (32" models)

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Mechanical Instructions

4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:
The buffers from the packaging.
Foam bars (created for Service).
Aluminium service stands (created for Service).
Note: the aluminium service stands can only be used when the set is equipped with so-called “mushrooms”. Otherwise use the original stand that comes with the set.

4.2.1 Foam Bars

Required for sets
1
42"

4.2.2 Aluminium Stands

1
E_06532_039.eps
290507
Figure 4-4 Aluminium stands
The MkII aluminium stands with order code 3122 785 90690, can also be used to do measurements, alignments, and duration tests. The stands can be (dis)mounted quick and easy by means of sliding them in/out the “mushrooms”. The stands are backwards compatible with the earlier models. Important: For (older) FTV sets without these "mushrooms", it is obligatory to use the provided screws, otherwise it is possible to damage the monitor inside!
E_06532_018.eps
171106
Figure 4-3 Foam bars
The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure “Foam bars” for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove
the rear cover.
1. Place the TV set upside down on a table top, using the foam bars (see part “Service Position”).
2. Remove rear cover screws and the stand (if mounted).
3. Remove rear cover.

4.3.2 Keyboard Control Panel

1. Remove the rear cover, as described earlier.
2. Refer to fig. “Keyboard control panel“ below.
3. Remove the T10 parker screws [1].
4. Unplug connector [2].
5. Remove the unit.
6. Release clips [3] and remove the board.
When defective, replace the whole unit.
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Mechanical Instructions
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EN 11LC7.1L LA 4.
1
c
3
2
1
Figure 4-5 Keyboard control panel

4.3.3 Side I/O Panel

1. Remove the rear cover, as described earlier.
2. Unplug connector [a].
3. Remove screws [b] and remove the complete module. One of the screws is T10 tapping, the other one is T10 parker. See fig. “Side I/O module”.
4. Remove T10 parker screw [c]. See fig. “Side I/O panel 1”.
5. Push catch [d] (located at the underside of the bracket) and slide the unit to the right from its bracket [e]. See fig. “Side I/O panel 2”.
6. To remove the PWB from its bracket, you have to lift the catch [f] located on top of the headphone connector. At the same time, slide the PWB out of its bracket [g]. See fig. “Side I/O panel 3”.
When defective, replace the whole unit.
b (1x)
G_16850_007.eps
090207
Figure 4-7 Side I/O panel [1/3] top side
2d
2e
G_16860_075.eps
G_16860_076.eps
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010207
a
Figure 4-6 Side I/O module
b (1x)
G_16860_066.ep
Figure 4-8 Side I/O panel [2/3] bottom side
01020
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Mechanical Instructions

4.3.5 Mid-range Speakers

1. Remove the rear cover, as described earlier.
2. Refer to fig. “Mid-range speakers“ below.
3. Unplug connectors [1].
4. Remove T10 parker screws [2].
g
2
f
Figure 4-9 Side I/O panel [3/3]

4.3.4 IR/LED Panel

1. Remove the rear cover, as described earlier.
2. Refer to fig. “IR/LED panel“ below.
3. Unplug connector(s) [1].
4. Release clip [2] and remove the board. When defective, replace the whole unit.
1
G_16860_077.eps
010207
2 1 2
Figure 4-11 Mid-range speakers

4.3.6 Tweeters

1. Remove the rear cover, as described earlier.
2. Refer to fig. “Tweeters” below.
3. Unplug connectors [1].
4. Remove T10 parker screws [2].
2 1
Figure 4-12 Tweeters
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G_16850_011.eps
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2
Figure 4-10 IR/LED panel
G_16850_009.eps
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Mechanical Instructions
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7
EN 13LC7.1L LA 4.

4.3.7 Small Signal Board (SSB)

1. Remove the rear cover, as described earlier.
2. Refer to figures “SSB removal“ below.
3. Disconnect all cables [a] on the SSB.
4. Remove the T10 tapping screws [b] that hold the SSB. See Figure “SSB removal”.
5. Remove the screws that hold the CINCH and HDMI connectors at the connector panel.
6. Lift the SSB from the set.
a
b (3x)
a
b (3x)
b (2x)
b (2x)
Figure 4-13 SSB removal -1-
H_17260_036.eps
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4.3.8 Main Supply Panel

1. Remove the rear cover, as described earlier.
2. Refer to fig. “Main supply panel“ below.
3. Unplug cables [a].
4. Remove the fixation screws [b].
5. Take the board out (it hinges at the left side).
a
b (3x)
a
a
G_16860_065.ep
01020
b
Figure 4-14 SSB removal -2-
b bb b
H_17260_037.eps
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Figure 4-15 Main supply panel

4.3.9 LCD Panel

1. Remove the rear cover, as described earlier.
2. Refer to fig. “LCD panel“ below.
3. Unplug the connectors on the Main Supply Panel [a] and the LED & IR board [c].
4. Unplug the outer connectors [d] from the mid-range loudspeakers.
5. Do NOT forget to unplug the LVDS connector [e] from the SSB. Important: Be careful, as this is a very fragile connector!
6. Remove T10 parker screw [b] that holds the Side I/O module bracket.
7. Remove T10 parker screws [f] of the central sub-frame.
8. Remove LCD panel fixation screws [g] and lift the complete central sub-frame from the set (incl. the PSU, SSB, and Side I/O boards and wiring).
9. Lift the LCD panel [7] from the front cabinet.
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Mechanical Instructions
f (1x)
g (2x)
e
a
g (2x)
f (3x)
b
d
f (2x)
d
c (1x)
G_16860_067.eps
310107
Figure 4-16 LCD panel [1/2]
7
G_16850_015.eps
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Figure 4-17 LCD panel [2/2]

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.
Notes:
While re-assembling, make sure that all cables are placed and connected in their original position. See figure “Cable dressing”.
Pay special attention not to damage the EMC foams. Ensure that EMC foams are mounted correctly (one is located above the LVDS connector on the display, between the LCD display and the metal sub-frame).
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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

EN 15LC7.1L LA 5.
Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Service Tools
5.4 Error Codes
5.5 The Blinking LED Procedure
5.7 Fault Finding and Repair Tips
5.1 Test Points
In the chassis schematics and layout overviews, the test points (Fxxx) are mentioned. In the schematics, test points are indicated with a rectangular box around “Fxxx” or “Ixxx”, in the layout overviews with a “half-moon” sign. As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. Several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.
Perform measurements under the following conditions:
Service Default Mode.
Video: Color bar signal.
Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
The Service Mode feature is split into four parts:
Service Default Mode (SDM).
Service Alignment Mode (SAM).
Customer Service Mode (CSM) and Digital Customer Service Mode (DCSM).
Computer Aided Repair Mode (ComPair).
SDM and SAM offer features, which can be used by the Service engineer to repair/align a TV set. Some features are:
A pre-defined situation to ensure measurements can be made under uniform conditions (SDM).
Activates the blinking LED procedure for error identification when no picture is available (SDM).
The possibility to overrule software protections when SDM was entered via the Service pins.
Make alignments (e.g. white tone), (de)select options, enter options codes, reset the error buffer (SAM).
Display information (“SDM” or “SAM” indication in upper right corner of screen, error buffer, software version, operating hours, options and option codes, submenus).
The (D)CSM is a Service Mode that can be enabled by the consumer. Instructions on how to enable the CSM can be given by telephone by either the dealer or the P3C (Philips Customer Care Center). The CSM displays diagnosis information, which the customer can forward to the dealer/P3C. In CSM mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
Increase the home repair hit rate
Decrease the number of nuisance calls
Solved customers' problem without home visit
ComPair Mode is used for communication between a computer and a TV on I2C /UART level and can be used by a Service engineer to quickly diagnose the TV set by reading out error codes, read and write in NVMs, communicate with ICs and the uP (PWM, registers, etc.), and by making use of a faultfinding database. It will also be possible to up and download the software of the TV set via I2C with help of ComPair. To do this, ComPair has to be connected to the TV set via the ComPair connector, which will be accessible through the rear of the set (without removing the rear cover).

5.2.1 General

Some items are applicable to all Service Modes or are general. These are listed below.
Life Timer
During the life time cycle of the TV set, a life timer is kept. This life timer counts the normal operation hours, but not the Stand­by hours. The actual value of the life timer is displayed in SDM and CSM in a decimal value. Every two soft-resets should increase the hour by +1. Minimal five digits are displayed.
Software Identification, Version, and Cluster
The software identification, version, and cluster will be shown in the main menu display of SDM, SAM, and CSM. The screen will show: “AAAABCD X.YY”, where:
AAAA is the chassis name: LC71 for analogue range (non-DVB), LC72 for digital range (DVB).
B is the region indication: E= Europe, A= AP/China, U= NAFTA, L= LATAM.
C is the display indication: L= LCD, P= Plasma.
D is the language/features indication: 1= standard, H= 1080p full HD.
X is the main version number: The main version number is updated with a major change of specification (incompatible with the previous software version). Numbering will go from 1 - 9 then from A - Z. – If the main version number changes, the new version
number is written in the NVM
– If the main version number changes, the default
settings are loaded
YY is the sub version number: The sub version number is updated with a minor change (backwards compatible with the previous versions) Numbering will go from 00 - 99. – If the sub version number changes, the new version
number is written in the NVM
– If the NVM is fresh, the software identification, version,
and cluster will be written to NVM
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Display Option Code Selection
When after a display exchange, the display option code is not properly set, it will result in a TV with “no display”. Therefore, it is required to set this display option code after such a repair.
To do so, press the following key sequence on a standard RC transmitter: “062598” directly followed by MENU and “xxx”, where “xxx” is a 3 digit decimal value of the panel type (see first column in table “Display Code Overview” or sticker on the side/ bottom of the cabinet). When the value is properly accepted and stored in NVM, the set will switch to Stand-by, to indicate that the process has been completed successfully.
Display Option
Code
39mm
040
PHILIPS
MODEL:
32PF9968/10
27mm
PROD.SERIAL NO:
AG 1A0620 000001
(CTN Sticker)
E_06532_038.eps
290107
Figure 5-1 Location of Display Option Code sticker
During this algorithm, the NVM-content must be filtered, because several items in the NVM are TV-related and not SSB­related (e.g. Model and Prod. S/N). Therefore, “Model” and “Prod. S/N” data is changed into “See Type Plate”. In case a call centre or consumer reads “See Type Plate” in CSM mode, he needs to look to the side/bottom sticker to identify the set, for further actions.
Table 5-1 Display option code overview
Display option HEX
Display type Brand Size
Vert. resolution
Hor. resolution Type number 12 NC
045 2D LCD LPL 26 768p 1366 LC260WX2-SLB2 9322 234 13682
046 2E LCD LPL 32 768p 1366 LC320W01-SL06 9322 230 03682
067 43 LCD AUO 26 768p 1366 T260XW03V1 9322 249 78682
068 44 LCD CMO 26 768p 1366 V260B1-L03 9322 249 37682
069 45 LCD CMO 32 768p 1366 V315B1 L05 9322 248 65682
070 46 LCD CPT 32 768p 1366 CLLAA320WB02P 9322 245 31682
071 47 LCD LPL 37 768p 1366 LC370WX1-SLB1 9322 246 96682
072 48 LCD AUO 37 768p 1366 T370XW02V5 9322 249 77682
073 49 LCD LPL 42 768p 1366 LC420WX3-SLA1 9322 246 97682
076 4B LCD AUO 42 768p 1366 T420XW01V8 9322 249 10682
083 53 PDP SDI 42 768p 1024 S42AX-YD04(PS-426-PH) 9322 246 76682
085 55 PDP SDI 50 768p 1366 S50HW-YD05(PS-506-PH) 9322 246 81682
091 5B LCD AUO 32 768p 1366 T315XW02VD 9322 249 06682
093 5D LCD LPL 42 1080p 1920 LC420WU2-SLA1 9322 246 84682
103 67 LCD LPL 20 480p 640 LC201V02-SDB1 9322 242 65682
105 69 LCD CMO 19 900p 1440 TPM190A1-L02 9965 000 43654
106 6A LCD AUO 23 768p 1366 T230XW01V3 9322 249 79682
107 6B LCD LPL 42 768p 1366 LC420WX5-SLD1 9322 249 09682
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5.2.2 Service Default Mode (SDM)

Purpose
Set the TV in SDM mode in order to be able to:
Create a predefined setting for measurements to be made.
Override software protections.
Start the blinking LED procedure.
Read the error buffer.
Check the life timer.
Specifications
Table 5-2 SDM default settings
Region Freq. (MHz) Default syst.
Europe (except France),
475.25 PAL B/G
AP-PAL/-Multi
France SECAM L
NAFTA, AP-NTSC 61.25 (channel 3) NTSC M
LATAM PAL M
Set linear video and audio settings to 50 %, but volume to 25 %. Stored user settings are not affected.
All service-unfriendly modes (if present) are disabled, since they interfere with diagnosing/repairing a set. These service unfriendly modes are: – (Sleep) timer. – Blue mute/Wall paper. – Auto switch “off” (when there is no “ident” signal). – Hotel or hospital mode. – Child lock or parental lock (manual or via V-chip). – Skipping, blanking of “Not favorite”, “Skipped” or
“Locked” presets/channels.
– Automatic storing of Personal Preset or Last Status
settings.
– Automatic user menu time-out (menu switches back/
OFF automatically.
– Auto Volume levelling (AVL).
How to Activate
To activate SDM, use one of the following methods:
Press the following key sequence on the remote control transmitter: “062596” directly followed by the MENU button (do not allow the display to time out between entries while keying the sequence).
Short one of the “Service” jumpers on the TV board during cold start (see Figures “Service jumper”). Then press the mains button (remove the short after start-up). Caution: Activating SDM by shorting “Service” jumpers will override the DC speaker protection (error 1), the General I2C error (error 4), and the Trident video processor error (error 5). When doing this, the service-technician must know exactly what he is doing, as it could damage the television set.
On Screen Menu
After activating SDM, the following screen is visible, with SDM in the upper right corner of the screen to indicate that the television is in Service Default Mode.
HHHHH A A A A BC D- X . Y Y ERR XX XX XX XX XX O P X X X X X X X X X X X X X X X X X X
SDM
G_16860_030.ep
26010
Figure 5-3 SDM menu
Menu explanation:
HHHHH: Are the operating hours (in decimal).
AAAABCD-X.YY: See paragraph “Service Modes” -> “General” -> “Software Identification, Version, and Cluster” for the SW name definition.
SDM: The character “SDM” to indicate that the TV set is in Service mode.
ERR: Shows all errors detected since the last time the buffer was erased. Five errors possible.
OP: Used to read-out the option bytes. See “Options” in the Alignments section for a detailed description. Seven codes are possible.
How to Navigate
As this mode is read only, there is not much to navigate. To switch to other modes, use one of the following methods:
Command MENU from the user remote will enter the normal user menu (brightness, contrast, color, etc...) with “SDM” OSD remaining, and pressing MENU key again will return to the last status of SDM again.
To prevent the OSD from interfering with measurements in SDM, command “OSD” (“STATUS” for NAFTA and LATAM) from the user remote will toggle the OSD “on/off” with “SDM” OSD remaining always “on”.
Press the following key sequence on the remote control transmitter: “062596” directly followed by the OSD/i+ button to switch to SAM (do not allow the display to time out between entries while keying the sequence).
How to Exit
Switch the set to STANDBY by pressing the mains button on the remote control transmitter or on the television set. If you switch the television set “off” by removing the mains (i.e., unplugging the television), the television set will remain in SDM when mains is re-applied, and the error buffer is not cleared. The error buffer will only be cleared when the “clear” command is used in the SAM menu.
SDMSDM
H_17270_016.eps
Figure 5-2 Service jumper (SSB component side)
Note:
If the TV is switched “off” by a power interrupt while in SDM, the TV will show up in the last status of SDM menu as soon as the power is supplied again. The error buffer will not be cleared.
In case the set is in Factory mode by accident (with “F” displayed on screen), by pressing and hold “VOL-“ and “CH-” together should leave Factory mode.
060707
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5.2.3 Service Alignment Mode (SAM)

Purpose
To change option settings.
To display / clear the error code buffer.
To perform alignments.
Specifications
Operation hours counter (maximum five digits displayed).
Software version, error codes, and option settings display.
Error buffer clearing.
Option settings.
Software alignments (Tuner, White Tone and Audio).
NVM Editor.
ComPair Mode switching.
Set the screen mode to full screen (all contents on screen are viewable).
How to Activate
To activate SAM, use one of the following methods:
Press the following key sequence on the remote control transmitter: “062596" directly followed by the OSD/ STATUS/INFO/i+ button (it depends on region which button is present on the RC). Do not allow the display to time out between entries while keying the sequence.
Or via ComPair.
After entering SAM, the following screen is visible, with SAM in the upper right corner of the screen to indicate that the television is in Service Alignment Mode.
LLLL L A AAABCD- X. YY ERR XX XX XX XX XX O P X X X X X X X X X X X X X X X X X X
C l e a r > Y e s O p t i o n s > T u n e r > R G B A l i g n > N V M E d i t o r > C o m p a i r > S W E V E N T S >
Figure 5-4 SAM menu
Menu explanation:
1. LLLLL. This represents the run timer. The run timer counts normal operation hours, but does not count Stand-by hours.
2. AAAABCD-X.YY. See paragraph “Service Modes” -> “General” -> “Software Identification, Version, and Cluster” for the SW name definition.
3. SAM. Indication of the Service Alignment Mode.
4. ERR (ERRor buffer). Shows all errors detected since the last time the buffer was erased. Five errors possible.
5. OP (Option Bytes). Used to read-out the option bytes. See “Options” in the Alignments section for a detailed description. Seven codes are possible.
6. Clear. Erases the contents of the error buffer. Select the CLEAR menu item and press the MENU RIGHT key. The content of the error buffer is cleared.
7. Options. Used to set the option bits. See “Options” in the “Alignments” chapter for a detailed description.
8. Tuner. Used to align the tuner. See “Tuner” in the “Alignments” chapter for a detailed description.
9. RGB Align. Used to align the White Tone. See “White Tone” in the “Alignments” chapter for a detailed description.
10. NVM Editor. Can be used to change the NVM data in the television set. See also paragraph “Fault Finding and Repair Tips” further on.
11. ComPaIr. Can be used to switch the television to “In Application Programming” mode (IAP), for software
SAM
G_16860_031.eps
260107
uploading via ComPair. Read paragraph “Service Tools” ­> “ComPair”. Caution: When this mode is selected without ComPair connected, the TV will be blocked. Remove the AC power to reset the TV.
12. SW Events. Only to be used by development to monitor SW behavior during stress test.
How to Navigate
In the SAM menu, select menu items with the MENU UP/ DOWN keys on the remote control transmitter. The selected item will be indicated. When not all menu items fit on the screen, use the MENU UP/DOWN keys to display the next / previous menu items.
With the MENU LEFT/RIGHT keys, it is possible to: – Activate the selected menu item. – Change the value of the selected menu item. – Activate the selected submenu.
When you press the MENU button twice while in top level SAM, the set will switch to the normal user menu (with the SAM mode still active in the background). To return to the SAM menu press the MENU button.
Command “OSD/i+” key from the user remote will toggle the OSD “on/off” with “SAM” OSD remaining always “on”.
Press the following key sequence on the remote control transmitter: “062596” directly followed by the MENU button to switch to SDM (do not allow the display to time out between entries while keying the sequence).
How to Store SAM Settings
To store the settings changed in SAM mode (except the OPTIONS settings), leave the top level SAM menu by using the POWER button on the remote control transmitter or the television set.
How to Exit
Switch the set to STANDBY by pressing the mains button on the remote control transmitter or the television set.
Note:
When the TV is switched “off” by a power interrupt while in SAM, the TV will show up in "normal operation mode" as soon as the power is supplied again. The error buffer will not be cleared.
In case the set is in Factory mode by accident (with “F” displayed on screen), by pressing and hold “VOL-“ and “CH-” together should leave Factory mode.

5.2.4 Customer Service Mode (CSM)

Purpose
The Customer Service Mode shows error codes and information on the TV’s operation settings. A call centre can instruct the customer (by telephone) to enter CSM in order to identify the status of the set. This helps them to diagnose problems and failures in the TV before making a service call. The CSM is a read-only mode; therefore, modifications are not possible in this mode.
Specifications
Ignore “Service unfriendly modes”.
Line number for every line (to make CSM language independent).
Set the screen mode to full screen (all contents on screen are viewable).
After leaving the Customer Service Mode, the original settings are restored.
Possibility to use “CH+” or “CH-” for channel surfing, or enter the specific channel number on the RC.
How to Activate
To activate CSM, press the following key sequence on the remote control transmitter: “123654” (do not allow the display to time out between entries while keying the sequence).
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7
EN 19LC7.1L LA 5.
Upon entering the Customer Service Mode, the following screen will appear:
1 M O D E L : 3 2 P F L 5 5 2 2 D / 1 2 P R O D S / N : AG1A0712123456 3 S W I D : L C 7 1 E L 1 - 1 . x x 4 O P : X X X X X X X X X X X X X X X X X X X X X 5 C O D E S : X X X X X X X X X X 6 S S B : 3 1 39 1 27 12341 7 N V M : X X X X X X X X 8 F l a s h D a t a : X X . X X . X X . X X 9 L I F E T I M E R : L L L L L 1 0 T U N E R : W E A K / G O O D / S T R O N G 1 1 S Y S T E M : P A L / N T S C / S E C A M 1 2 S O U N D : M O N O / S T E R E O / N I C A M
1 3 H D A U : Y E S / N O 1 4 F O R M A T : X X X X X X X X
0
CS M
G_16860_032.ep
21020
Figure 5-5 CSM menu
Menu Explanation
1. MODEL. Type number, e.g. 32PFL5522D/10. (*)
2. PROD S/N. Product serial no., e.g. AG1A0712123456. (*)
3. SW ID. Software cluster and version is displayed.
4. OP. Option code information.
5. CODES. Error buffer contents.
6. SSB. Indication of the SSB factory identification code (12nc). (*)
7. NVM. The NVM software version no.
8. Flash Data. PQ (picture quality) and AQ (audio quality) data version. This is a sub set of the main SW.
9. LIFE TIMER. Operating hours indication.
10. TUNER. Indicates the tuner signal condition: “Weak” when signal falls below threshold value, “Medium” when signal is at mid-range, and “Strong” when signal falls above threshold value.
11. SYSTEM. Gives information about the video system of the selected transmitter (PAL/SECAM/NTSC).
12. SOUND. Gives information about the audio system of the selected transmitter (MONO/STEREO/NICAM).
13. HDAU. HDMI audio stream detection. “YES” means audio stream detected. “NO” means no audio stream present. Only displayed when HDMI source is selected.
14. FORMAT. Gives information about the video format of the selected transmitter (480i/480p/720p/1080i).
15. HD SW ID. Software version of the 1080p full HD module (when present).
16. Reserved.
17. Reserved.
18. Reserved.
(*) If an NVM IC is replaced or initialized, this data must be re­written to the NVM. ComPair will foresee in a possibility to do this.
How to Exit
To exit CSM, use one of the following methods:
Press the MENU button twice, or POWER button on the remote control transmitter.
Press the POWER button on the television set.
3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
Specifications
ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The (new) ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.
How to Connect
This is described in the chassis fault finding database in ComPair.
TO TV
OR
RS232 /UART
G_06532_036.eps
TO
UART SERVICE
CONNECTOR
260107
ComPair II
RC in
Optional
Switch
Power ModeLink/
Activity
HDMI I
TO I2C SERVICE CONNECTOR
Multi
function
RC out
2
C
I
PC
ComPair II Developed by Philips Brugge
Optional power
2
C only
5V DC
Figure 5-6 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!
How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
ComPair32 CD (update): 3122 785 60160.
ComPair interface cable: 3122 785 90004.
ComPair interface extension cable: 3139 131 03791.
ComPair UART interface cable: 3122 785 90630.
Note: If you encounter any problems, contact your local support desk

5.3.2 LVDS Tool

5.3 Service Tools

5.3.1 ComPair

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:
1. ComPair helps you to quickly get an understanding on how to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. You do not have to know anything about I2C or UART commands yourself, because ComPair takes care of this.
Introduction
This Service tool (also called “ComPair Assistant 1”) may help you to identify, in case the TV does not show any picture, whether the Small Signal Board (SSB) or the display of a Flat TV is defective. Thus to determine if LVDS, RGB, and sync signals are okay. Furthermore it is possible to program EPLDs with this tool (Byte blaster). Read the user manual for an explanation of this feature.
When operating, the tool will show a small (scaled) picture on a VGA monitor. Due to a limited memory capacity, it is not possible to increase the size when processing high-resolution
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LVDS signals (> 1280 × 960). Below this resolution, or when a DVI monitor is used, the displayed picture will be full size.
How to Connect
Connections are explained in the user manual, which is packed with the tool. The LVDS cables included in the package cover most chassis. For some chassis, a separate cable must be ordered.
Note: To use the LVDS tool, you must have ComPair release 2004-1 (or later) on your PC (engine version >= 2.2.05). For every TV type number and screen size, one must choose the proper settings via ComPair. The ComPair file will be updated regularly with new introduced chassis information.
How to Order
LVDS tool (incl. two LVDS cables: 31p and 20p, covering chassis BJx.x, EJx.x, FJx.x and LC4.1): 3122 785 90671.
LVDS tool Service Manual: 3122 785 00810.
LVDS cable 20p/DF -> 20p/DF (standard with tool): 3122 785 90731.
LVDS cable 31p/FI -> 31p/FI (standard with tool): 3122 785 90662.
For other chassis, a separate LVDS cable must be ordered. Refer to table “LVDS cable order number” for an overview of all deliverable cables.
Table 5-3 LVDS cable order number
Chassis LVDS cable order number Remarks
BJ2.4 3122 785 90662
BJ2.5 3122 785 90662
BJ3.0 3122 785 90662
BJ3.1 3122 785 90662
EJ2.0 3122 785 90662
EJ3.0 3122 785 90662
EL1.1 3122 785 906621 / 3122 785 90821
FJ3.0 3122 785 90662
FTL2.4 3122 785 90662
LC4.1 3122 785 907311 / 3122 785 90851
LC4.3 3122 785 90821
LC4.31 3122 785 90821
LC4.41 3122 785 90662
LC4.8 3122 785 90662
LC4.9 3122 785 90662
LC7.x tbd
JL2.1 3122 785 90861
1
1
1
1
1
1
1
1,2
1,2
/ 3122 785 90851 only for 26 & 32" sets
1.2
/ 3122 785 90851
1,2
/ 3122 785 90851 MFD variant o nly
Notes
1. Included in LVDS tool package (order code 3122 785 90671).
2. Pins 27 and 28 should be grounded or not connected.

5.4 Error Codes

5.4.1 Introduction

Error codes are required to indicate failures in the TV set. In principle a unique error code is available for every:
Activated protection.
Failing I2C device.
General I2C error.
SDRAM failure.
The last five errors, stored in the NVM, are shown in the Service menu’s. This is called the error buffer. The error code buffer contains all errors detected since the last time the buffer was erased. The buffer is written from left to right. When an error occurs that is not yet in the error code buffer, it is displayed at the left side and all other errors shift one position to the right. An error will be added to the buffer if this error differs from any error in the buffer. The last found error is displayed on the left. An error with a designated error code may never lead to a deadlock situation. This means that it must always be diagnosable (e.g. error buffer via OSD or blinking LED procedure, ComPair to read from the NVM). In case a failure identified by an error code automatically results in other error codes (cause and effect), only the error code of the MAIN failure is displayed.
Example: In case of a failure of the I2C bus (CAUSE), the error code for a “General I2C failure” and “Protection errors” is displayed. The error codes for the single devices (EFFECT) is not displayed. All error codes are stored in the same error buffer (TV’s NVM) except when the NVM itself is defective.

5.4.2 How to Read the Error Buffer

You can read the error buffer in 3 ways:
On screen via the SAM/SDM/CSM (if you have a picture). Example: – ERROR: 0 0 0 0 0 : No errors detected – ERROR: 6 0 0 0 0 : Error code 6 is the last and only
detected error
– ERROR: 9 6 0 0 0 : Error code 6 was detected first and
error code 9 is the last detected (newest) error
Via the blinking LED procedure (when you have no picture). See “The Blinking LED Procedure”.
•Via ComPair.

5.4.3 Error Codes

In case of non-intermittent faults, write down the errors present in the error buffer and clear the error buffer before you begin the repair. This ensures that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error and not the actual cause of the problem (for example, a fault in the protection detection circuitry can also lead to a protection).
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Table 5-4 Error code overview
Error
1)
code
0 No error.
1 DC Protection of
2 +12V protection error. 12V missing or "low".
3 Reserved.
4 General I2C error. note 2
5 Trident Video
6 I2C error while
7 I2C error while
8 I2C error while
9I2C error
10 SDRAM defective. 7204
11 I2C error while
12 I2C error while
13 DVB HW
14 SDRAM defective. 7205
15 Reserved.
16 Reserved.
17 I2C error while
18 I2C error while
19 I2C error while
Description
speakers.
Processor communication error.
communicating with the NVM.
communicating with the Tuner.
communicating with the IF Demodulator.
communicating with the Sound Processor.
communicating with the HDMI IC.
communicating with the MOJO PNX8314.
communication error.
communicating with the FPGA AmbiLight bolt-on module.
communicating with the iBoard processor.
communication with 1080p bolt-on module.
Item nr. Remarks
7202 When Trident IC is
defective, error 10 and 14 might also be reported. Trident communicates via parallel bus, not via the I2C bus. The I2C bus of Trident is only used in ComPair mode.
7315 The TV will not start-
up due to critical data not available from the NVM, but the LED will blink the error code.
1101
7113
7411
7817
7G00 if applicable
if applicable
7F01, 7K00, 7G00
if applicable
if applicable
if applicable

5.4.4 How to Clear the Error Buffer

The error code buffer is cleared in the following cases:
By using the CLEAR command in the SAM menu: – To enter SAM, press the following key sequence on the
remote control transmitter: “062596” directly followed by the OSD/i+ button (do not allow the display to time out between entries while keying the sequence).
– Make sure the menu item CLEAR is selected. Use the
MENU UP/DOWN buttons, if necessary.
– Press the MENU RIGHT button to clear the error
buffer. The text on the right side of the “CLEAR” line will change from “CLEAR?” to “CLEARED”
If the contents of the error buffer have not changed for 50 hours, the error buffer resets automatically.
Note: If you exit SAM by disconnecting the mains from the television set, the error buffer is not reset.
Notes
1. Some of the error codes reported are depending on the option code configurations.
2. This error means: no I2C device is responding to the particular I2C bus. Possible causes: SCL/SDA shorted to GND, SCL shorted to SDA, or SCL/SDA open (at uP pin). The internal bus of the Trident platform should not cause the entire system to halt as such an error can be reported.
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5.5 The Blinking LED Procedure

5.5.1 Introduction

The software is capable of identifying different kinds of errors. Because it is possible that more than one error can occur over time, an error buffer is available, which is capable of storing the last five errors that occurred. This is useful if the OSD is not working properly.
Errors can also be displayed by the blinking LED procedure. The method is to repeatedly let the front LED pulse with as many pulses as the error code number, followed by a period of
1.5 seconds in which the LED is “off”. Then this sequence is repeated.
Example (1): error code 4 will result in four times the sequence LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After this sequence, the LED will be “off” for 1.5 seconds. Any RC5 command terminates the sequence. Error code LED blinking is in red color.
Example (2): the content of the error buffer is “12 9 6 0 0” After entering SDM, the following occurs:
1 long blink of 5 seconds to start the sequence,
12 short blinks followed by a pause of 1.5 seconds,
9 short blinks followed by a pause of 1.5 seconds,
6 short blinks followed by a pause of 1.5 seconds,
1 long blink of 1.5 seconds to finish the sequence,
The sequence starts again with 12 short blinks.

5.5.2 Displaying the Entire Error Buffer

Additionally, the entire error buffer is displayed when Service Mode “SDM” is entered. In case the TV set is in protection or Stand-by: The blinking LED procedure sequence (as in SDM­mode in normal operation) must be triggered by the following RC sequence: “MUTE” “062500” “OK”. In order to avoid confusion with RC5 signal reception blinking, this blinking procedure is terminated when a RC5 command is received.
To erase the error buffer, the RC command “MUTE” “062599
“OK” can be used.

5.6 TV Main Software Upgrade

For instructions on how to upgrade the TV Main software, refer to ComPair.

5.7 Fault Finding and Repair Tips

Notes:
It is assumed that the components are mounted correctly with correct values and no bad solder joints.
Before any fault finding actions, check if the correct options are set.
Table 5-5 NVM editor overview
Hex Dec Description
.ADR 0x000A 10 Existing value
.VAL 0x0000 0 New value
.Store Store?

5.7.2 Load Default NVM Values

It is possible to download default values automatically into the NVM in case a blank NVM is placed or when the NVM first 20 address contents are "FF". After the default values are downloaded, it is possible to start-up and to start aligning the TV set. To initiate a forced default download the following action has to be performed:
1. Switch “off” the TV set with the mains cord disconnected from the wall outlet (it does not matter if this is from "Standby" or "Off" situation).
2. Short-circuit the SDM jumpers on the SSB (keep short circuited).
3. Press “P+” or “CH+” on the local keyboard (and keep it pressed).
4. Reconnect the mains supply to the wall outlet.
5. Release the “P+” or “CH+” when the set is “on” or blue LED is blinking.
When the downloading has completed successfully, the set should be into Standby, i.e. red LED on.
Alternative method (1):
1. Go to SAM.
2. Select NVM Editor.
3. Select ADR (address) to 1 (dec).
4. Change the VAL (value) to 170 (dec).
5. Store the value.
6. Do a hard reset to make sure new default values took place.
Alternative method (2):
It is also possible to upload the default values to the NVM with ComPair in case the SW is changed, the NVM is replaced with a new (empty) one, or when the NVM content is corrupted. After replacing an EEPROM (or with a defective/no EEPROM), default settings should be used to enable the set to start-up and allow the Service Default Mode and Service Alignment Mode to be accessed.

5.7.3 Replacing the SSB flash IC

When you have to replace the SSB flash IC (item 7310), refer to the Spare Parts list for the correct order number. You will then receive a pre-programmed flash IC which contains the boot-loader firmware. Without this firmware, you cannot program the TV with ComPair. Therefore you must order the pre-programmed flash IC, which you will receive when using the order number which is listed in the Spare Parts list.

5.7.4 Start-up/Shut-down Flowcharts

5.7.1 NVM Editor

In some cases, it can be convenient if one directly can change the NVM contents. This can be done with the “NVM Editor” in SAM mode. With this option, single bytes can be changed.
Caution:
Do not change the NVM settings without understanding the function of each setting, because incorrect NVM settings may seriously hamper the correct functioning of the TV set!
Always write down the existing NVM settings, before changing the settings. This will enable you to return to the original settings, if the new settings turn out to be incorrect.
Important note for DVB sets:
When you put a DVB set into Stand-by mode with an RC, the set will go to “Semi Stand-by” mode for 5 minutes. This, to facilitate “Off the Air download” (OAD). If there is no activity within these 5 minutes, the set will switch to Stand­by mode. In “Semi Stand-by” mode, the LCD backlight and Audio Amplifier are turned “off” but other circuits still work as normal. The customer might think the set is in Stand-by. However, in real Stand-by mode, only the uP and the NVM are alive and all other circuits are switched “off”.
If you press the mains switch at the local key board in a DVB set, the set will switch to Stand-by mode.
Page 23
Service Modes, Error Codes, and Fault Finding
On the next pages you will find start-up and shut-down flowcharts, which might be helpful during fault finding. It should be noted, that some events are only related to PDP sets, and therefore not applicable to this LCD chassis.
EN 23LC7.1L LA 5.
Page 24
EN 24 LC7.1L LA5.
Start Up
Service Modes, Error Codes, and Fault Finding
Error 6 - NVM
[Protection]
Standby Normal Mode
(RED LED)
Port Assignment in STANDBY
Wait for RC key or
Wake up event
AC ON
+5VSTBY & +3V3STBY Available (1)
160ms
RENEAS POR by +3VSTBY (2)
STANDBYn = LOW
InitCold Component:
1. Check SDM port.
- If SDM pin = LOW and NVM first 20Byte = 0xFF, reload Software default NVM value.
2. Check Panel port.
- If Panel Pin = LOW and check slave address 0x65 = 0xA5, Enter Panel Mode.
No
Last status is ON?
Yes
Read NVM completed.
STOP I²C activities.
LED = BLUE for Normal mode
LED = RED for Recording mode
BLOCK RC Key
M16C RST_H = HIGH
RST_HDMI = LOW
RST_AUD = LOW RESET_n = LOW
LCD_PWR_ON = LOW
SDI PDP => CTRL_DISP1 = LOW
(1) +5VSTBY to be measured at PDTC114ET (item 7322)
(2) to be measured at pin 4 of BD45275G (item 7312)
User wake up the sets
in DVB recording mode
LCD_PWR_ON = HIGH
(Same function as CTRL-DISP2)
SDI PDP => CTRL_DISP1 = LOW
20ms
1000ms to
1500ms
Wait for 20 ms
Switch ON LVDS Signal
Init. Warm Component
(For software)
Error 2
[Protection]
Notes:
---------
1. LC07 TV software only start communication with IBOZ once receive the INT message from IBOZ.
For DVB Sets only (Semistandby) Recording mode
SDI PDP => CTRL_DISP1 = HIGH
Recording Mode finished
Software Shutdown:
WP for NVM
Port Assignment in STANDBY
Wait for 100ms
Time out = 2000ms
Yes
500ms
100ms
Error 7
Error 8
Error 9
Error 11
1700ms
Error 3
[Protection]
STANDBYn = HIGH
(Same function as CTRL-DISP3)
Wait for 500ms
Is Power Down =
No
BL_ADJ = HIGH (100% Duty Cycle)
HIGH?
Yes
Wait for 100ms
M16C RST_H to LOW
RST_HDMI = HIGH
RST_AUD = HIGH RESET_n = HIGH
Enable Power Down INT
Enable DC_PROT INT
Initialise Tuner
Initialise IF Demodulator, Afric
TDA9886T
Initialise Micronas
Mute Audio
Initialise HDMI, Sil9023
Initialise Trident CX
DPTVInit( )
Initialise FHP Panel
* For FHP PDP Sets only
Initialise Bolt-ON
* For iTV, 1080P, Ambi Light
For LCD:
BL_ON_OFF = HIGH
* BL_ADJ keep 100% for 3000ms
before dimming.
Blank Picture
Picture Mode Setup & Detection
unBlank Picture &
UnMute Audio
No
Error 5 - Trident
[Protection]
Error 10 – SDRAM 7204
[Protection]
Error 14 – SDRAM 7205
[Protection]
Error 17 – AmbiLight
Error 18 – iTV iFace
End
For PDP:
3000ms delay
STANDBYn = LOW
Standby
Normal Mode
Enable RC Key
DVB recording mode
Figure 5-7 Start-up flowchart
Error 19 – 1080P
G_16860_070.eps
220207
Page 25
Service Modes, Error Codes, and Fault Finding
EN 25LC7.1L LA 5.
SEMISTANDBY/ STANDBY
300ms
20ms
Start
Mute Audio
BL_ADJ stop dimming
(PWM duty cycle 100%)
BL_ON_OFF = LOW
Wait 300ms
Switch OFF LVDS
Wait 20ms
LCD_PWR_ON = LOW
For DVB Sets only (Semistandby)
Wait for 3000ms
Except power tact switch
SDI PDP => CTRL_DISP1 = HIGH
Off Air Downloading/ Recording Mode
IBOZ send shut down command
LED = RED No
Software Shutdown:
Standby using
“power key
Yes
LED = NO LED
for Standby soft mode
Disable Power Down INT &
DC_PROT_INT
BL_ADJ = LOW
(PWM duty cycle 0%)
WriteProtect for NVM
Port Assignment in STANDBY
Sets go to standby here
40ms
Total = 360ms
STANDBYn = LOW
Wait for 3000ms
End
Figure 5-8 Semi Stand-by/Stand-by flowchart
Blocking for the next start up to ensure power supply discard properly.
G_16860_071.eps
220207
Page 26
EN 26 LC7.1L LA5.
Service Modes, Error Codes, and Fault Finding
Power Down INT:
AC OFF or Transient INT
Start
Notes:
1. Power Down INT will be based on fall edge triggering
2. +3V3STBY will stay for 15ms, software must perform WriteProtect for NVM within 15ms.
Avoid false trigger
No
End
Poll the Power Down
INT for 5 times
Yes
Mute Audio & VIdeo
WriteProtect for NVM
STANDBYn = LOW
Wait 5000 ms
Re-start: Start up
End
DC_PROT INT
Avoid false trigger
No
End
Error 1
[Protection]
Start
is DC_PROT = LOW
for 3 sec?
Yes
Mute Audio & VIdeo
Log Error Code
WriteProtect for NVM
STANDBYn = LOW
End
G_16860_072.eps
220207
Figure 5-9 Power Down & DC_PROT flowchart
Page 27
Block Diagrams, Test Point Overview, and Waveforms

6. Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram 26” (ME5P)

27LC7.1L LA 6.
WIRING 26”
INVERTER
(STYLING ME5P)
14P
CN2
8521
12P
CN3
14P
CN2
SUPPLY
(1005)
ONLY USED
FOR LPL PANELS
CN6
CN7
9P
8P
8P11
B
1684
3P
8C01
SSB
KEYBOARD CONTROL
E
(1114)
LCD DISPLAY
(1004)
LV DS
30P
8G51
9P
1C01
8P
1P11
30P
1G51
8M20
7P
1M20
11P
1304
8304
4P
1735
8520
INVERTER
ONLY FOR LPL
PANELS
12P
CN3
RIGHT SPEAKER
CN1
2P3
INLET
8735
8002
8191
TUNER
SIDE I/O
D
(1116)
11P
1304
8735
LEFT SPEAKER
8M20
6P
1870
IR/LED/LIGHT
SENSOR
(1112)
J
H_17260_014.eps
040707
Page 28
Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram 32” (ME7)

WIRING 26”- 32” LCD (STYLING ME7)
28LC7.1L LA 6.
LCD DISPLAY
(1004)
LV DS
30P
14P
CN2
INVERTER
8521
14P
CN2
12P
CN3
SUPPLY
(1005)
FOR LPL PANEL
ONLY USED
CN6
CN7
CN1
9P
8P
8C01
8520
8P11
B
8735
SSB
9P
1C01
8P
1P11
8G51
30P
1G51
7P
1M20
11P
1304
4P
1735
12P
CN3
INVERTER
TUNER
SIDE I/O
D
2P3
(1116)
KEYBOARD CONTROL
(1114)
RIGHT SPEAKER
(5200)
INLET
8002
8191
8192(UK)
8304
8735
LEFT SPEAKER
(5200)
11P
8M20
E
3P
1M01
8M01
3P
1M01
290607
1304
7P
1M20
IR/LED/LIGHT
J
SENSOR
(1112)
G_16860_034.eps
Page 29
Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Supply

SUPPLY 26- 32” LCD
29LC7.1L LA 6.
DISPLAY SUPPLY
1. +24V
DISPLAY SUPPLY
1. +24V
2. +24V
3. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
10. GND
11. N.C.
12. N.C.
2. +24V
3. +24V
4. +24V
5. +24V
6. GND
7. GND
8. GND
9. GND
10. GND
11. DIM
12. BL-ON
13. PWM
14. N.C.
CN1
AC-IN
220 - 240V
50/60Hz
CN3
CN6
CONTROL:
1. BL-DIM
2. PG
3. BL-ON
4. GND
5. N.C.
6. PSON
7. N.C.
8. 12V.
CN2
CN7
CONTROL:
1. -12VA
2. +12VA
3. GND
4. 5.2VS
5. 5.2VS
6. 5.2VS
7. GND
8. GND.
9. GND
PRIMARY SIDE
SECONDARY SIDE
G_16860_035.eps
110607
Page 30
Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Video

VIDEO
B03A
TUNER IF & DEMODULATOR
MAIN
TUNER
(ANALOGUE)
+VTUN
IF1
AGC
9
11
1
1160 UV1338/A
IF-TER
2164
3171
30LC7.1L LA 6.
B04B
VIDEO PROCESSOR
7113 TDA9886T/V4
1161
VIF1
7
2
8
RF_AGC
VIF2
B06B
AV-OUT
IO - CINCH
PC
VGA
CVI-1
VIF1
1
2
VIF2
SIF1
23
SIF2
24
TAG C
14
10
5
1
6
Pr
Y
Pb
VIDEO
OUT
SIF AGC
TUNER AGC
1M01
1
2
15
3
11
13
14
1M03
1M04
+5VS
20
SUPPLY
VIF-PLL
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER AND
VIF AGC
3M01
3M03
3M05
5M13
3M18
5M14
3M30
3M32
3M34
7M04 7M05
3M44
DEMODULATOR
SOUND TRAPS
4.5 to 6.5 Mhz
AM-DEMODULATOR
I2C-BUS TRANSCEIVER
SCL
3M14
3M43
SC2_CVBS_MON_OUT
MAD
SDA
CVBS
7114
1104 4M0
EF
CVBS_RF
SC1_R_IN
SC1_G_IN
SC1_B_IN
VGA_H
VGA_V
IBO_R_IN
IBO_G_IN
IBO_B_IN
7211
3 1
5 9
17
15
7202 SVP CX32-LF
169
CVBS1
ANALOG
MUX
189
PR_R2
181
Y_G2
197
PB_B2
2
158
4
AIN_HS
159
8
AIN_VS
6
191
PC_R
183
PC_G
199
PC_B
162
CVBS_OUT2
VIDEO
PROCESSOR
XTALI
XTALO
205
204
1201 14M31
YPBPR & REAR IO
B06A
CVI-2
VIDEO
AV
S VIDEO
D
SIDE FACING SIDE AV
VIDEO
S VIDEO
B06C
HDMI
1
HDMI 1
19
1
HDMI 2
19
1615
1601-2
1601-1
1
2
1302
1301
1
2
1810
10 12
19
1811
1 3 4 6 7
10 12
19
4
3
4
1 3 4 6 7
9
9
3617
3619
7601
3
FRONT_Y_CVBS_IN
7814
7860
3618
RX2+A
RX2-A
RX1+A
RX1-A
RX0+A
RX0-A
RXC+A
RXC-A
RX2+B
RX2-B
RX1+B
RX1-B
RX0+B
RX0-B
RXC+B
RXC-B
3602
3609
FRONT_C_IN
HDMI_HOTPLUG_RESET
HDMI_HOTPLUG_RESET
1304
B04A
MICROPROCESSOR
1304
2
2
4
4
7817 SII9025CTU
52
+
R0X2
51
-
+
­+
­+
-
+
-
+
­+
­+
-
R0X1
R0X0
R0XC
R1X2
R1X1
R1X0
R1XC
ADC
HDMI
(MAIN)
ODCK
HSYNC VSYNC
DE
B04A
B04A
48 47 44 43
40 39
71 70 67 66 63 62
59 58
Pr
Y
Pb
5
5
18 2
18 2
HD_Pr_IN
HD_Y_IN
HD_Pb_IN
SC2_CVBS_Y_IN
SC2_C_IN
FRONT_Y_CVBS_IN_T
FRONT_C_IN_T
HDMI_VCLK
121
HDMI_DE
1
HDMI_H
2
HDMI_V
3
HDMI_Cb(0-7)
HDMI_Y(0-7)
HDMI_Cr(0-7)
190
170
188
180
196
182
192
23
6
4
5
PR_R1
Y_G1
PB_B3
PR_R3
FS2
Y_G3 C
DP-CLK
DP_DE_FLD
DP_HS DP_VS
DIN_PORTD
(24BIT)
MEMORY
8-BIT
SINGLE
LVDS TX
TCLK1
TA1
TB1
TC1
TD1
51
50
49 48
45
44
43 42
41 40
DQ(0-31)
CX_MA
(0-11)
(0-15)
(0-11)
(16-31)
TXCn TXCp
TXCLKn TXCLKp
TXDn TXDp
TXAn
TXAp
TXBn TXBp
7204 IS42S16400D-6TL
DRAM
1Mx16x4
7205 IS42S16400D-6TL
DRAM
1Mx16x4
1210
1211
1212
1213
1214
TXAn1
TXAp1
TXBn1 TXBp1
TXCn1 TXCp1
TXCLKn1 TXCLKp1
TXDn1 TXDp1
VDISP
BOLT_ON_SCL BOLT_ON_SDA
1G51
12 14
18 20
24 26
27 29
1 3 5 7
2
4
6 8
CONNECTOR
TO DISPLAY
LVDS
H_17260_015.eps
040707
Page 31
Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Audio

AUDIO
TUNER IF & DEMODULATOR
B03A
31LC7.1L LA 6.
B04C
AUDIO PROCESSOR
B07
AUDIO
1160 UV1338/A
MAIN
TUNER
+VTUN
AGC
7113 TDA9886T/V4
9
11
IF-TER
IF1
1
1161
2164
2
3171
I0 - CINCH
B06B
D
SIDE FACING SIDE AV
B06A
YPBPR & REAR IO
VIF1
7
VIF2
9
RF_AGC
PC
AUDIO
IN
AV OUT
AUDIO
L/R OUT
CVI-1
AUDIO
L/R IN
SIDE AV
AUDIO
L/R IN
CVI-2
AUDIO
L/R IN
1
2
23
24
14
1M02
1M04
1M03
1302
1615
VIF1
VIF2
SIF1
SIF2
TAG C
SIF AGC
TUNER AGC
2
3 5
SC2_AUDIO _OUT_L
SC2_AUDIO _OUT_R
L_FRONT_IN
R_FRONT_IN
+5VS
20
SUPPLY
VIF-PLL
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER AND
AM-DEMODULATOR
VIF AGC
CVI2_L
CVI2_R
I2C-BUS TRANSCEIVER
3M21
3M23
3M36
3M38
B04A
1304
6
8
3607
3611
DEMODULATOR
SOUND TRAPS
4.5 to 6.5 Mhz
MAD
SCL
SC2_AUDIO _MUTE_L
SC2_AUDIO _MUTE_R
MICROPROCESSOR
1304
6
8
CVBS
SIOMAD
SDA
SC1_AUDIO_IN_L
SC1_AUDIO_IN_R
HDMI_AUDIO_IN_L
HDMI_AUDIO_IN_R
SIDE_AUDIO_IN_L_CON
SIDE_AUDIO_IN_R_CON
COMP_AUDIO_IN_L
COMP_AUDIO_IN_R
12
15
B06D
B06D
SIF
1104 4M0
7411 MSP4450P-VK-E8 000 Y
63
ANA-IN1+
67
XTALIN
68
XTALOUT
1411 18M432
54
SC1-IN-L
55
SC1-IN-R
34
SC2-OUT-L
33
SC2-OUT-R
57
SC5-IN-L
58
SC5-IN-R
48
SC4-IN-L
49
SC4-IN-R
50
SC3-IN-L
51
SC3-IN-R
SOUND
PROCESSOR
DACM-L
DACM-R
SUPPLY
DACA-L
DACA-R
7A01 TDA8932T/N1
27
26
AUDIO_LS_L
AUDIO_LS_R
3A03
3A11
9
1
CLASS D
5A03
27
POWER
6
5
B04A
AMPLIFIER
22
DC_PROT
SIDE FACING SIDE AV
D
7A05÷7A07
DC-DETECTION
5A04
STANDBYn
B04A
ENGAGE
12
13
39
38
40
+5V_D
+8V
+5V_AUD
HEADPHONE AMP & MUTING
B06D
B04A
MICRO
3A19
3A26
1735
1
2
3
4
LEFT
SPEAKER
RIGHT
SPEAKER
PROCESSOR
7901
24
23
HP_AUDIO_OUT_L
HP_AUDIO_OUT_R
ANTI_PLOP
B04A
POWER_DOWN
B04A
B04A B04A
STANDBY
MUTEn
2
1
6
7
MUTING
CONTROL
HP_LOUT
HP_ROUT
SC1_AUDIO _MUTE_R
SC1_AUDIO _MUTE_L
SC2_AUDIO _MUTE_R
SC2_AUDIO _MUTE_L
1304
1304
6
8
6
8
B06B
HEAD_PH_L
HEAD_PH_R
1303
2
3 5
HEADPHONE
B06C
HDMI
1
18 2
19
1
18 2
19
2x HDMI
CONNECTOR
RXxxA
RXxxB
AV
AUDIO
L/R IN
1603
7817 SII9025CTU
+
RX2
-
HDMI
+
RX1
­+
RX0
­+
RXC
-
SCK
WS
SD0
MUTE
86
HDMI_I2S_SCK
85
HDNI_I2S_WS
84
HDMI_I2S_SD
3621
3620
3884
3885
3886
SC2_AUDIO_IN_L
SC2_AUDIO_IN_R
HDMI_SCK
HDNI_WS
HDMI_SD
52
53
17
18
20
SC2-IN-L
SC2-IN-R
CL3
WS3
DA-3
H_17260_016.eps
040707
Page 32
Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Control & Clock Signals

CONTROL & CLOCK SIGNALS
B04B
VIDEO PROCESSOR
B06C
HDMI
1
RXxxA
18 2
19
1
RXxxB
18 2
19
2x HDMI
CONNECTOR
E
KEYBOARD CONTROL
CHANNEL + CHANNEL -
MENU VOLUME ­VOLUME +
ON / OFF
J
IR/LED/LIGHT-SENSOR
+5V2-STBY
7204 IS42S16400D-6TL
DRAM
1Mx16x4
37
38
7205 IS42S16400D-6TL
DRAM
1Mx16x4
37
38
7817 SII9025CTU
+
-
+
-
R0
R1
6010
102
LED1 BLEU
121
(ME7)
DQ(0-31)
CX_MA(0-11)
CX_CLKE
CX_MCLK
HDMI_CCLK
HDMI_Cb(0-7)
HDMI_Y(0-7)
HDMI_Cr(0-7)
3012
7202 SVP CX32-LF
PROCESSOR
112 111
23
KEYBOARD
* ONLY FOR ME5P STYLING
7011
LED1
VIDEO
43
42
55
61
62 63 84 86
56
1684*
OR
1M01
OR
1M01
1M20
32LC7.1L LA 6.
1G51
TXCLKn
TXCLKP
7203 7206
CONTROL
B04A
MICROPROCESSOR
AD(0-7)
A(0-7)
7310 M29W800DT
EPROM
1Mx8
512Kx16
28
11
+3V3_STBY
B07
2
2
2
7
6
26
12
5
RST
ONLY FOR LCD
7312 BD45275G
VOUT
2,3
DC_PROT
AD(0-7)
A(0-19)
CE
CPU_RST
4
(3V3)
CS
WR
RD ALE_EMU RST_H
INT
TXCLKn1
TXCLKP1
BL_ADJUST
7311 M30300SAGP
48
10
PROCESSOR
45
44 42 38
4
17
36
71
MICRO
18
TO DISPLAY
20
(LVDS)
B02
77
76
99
3
13
1301 10M
11
9
8
74
75
72
78
89
HDMI_HOTPLUG_RESET
88
100
CTRL_DISP1_up
CTRL_DISP4_up
LCD_PWR_ON
STANDBYn
7322
STANDBY
ANTI_PLOP
BL_ON_OFF
POWER_DOWN
RST_AUD
ITV_SPI_CLK
ITV_SPI_DATA_IN
ITV_CONNECTOR A
MUTEn
E_PAGE
B04B
B04B
B04B
B04B
B07
B02 B06D
1312
6
5
B06D
B02
B6D
B06D
B06C
B04C
7315 M24C64-WMN6P
EEPROM
7
8Kx8
+5V2-STBY
+5V2_STBY
J
FRONT IR/LED (ME5P)
+5V_STBY
+5V_STBY
3802
3803
3010
6011
7010
7802
LED2
7803
7801
RED
3013
IR
SENSOR
6801-1
LED1
RED
6801-2
LED2
GREEN
IR
SENSOR
7012
7804
3807
3801
LED2
RC
N.C.
PC-TV-LED
LED_SEL
IR
N.C.
1870
4
3
1
6
4
3
1
1M20
7
OR
6
4
3
1
OR
KEYB
LED1
OR
LED2
REMOTE
LIGHT_SENSOR
93
95
19
87
18
92
23
3361
25
DCC_RESET
+3V3_STBY
3366
SAW_SW
4301
B06C
B03A
SDM
H_17260_017.eps
040707
Page 33
Block Diagrams, Test Point Overview, and Waveforms

Test Point Overview SSB (Overview Bot. Side)

F128 D5
F169 E5
F217 A4
F229 A4
F313 B4
F325 A3
F337 A3
F349 B5 F130 D5 F140 D5 F160 F6 F161 E6 F162 E5 F163 D5 F164 D6 F165 F6 F166 F6 F167 E6 F168 E5
F170 E5 F171 D5 F172 E7 F173 E6 F174 D6 F210 A5 F211 C4 F212 A4 F213 A4 F214 A4 F215 A4
F218 A4 F219 A5 F220 A5 F221 A5 F222 A4 F223 A4 F224 A4 F225 A4 F226 A4 F227 A4 F228 A4
F230 A4 F231 C4 F232 B4 F302 B4 F303 C4 F304 A3 F305 B4 F309 B4 F310 A4 F311 B4 F312 A3
F314 A3 F315 B3 F316 A3 F317 B4 F318 A3 F319 B3 F320 A3 F321 B3 F322 A3 F323 A3 F324 B4
F326 B3 F327 A3 F328 B3 F329 B3 F330 A5 F331 B3 F332 B3 F333 B3 F334 B3 F335 B3 F336 A3
F338 B4 F339 B4 F340 B3 F341 B3 F342 F7 F343 F7 F344 F6 F345 C7 F346 B5 F347 B5 F348 B5
F350 B5
F351 A3
F352 A4
F353 B5
F354 B5
F356 A5
F357 A3
F360 A3
F361 B4
F362 A4
F363 B5
F364 B5 F365 B5 F366 B3 F367 A3 F368 A3 F369 B4 F379 A4 F380 A4 F381 B4 F382 A3 F383 A3 F384 A3
Part 1
H_17260_013a.eps
Part 3
H_17260_013c.eps
3139 123 6263.1
F385 A4 F386 A5 F387 A3 F388 D3 F401 B3 F402 C3 F403 C4 F601 F5 F602 F5 F603 E5 F604 F5 F605 F1
F606 F2 F607 F2 F608 F2 F609 F2 F610 F6 F611 F5 F612 E1 F613 E1 F614 F2 F615 E5 F616 F3 F805 E3
F806 E3 F832 F4 F840 F4 F841 F4 F842 F4 F843 F4 F850 F4 F851 E4 F861 F3 F869 F3 F870 F3 F871 F4
F872 F4 F873 F3 F874 F4 F875 E3 F876 E3 F877 E4 F901 B2 F902 B2 F903 B1 F904 B2 F905 C1 F908 C2
F910 B3 FA01 A3 FA02 A2 FA04 A2 FA05 A3 FA06 A3 FA07 A1 FA08 A1 FA09 B3 FA10 A1 FA11 A1 FA12 A3
FA3 2 A 2 FB10 B8 FB11 C4 FB13 C6 FB14 B6 FB15 A8 FB16 D7 FB17 C6 FB21 A8 FB22 A8 FB23 A8 FB24 A8
FB25 A8 FB26 A8 FB27 B6 FB28 A9 FB29 A7 FB30 A8 FB31 A7 FB32 A6 FB33 A6 FB34 A6 FC25 A7 FC26 A6
FC27 A6 FC28 A6 FC29 A6 FL20 A2 FL21 A2 FL22 A2 FL23 A2 FL24 A2 FL25 A2 FL26 A2 FM01 D2 FM02 D2
33LC7.1L LA 6.
FM03 D2 FM04 D2 FM05 E2 FM06 E2 FM07 D3 FM08 D3 FM09 D3 FM10 D3 FM13 C2 FM14 C2 FM15 F9 FM16 F10
FM17 F9 FM18 F10 FM19 F9 FM20 D8 FM21 E1 FM22 D1 FM23 D1 FM24 D9 FM25 D10 FM92 D3 I124 D5 I125 D5
I126 D5 I127 D5 I128 D5 I129 D5 I130 D5 I131 D5 I133 D5 I135 D5 I136 D4 I138 D5 I139 D5 I142 D5
I143 D5 I144 D5 I160 E5 I161 E5 I162 D6 I163 D7 I164 E7 I165 E6 I166 E5 I167 E6 I168 F7 I170 E5
I171 E5
I184 E5 I185 D5 I186 E7 I187 E6 I189 E6 I210 B5 I211 A5 I213 D6 I214 C4 I215 A5 I216 A5 I217 D5
I218 D5 I220 A5 I224 A5 I225 A5 I230 B4 I231 B5 I232 C4 I233 C4 I236 A3 I238 C4 I239 C5 I240 C4
I173 E7 I174 E6 I175 E6 I176 B5 I177 B5 I178 D6 I179 E5 I180 E5 I181 E5 I182 E5 I183 E5
H_17260_013b.eps
Part 4
H_17260_013d.eps
I241 B5 I242 D5 I243 D4 I244 C4 I245 D5 I246 C4 I247 C4 I248 D4 I249 C4 I250 D5 I251 C4 I252 D4
Part 2
I253 D4 I254 C4 I255 B4 I256 B4 I257 C4 I258 D4 I259 C4 I260 D4 I261 C4 I262 C4 I263 C4 I264 D5
I265 D3 I266 D3 I267 D3 I268 D4 I269 D4 I270 D4 I271 D4 I272 D4 I273 D4 I274 D4 I275 C4 I311 A4
I312 A4 I313 A4 I314 A4 I318 A5 I320 A4 I321 A3 I322 B3 I323 A3 I326 A5 I328 A3 I329 A3 I330 A3
I331 A4 I332 A3 I333 A4 I334 A4 I335 A4 I336 A4 I337 A4 I338 A4 I340 A5 I341 B5 I342 B4 I344 B4
I345 C8 I347 B4 I349 B4 I351 B5 I352 A4 I353 A4 I354 B5 I357 A4 I359 B5 I362 A4 I363 B4 I364 A4
I365 B4 I366 B4 I367 B4 I368 B4 I369 B4 I370 B4 I373 A3 I374 A3 I376 A3 I380 A4 I381 B5 I382 B4
I383 B4
I398 A4
I384 B4
I399 D3
I387 B4
I412 C4
I389 A5
I413 C4
I390 A5
I414 B3
I391 A5
I415 B3
I392 B5
I416 B3
I393 A4
I417 B3
I394 A4
I418 B3
I395 A4
I419 B3
I396 B5
I420 C3
I397 A5
I421 C3
H_17260_013.eps
040707
I422 C3 I423 C3 I424 C3 I425 C3 I426 B3 I610 E2 I611 E2 I615 E5 I623 E2 I627 F2 I631 E5 I632 E5
I633 F5 I635 F5 I636 E5 I637 F3 I801 F4 I802 E3 I813 E3 I814 E4 I820 E4 I821 E4 I822 E4 I823 E4 I831 F4 I833 F3 I840 E3 I841 E3 I842 E3 I843 E3 I844 E4 I845 E4 I846 E3 I847 E3 I848 E3 I850 F3 I851 E3 I852 F4 I853 E4 I854 E4 I855 F3 I856 E3 I857 E3 I858 E4 I861 F3 I862 E3 I864 E3 I865 E3 I866 E3 I867 F3 I868 F4 I901 B2 I902 B2 I903 B2 I904 B2 I905 B2 I911 C1 I912 C1 I913 C1 I914 B1 I915 C1 I916 C1 I917 C1 I918 C1 I919 C1 I920 C1 I921 C1 I922 C1 I923 C1 I924 B2 IA01 A2 IA02 A2 IA03 A2 IA04 A2 IA05 A3 IA06 A3 IA07 A2 IA09 B2 IA10 B3 IA11 B3 IA12 B2 IA13 B2 IA14 A2 IA15 A2 IA16 B2 IA17 A1 IA18 A2 IA19 B2 IA20 A2 IA21 A2 IA22 B2 IA23 A2 IA24 A2 IA25 A2 IA26 A2 IA27 A2 IA29 A2 IA30 A2 IA31 A2 IA33 A3 IA34 A2 IA35 A2 IA36 A2 IA37 A1 IA38 B2 IA39 B2 IA40 A2 IA41 A3 IB10 A8 IB11 B8 IB12 A8 IB13 A8 IB14 B6 IB15 B6 IB17 A8 IB18 A6 IB19 A8 IB20 B8 IL20 A2 IL21 A3 IL22 A2 IL23 A2 IM01 E1 IM02 D1 IM03 E2 IM04 D3 IM05 E3 IM06 D2 IM07 D2
IM08 D2 IM09 D2 IM10 D2 IM11 D2 IM14 C2 IM17 C2 IM18 C2 IM19 C2 IM20 C2 IM21 E9 IM22 E10 IM23 E10 IM24 E8 IM25 E9 IM26 E9 IM27 E9 IM28 E9 IM29 E10 IM30 E10 IM31 D9 IM32 D9 IM33 D9 IM34 E9 IM35 E9 IM36 E8 IM37 E10 IM38 E10 IM39 E9 IM40 E10 IM41 E10 IM42 E10 IM43 E10 IM44 E10 IM45 E10 IM46 E9 IM47 E9 IM48 E2 IM49 E2 IM50 E2 IM51 E2 IM52 E2 IM53 E2 IM54 E2 IM55 C2 IM56 D2 IM57 D9 IM58 D9 IM59 D8 IM60 D8 IM61 D8 IM90 D4 IM91 D4 IM93 D4 IM94 D4 IM95 D9 IM96 D10 IM97 E9 U2 F6
Page 34
Block Diagrams, Test Point Overview, and Waveforms
7

Test Point Overview SSB (Part 1 Bottom Side)

34LC7.1L LA 6.
Part 1
H_17260_013a.eps
04070
Page 35
Block Diagrams, Test Point Overview, and Waveforms

Test Point Overview SSB (Part 2 Bottom Side)

35LC7.1L LA 6.
Part 2
H_17260_013b.eps
040707
Page 36
Block Diagrams, Test Point Overview, and Waveforms

Test Point Overview SSB (Part 3 Bottom Side)

Part 3
36LC7.1L LA 6.
H_17260_013c.eps
040707
Page 37
Block Diagrams, Test Point Overview, and Waveforms

Test Point Overview SSB (Part 4 Bottom Side)

37LC7.1L LA 6.
Part 4
H_17260_013d.eps
040707
Page 38

I2C IC’s Overview

I²C
MICROPROCESSOR
B04A
Block Diagrams, Test Point Overview, and Waveforms
+3V3_STBY
+3V3_SW
B06C
HDMI
38LC7.1L LA 6.
AUDIO PROCESSOR
B04C
VIDEO PROCESSOR
B04B
TUNER IF & DEMODULATOR
B03A
SDA2
SCL2
7311
M30300SAGP
MICRO
PROCESSOR
TXD1
RXD1
28
27
29
30
3382
3378
AD(0-7)
A(0-19)
IIC_SDA_up
IIC_SCL_up
7310 M29W800DT
EPROM
1Mx8
512Kx16
PROT
04
3379
3355
3357
56
7315
M24C64
EEPROM
(NVM)
ERR
06
+3V3_STBY
3377
7320
3343
3345
CONNECTOR
3L09
3L08
CONNECTOR
(FOR DEVELOPMENT ONLY)
VIDEO PROCESSOR
B04B
7321
1314
1
2
3
COMPAIR SERVICE
1311
1
3
2
UART
3388
+3V3_SW
3305
CONNECTOR
1
18 2
19
1
18 2
19
2x HDMI
1810
16
15
1811
16
15
+5V_SW
3831
3832
56 7850
M24C02
EEPROM
IIC_SDA
IIC_SCL
DOC_SDAA
DOC_SCLA
DOC_SDAB
DOC_SCLB
+5V_SW
3802
M24C02
EEPROM
B06B
7851-7852
3801
7812-7813
56 7811
IO - CINCH
+3V3_SW
3833
3834
3828
3846
+3V3_SW
31
SII9025CTU
32
29
30
27 28
7817
HDMI
CONTROL
ERR
11
3896
3410
3411
32
7411
MSP4450P
SOUND
PROCESSOR
ERR
09
7204 IS42S16400D
DRAM
1Mx16x4
ERR
10
7205 IS42S16400D
DRAM
1Mx16x4
ERR
14
3212
3215
58 57
7202
SVP CX32-LF
VIDEO
PROCESSOR
ERR
05
3128
3129
10 11
7113
TDA9886T/V4
DEMODULATOR
ERR
08
5166
5164
54
1160
UV1338/A
TUNER
ERR
07
RXD0
TXD0
3354
33
34
BOLT_ON_SDA
3356
BOLT_ON_SCL
3351
3352
3247
3246
ONLY FOR LCD
27
29
(LVDS CONNECTOR)
VGA
CONNECTOR
1M01
10
15
5
1
6
11
1G51
DC_5V
3M11
3M10
12
15
SDA_VGA
SCL_VGA
5
6
7M01
M24C02
EEPROM
256x8
H_17260_018.eps
040707
Page 39
Block Diagrams, Test Point Overview, and Waveforms

Supply Lines Overview

SUPPLY LINES OVERVIEW
DC-DC
B02
CN6
SUPPLY
X406
CN7 X412
1P11
77
88
1CO1
11
22
44
55
66
77
88
99
5B01
B04A
3
5B06
7B01
STEP
DOWN
REG.
7B02
IN OUT
COM
STANDBY
7B04
IN OUT
COM
7B03
3B13
1
7
7B05
6B03
5B03 5B02
+5V_STANDBY
+12V_DISP
-AUDIO_POWER
+AUDIO_POWER
+5V_STANDBY
+3V3_STBY
+5V_SW
+3V3_SW
+VTUN
(34V)
+1V8S_SW
B04a,b,c
B07
B07
B04a
B04a,B06d
B03a,B04c, B06a,b,c,d
B03a,B04a,b, B06c
B03a
B04b
B02
B02
B02
B02
B02
B02
B02
B02
B02
B02
39LC7.1L LA 6.
TUNER IF & DEMODULATOR
B03A
+3V3_SW +3V3_SW
5159
+5V_SW +5V_SW
3133
3134
+VTUN +VTUN
+12V_DISP +12V_DISP
MICROPROCESSOR
B04A
+3V3_STBY
+3V3_SW
+5V_STANDBY
3L10
+12V_DISP +12V_DISP
VIDEO PROCESSOR
B04B
+1V8S_SW +1V8S_SW
3244
3248
5224
5226
5220
5222
5225
5227
+3V3_SW +3V3_SW
5219
5223
5218
+3V3_SW_1
5114
5115
ONLY FOR ANALOG TV
+5VS
+5V_IF
+3V3_STBY
+3V3_SW
+5V_STANDBY
5304
CX_PAVDD1
CX_PAVDD2
CX_PDVDD
CX_PAVDD
CX_AVDD_ADC1
CX_AVDD_ADC2
CX_AVDD_ADC3
CX_AVDD_ADC4
CX_AVDD3_BG_ASS
CX_AVDD3_OUTBUF
CX_AVDD3_ADC1
1M20
AUDIO PROCESSOR
B04C
B02
B06C
B02
B02
5
B02
B02
B02
B02
B03a
1M20
J
IR/LED
+12V_DISP +12V_DISP
4401
+5V_SW +5V_SW
3402
YPBPR & REAR IO
B06A
+5V_SW +5V_SW
IO - CINCH
B06B
+5V_SW +5V_SW
HDMI
1M01
9
1810
18
1811
18
VGA
CONNECTOR
B06C
+3V3_SW +3V3_SW
+5V_SW +5V_SW
+1V8S_SW +1V8S_SW
+3V3_SW_1 +3V3_SW_1
HDMI
CONNECTOR-1
HDMI
CONNECTOR-2
+AUDIO_POWER_+12V_DISP
7410
IN OUT
COM
5401
5402
5801
+5V_D
+5V_AUD
DC_5V
+3V3_SW_2
+5VHDMI_A
+5VHDMI_B
+8V
B02
B02
1M20
B04A
SSB
AUDIO
B07
+AUDIO_POWER +AUDIO_POWER
3A01
5A05
4A01
5A07
-AUDIO_POWER -AUDIO_POWER
3A02
5A06
IR/LED/LIGHT-SENSOR
J
1M20
5
+5V_STANDBY +5V_STANDBY
+AUDIO_POWER_+12V_DISP
RES
VDDA
VDD
VSSA
VSS
B02
5221
+12V_DISP +12V_DISP
7210
7208
CONTROL
5215
5217
LCD_PWR_ON
CX_AVDD3_ADC2
VDISP
B04A
ONLY FOR LCD
1G51
HEADPHONE AMP & MUTING
B06D
B02
B02
1
1G51
F3
1080P
+3V3_STBY +3V3_STBY
+5V_SW +5V_SW
H_17260_019.eps
040707
Page 40
Circuit Diagrams and PWB Layouts
40LC7.1L LA 7.

7. Circuit Diagrams and PWB Layouts

AmbiLight Inverter: FPGA Power & Control

1234567891011
I117
1
DATA
+12V
2110 100n3110 510R
2112
100u 16V
I112
6110
BAS316
12
BOOT
HGATE
PHASE
LGATE
PGND
GND
VFB
NC
16
3 4 5
NC
6
8
11 12 13
NC
14
I127
3134 100K
11
10
14
13
7
6
I118
RES
10n
2117
2125 100n
2126 4u7
3120
1K8
RES
21352134
10n
+3V3-FPGA
3122 3K3
I125
6111 SML-310
I126
7107 BC847BW
3118 4K7
3119 1K0
100n
I130
+12V
I114
I111
2
4
3115
10R
I119
TCK_FPGA
TDO_FPGA
TMS_FPGA
TDI_FPGA
+12V
7
8
7102-1 SI4936ADY
1
I131
5
6
7102-2 SI4936ADY
3
2130 47n
10u
5111
2121 22u
+12V
+3V3-FPGA
F117
1K0
3116
+3V3
+3V3-FPGA
3121 1K0
F125
F128
F131
F133
+3V3
+3V3
100R
3112
3128 100R
100R3129
RES
1K0
3130
3131 100R
7101
LD1117DT25
32
OUTIN
COM 2114 100n
1
7104
LD1117DT12
32
OUTIN
COM
1
+3V3
5106
3u3
1112
1
4
2
27M0
+3V3
I120
2113 220u 25V
DSO751SV
2131 10u
F126
F129
F132
F136
F113
F118
10u
I132
3127
3
47R
1114
F134 F130
NC
9
B7B-PH-SM4-K-TB
RES 2115
47n
2123
1 2 3 4 5 6 7
8
AI 1 AI 1
A
B
C
D
E
F
G
IIC FROM MAIN BAORD ITV
RES 1111
1 2 3 4
56
F114
F115 F116
FROM ITV-A
B4B-PH-SM4-TBT(LF)
CONNECTOR (LC06)
BASIC AL AL WITH 1080P
1111 4120 4121 4122 4123
*
NY N N
Y Y
1113
1
F119
2
F121
3
F120
I2S_SEL1
4 5
F109
I2S_SEL2
F101
GND_DC-DC GND_DC-DC
GND_DC-DC GND_DC-DC
GND_DC-DC
MODULE
7
6
B5B-PH-SM4-TBT(LF)
TO/FROM AMBILIGHT
RES 1117
1 2 3
45
B3B-PH-SM4-TBT(LF)
1115
1 2 3 4 5 6 7
FROM PSU
8 9
10 11
GND_DC-DC
B9B-PH-SM4-TBT(LF)
FOR 37" AND 42" ONL Y
4120 4121
Y Y N
N
+3V3
I123
+12V_BOLT-O N
RES
4111
4113
I133 I134
S_SCL
S_SDA
+3V3
RES
4110
I124
4112
FOR 42" ONLY
4101 4102
4103 4104
3125 100R 3126
+3V3-FPGA
3135 1K5
2132 100p
+15V
GND_DC-DC
4122 4123
100R
3136
1K5
3123 100R
3124
2128 100p
F107
GND_DC-DC GND_DC-DC
GND_DC-DC GND_DC-DC GND_DC-DC
I113 I115
RESRES
2120
2119
100p100p
I116
I121
100R
5107
10u
1116
10
B8B-PH-SM4-TBT(LF)
4124 4125 4126 4127 4128 4129 4130
MAIN_SCL MAIN_SDA
AMBI_SCL
AMBI_SDA
F111
1 2 3 4 5 6 7
TO AMBI-LIGHT
8
9
M_SDA M_SCL
MODULE
GND_DC-DC
+3V3
+12V
5113 30R
I122
2133
10n
2118 100n
3114 100K
2122 100n
7106
7
VCC
Φ
SCD
GND
EPCS4SI8
8
CS_
DCLK
ASDI
4
3
2
DATA
1
6
5
+12V
7103
L6910
I135
12116 100n
I136
4
I137
2
8
nCSO nCSO
DCLK DCLK
ASDO ASDO
DATA0
FPGA POWER & CONTROL
3111
10K
VREF
SS
OSC
EAREF
F122
F123
F124
F127
DATA0
CONF_DONE
F135
I110
9
15
VCC
PGOOD
Monitor
Protection & Ref
OSC
I129
7105
EPCS16SI16N
RES
7
16
15
I128
2111 1n0
3
OCSET
COMP
5
2127 15n 3117 2K7
2129 1n5
2
9
VCC
Φ
SCD
CS
DCLK
ASDI
GND
10
+3V3-FPGA
3132 10K
3133
100K
3139 123 6227.1
1234567891011
2124 100n
CLK_OSC1
F137
(FOR DEVELOPMENT)
SOFTWARE DEBUGGER
H_17260_027.eps
+2V5-PF
+1V2
040707
A
B
C
D
E
F
G
1111 A1 1112 C10 1113 C1 1114 E11 1115 F1 1116 F3 1117 E1 2110 A7 2111 A6 2112 A7 2113 A10 2114 A10 2115 A11 2116 A4 2117 A7 2118 A4 2119 B3 2120 B3 2121 B8 2122 B4 2123 B11 2124 B11 2125 B7 2126 B7 2127 C6 2128 C3 2129 C6 2130 C8 2131 D10 2132 C2 2133 D4 2134 D7 2135 D7 3110 A6 3111 A5 3112 E9 3114 B4 3115 B8 3116 E9 3117 C6 3118 C7 3119 C7 3120 C7 3121 E9 3122 E7 3123 C3 3124 C3 3125 A2 3126 A2 3127 D11 3128 E9 3129 E9 3130 E9 3131 F9 3132 F6 3133 F6 3134 F7 3135 B2 3136 B3 4101 F2 4102 F2 4103 F2 4104 F2 4110 C2 4111 C2 4112 D2 4113 D2 4120 A2 4121 A2 4122 A3 4123 A3 4124 G3 4125 G3 4126 G3 4127 G3 4128 G3 4129 G3 4130 G3 5106 C10 5107 E3 5111 B8 5113 D4 6110 A7 6111 E7 7101 A10 7102-1 A8 7102-2 B8 7103 A5 7104 B10 7105 D6 7106 D4
7107 F7 F101 F2 F107 F3 F109 G1 F111 E3 F113 A11 F114 A1 F115 A1 F116 A1 F117 B8 F118 B11 F119 C1 F120 C1 F121 C1 F122 D5 F123 D5 F124 E5 F125 E9 F126 E10 F127 E5 F128 E9 F129 E10 F130 E10 F131 E9 F132 E10 F133 F9 F134 E10 F135 F5 F136 F10 F137 D11 I110 A5 I111 A7 I112 A7 I113 A3 I114 A7 I115 A3 I116 C3 I117 C6 I118 C7 I119 C8 I120 C10 I121 C3 I122 D4 I123 D2 I124 D2 I125 E7 I126 F7 I127 F6 I128 A6 I129 C6 I130 B7 I131 A8 I132 C10 I133 A2 I134 A2 I135 A5 I136 A5 I137 A5
Page 41
Circuit Diagrams and PWB Layouts
41LC7.1L LA 7.

AmbiLight Inverter: FPGA I/O Banks

1 2 3 4 5 6 7 8 9 10 11 12
7201-3
EP2C5F256C7N
EP2C5F256C7N
EP2C5F256C7N
CONTROL
0 1 2 3
CLK
4 5 6 7
DATA0 DCLK
Φ
BANK2
IO_B9|LVDS21p
IO_A9|LVDS21n IO_D10|LVDS22p IO_D11|LVDS22n IO_A10|LVDS23p IO_B10|LVDS23n IO_G11|LVDS24p IO_G10|LVDS24n IO_A12|LVDS25p IO_B12|LVDS25n IO_A13|LVDS26p IO_B13|LVDS26n IO_C12|LVDS27p IO_C13|LVDS27n IO_A14|LVDS28p IO_B14|LVDS28n
IO_D8|VREFB2N1
IO_C11|VREFB2N0
7201-6
Φ
POWER
GND_PLL1
GND_PLL2
GNDA_PLL
7201- 1
Φ
STATUS
CONFIG
CONF_DONE
MSEL
TCK TMS TDO
CE
TDI
IO_A8 IO_A11 IO_B11
GND
GND
GND
0 1
M13
K12
1 2
L13
J1 3
B9
A9 D10 D11 A10 B10 G11 G10 A12 B12 A13 B13
NC
C12 C13 A14 B14
D8 C11
A8 A11 B11
A1 A16 B15
B2
C8
C9
E8
E9
G8
H14
H3
H8
H9
J1 4
J3
J8
J9
K9
M8 M9
P8
P9 R15
R2
T1
T16
L5
N5
D12
F12
M6
E11
+3V3-FPGA
3210
3211
10K
10K
G5H2
F231
F232
J5
F233
F2 G1 G2
H5
TCK_FPGA TMS_FPGA TDO_FPGA
TDI_FPGA
F234
3212
10K
CONF_DONE
CE
CONFI G
rxo0p rxo0n rxo1p rxo1n rxo2p rxo2n rxo3p rxo3n
+3V3-FPGA
4210
4211
RES
NC
NC
D13 C14 D16 D15 G1 3 G1 2 H11 J1 1 F16 F15 G1 5 G1 6 J1 2 H12 K1 5 K1 6 L16 L15
M11
IO_M11|LVDS43p
L11
IO_L11|LVDS43n
T1 4
IO_T14|LVDS44p
R1 4
IO_R14|LVDS44n
T1 3
IO_T13|LVDS45p
R1 3
IO_R13|LVDS45n
T1 2
IO_T12|LVDS46p
R1 2
IO_R12|LVDS46n
P12
IO_P12|LVDS47p
P13
IO_P13|LVDS47n
K11
IO_K11|LVDS48p
K10
IO_K10|LVDS48n
R1 0
IO_R10|LVDS49p
T1 0
IO_T10|LVDS49n
L9
IO_L9|LVDS50p
L10
IO_L10|LVDS50n
T1 1
IO_T11|LVDS51p
R1 1
IO_R11|LVDS51n
T9
IO_T9|LVDS52p
R9
IO_R9|LVDS52n
T8
IO_T8|LVDS53p
R8
IO_R8|LVDS53n
IO_D13|LVDS29 p IO_C14|LVDS29 n IO_D16|LVDS30 p IO_D15|LVDS30 n IO_G13|LVDS31p IO_G12|LVDS31n IO_H11|LVDS32 p IO_J11|LVDS32n IO_F16|LVDS33p IO_F15|LVDS33n IO_G15|LVDS34p IO_G16|LVDS34n IO_J12|LVDS35p IO_H12|LVDS35 n IO_K15|LVDS36p IO_K16|LVDS36n IO_L16|LVDS37p IO_L15|LVDS37n
EP2C5F256C7N
EP2C5F256C7N
B8 C15 C16 D1 D2 D7 D9
NC
E13 E15 F1 3 F1 4 F5 G4
7201- 4
Φ
BANK3
IO_M16|LVDS38 p IO_M15|LVDS38 n
IO_N16|LVDS39 p IO_N15|LVDS39 n IO_P16|LVDS40 p IO_P15|LVDS40 n IO_N14|LVDS41 p IO_N13|LVDS41 n
IO_M12|LVDS42 p
IO_N12|LVDS42 n IO_M14|VREFB3N1 IO_H13|VREFB3N0
IO_E14|PLL2_OUTp IO_D14|PLL2_OUTn
7201-5
BANK4
IO_E1 6
IO_L1 4
IO_P1 4
Φ
IO_T7|LVDS54p IO_R7|LVDS54n IO_T5|LVDS55p IO_R5|LVDS55n IO_T4|LVDS56p IO_R4|LVDS56n IO_P5|LVDS57p IO_P4|LVDS57n IO_T3|LVDS58p IO_R3|LVDS58n IO_N9|LVDS59p
IO_N10|LVDS59n
IO_L7|LVDS60p IO_L8|LVDS60n
IO_N11|VREFB4N0
IO_N8|VREFB4N1
IO_L12 IO_P11
7201-7
EP2C5F256C7N
Φ
NC
IO_T6
M16 M15
N16 N15 P16 P15 N14 N13
NC
M12
N12
M14
H13 E14 D14 E16
L14
P14
T7 R7 T5 R5 T4 R4 P5 P4
NC T3 R3 N9
N10
L7 L8
N11
NC N8
L12
P11
T6
H6
J1 0
J6
K13
K6 K7 K8
NCNC
NC
N3 N4 N6 N7 P6 R6
AI 2 AI 2
A
B
C
D
E
+2V5-PF
F
+2V5-PF
FPGA I/O BANKS
ASDO nCSO
MAIN_SDA
+3V3
TPo(4) AMBI_SDA TPi(1 ) TPi(2 )
5210
30 R
5211
30 R
5212
30 R
F21 0
F21 1
F21 2
2218
1u 0
222 0 4u 7
2226
4u 7
I213
I216 I218
I221 I222 I224
I228 I230
2219 10n
2227 10n
NC
NC
EMC
2247
100p
C3 F4 P1 P2 N1 N2 L1 L2 K4 K5 K1 K2 E1 E2 D3 D4
10n
10n
EP2C5F256C7 N
IO_C3|ASDO IO_F4|CSO_ IO_P1|LVDS0p IO_P2|LVDS0n IO_N1|LVDS1p IO_N2|LVDS1n IO_L1|LVDS2p IO_L2|LVDS2n IO_K4|LVDS3p IO_K5|LVDS3n IO_K1|LVDS4n IO_K2|LVDS4p IO_E1|LVDS5p IO_E2|LVDS5n IO_D3|LVDS6p IO_D4|LVDS6n
222 2222 1 10n
2229222 8 10n
7201- 2
Φ
BANK1
IO_E3|LVDS7p IO_E4|LVDS7n IO_D5|LVDS8p IO_E5|LVDS8n IO_C1|LVDS9p IO_C2|LVDS9n
IO_L4|PLL1_OUTp
IO_M4|PLL1_OUTn
IO_F3|VREFB1N0
IO_J4|VREFB1N1
IO_L3 IO_M1 IO_M2 IO_M3
IO_P3
2214
10n
2224
2223 10 n
2231
2230
10n
10 n
2225 10 n10n
2232 10 n
10 n
C4
IO_C4|LVDS10 p
C5
IO_C5|LVDS10 n
G7
IO_G7|LVDS11p
G6
IO_G6|LVDS11n
F9
IO_F9|LVDS12p
F1 0
IO_F10|LVDS12 n
E6
IO_E6|LVDS13 p
F6
IO_F6|LVDS13n
A3
IO_A3|LVDS14 p
B3
NC
E3
I210
E4
I211
D5
I212
E5
I214
C1
I215
C2
L4
M4
I220
F3
J4
NC
L3
I223
M1
I225
M2
I217
M3
P3
22162215
2210
10 n
2217
10n10n
221 1
10 n
TPo(3)
TPi(3 ) TPo(0) TPo(1)
AMBI_SCL
2212
10n
2213
10n
+3V3-FPGA
+2V5out-FPGA
+3V3-FPGA
+2V5in-FPGA
+1V2-FPGA
+2V5out-FPGA
+1V2-PL L
+2V5in-FPGA
IO_B3|LVDS14 n
A4
IO_A4|LVDS15 p
B4
IO_B4|LVDS15 n
A5
IO_A5|LVDS16 p
B5
IO_B5|LVDS16 n
C6
IO_C6|LVDS17 p
D6
IO_D6|LVDS17 n
A6
IO_A6|LVDS18 p
B6
IO_B6|LVDS18 n
F8
IO_F8|LVDS19p
F7
IO_F7|LVDS19n
B7
IO_B7|LVDS20 p
A7
IO_A7|LVDS20 n
B1 G3 K3 R1
A15 A2 C10 C7 E10 E7
B16 G14 K14 R16
M10 M7 P10 P7 T15 T2
G9 H10 H7 J7
M5
1
E12
2
L6
1
F11
2
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCINT
VCCA_PLL
VCCD_PLL
G
+1V2
5215
30 R
2240 47 u
4V
22432242
2244
10 n
10n
2245
10n
10 n
H
F21 4
5213
30R
F213
2233
1u 0
2234 10 n
2235
2236 10 n10n
2237 10n
5214
30 R
I
+1V2-FPGA
+1V2-PLL
CLK_OSC1 MAIN_SCL
rxoclkp rxoclkn rxeclkp rxeclkn
DATA0 DCLK
EMC 2246
100p
H1 J2 J1
NC
H16 H15 J15 J16
F1 H4
rxe0p rxe0n rxe1p rxe1n rxe2p rxe2n
rxe3p rxe3n
A
B
C
D
E
F
G
H
I
2210 F4 2211 F4 2212 F4 2213 F5 2214 E3 2215 E3 2216 E4 2217 E4 2218 E2 2219 F2 2220 F2 2221 F2 2222 F3 2223 F3 2224 F3 2225 F3 2226 G2 2227 G2 2228 G2 2229 G3 2230 G3 2231 G3 2232 G3 2233 I2 2234 I3 2235 I3 2236 I3 2237 I3 2240 H2 2242 H3 2243 H3 2244 H3 2245 H3 2246 I6 2247 C2 3210 H8 3211 H9 3212 I9 4210 H10 4211 I10 5210 E1 5211 F1 5212 G1 5213 H2 5214 H1 5215 G1 7201-1 H7 7201-2 B3 7201-3 A7 7201-4 A11 7201-5 D11 7201-6 D7 7201-7 H11 F210 E1 F211 F1 F212 G1 F213 H2 F214 H1 F231 H8 F232 H8 F233 H8 F234 H9 I210 B4 I211 B4 I212 B4 I213 B2 I214 B4 I215 B4 I216 C2 I217 C4 I218 C2 I220 C4 I221 C2 I222 C2 I223 C4 I224 C2 I225 C4 I228 C2 I230 C2
3139 123 6227.1
1 2 3 4 5 6 7 8 9 10 11 12
H_17260_028.eps
040707
Page 42
Circuit Diagrams and PWB Layouts

AmbiLight Inverter: FPGA LVDS

42LC7.1L LA 7.
123456789
AI 3 AI 3
A
B
C
D
E
F
3139 123 6227.1
rxe0n
rxe0p
rxe1n
rxe1p
rxe2n
rxe2p
rxeclkn
rxeclkp
rxe3n
rxe3p M_SCL
M_SDA
rxo0n
rxo0p
rxo1n
rxo1p
rxo2n
rxo2p
rxoclkn
rxoclkp
rxo3n
rxo3p
3325 100R
3326 100R
3327 100R
3328 100R
3329
100R
3320
3321
3322
3323
3324
3340
22R
3341
22R
3342
22R
3343
22R
3344
22R
3345
22R
3346
22R
3347
22R
3348
22R
3349
22R
100R
100R
100R
100R
100R
4303 4301
4305
4307
4309
4302
4306 4304
4308
4310
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
EMC
2323
22n
TO LCD PANEL
F310 F311
F313
F316
F317 F341 F342
F318
F321
F343
F323 F345 F346 F347
F327
F328
F348
F349
F350
F333
F334
F337
F340
F351
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
0-1453230-3
FPGA LVDS
1311
32
31
+VDISP
F314
1320
DLW21S
1321
DLW21S
1322
DLW21S
1323
DLW21S
1324
DLW21S
1325
DLW21S
1326
DLW21S
1327
DLW21S
1328
DLW21S
1329
DLW21S
BASIC AL AL WITH 1080P
4301 4302 4303 4304
4305 4306 4307 4308 4309 4310
Y Y Y
Y Y
Y Y
Y Y Y
TO / FROM SSB
1310
31 32
0-1453230-3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
F352
F353
F354
F355 F356 F357
F358 F359 F360 F361 F362 F363 F364
F365 F366 F367 F368 F369
F370
F371
N N N
N N
N N
N N N
123456789
EMC
2322
22n
M_SCL
M_SDA
H_17260_029.eps
040707
A
B
C
D
E
F
1310 A9 1311 A4 1320 A6 1321 A6 1322 B6 1323 B6 1324 B6 1325 C6 1326 C6 1327 D6 1328 D6 1329 E6 2322 A9 2323 A3 3320 A1 3321 A1 3322 B1 3323 B1 3324 C1 3325 C1 3326 D1 3327 E1 3328 E1 3329 F1 3330 A2 3331 A2 3332 A2 3333 A2 3334 B2 3335 B2 3336 B2 3337 B2 3338 B2 3339 C2 3340 C1 3341 C1 3342 D1 3343 D1 3344 D1 3345 E1 3346 E1 3347 F1 3348 F1 3349 F1 4301 C2 4302 C2 4303 D2 4304 D2 4305 E2 4306 E2 4307 F2 4308 F2 4309 F2 4310 F2 F310 A4 F311 A4 F313 A4 F314 A5 F316 A4 F317 A4 F318 B4 F321 B4 F323 B4 F327 B4 F328 B4 F333 B4 F334 C4 F337 C4 F340 C4 F341 A4 F342 A4 F343 B4 F345 B4 F346 B4 F347 B4 F348 B4 F349 B4 F350 B4 F351 C4
F352 A9 F353 A9 F354 A9 F355 A8 F356 A8 F357 A8 F358 B8 F359 B8 F360 B8 F361 B8 F362 B8 F363 B8 F364 B8 F365 B8 F366 B8 F367 B8 F368 B8 F369 B8 F370 C9 F371 C9
Page 43
Circuit Diagrams and PWB Layouts

AmbiLight Inverter: DC/DC (32” Only)

2501 C2 2502 B9 2503 C6
2504 B8 2505 C2 2506 B6
2507 C7 2508 B8 2509 B8
2510 C3 2511 B9 2512 C2
3501 B1 3502 B1 3503 B1
3504 B1 3505 B3 3506 D3
123456789
3507 D4 3508 D5 3509 C6
3510 C6 3511 B2 3512 B2
3513 B2 3514 B2 3516 C6
3517 B2 3518 B3 3520 B1
3521 B1 3522 C1 4501 B6
5501 A4 5502 C1 6501 A8
43LC7.1L LA 7.
6502 B6 6503 C7 6504 A4
6505 B9 7501 B4 7502 B7
7503 C6 F502 B3 F503 C3
F504 B5 F505 B5 F506 B5
F507 C5 F508 A8 I501 B3
I502 C3 I503 D4 I504 B6
I505 A7 I506 B7 I507 C6
AI 4 AI 4
DC/DC AMBI (ONLY FOR 32")
A
B
C
3501 1R0
+12V_BOLT-ON
12V
3502 3503
1R0
RES RES RES
3520 3521 3522
1R0
3504
1R0
10u5502
3511
3512
1R0
1R0
12V
2512
470u 25V
GND_DC-DC
3513
3514
1R0 1R0
2501
470u
25V
GND_DC-DC
3517 3518 1R0
2505
1u0
GND_DC-DC
1R0
EMC 2510
100n
GND_DC-DC
3505
4R7
I501
F502
I502
F503
6
7501 MC34063AD
DCOL8
IS7
VCC
CIN_NEG5
IPK
OSC
6504
RES
5501
10u
Q
S
R
REFERENCE REGULATOR
SWC
SWE
TIMC
GND
F504
1
F505
2
F506
3
GND_DC-DC
F507
4
GND_DC-DC
+12V_BOLT-ON
4501
2503 82p
3509
680R
I504
RES
2506
6502
BAS316
3510 680R
I505
I506
3516
2R2
I507
7503 BC857B
PHD63NQ03LT
RES
2507
GND_DC-DC
6503 BZX384-C10
7502
1
GND_DC-DC
2504 100n
F508
2502
GND_DC-DC
25V470u
2511
470u 25V
GND_DC-DC
6501
SS36
RES
2508
2
3
RES 2509
GND_DC-DC
GND_DC-DC
+15V
6505
BZX384-C18
GND_DC-DC
A
B
C
D
3139 123 6227.1
3506
1%
2K2
GND_DC-DC
3507
24K 1%
I503
3508
1K2
GND_DC-DC
GND_DC-DC
GND_DC-DC
GND_DC-DC
H_17260_030.eps
040707
D
123456789
Page 44
Circuit Diagrams and PWB Layouts

Layout AmbiLight Inverter Panel (Top Side)

1111 B3 1112 A3 1113 B2 1114 A5 1115 A1 1116 B1
1117 A3 1310 B4 1311 A4 1320 B4 1321 B4 1322 B4
1323 B4 1324 B4 1325 B4 1326 B4 1327 B4 1328 B3
1329 B3 2110 A3 2111 A3 2112 B2 2113 A3 2116 A3
2117 A3 2118 A3 2119 B3 2120 B3 2122 A3 2125 A3
2126 A3 2127 A3 2128 B3 2129 A3 2130 B3 2131 A3
2132 B3 2240 A3 2246 A3 2247 A3 2322 B4 2323 B4
2501 A2 2502 B1 2504 B1 2505 A1 2507 A1 2508 A2
2509 A2 2511 B2 2512 A1 3110 A3 3111 A3 3114 A3
3115 A3 3117 A3 3118 A3 3119 B3 3120 A3 3123 B3
3124 B3 3125 B3 3126 B3 3127 A3 3135 B3 3136 B3
44LC7.1L LA 7.
3320 A4 3321 A4 3322 A4 3323 A4 3324 A4 3325 A4
3326 A4 3327 A4 3328 A4 3329 A4 3330 A4 3331 A4
3332 A4 3333 A4 3334 A4 3335 A4 3336 A4 3337 A4
3338 A4 3339 A4 3340 A4 3341 A4 3342 A4 3343 A4
3344 A4 3345 A4 3346 A4 3347 A4 3348 A4 3349 A4
3501 A2 3502 A1 3503 A1 3504 A1 3511 A1 3512 A1
3513 A1 3514 A1 3517 A2 3518 A2 3520 A1 3521 A1
3522 A1 4110 B3 4111 B3 4112 B3 4113 B3 4120 B3
4121 B3 4122 B3 4123 B3 4124 A2 4125 B2 4302 B4
4305 B4 4307 B4 4308 B4 4309 A3 4310 B3 5106 A3
5107 A2 5501 A2 5502 A1 6110 A3 6501 A2 6504 A1
6505 B1 7102 A2 7103 A3 7201 A4 7502 A1
3139 123 6227.1
H_17260_031.eps
040707
Page 45
Circuit Diagrams and PWB Layouts

Layout AmbiLight Inverter Panel (Bottom Side)

2114 A4 2115 A3 2121 A4 2123 A3
2124 A3 2133 A3 2134 B3 2135 A3
2210 A2 2211 A2 2212 A2 2213 A2
2214 A2 2215 A2 2216 A2 2217 A2
2218 A1 2219 A2 2220 A2 2221 A2
2222 A2 2223 A2 2224 A2 2225 A2
2226 A2 2227 A2 2228 A2 2229 A2
2230 A2 2231 A2 2232 A2 2233 A2
2234 A2 2235 A2 2236 A2 2237 A2
2242 A2 2243 A2 2244 A2 2245 A2
2503 A4 2506 A5 2510 B5 3112 A1
45LC7.1L LA 7.
3116 A1 3121 A1 3122 A2 3128 A1
3129 A1 3130 B1 3131 A1 3132 A2
3133 A2 3134 A2 3210 A2 3211 A2
3212 A2 3505 B5 3506 B5 3507 B5
3508 B4 3509 A5 3510 A5 3516 A5
4101 A5 4102 A5 4103 A5 4104 A5
4126 A4 4127 A4 4128 A4 4129 B4
4130 B4 4210 A2 4211 A2 4301 B2
4303 B2 4304 B2 4306 B2 4501 A5
5111 A3 5113 A3 5210 A1 5211 A2
5212 A2 5213 A2 5214 A3 5215 A3
6111 A2 6502 A5 6503 A5 7101 A3
7104 A3 7105 B3 7106 B3 7107 A2
7501 B5 7503 A5
3139 123 6227.1
H_17260_032.eps
040707
Page 46

SSB: DC/DC

Circuit Diagrams and PWB Layouts
46LC7.1L LA 7.
12
3456789
DC - DC
B02 B02
GNDSND
-12V2
+12V2
GNDSND
IB18
FB32 FB33
FB15
2B22
10n
1n0
2C61
2C56
2C59
+5V_STANDBY
4u7 35V
4
1 2 3 4 5 6 7 8 9
TO / FROM PSU
1 2 3 4 5 6 7 8
TO / FROM PSU
16V
47u
+5V_SW
2B18
2B25
1C01
FB22FB21
FB23 FB24
FB26FB25
FB27 FB28
FB29 FB30
FC25
FB31
2V9
B9B-PH-K
1P11
100n
2V8
1V6
0V(5V)
B8B-PH-K-S
7B02
LD1117DT33C
32
OUTIN
COM
1
123
7B05
SI4423DY
7
8
5
6
2B24
FB13
16V10u
100n
+3V3_STBY
+5V_SW
5B01
10u
2B12
GNDDC
22u
FB10
7B01
3
8
Φ
INH
SYNC
GND GND_HS
7
VREFVCC
COMP
L5973D
2
(---V) MEASURED IN STANDBY
6
OUT
FB
9
+5V_SW
RES 5B05
33u
1
5
IB12
4
IB13
IB11
SS246B01
RES
5B03
33u
3B10
IB20
2B14
220p
FB16
22n
2B15
IB19
4K7
3B11
7B04
LD1085D2T33
32
COM
IB14
OUTIN
1
3B13
3B15
3B14
220R
1K0
1K0 1%
RES
GNDTUN
5B04
2B21
3B12
470R
3B19
100u
7B03 2N7002
FB17
16V
10u
10K
5B06
68u
RES
IB15
2B20
2B16
100p
IB10
2B13
BAV99 6B03
470u 16V
RES
4B01
5B02
10u
2B19
2B10
35V22u
FB14
FB11
16V
100u
+3V3_SW
10n
34V
6B02
BZX384-C33
789
A
-AUDIO_POWER
+AUDIO_POWER
+5V_STANDBY
+5V_SW
B
*
PDP
BL_ADJUST
POWER_DOWN BL_ON_OFF
BACKLIGHT_BOOST
C
D
STANDBY
+5V_STANDBY
+5V_STANDBY
E
STANDBY
F
3139 123 6263.1
0V(5V)
10n
1n02C55
2C60
5B13 22u
5B10
RES
5B11
RES
4C55 4C56 4C61 4C62
RES
4C57
RES
4C58
RES
4C59
RES
4C60
4C55 / 4C56 / 4C61 / 4C62LCD 4C57 / 4C58 / 4C59 / 4C60
FC26
FC27
FC28
+12V_DISP
FC29
RES
2B17
GNDSND
22u 22u 22u5B12
5V2
* * * *
* * * *
RES
4C01
FB34
1n0
2C58
ITV Connector
100n
B3B-PH-SM4-TBT(LF)
1n0
2C57
1 2 3
1B11
45
ONLY FOR LCD
6K8
3B17
3B18
6K8
IB17
123456
+1V8S_SW
2B11
+VTUN
H_17260_001.eps
020707
A
B
C
D
E
F
1B11 D2 1C01 A3 1P11 C3 2B10 B8 2B11 B9 2B12 B4 2B13 B8 2B14 B6 2B15 B6 2B16 B7 2B17 D1 2B18 D3 2B19 C8 2B20 D7 2B21 E7 2B22 F2 2B24 F3 2B25 F3 2C55 A2 2C56 A2 2C57 B2 2C58 C2 2C59 B2 2C60 A2 2C61 A2 3B10 B7 3B11 C6 3B12 B7 3B13 C7 3B14 C7 3B15 D7 3B17 F2 3B18 F2 3B19 C7 4B01 A8 4C01 C2 4C55 B1 4C56 B1 4C57 B1 4C58 B1 4C59 B1 4C60 B1 4C61 B1 4C62 B1 5B01 A4 5B02 A8 5B03 A8 5B04 C7 5B05 A8 5B06 C7 5B10 A1 5B11 A1 5B12 A1 5B13 A1 6B01 B7 6B02 C9 6B03 C8 7B01 A5 7B02 D3 7B03 D7 7B04 D6 7B05 F3 FB10 A5 FB11 A9 FB13 D4 FB14 C9 FB15 E2 FB16 D6 FB17 D7 FB21 A3 FB22 A3 FB23 A3 FB24 A3 FB25 A3 FB26 A3 FB27 B3 FB28 B3
FB29 B3 FB30 B3 FB31 B3 FB32 C2 FB33 C2 FB34 C2 FC25 B3 FC26 C1 FC27 C1 FC28 C1 FC29 C1 IB10 A8 IB11 A7 IB12 B6 IB13 B7 IB14 C6 IB15 C7 IB17 F2 IB18 C2 IB19 B6 IB20 B8
Page 47
Circuit Diagrams and PWB Layouts
47LC7.1L LA 7.

SSB: Tuner & Demodulator

1234
56789101112
13
TUNER IF & DEMODULATOR
B03A B03A
CHINA
*
AP(PAL)
NA/LA/AP(NTSC)
+3V3_SW
5159
220R
2159 100n
+3V3_SW_1
I189
3139 123 6263.1
1
2158
10n
DEMODULATOR
1160
TEDE9-286B UV1316E/A I H4 UV1338/A F SH4
I176
IIC_SCL
RES
+3V3_SW_1
IIC_SDA
RES
+3V3_SW_1
RF_AGC
SAW_SW
RF_AGC
VIF2
VIF1
SIF2
SIF1
+5VS
IIC_SCL
IIC_SDA
SIF
I177
4163
+5V_IF
7161
BSH111
4169
+5V_IF
7162
BSH111
RES
7113
TDA9886T/V4
2 VIF2
1 VIF1
24 SIF2
23 SIF1
2138 10n
3165
4K7
3169
4K7
3124
100R
2124
22n
9TOP
TUNER AGC VIF AGC
SUPPLY
Vp 20
23
1160
UV1300
12
F174
13
I165
I167
RES
RES
+VTUN
2125
F128
14TA GC
NC
18 AGND
13
RF OUT
L
H
M
MT2
AGC1
1V7
3166 3167
I124
470n
VIF-PLL
SINGLE REFERENCE QSS MIXER
SIF
AGC
SCL4
TU2
2126
I127
19VPLL
INTERCARRIER MIXER AND
SDA5
AS3
NC
2V6
5V3
2V6
U2
I175
I174
4175
100R
100R
2165
15p
3173
1K0
3123
330R 2123
220n
1n5
RC VCO
AM-DEMODULATOR
OUTPUT
PORTS
3OP1
22 OP2
I143
1n0
2145
2144 10n
2140
2141
I126
VAGC 16
MT1
5164 5166
NC16NC28NC3
VS7
NC
5V3
2166 15p
F166
F167
2170
2169
2u2 50V
47n
I125
DIGITAL VCO CONTROL
MAD
2
I C-BUS TRANSCEIVER
I144
3128
100R
I133
RES
100R3129
RES
9
7V1
PLL
VST
11 SCL
+12V_DISP
L
H
M
I173
14
MT3
F160
15
MT4 IF111
10
NC
0V
+5V_IF
1104
4M0
22p
2127
15REF
AFC DETECTOR
SOUND TRAPS
4.5 to 6.5 Mhz
NARROW-BAND FM-PLL
DEMODULATOR
7DGND
12 SIOMAD
10 SDA
I135
I136
5160
220R
I162
2160
F161
I168
6163
RES
3170 8K2
3171
5K6
PI=2
I142
I131
1n0
4 FMPLL
2137
10n
2139
390p
2175
22u
3176 39K
2143
21
AFC
AUDIO PROCESSING
AND SWITCHES
I187
3160
47R
13
330n
F165
AUD
DEEM
AFD
I130
7160
L78M05CDT
IN
OUT
COM
2
F164
2167
2u2
17CVBS
8
I128
5
I129
6
3127
5K6
F130
3161
47R
F169
2161
IF-TER
2133
10n
2136
470n
I163
100n
3175
22K
2162
22u
5163 390n
5161
220R
2163
10n
+5VS
I171
3135
7114 BC847B
I138
3125
I139
3126
2164
10n
15R
I178
150R
180R
I166
7164 BC847BW
0V
3177 18K
2128
2134
3164 6K8
3168 2K2
10n
15p
4124
5116
5u6
RES
+5V_IF
I170 0V
2135
I164
3162 2K2
6160
1SS356
15p
F140
3172
22K
2168
1u0
CVBS_RF
I161
3174 47K
FOR I93 ONLY
3163
2K2
6161
1SS356
I160
7163 BC847BW
AP
*
--
4162
Y
4164
--
4166
--
4167
--
4168
Y
4174
4174
*
4162
*
4164
*
OFWK3955L
EUROPE & AP PAL-MUTLI ONLY
+5V_SW
+5V_SW
CHINA
LATAM
-- AP
Y
-­Y Y Y
--
I179
2
I180
3
4166
*
1163
I183
I184
F172
I1 I2
1 4 5 6 9
GND
10 13 14 15 18
*
2
I1
3
I2
1 4 5 6 9 10
GND
13 14 15 18
2 3
1 4 5 6 9 10 13 14 15 18
-­Y
--
-­Y
1161
*
OFWK3953L
38M9
38M
1162
*
OFWK9656L
I ISWI
GND
40M4
I185
3178
1R0
I186
3179
1R0
CHINA
*
*
NC
NC
OFWK7265L OFWK3956L OFWM1967L
O1 O2
11 12 16 17
7
O1
8
O2
11 12 16 17
O1 O2
NC
5167
10u
5168
10u
7 8
2172
22u
2173
22u
11 12 16 17
1161
7 8
I181 I182
5165
5162
2171
10n
2174
22u
RES
*
1162 OFWK9361L OFWK9352L
--LATAM
F162
F163
*
4167
4168
RES
F168
F170
F171
F173
1163
--
OFWK3955L
--
VIF1
VIF2
SIF1 SIF2
+5VS
+5V_IF
H_17260_002.eps
020707
456789
10 11
12 13
U2 B4 1104 F6 1160 A4 1161 B12 1162 E12 1163 D11 2123 F5 2124 F3 2125 F4 2126 F4
A
2127 F6 2128 G9 2133 G8 2134 H9 2135 H9 2136 H8 2137 I7 2138 I3 2139 I7 2140 I5 2141 I5 2143 F6
B
2144 I5 2145 I5 2158 C2 2159 C1 2160 B7 2161 B8 2162 C8 2163 C8 2164 C8 2165 D4 2166 D5
C
2167 D7 2168 D10 2169 D5 2170 D5 2171 G12 2172 G12 2173 H12 2174 H12 2175 D7 3123 F5 3124 F3 3125 G8
D
3126 H8 3127 I7 3128 I5 3129 I5 3135 F8 3160 A7 3161 A8 3162 C9 3163 C10 3164 C9 3165 C3 3166 C4
E
3167 C4 3168 D9 3169 D3 3170 D6 3171 D7 3172 D10 3173 D4 3174 D10 3175 D8 3176 D6 3177 E8
F
3178 G12 3179 H12 4124 G9 4162 C11 4163 C3 4164 C11 4166 C11 4167 C12 4168 C13 4169 C3 4174 B11 4175 C4
G
5116 H9 5159 C1 5160 A7 5161 B8 5162 C12 5163 C8 5164 C4 5165 E12 5166 C4 5167 G12 5168 H12 6160 C9
H
6161 C10 6163 D7 7113 F3 7114 G8 7160 B7 7161 C3 7162 D3 7163 D10 7164 D9 F128 F4 F130 G8 F140 H9
I
F160 B6 F161 B6 F162 B13 F163 C13 F164 C7 F165 C7 F166 D5 F167 D5 F168 E13
F169 D8 F170 E13 F171 G13 F172 G11 F173 H13 F174 B4 I124 F4 I125 F5 I126 F4 I127 F4 I128 G7 I129 H7 I130 I7 I131 I6 I133 I5 I135 I6 I136 I6 I138 G8 I139 H8 I142 F6 I143 I4 I144 I5 I160 D10 I161 D10 I162 A7 I163 B8 I164 B9 I165 C4 I166 C9 I167 C4 I168 D6 I170 D9 I171 D8 I173 A6 I174 B5 I175 B5 I176 C2 I177 C2 I178 F8 I179 B11 I180 B11 I181 D12 I182 D12 I183 E11 I184 E11 I185 G12 I186 H12 I187 A7 I189 C1
Page 48
Circuit Diagrams and PWB Layouts
48LC7.1L LA 7.

SSB: Micro Processor

123
MICROPROCESSOR
B04A B04A
A
CPU_RST
15p
15p
A(8:19)
1 2 3
4
100R
100R
100R
3V3
7311
M30300SAGP
1301
10M
I312
10K
I387
1K0
AD(0) AD(1) AD(2) AD(3) AD(4) AD(5) AD(6) AD(7)
I352 I331 I333 I335 I338 F385
F361
A(0) A(1) A(2) A(3) A(4) A(5) A(6) A(7)
A(8) A(9) A(10) A(11) A(12) A(13) A(14) A(15)
A(16) A(17) A(18) A(19)
I365
I368
I384
1V5
1V5
13
11
6
7
10
96
86 85 84 83 82 81 80 79
78 77 76 75 74 73 72 71
70 69 68 67 66 65 64 63
61 59 58 57 56 55 54 53
52 51 50 49 48 47 46 45
44
43
42 41 40 39 38 37
B
F330
3325
7312
BD45275G
1
10K
C
3300 1K2
MUTEn CTRL_DISP1_up CTRL_DISP4_up BL_ON_OFF ANTI_PLOP HDMI_INT
D
ESD_INT
POWER_DOWN
3394
6317
22K
RES
BZX384-C3V3
7317
BC847BW
E
F
G
DC_PROT
CE
2323
NL27WZ08USG
CS
WR
RD
ALE_EMU
BC847BW
7323-2 NL27WZ08USG
3L15
330R
100n
7323-1
H
IIC_SDA_up IIC_SCL_up
I
3139 123 6263.1
1 234567
+3V3_STBY
5
VDD
Φ
ER
SUB
GND
I353 I330 I332 I334 I337
F388
I399
+3V3_STBY
3393
I380
7308
RES
4323
+3V3_STBY
3
7
2315
100n
4
VOUT
3V3
32
+3V3_SW
10K3334
10K
RES
3333
RES
RES
4324 4325
RES
F379
15K
I393
0V8
2338
220n
3398
100K
5
6
48
1
2
48
+3V3_STBY
+3V3_STBY
+3V3_STBY
3343 100R
100R
3345
6306
10K3319
BAS3166301
2317 100n
10K3331
10K
3335
RES
3L04
1K5
1K5
3395
I394
47K
1302
BZX384-C6V8
+3V3_STBY
3316
10K
+3V3_STBY
+3V3_STBY
10K
RES
RES
3332
3363 10K
+12V_DISP
6318
PDZ6.2-B
+3V3_STBY
10K
3383
3381
3384
3372 4K7
3385
3375
F342
F343
6307
BZX384-C6V8
CNVSS
F380
F381
3399
0V6
7316
BC847BW
1303
2314
2316
3314
3318 3321
RES
3323 100R
100n
2318
AD(0:7)
3364 100R 3338 100R 3339 3340 100R 3341 3342 100R
A(0:7)
22R
22R
47K 100R3386 4K7
COMPAIR
1314
F344
5
S3B-PH-SM4-TB
4 5 6 7 8 9 10 11 12 13
*
RES
3L20 4L20
3L21 100R
4L21
*
3L24 33R 4L24
*
4L25
3L23 33R
A(1:7)
A(8:19)
1N4148
6304
10K
3353
F363
F364
3355
F365
3357
1n0
1n0
EMC
EMC
2330
2329
RES
3326
EMC
100R
33R3L25
33R3L22
100R
3336
1n0
2331
10p
RES
2L23
*
IL20
IL22
RES
2L33 1n0
22n
2L29
M29W800DT-70N6
A(1) A(2) A(3) A(4) A(5) A(6) A(7) A(8) A(9) A(10) A(11) A(12) A(13) A(14) A(15) A(16) A(17) A(18) A(19)
100R
RES
2319 100n
100R
3389 47R 5304 3390
RES 3392 47R
1n02333
4310
RES
2340 1n0
10p
RES
2L22
*
2L24
2L25 220n
1n02L32
RES
*
*
22n
FOR EMC
2L28
F310 F311 F313 F315 F317 F319 F321 F324 F326 F328 F329 F331 F332 F333 F334 F335 F336 F338 F339
F340 F341 F366 F367 F369
3
7320
BSH111
+5V_STANDBY
47R
FRONT_Y_CVBS_IN_T
SIDE_AUDIO_IN_L_CON
220n
SIDE_AUDIO_IN_R_CON
*
7310
25
0
24
1
23
2
22
3
21
4
20
5
19
6
18
7
8
8
7
9
6
10
5
11
4
12
3
13
2
14
1
15
48
16
17
17
16
18
15
RB
12
RP
11
WE
28
OE
26
CE
47
BYTE
3K3
3305
RES
4306
2
3309
1
RES
RES
4302
3L10
220R
I374
47R3391
1n0
1n02336
EMC
EMC
RES
2335 1n0
2334
FRONT_C_IN_T
IL21
IL23
HP_LOUT
HP_ROUT
37
EPROM
1Mx8/512Kx16
0
A
8M-1
27
+3V3_SW
RES 4307
3
7321
BSH111
+3V3_STBY
1R0
RES
4303
1n02337
2332 1n0
4309
RES
2339 1n0
+3V3_STBY
+3V3_STBY
60R
5301
100n
2312
2313
60
14
VCC
Φ
IN
XTAL
OUT
BYTE
CNVSS
RESET
VREF
0 1 2 3
DATA
4
6 7
P0<0:7> SOUT3
AN0<0:7>
8 9 10 11
DATA
12 13 14 15
P1<0:7>
INT<3:5>
0 1 2 3
ADDR
4 5 6 7
D<0:7>
D<0:7>
A<0:7>
AN2<0:7>
P2<0:7>
8 9 10 11 12
ADDR 13 14 15
P3<0:7>
16 17
ADDR 18
19 0 1
CS
2 3
P4<0:7>
WRL WR WRH BHE RD BCLK HLDA HOLD ALE RDY CLKOUT
P5<0:7>
VSS
AVSS
12
62
+3V3_STBY
100n
97
AVCC
AN
P10<0:7>
KI<0:3>
TBIN<0:4>5
CLK3
CLK4 ANEX0 SOUT4 ANEX1
ADTRG
P9<0:7>
TA4OUT
TA4 I N
INT
XCOUT
XCIN
P8<0:7>
TA0OUT
TXD2
SDA2
TB5IN TA0 I N
RXD2
SCL2
TA1OUT
CLK2
TA1 I N
CTS2
RTS2
TA2OUT
TA2 I N
TA3OUT
TA3 I N
P7<0:7>
CTS0
RTS0
CLK0
SCL1
RXD0
TXD0
SDA0
CTS0
CTS1
RTS1
CLKS1
CLK1
SCL1
RXD1
TXD1
SDA1
P6<0:7>
94
2310
SIN3
DA0 DA1
SIN4
NMI
100n
0 1 2 3 4 5 6 7
U
U
0 1 2
ZP
V
V V
W
W
RES
95
I313
93
I314
92 91 90
I395
89 88
F362 I320
87
F386
5
I326
4
I357
3 2
I389
1
100
I364
99
I336
98
I341
20
I342
19
18
I344
17
I345
16
I396
15
I397
9
I398
8
28
27
26
NC
I351
3361
25
RES FOR PSU_STBY
24
RES
I354
23
22
RES
I359
21
RES
I363
36
35
34 33
I382
32
I383
31
I369
30
I370
29
B10B-PH-SM4-TBT(LF)
+3V3_STBY
10K3312
RES
3311 10K
I311
3313 3315 100R 3317
RES
3303 100R 3L05 3324
RES
3327
3329
3368 100R
IBO_RESET
3380
RES 3344
3348 3349 10K
3350
3387 3388
F305
100R
+3V3_SW
3367
3365
+3V3_STBY
3371
3373
3L02 100R
4308
RES
BOOT LOADER
3L09 100R
FOR UART 3L08 3L09 4L06 4L07 4L08 4L09
1312
1 2 3 4 5 6 7 8 9
10
12
11
330R
330R
100R
330R
10K 100R
100R3L26
RES
100R
100R 100R3346
10K3347 47R
10K 47K3397
100R 100R
RES 4301
SDM
3366 10K
10K
100R
100R3360
10K
100R
3L01 4K7
F309
100R3L08
Y Y
--
--
-­Y
F346 F347 F349
F348 F353 F351
F352 F354
+3V3_STBY
1K03310
F323
+3V3_STBY
+5V_STANDBY
RES 3362 10K
F304
I390 I381
I362
RES
+3V3_STBY
+3V3_STBY
+3V3_STBY +3V3_STBY
+3V3_STBY
F303
RES
4313
PANEL
I391 I392
FOR LATAM
26" ME5P
--
-­Y Y Y
--
ITV_Connector A:
+5V_STANDBY
F302
10K3376
+3V3_SW
1K53304
I367
+3V3_STBY
I366
+3V3_STBY
RES 7314 BC847BW
1
RES FOR BDS
I349
3356 100R
RES FOR BDS
I347
3354
+3V3_STBY
+3V3_STBY
10K
RES
RES
3L06
3L07
RES
RES
4L07
4L06
BOLT_ON_SCL BOLT_ON_SDA
ITV_SPI_DATA_IN
ITV_SPI_CLK
SC1_CVBS_RF_OUT
3
2
10K
REMOTE CPU_RST STANDBY
3396
7322
PDTC114ET
3382
3377 3K3
RES RES
RES RES
1K0
RES
3306
3L12 3K3
3352
RES
3L13 3K3
3351
100R
RES
1311
5
4
3 2 1
RES
KEYB
4L08 4L09
FRONT_Y_CVBS_IN
RES
1304
1 2 3 4 5 6 7 8
9 10 11
B11B-PH-K
FL20
FL21
FL22
FL23 FL24 FL25 FL26
FRONT_C_IN
L_FRONT_IN
R_FRONT_IN
TO / FROM SIDE IO
HEAD_PH_L
LED1
KEYB
LIGHT_SENSOR
HDMI_HOTPLUG_RESET
1K0
+5V_STANDBY
FOR DVB ONLY 3L11
100R
100R
F356
3K33379
RES 2326
100R3378
F350
3358
4K7
+3V3_SW
4K7
3359
2324 3307
2322
100p
2321 100p
+5V_SW
22u
+3V3_STBY
1K0 100R
+3V3_SW
+3V3_STBY
1K0
+3V3_SW
1M20
1315
6 5 4 3 2 1
FOR LATAM 26"
B6B-PH-K
B7B-PH-K
RST_AUD
ESD_RST
RST_H
STANDBY
STANDBYn
I340
RESET_n
CVI_DTV_SEL
E_PAGE
LCD_PWR_ON
BL_ADJUST
DDC_RESET
REMOTE
IBO_IRQ
ITV_SPI_CLK
ITV_SPI_DATA_IN
IIC_SDA_up
100p
IIC_SCL_up
RES 2325 100p
SAW_SW
BACKLIGHT_BOOST
BOLT_ON_SCL
BOLT_ON_SDA
F357
1306
7 6 5 4 3 2 1
1307
6309
LED2
ISP
INT
RST
RES
6308
1308
RES
BZX384-C6V8
ISP
CPU_RST WR
RD CE
RES
6305
BZX384-B5V1
+3V3_STBY
10K
RES
3L14
I318
4316
BOLT_ON_SDA BOLT_ON_SCL
EMC 2327 10n
BZX384-C6V8
1309
6311
6310
RES
BZX384-C6V8
HEAD_PH_R
RES
7313-2
BC847BPN
I323
I328
7313-1 BC847BPN
3337
2
100R
I329
+3V3_STBY
2320
100n 16V
EEPROM
1
0
2
ADR
1
3
2SDA
F360
1305
1310
6312
RES
RES
BZX384-C6V8
BZX384-C6V8
5
6
1
8
(8Kx8)
4
6313
10p
RES
2L21
*
RES
RES
+12V_DISP
4
3
I321
3330
3328
47K
10K
I322
1N4148
6303
7315
M24C64-WMN6
Φ
WC
SCL
F345
RES RES
RES
BZX384-C6V8
10p
RES
2L20
*
RES
RES
1n02L31
RES
*
RES
2L27 100p
*
6302
BZX384-C12
+3V3_STBY
3V3
4314 4315
F382 I373 F383 F384
F387
4326
RES
TO / FROM IR/ LED & KEYBOARD
*
7
6
5
2L30 1n0
*
100p
2L26
*
2328 1n0
8 9 10 11 12 13
46
1
3308
2
3L16
I376
D
A-1
NC
3K3
3374
RES
1R0
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
RESERVED
F368
10u
2311
29
F312
31
F314
33
F316
35
F318 F320
38
F322
40 42
F325 F327
44 30 32 34 36 39 41 43 45
F337
9 10 13 14
E_PAGE
IIC_SCL IIC_SDA
+3V3_SW
IIC_SDA
IIC_SCL
LIGHT_SENSOR
H_17260_003.eps
5302
60R
REMOTE
+3V3_STBY
AD(0:7)
AD(0) AD(1) AD(2) AD(3) AD(4) AD(5) AD(6) AD(7)
A(0)
KEYB
3V2
LED1
LED2
020707
3381 G2
1301 B3
3382 E7
1302 I2
3383 F2
1303 I2
3384 H2
1304 A9
3385 H2
1305 I10 1306 H8
3386 H2
1307 I8
3387 E5
1308 I9
3388 E5
1309 I9
3389 H11
1310 I9
3390 I11 3391 I11
1311 H7
3392 I11
1312 I5
3393 E1
1314 I3
A
B
C
D
E
F
G
H
I
1315 H8 1M20 H8 2310 A4 2311 C13 2312 A4 2313 A4 2314 B3 2315 B1 2316 B3 2317 C2 2318 C3 2319 E11 2320 F9 2321 G7 2322 G7 2323 G1 2324 F7 2325 F8 2326 E8 2327 H9 2328 I10 2329 I11 2330 I11 2331 I11 2332 I12 2333 I11 2334 I12 2335 I12 2336 I12 2337 I12 2338 E1 2339 I12 2340 I11 2L20 A10 2L21 A10 2L22 A11 2L23 A11 2L24 A11 2L25 A11 2L26 B10 2L27 B10 2L28 B11 2L29 B11 2L30 B10 2L31 B10 2L32 B11 2L33 B11 3300 C1 3303 B5 3304 D6 3305 G12 3306 G7 3307 G7 3308 G12 3309 G12 3310 B6 3311 B5 3312 B5 3313 B5 3314 B3 3315 B5 3316 B2 3317 B5 3318 B3 3319 B2 3321 B3 3323 B3 3324 C5 3325 C1 3326 D11 3327 C5 3328 D10 3329 C5 3330 D10 3331 C2 3332 D2 3333 C1 3334 C2 3335 C2 3336 E11 3337 E9 3338 D3 3339 D3 3340 D3 3341 D3 3342 D3 3343 I1 3344 D5 3345 I1 3346 D5 3347 D5 3348 D5 3349 E5 3350 E5 3351 G7 3352 G7 3353 F10 3354 G6 3355 G11 3356 G6 3357 G11 3358 F7 3359 F7 3360 G5 3361 F5 3362 C6 3363 D2 3364 D3 3365 F5 3366 F5 3367 F5 3368 C5 3371 G5 3372 H2 3373 G5 3374 G12 3375 H2 3376 D6 3377 F7 3378 F7 3379 E7 3380 D5
3394 D1 3395 E2 3396 C7 3397 E5 3398 E2 3399 E2 3L01 G6 3L02 H5 3L04 E2 3L05 B5 3L06 H6 3L07 H6 3L08 H5 3L09 H5 3L10 H12 3L11 C7 3L12 G7 3L13 G7 3L14 G9 3L15 F1 3L16 H12 3L20 A11 3L21 A11 3L22 B11 3L23 B11 3L24 A11 3L25 A11 3L26 C5 4301 F6 4302 H12 4303 H12 4306 G12 4307 G12 4308 H5 4309 I12 4310 I11 4313 H6 4314 H10 4315 H10 4316 G9 4323 F1 4324 D2 4325 D2 4326 I10 4L06 H6 4L07 H7 4L08 H7 4L09 H7 4L20 A11 4L21 A11 4L24 A11 4L25 A11 5301 A4 5302 C13 5304 I11 6301 B2 6302 D10 6303 E10 6304 E10 6305 F9 6306 I2 6307 I2 6308 H9 6309 I8 6310 I9 6311 I9 6312 I9 6313 I10 6317 D1 6318 E2 7308 E1 7310 C12 7311 B3 7312 B1 7313-1 E9 7313-2 C10 7314 F6 7315 G10 7316 F2 7317 E1 7320 G11 7321 G12 7322 C7 7323-1 G1 7323-2 F1 F302 C6 F303 G6 F304 C6 F305 F5 F309 H5 F310 C11 F311 C11 F312 C13 F313 C11 F314 C13 F315 C11 F316 C13 F317 C11 F318 C13 F319 C11 F320 C13 F321 C11 F322 C13 F323 B6 F324 D11 F325 D13 F326 D11 F327 D13 F328 D11 F329 D11 F330 B1 F331 D11 F332 D11 F333 D11 F334 D11 F335 D11 F336 D11 F337 D13 F338 D11 F339 D11 F340 D11 F341 E11
F342 I2 F343 I2 F344 I3 F345 G10 F346 I5 F347 I5 F348 I5 F349 I5 F350 F8 F351 I5 F352 I5 F353 I5 F354 I5 F356 E8 F357 H8 F360 I10 F361 D3 F362 C5 F363 G11 F364 G11 F365 G11 F366 E11 F367 E11 F368 C13 F369 E11 F379 D2 F380 B3 F381 B2 F382 H10 F383 I10 F384 I10 F385 D3 F386 C5 F387 I10 F388 D1 FL20 A9 FL21 A9 FL22 A9 FL23 A9 FL24 A9 FL25 A9 FL26 A9 I311 B5 I312 B3 I313 B5 I314 B5 I318 G9 I320 C5 I321 D10 I322 D10 I323 D10 I326 C5 I328 D10 I329 E9 I330 D1 I331 D3 I332 D1 I333 D3 I334 D1 I335 D3 I336 D5 I337 D1 I338 D3 I340 C8 I341 D5 I342 D5 I344 E5 I345 E5 I347 G6 I349 G6 I351 F5 I352 D3 I353 D1 I354 F5 I357 C5 I359 G5 I362 D6 I363 G5 I364 D5 I365 G3 I366 E6 I367 E6 I368 H3 I369 H5 I370 H5 I373 I10 I374 I12 I376 I12 I380 E1 I381 C6 I382 H5 I383 H5 I384 H3 I387 B3 I389 C5 I390 C6 I391 H6 I392 H6 I393 E2 I394 E2 I395 B5 I396 E5 I397 E5 I398 E5 I399 D1 IL20 A11 IL21 A12 IL22 A11 IL23 A12
Page 49
Circuit Diagrams and PWB Layouts
49LC7.1L LA 7.

SSB: Video Processor

12345678910111213141516
B04B B04B
A
B
C
D
E
F
G
H
I
J
K
L
3139 123 6263.1
12345678910111213
VIDEO PROCESSOR
ESD_RST
3273
10K
RES
CS WR RD
IIC_SCL
IIC_SDA INT RST_H
+3V3_SW
RES
RES
3219
3220
4K7
3222
3221
HD_Y_IN SC1_G_IN FRONT_Y_CVBS_IN_T IBO_G_IN HD_PR_IN SC1_R_IN SC2_CVBS_Y_IN IBO_R_IN HD_PB_IN SC1_B_IN SC1_CVBS_IN IBO_B_IN
HDMI_H HDMI_V HDMI_VCLK HDMI_DE
FRONT_C_IN_T
ALE_EMU CVBS_RF
+5V_SW
4K7
RES
3257
VGA_H
+5V_SW
4K7
RES
3258
VGA_V
I266
AGGR
4K7
RES
3229 150R
7211-1
74LCX14T
1
7211-2
74LCX14T
3
7211-3
74LCX14T
5
7211-4
74LCX14T
9
3274
3212
100R 3215
100R
RES
10K
150R3231
I255
I256
RES
RES
3230 150R
14
7
714
714
714
7213-1
74LVC04APW
I265
7214 BC847BW
7213-2
74LVC04APW
7213-3
74LVC04APW
3276
560R
7213-4
74LVC04APW
7213-5
74LVC04APW
7213-6
74LVC04APW
+1V8S_SW
150R
150R3228
HDMI_Y(0:7)
RES
3232
HDMI_Cb(0:7)
HDMI_Cr(0:7)
+3V3_SW
2
4
6
I264
8
I267
AD(0:7)
RES 3251
22R
3253
22R
2294
100n
1
3
5
9
11
13
A(0:7)
5216
8-E3
714
714
714
714
10
714
14
12
7
HDMI_Y(0) HDMI_Y(1) HDMI_Y(2) HDMI_Y(3) HDMI_Y(4) HDMI_Y(5) HDMI_Y(6) HDMI_Y(7) HDMI_Cb(0) HDMI_Cb(1) HDMI_Cb(2) HDMI_Cb(3) HDMI_Cb(4) HDMI_Cb(5) HDMI_Cb(6) HDMI_Cb(7) HDMI_Cr(0) HDMI_Cr(1) HDMI_Cr(2) HDMI_Cr(3) HDMI_Cr(4) HDMI_Cr(5) HDMI_Cr(6) HDMI_Cr(7)
A(0) A(1) A(2) A(3) A(4) A(5) A(6) A(7)
RES 3255
22R
3256
22R
3275
560R
2
4
6
8
30R
10u
2236
2246
2247 20p
2250 100n
2252 100n
2254 100n
2256 2257 2258 100n
2260 100n 2261
3201-1 3201-2 3201-3 3201-4
3202-3 3202-4
3203-4
AD(0)
3203-3
AD(1) AD(2) AD(3)
3204-4
AD(4)
3204-3
AD(5)
3204-2
AD(6)
3204-1 220R18
AD(7)
2273 100n
2275 2276 2n7
2277
RES
3240
150R
7211-5
74LCX14T
20p
3239 100R
11
+3V3_SW
5219
60R
5223
60R
+3V3_SW
ESD_INT
+3V3_SW
100n2237
100n2239
2238 100n
1201
14M31818
F232
I230 I231
I232 I233
100n2251
100n2253
100n2255 100n 100n
100n2259
100n
18
100R
27
100R 100R
36 45
100R 100R3202-1
18 27
100R3202-2
36
100R
45
100R
45
220R 220R36
27
220R3203-2 220R3203-1 1 8
4 5 220R
220R3
6
27
220R
I257
2n7
I258
100n
I239
714
5210
5214
2240 100n
SVP CX32
I238
7211-6
74LCX14T
10
I245
CX_AVDD3_BG_ASS
2284
10u
CX_AVDD3_OUTBUF
I250
2289
10u
60R
10u2211
60R
2230 10u
100n2243
100n2241
2242 100n
7202
205
I
XTAL
204
O
61
CS
62
WR_
63
RD_
57
SCL
58
SDA
56
INTN
86
RESET
60
0
GPIO
59
1
180
1
181
23Y_G
182 183
PC_G
188
1
189
2
PR_R
190
3
191
PC_R
196
1
197
2
PB_B
198
3
199
PC_B
37
0
36
1
35
2
34
3
33
4
32
5
31
6
30
7
29
8
26
9
25
10
24
11
22
DP
12
21
13
18
14
17
15
16
16
15
17
14
18
11
19
10
20
9
21
8
22
7
23
4
DP_HS
5
DP_VS
23
DP_CLK
6
DP_DE_FLD
64
0
65
1
66
2
67
3
ADDR
68
4
69
5
70
6
71
7
83
0
82
1
81
2
80
3
A_D
79
4
78
5
77
6
76
7
84
ALE
158
AIN_HS
159
AIN_VS
169
CVBS1
2
PLF2
207
MLF1
192
C
157
TESTMODE
13
714
+3V3_SW
I210
100n2213
100n
2212 100n
2215
2214 100n
F231
100n
100n
2232
2231
I214
2244 100n
136
160197298108
1227537496
119
VDDC
VDDH VDDM
VSSC VSSH VSSM AVSS_ADC
1328547597
I268
120
2205
20
137
161
RES
1215
RES
RES
4211
4210
12
DLW21S
CX_PAVDD
I242
5218
60R
2280 10u
5221
I248
60R
2288 10u
134
146
VIDEO PROCESSOR
99
73
110
135
147
RES 2204
I269
I272
1217
RES
4125
DLW21S
CX_PAVDD1
CX_AVDD3_ADC1
CX_AVDD3_ADC2
CX_AVDD_ADC2
CX_AVDD_ADC3
CX_AVDD_ADC4
CX_AVDD_ADC1
CX_AVDD3_ADC1
178
168
177
186
193
AVDD_ADC
176
187
194
179
I273
I274
RES
RES
4126
4216
CX_AVDD3_ADC2
CX_AVDD3_BG_ASS
CX_AVDD3_OUTBUF
195
166
165
AVDD3_ADC
AVDD3_BG_ASS
AVDD3_OUTBUF
AVSS_BG_ASS
AVSS_OUTBUF
167
164
RES 2203
1218
DLW21S
CX_PAVDD2
+1V8S_SW
202
208
3
12
PAVDD
PAVSS
12
1
203
206
I275
RES
4217
+1V8S_SW
I246
TA1
TB1
TC1
TD1
PWM0
FB
FS
BA
CS0_ RAS_ CAS_
MCK CLKE
I244
N_1 P_1 N_2 P_2
WE_
1 2
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0
1
2
3
4
5
6
7
8
9 10 11
0
1
2
3
M
P
M
P
M
P
M
P
M
P
1
2
1
2
0
1
100n2233
2234 100n
2298
100n
163 162
155 154 153 152 151 150 149 148 145 144 143 142 141 140 139 138 107 106 105 104 103 102 101 100
95 94 93 92 91 90 89 88
124 123 122 121 118 117 116 115 114 113 125 126
156 133 109
87
51 50 49 48 45 44 41 40
43 42
173 172
RES
171 170
175 174 185 184
128 127
129 130 131 132 111 112
55
I240
RES
2281 10u
5220
60R
5222
60R
5225
60R
5227
60R
F211
100n2235
10u
2216
I217
SC1_RF_OUT_CVBS
I218
SC2_CVBS_MON_OUT
DQ(15) DQ(14) DQ(13) DQ(12) DQ(11) DQ(10)
DQ(9) DQ(8) DQ(7) DQ(6) DQ(5) DQ(4) DQ(3) DQ(2) DQ(1)
DQ(0) DQ(23) DQ(22) DQ(21) DQ(20) DQ(19) DQ(18) DQ(17) DQ(16) DQ(31) DQ(30) DQ(29) DQ(28) DQ(27) DQ(26) DQ(25) DQ(24)
CX_MA(0) CX_MA(1) CX_MA(2) CX_MA(3) CX_MA(4) CX_MA(5) CX_MA(6) CX_MA(7) CX_MA(8)
CX_MA(9) CX_MA(10) CX_MA(11)
CX_DQM(0)
CX_DQM(1) CX_DQM(3) CX_DQM(2)
2267 100n 2268
100n
CX_BA0 CX_BA1
CX_CS0# CX_RAS# CX_CAS#
CX_WE#
CX_MCLK
CX_CLKE
+3V3_SW
3242 4K7
7206
BC847BW
7203
BC847BW
RES
4207
CX_AVDD_ADC1
2282
10u
I249
CX_AVDD_ADC2
2287
10u
I252
CX_AVDD_ADC3
2291
10u
I253
CX_AVDD_ADC4
2293
10u
5213
60R
DQ(0:31)
CX_MA(0:11)
SC1_FBL_IN
IBO_CVBS_IN
FOR LCD ONLY
3241
220R
100R
+3V3_SW
CX_DQM(0:3)
TXAn TXAp TXBn TXBp TXCn TXCp TXDn TXDp
TXCLKn TXCLKp
SC2_C_IN
RES
BL_ADJUST
I241
3243
3272
2278
I213
100n2219
100n
100n
150R
DQ(0:31)
7204
DQ(8) DQ(9) DQ(10) DQ(11) DQ(12) DQ(13) DQ(14) DQ(15) DQ(0) DQ(1) DQ(2) DQ(3) DQ(4) DQ(5) DQ(6) DQ(7)
DQ(24) DQ(25) DQ(26) DQ(27) DQ(28) DQ(29) DQ(30) DQ(31) DQ(16) DQ(17) DQ(18) DQ(19) DQ(20) DQ(21) DQ(22) DQ(23)
CX_DQM(1) CX_DQM(0)
CX_DQM(3) CX_DQM(2)
IS42S16400D-6TL
7205 IS42S16400D-6TL
43
49
VDDQ
36 40
2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53
39 15
36 40
2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53
39 15
DRAM
NC
1M X 16 X 4
0 1 2 3 4 5 6
D
7 8 9 10 11 12 13 14 15
H
DQM
L
VSSQ
94349
VDDQ
DRAM
NC
1M X 16 X 4
0 1 2 3 4 5 6 7
D 8 9 10 11 12 13 14 15
H
DQM
L
VSSQ
52
46
1142739
VDD
Φ
3
Φ
23
0
24
1
25
2
26
3
29
4
30
0
5
A
31
1M-1
6
32
7
33
8
34
9
22
10
35
11
20
0
BA
21
1
38
CLK
37
CKE
19
CS
18
RAS
17
CAS
16
WE
VSS
2841546124652
11427
VDD
23
0
24
1
25
2
26
3
29
4
30
0
5
A
31
1M-1
6
32
7
33
8
34
9
22
10
35
11
20
0
21
BA
1
38
CLK
37
CKE
19
CS
18
RAS
17
CAS
16
WE
VSS
284154612
TXAn
TXAp
12101211
TXBn
TXBp
TXCn
1212
2266
I259 I260
2271 100n
2274
100n
2269
100n
100n
2270
100n
I261 I262
100n
2272
TXCLKn
TXCLKp
TXDn
1213
1214
2218 100n
2217
18
3260-1 22R
27
3260-2
36
3260-3
45
3260-4
18
3261-1
27
3261-2
36
3261-3
45
3261-4
18
3262-1 22R
27
3262-2
45
3262-4
36
3262-3
12
3266
27
3268-2
45
3268-4
18
3271-1 22R
36
3271-3
100n2224
100n2226
2227 100n
2225 100n
18
3263-1
27
3263-2
36
3263-3
45
3263-4
18
3264-1 22R
27
3264-2
36
3264-3
45
3264-4
18
3265-1
27
3265-2
45
3265-4
36
3265-3
3267
18
3268-1
36
3268-3
27
3271-2
45
3271-4
TXAn1
TXAp1
DLW21S
TXBn1
TXBp1
DLW21S
TXCn1
1pCX
TpCXT
TXCLKn1
TXCLKp1
DLW21S DLW21S
TXDn1
1pDX
TpDXT
DLW21S
100n2228
22R
22R 22R 22R 22R 22R 22R 22R
22R 22R 22R
22R
22R 22R
22R
22R 22R 22R 22R
22R 22R 22R 22R 22R 22R 22R
22R 22R 22R 22R
2220
100n2295
CX_MCLK
CX_CLKE
CX_CS0# CX_RAS# CX_CAS#
CX_WE#
+3V3_SW
2296 100n
CX_MCLK
CX_CLKE
CX_CS0# CX_RAS# CX_CAS#
CX_WE#
"200 ~ 299"
Multi 12NC: 3139 123 62621
RES 22u
SINGLE 12NC: 3139 123 62631
When use 2MX32 SDRAM,use
When use 4MX32 SDRAM,use
3244
3248
5224
5226
22R
22R
60R
60R
CX_PAVDD1
I243
2279
10u
CX_PAVDD2
I247
2286
10u
CX_PDVDD
I251
2290
10u
CX_PAVDD
I254
2292
10u
+5V_STANDBY
1K0
3211
2245
100n
52
85
200
V5SF
CVBS_OUT
PDVDD
PLL_VCC
LVD SV CC
LVD SV DD P
MD
MA
DQM
TCLK1
VREF
LVD SG ND
PLL_GND
PDVSS
38 39
47 46
201
I263
RES
2206
I271
RES
4213
CX_PDVDD
3245
10K
I270
1216
RES
4212
DLW21S
100n2221
CX_BA0 CX_BA1
5228
22u
2297
CX_BA0 CX_BA1
5212
22u
2222 100n
2229
2223 100n
60R
6.3V
CTRL_DISP1 CTRL_DISP2 CTRL_DISP3 CTRL_DISP4
BOLT_ON_SCL BOLT_ON_SDA
+3V3_SW
60R
6.3V
CX_MA(0) CX_MA(1) CX_MA(2) CX_MA(3) CX_MA(4) CX_MA(5) CX_MA(6) CX_MA(7) CX_MA(8) CX_MA(9)
CX_MA(10)
CX_MA(11)
CX_MA(0) CX_MA(1) CX_MA(2) CX_MA(3) CX_MA(4) CX_MA(5) CX_MA(6) CX_MA(7) CX_MA(8) CX_MA(9)
CX_MA(10)
CX_MA(11)
CTRL-DISP1
CTRL-DISP2(LCD_PWR_on)
CTRL-DISP3(Rev_Standby)
CTRL-DISP4
3246 100R 3247 100R
FOR LCD ONLY
7210
SI4835BDY
+12V_DISP
+5V_STANDBY
4204
4203
4206
4205
I216
RES
3213
47K
6202
BZX384-C5V6
2248
3216
I220
47R
I224
1u0
VDISP-SWITCH
7208
PDTC114ET
3V2
+3V3_SW
CTRL_DISP1_up
LCD_PWR_ON
VDISP
100p
RES
2285
F229
RES
I236
LGE
DISPEN On time : H Off time : Don’t care
36 37 34 35
32 33 31 30 29 28 27 26 25 24 23 22 21
F218
20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
F230
100p
2283
STANDBYn
CTRL_DISP4_up
F219 F220
F221
F222
F223
F224
F225 F226
F227 F228
I211
RES
7207
SI3441BDV
3217 47K
I225
0V
RES
RES
4K7
4K7
3227
3223
3224 100R 3233
100R 3238
100R 3235
100R
RES
RES
100p
100p
2262
2263
SDI
RESET Semi standby : H Normal and off : L
DISPLAY CONTROL
RES
1G50
CONNECTOR
5211
220R 5215
220R 5217
220R
RES
RES
3210
1K0 RES
RES
4K7
3225
RES
100p
2264
LV DS
RES
F210
16V
2209
2208
4215 4214
100u 16V 100u
I215
RES
4K7
F212
CTRL_DISP1
3226
F213
CTRL_DISP2
F214
CTRL_DISP3
F215
CTRL_DISP4
RES
100p
2265
FHP
CPU-GO On time : H Off time : Don’t care
PDWIN On time : H Off time : Don’t care
PDP-GO On time : H Semi standby : L Off time : Don’t care
12V1
2210
2207
SML-310
RES
4-L17
4-L17
4-L17
4-L17
F217
6201
LCD
PDP
0-1453230-3
H_17260_004.eps
14 15 16 17
VDISP
100n
100n
1G51
32
17
3235 E16 3238 E16 3239 K4 3240 K3 3241 K9 3242 K9 3243 K9 3244 A7 3245 K8 3246 J14 3247 J14 3248 B7 3251 J3 3253 K3 3255 K3 3256 L3 3257 J1 3258 K1 3260-1 B12 3260-2 B12 3260-3 B12 3260-4 B12 3261-1 B12 3261-2 B12 3261-3 B12 3261-4 B12 3262-1 B12 3262-2 B12 3262-3 C12 3262-4 C12 3263-1 E12 3263-2 E12 3263-3 E12 3263-4 E12 3264-1 E12 3264-2 E12 3264-3 E12 3264-4 E12 3265-1 E12 3265-2 E12 3265-3 F12 3265-4 F12 3266 C12 3267 F13 3268-1 F12 3268-2 C12 3268-3 F12 3268-4 C12 3271-1 C12 3271-2 F12 3271-3 C12 3271-4 F12 3272 J9 3273 A2 3274 B2 3275 A3 3276 B3 4125 L6 4126 L6 4203 B14 4204 B15 4205 B15 4206 B15 4207 L9 4210 L5 4211 L5 4212 L7 4213 L8 4214 B16 4215 B16 4216 L6 4217 L7 5210 B4 5211 A16 5212 A14 5213 C9 5214 C4 5215 A16 5216 C3 5217 B16 5218 A6 5219 A4 5220 A8 5221 B6 5222 B8 5223 B4 5224 B7 5225 B8 5226 C7 5227 C8 5228 D13 6201 C17 6202 C15 7202 D4 7203 K9 7204 B11 7205 E11 7206 K9 7207 B16 7208 C15 7210 A15 7211-1 J2 7211-2 K2 7211-3 K2 7211-4 L2 7211-5 L4 7211-6 L4 7213-1 A3 7213-2 B3 7213-3 B3 7213-4 B3 7213-5 C3 7213-6 C3 7214 A2 F210 A17 F211 C9 F212 E16 F213 E16 F214 E16 F215 E16 F217 I17 F218 I15 F219 I15 F220 I15 F221 I15 F222 I15 F223 I15 F224 I15 F225 J15 F226 J15 F227 J15 F228 J15 F229 J15 F230 J15 F231 C5 F232 E4 I210 B5 I211 A16 I213 A13 I214 C5 I215 C16 I216 B15 I217 D8 I218 E8 I220 C15
I224 C15 I225 C16 I230 E4 I231 E4 I232 E4 I233 E4 I236 E15 I238 J4 I239 K4 I240 K8 I241 K9 I242 A6 I243 A7 I244 L8 I245 A4 I246 A9 I247 B7 I248 A6 I249 B9 I250 B4 I251 B7 I252 B9 I253 C9 I254 C7 I255 D2 I256 D2 I257 J4 I258 J4 I259 J10 I260 J10 I261 J10 I262 J10 I263 K8 I264 L3 I265 A3 I266 A2 I267 B3 I268 K5 I269 K6 I270 K7 I271 K8 I272 K6 I273 K6 I274 K6 I275 K7
1201 D4 1210 H12 1211 I12 1212 I12 1213 J12 1214 J12 1215 L5 1216 L7 1217 L6
A
1218 L7 1G50 H15 1G51 H17 2203 K7 2204 K6 2205 K5 2206 K7 2207 B17 2208 B16 2209 B16 2210 B17 2211 C5
B
2212 C5 2213 C5 2214 C5 2215 C5 2216 C9 2217 B13 2218 B13 2219 B13 2220 B13 2221 B13 2222 B13 2223 B14
C
2224 E12 2225 E12 2226 E13 2227 E13 2228 E13 2229 B14 2230 C5 2231 C5 2232 C5 2233 D8 2234 D8
D
2235 D8 2236 D3 2237 D4 2238 D4 2239 D4 2240 D4 2241 D4 2242 D4 2243 D5 2244 D5 2245 D8 2246 D3
E
2247 E3 2248 C15 2250 F4 2251 F4 2252 F4 2253 F4 2254 F4 2255 F4 2256 F4 2257 F4 2258 F4 2259 F4
F
2260 F4 2261 F4 2262 F16 2263 F16 2264 F16 2265 F16 2266 J11 2267 I8 2268 I8 2269 J11 2270 J11
G
2271 J10 2272 J10 2273 J3 2274 J10 2275 J3 2276 J3 2277 J3 2278 K9 2279 A7 2280 A6 2281 L8 2282 A9
H
2283 K15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
31
020707
2284 A4 2285 K15 2286 B7 2287 B9 2288 B6 2289 B4 2290 B7 2291 B9 2292 C7 2293 C9 2294 K3
I
2295 E13 2296 E13 2297 E13 2298 D8 3201-1 I4 3201-2 I4 3201-3 I4 3201-4 I4 3202-1 I4 3202-2 I4 3202-3 I4
J
3202-4 I4 3203-1 I4 3203-2 I4 3203-3 I4 3203-4 I4 3204-1 J4 3204-2 J4 3204-3 J4 3204-4 J4 3210 C16 3211 D8 3212 D2
K
3213 C15 3215 D2 3216 C15 3217 C16 3219 E1 3220 E2 3221 E1 3222 E2 3223 E16 3224 E16 3225 E16 3226 E16
L
3227 E16 3228 G2 3229 G2 3230 G2 3231 G2 3232 G3 3233 E16
Page 50
Circuit Diagrams and PWB Layouts

SSB: PNX2015: Audio Processor

50LC7.1L LA 7.
12
AUDIO PROCESSOR
B04C B04C
+12V_DISP
A
B
C
D
E
F
+5V_SW
3402
1R0
LA AP CH
*
2432 2433 2434 47p 56p 56p 2435 47p 56p 56p
150p
2448 2449 3416 4448 5403 5404 12u
33p 47p
2K2
56p
56p
330p
330p
--
--180p
--
--
--
Y
Y
--
22u
22u
--
--
--
--
5401
120R
5402
120R
RST_AUD
IIC_SCL IIC_SDA
HDMI_SCK HDMI_WS
HDMI_SD
SIF
SC1_AUDIO_IN_R SC1_AUDIO_IN_L
SC2_AUDIO_IN_R SC2_AUDIO_IN_L
COMP_AUDIO_IN_R COMP_AUDIO_IN_L
SIDE_AUDIO_IN_R_CON SIDE_AUDIO_IN_L_CON
HDMI_AUDIO_IN_R HDMI_AUDIO_IN_L
2411
10u
2414
10u
2448
*
4448
*
+5V_D
+5V_AUD
+5V_AUD
2432
*
3416
* *
*
*
5403
2449 180p
+AUDIO_POWER_+12V_DISP
4401
4402
RES
RES
12u5404
3
2439
470n
I426
470n
2440
2415
3p3
2416
3p3
2419100n
I420
100R3410
100p 100p
3411 100R 2446 2447
4
1
1411
18M432
3
2
2433
*
2434 330p
*
2435 330p
*
2436 2445 100n
456
7410
L78L08ACU
31
+5V_AUD
I412 I413
OUTIN
COM
2
2412
MSP4450P-VK-E8 000
XTALIN
XTALOUT
I421 I422 I423
10u
I424
2V4
2V4
1V5
2V6
220p
2441
2437 10u
220u
2410
7411
67
68
19 80 66 69
2 3 79
4 5
17 18
8 9 10 11
7 16 20 21
6
63 64 65
56
55 54
53 52
51 50
49 48
58 57
25V
1n5
I425
1n52409
2442
IN
OUT
RESETQ STNDBYQ TESTEN TP
CL DA ADR_SEL
CL WS
CL3 WS3
IN OUT CL WS
1 2
DA
3 4
DA_OUT
IN1+ IN­IN2+
VREFTOP
R
SC1_IN
L
SC2_IN
L
R
SC3_IN
L
R
SC4_IN
L
R
SC5_IN
L
AGNDC
+8V
F401
470p2408
F402
470p
61
62
39
A
AH
SUP
MULTISTANDARD
SOUND PROCESSOR
XTAL
I2C
I2S
DEL
ANA
AD
59
45
2438
100n
60
+5V_D
13
DVSUP
15 12
14
AUD_CL_OUT
Φ
VSS VREF
43
44
F403
2413
DACM
DACA
CAPL
DCTR_IO
SPDIF_OUT
SC1_OUT
SC2_OUT
SC3_OUT
1R2AH
35
25
SUB
SR
NC
SL
220p
R
L
C
R
L
M
A
0 1
R
L
R
L
R
L
2443
789
1n5
470p
2444
70
0V6
26
0V6
27
28
29
30 31
0V2
23
0V2
24
6V7
6V3
3V8 3V8
3V8 3V8
2420 10u
I414
I415
I416 I417
I418 I419
2428
100p
40
38
78 77
76
36 37
33 34
41 42
1 22 32 46 47 71 72 73 74 75
+8V
16V
10u2423
16V
2429
100p
2418 330p
2421 330p
2430 100p
2417 330p
2422 330p
2424 10u 2425 10u
2426 10u 2427 10u
2431 100p
3417 100R 3418
3419 100R 3420
100R
100R
HP_AUDIO_OUT_R
HP_AUDIO_OUT_L
SC1_AUDIO_OUT_R
SC1_AUDIO_OUT_L
SC2_AUDIO_OUT_R
SC2_AUDIO_OUT_L
3139 123 6263.1
AUDIO_LS_R AUDIO_LS_L
H_17260_005.eps
020707
A
B
C
D
E
F
1411 B3 2408 A4 2409 A4 2410 A4 2411 A2 2412 A4 2413 A6 2414 B2 2415 B3 2416 B3 2417 B7 2418 B7 2419 C3 2420 C6 2421 C7 2422 C7 2423 C6 2424 D7 2425 D7 2426 D7 2427 D7 2428 D7 2429 D7 2430 D7 2431 D7 2432 D2 2433 D3 2434 D3 2435 E3 2436 E3 2437 F4 2438 F4 2439 A3 2440 A3 2441 A4 2442 A4 2443 A6 2444 A6 2445 E3 2446 C3 2447 C3 2448 E2 2449 E2 3402 A1 3410 C3 3411 C3 3416 D2 3417 D8 3418 D8 3419 D8 3420 D8 4401 A2 4402 A2 4448 E2 5401 A2 5402 B2 5403 E2 5404 E2 7410 A4 7411 B4 F401 A4 F402 A5 F403 A6 I412 C3 I413 C3 I414 C6 I415 C6 I416 D6 I417 D6 I418 D6 I419 D6 I420 D3 I421 D4 I422 D4 I423 E4 I424 E4 I425 F4 I426 A3
1234567
8
9
Page 51
Circuit Diagrams and PWB Layouts
51LC7.1L LA 7.

SSB: YPBPR & Rear IO

1
2345678910
11 12
YPBPR & REAR IO
B06A B06A
A
CVI - 2 (YPbPr)
RED-RIGHT
B
C
D
G
H
1615-1
1615-2
1615-3
1619
78
2
3
F614
5
4
6
F608
8
7
9
F609
1607
1610
1611 1606
1613
F605
F606
F607
RES 6610
RES 6611
RES
6612
RES 6613
RES 6614
ITV Connector D
F612
F613
PESD5V0S1BA
PESD5V0S1BA
PESD5V0S1BA PESD5V0S1BA
PESD5V0S1BA
HD_PR_IN_ITV
HD_Y_IN_ITV
HD_PB_IN_ITV
VGA_H VGA_V
3607
150R
3611
150R
RES 2602
RES 2603
RES 2606
3601 75R
3603 75R
3605 75R
I623
I627
3617
100R
3618
100R
3619
100R
2608 3n3
2612 3n3
3608
33K
3612
33K
2607
2610
I610
220n
I611
220n
SVHS
1601-3
GND
9
1601-1
F603
RES 2601
PESD5V0S1BA
L
R
1
3
4
2
F615
3609
75R
2617
1u0
1618
1614
I633
5
6
4601
CVBS
1601-2 8
RES
7
4605
F604
3613 75R
1612
6615
RES
4602
E
1603
MSD-242V-01 NIDIP (765A) LF
F616
F
12
3
F602
1609
1608
F611
RES 6607 PESD5V0S1BA
F610
RES 6605 PESD5V0S1BA
F601
RES 6604
PESD5V0S1BA
RES 6606 PESD5V0S1BA
3621
150R
3620
150R
RES
2600
I632
3616
33K
3615 33K
3600
3604
75R
RES
2609
+5V_SW
3623
3624
2616
3n3
2613
3n3
10R
100K
56K
I635
I636
3602
10R
3625
220R
2615
2614
I615
220n
220n
I631
I637
BC857BW 7601
SC2_CVBS_Y_IN
3622
1K0
6608 PESD5V0S1BA
SC2_Y_CVBS_IN
SC2_AUDIO_IN_L
SC2_AUDIO_IN_R
SC2_C_IN
+5V_SW
PR
MSD-246V1-66 NIDIP
RED-BLUE-MIDDLE
Y
PB
MSD-246V1-66 NIDIP
WHITE-GREEN-LEFT
L
R
MSD-246V1-66 NIDIP
1 2 3 4 5 6
BM06B-SRSS-TBT
HD_PR_IN_ITV
HD_PR_IN
HD_Y_IN_ITV
HD_Y_IN
HD_PB_IN_ITV
HD_PB_IN
COMP_AUDIO_IN_L
COMP_AUDIO_IN_R
A
B
C
D
E
F
G
H
1601-1 B3 1601-2 D2 1601-3 B3 1603 F2 1606 B8 1607 C8 1608 D3 1609 C3 1610 C8 1611 D8 1612 D2 1613 E8 1614 G3 1615-1 B7 1615-2 C7 1615-3 D7 1618 F3 1619 F7 2600 B4 2601 E3 2602 B9 2603 C9 2606 C9 2607 D10 2608 D9 2609 D4 2610 D10 2612 E9 2613 G4 2614 F5 2615 F5 2616 F4 2617 E3 3600 B4 3601 B9 3602 C5 3603 C9 3604 B4 3605 C9 3607 D9 3608 D10 3609 C3 3611 D9 3612 D10 3613 E2 3615 G4 3616 F4 3617 B10 3618 B10 3619 C10 3620 F4 3621 F4 3622 D6 3623 D4 3624 E4 3625 E5 4601 D2 4602 D3 4605 E2 6604 C4 6605 G4 6606 D4 6607 F4 6608 D6 6610 B8 6611 C8 6612 C8 6613 D8 6614 E8 6615 E2 7601 E5 F601 B4 F602 C3 F603 D3 F604 E2 F605 B8 F606 C8 F607 C8 F608 D8 F609 D8 F610 F4 F611 F4 F612 F8 F613 F8 F614 C8 F615 C3 F616 F2 I610 D10 I611 D10 I615 B5 I623 D9 I627 D9 I631 C5 I632 E4 I633 C2 I635 F4 I636 F4 I637 E5
3139 123 6263.1
1234567
H_17260_006.eps
020707
8
9101112
Page 52
Circuit Diagrams and PWB Layouts
52LC7.1L LA 7.

SSB: I/O Scart 1 & 2

1234567891011121314
IO - CINCH
B06B B06B
4M53 4M52 4M51
A
1 2 3 4 5 6 7 8
9
1M26
IM01
10
B
1M01
FM01
16
1 9 2
10
3
11
4
12
5
13
C
6
14
7
15
8
17
1226-00B-15S-FAE-02
D
E
F
G
H
PC AUDIO
1
1M02
3 2
YKB21-5157N
I
3139 123 6263.1
12
ITV-Connector B
4M01 4M02 4M03
SC1_AUDIO_MUTE_L
SC1_AUDIO_MUTE_R
FM02
FM03
FM04
IM06
IM09
1n0
2M71
3M10
10K
330p
2M06
2M05
FM09
2M09
100p
FM10
2M10 100p
FM13
1M16
6M21
FM14
1M17
PESD5V0S1BA
6M22
RES RES
PESD5V0S1BA
SC1_B_IN SC1_G_IN SC1_R_IN
SC1_FBL_IN
SC1_AUDIO_OUT_L
SC1_AUDIO_OUT_R
47p
1M11
6M01
47p
1M12
2M68 2M67
RES RES
6M02
47p
2M69
1M13
RES
6M03
IM07
3M07
150R
1n0
2M70
3M08
1K0
IM10
DC_5V
3M11
10K
SCL_VGA
SDA_VGA
330p
5M13
120R
1M14
6M05 SERSER
PESD5V0S1BA
5M14
120R
1M15
6M06
PESD5V0S1BA
3M21
150R
3M23
150R
2M21
2M23
3n3
3n3
RES
2M01
10p
PESD5V0S1BA
RES
2M02
10p
PESD5V0S1BA
RES
2M03
10p
PESD5V0S1BA
6M04
BAS316 2M04 100n
3M09
10K
IM11
3M15
2K2
IM14
3M20
2K2
IM17
2M20
220n
33K
3M22
IM19
2M22
220n
33K
3M24
CVI - 1
RED-RIGHT
1M03-1
2
3
MSD-246V1-66 NIDIP
RED-BLUE-MIDDLE
1M03-2
5
4
6
MSD-246V1-66 NIDIP
WHITE-GREEN-LEFT
8
1M03-3
7
9
MSD-246V1-66 NIDIP
3M02
75R
3M04
75R
3M06
75R
IM08
3M12
10K
3M14
220R
3M18
220R
1 2 3 4 5
1M25
67
3M01
100R
3M03
100R
3M05
100R
5M01
FM06
FM07
FM08
60R
7M01 M24C02-WMN6
ITV-Connector C
SC2_AUDIO_IN_R
SC2_AUDIO_IN_L
IM02
IM03
IM04
IM05
7
6
5
WC
SCL
DC_5V
+5V_SW
DC_5V
(256x8)
EEPROM
SC2_Y_CVBS_IN
FM05
84
Φ
ADR
SC2_C_IN
SC1_R_IN
SC1_G_IN
SC1_B_IN
2M07
100n
0 1 2SDA
1 2 3
VGA_H
VGA_V
FOR ITV RF MONITOR OUT
IM18
IM20
SC1_AUDIO_IN_L
SC1_AUDIO_IN_R
2M90
220n
IM93
345
+5V_SW
3M51
3M68 75R
10K
3M72
2M50
4u7
4M57
4M58
75R3M69
3M70 75R
10n
2M65
IM96 IM97
IM95
47K
3M52
47K
2M51
4u7
RES
RES
10n
2M66
DMMI_R_PR_IN
DMMI_G_Y_IN
DMMI_B_PB_IN
+5V_SW
RES
2M60 1n0
3M53
47K
3M54
47K
2M52
4u7
RESET_n
DMMI_R_IN
DMMI_L_IN
IBO_CVBS_IN
1n0
RES
RES
2M61
+5V_SW
IIC_SCL
IIC_SDA
IBO_IRQ
75R
3M73
3M55
47K
3M56
47K
FM18
FM19
1M21
1M22
FM15
FM16
FM17
RES
RES
1M18
1M19
1M31
6M34
PESD5V0S1BA
6M35
PESD5V0S1BA
3M36
150R
3M38
150R
RES
RES
RES
6M31
6M32
6M33
RES 2M30
10p
PESD5V0S1BA
RES 2M31
10p
PESD5V0S1BA
RES 2M32
10p
PESD5V0S1BA
IM44
3n3
33K
2M34
3M37
IM46
3n3
33K
2M36
3M39
2M33
220n
2M35
220n
3M31
75R
3M33
75R
3M35
75R
IM45
IM47
3M30
100R
3M32
100R
3M34
100R
CVI2_L
CVI2_R
1 2 3 4 5 6
1 2 3 4 5
1R08
1213
1R05
78
1R06
67
CVI2_PR
CVI2_Y
CVI2_PB
1 2 3 4 5 6
NC 7 8 9
10
NC
11
IM59 IM60 IM61
FM24
NC
IM57 IM58
FM25
NC
FM20
IM21
IM22
IM23
3M63 3M64
5M57
5M58
68p
68p
RES
RES
2M62
2M63
3M67 75R
3M66
3M65
3K3 3K3
75R
75R
10K
3M71
MONITOR OUT
IM48
2M40
2M41
220n
3M45 1K0
IM50
IM55
IM56
2M43
330p
2M44 330p
220n
2M91
220n
7M90
BC847B
+5V_SW
3M94
15R
IM90
7M91
BC857BW
IM91
3M95
4K7
RES
4M90
IM94
3M92
1K0
3M93
68R
SC1_RF_OUT_CVBS
FM92
SC1_CVBS_RF_OUT
YELLOW
1M04-1
WHITE
1M04-2
1M04-3
RED
1
FM21
2
SERSER
1M23
3
FM22
4
1M24
5
6
RES
FM23
1M32
PESD5V0S1BA
6M45 6M42
PESD5V0S1BA
6M46
PESD5V0S1BA
RES
2M42
330p
2M46 330p
3M44
2M45
68R
3M47
150R
3M48
150R
6 7 8 9 10 11 12 13 14
RESERVED FOR CHINA DTV ONLY
IM24
IM25
IM26
+5V_SW
3M57
47K
4u7
3M58
47K
+5V_SW
2M55
4u7
33K3M88
3M42
4K7
4M05
3M59
47K
3M60
47K
33K3M90
RES
7M05
BC857BW
IM34
IM35
+5V_SW
33K3M80
3M81 33K
IM40
IM41
3M85 33K
3M84 33K
IM52
+5V_SW
3M61
47K
3M62
47K
33K3M82
IM42
3M86 33K
3M46
2M53
2M57
IM33
IM32
IM31
DMMI_R_IN
CVI2_R
DMMI_L_IN
CVI2_L
CVI_DTV_SEL
+5V_SW
3M41
15R
IM49
5V2
3V
7M04
BC847B
4u7
RES
22p
RES
2M58
22p
RES
2M59
22p
3V7
2M54
3M89 33K
3M91 33K
IM51
IM36
74HC4053D
3M83 33K
IM43
33K3M87
3M43
1K0
68R
IM53
IM54
6
13 12 11
1 2 10
3 5 9
7M03
7M06 ADG733BRU
12
13
2
1
5
3
16
VDD
MDX
G4
1 2 4X1 4X2
NC NC
VEE VSS
7
4M37 4M38
+5V_SW
IM27
S1A
S1B
S2A
S2B
S3A
S3B
VSS
8
5M56
60R
2M56
100n
16
VDD
6
Φ
EN
11
A0
10
A1
9
A2
14
D1
15
D2
4
D3
GND
8
7
IM37
16V10u
2M37
IM38
14
15
NC
IM39
4
SC2_CVBS_MON_OUT_ITV
3M50
10K
CVI_DTV_SEL
IM28
IM29
IM30
5M37
60R
100n
2M38
HDMI_AUDIO_IN_R
HDMI_AUDIO_IN_L
SC2_CVBS_MON_OUT
SC2_AUDIO_OUT_L
SC2_AUDIO_MUTE_L
SC2_AUDIO_MUTE_R
SC2_AUDIO_OUT_R
H_17260_007.eps
IBO_R_IN
IBO_B_IN
IBO_G_IN
+5V_SW
040707
A
B
C
D
E
F
G
H
I
1M01 B1 1M02 H1 1M03-1 A5 1M03-2 B5 1M03-3 C5 1M04-1 H9 1M04-2 H9 1M04-3 I9 1M11 B2 1M12 C2 1M13 D2 1M14 F2 1M15 G2 1M16 I1 1M17 I1 1M18 A7 1M19 B7 1M21 C6 1M22 D6 1M23 H9 1M24 I9 1M25 A3 1M26 A1 1M31 B7 1M32 I9 1R05 D8 1R06 F8 1R08 C8 2M01 B3 2M02 C3 2M03 D3 2M04 D3 2M05 F2 2M06 F2 2M07 E4 2M09 F2 2M10 G2 2M20 H3 2M21 I2 2M22 I3 2M23 I2 2M30 A7 2M31 B7 2M32 B7 2M33 C7 2M34 C7 2M35 D7 2M36 D7 2M37 E13 2M38 E14 2M40 H10 2M41 H11 2M42 H10 2M43 I11 2M44 I11 2M45 I10 2M46 I10 2M50 A10 2M51 B10 2M52 B10 2M53 C11 2M54 C12 2M55 D12 2M56 B13 2M57 C11 2M58 D11 2M59 D11 2M60 F10 2M61 F10 2M62 D9 2M63 D9 2M65 D10 2M66 D10 2M67 B2 2M68 C2 2M69 D2 2M70 D2 2M71 E2 2M90 H5 2M91 H6 3M01 B3 3M02 B3 3M03 C3 3M04 C3 3M05 C3 3M06 D3 3M07 D2 3M08 E2 3M09 E3 3M10 E2 3M11 E2 3M12 E3 3M14 F3 3M15 F3 3M18 G3 3M20 G3 3M21 H2 3M22 I2 3M23 I2 3M24 I2 3M30 A8 3M31 A8 3M32 B8 3M33 B8 3M34 B8 3M35 B8 3M36 C7 3M37 C7 3M38 D7 3M39 D7 3M41 G11 3M42 G12 3M43 H12 3M44 H10 3M45 H10 3M46 H12 3M47 I10 3M48 I10 3M50 B14 3M51 A10 3M52 A10 3M53 A10 3M54 B10 3M55 B11 3M56 B11 3M57 C12 3M58 C12 3M59 C12 3M60 C12 3M61 D12 3M62 D12 3M63 F9 3M64 F9 3M65 E9 3M66 D9 3M67 D9 3M68 E9 3M69 E10
3M70 E10 3M71 F9 3M72 F9 3M73 F11 3M80 E12 3M81 E12 3M82 E12 3M83 E12 3M84 G12 3M85 G12 3M86 G12 3M87 G12 3M88 E12 3M89 E12 3M90 F12 3M91 F12 3M92 I7 3M93 I7 3M94 H6 3M95 H7 4M01 A2 4M02 A2 4M03 A2 4M05 H12 4M37 G13 4M38 G13 4M51 A13 4M52 A13 4M53 A13 4M57 C10 4M58 C10 4M90 I7 5M01 D3 5M13 F2 5M14 G2 5M37 D14 5M56 B13 5M57 C9 5M58 C9 6M01 C2 6M02 C2 6M03 D2 6M04 D3 6M05 F2 6M06 H2 6M21 I2 6M22 I2 6M31 A7 6M32 B7 6M33 B7 6M34 C6 6M35 D6 6M42 H10 6M45 I10 6M46 I10 7M01 E3 7M03 E13 7M04 H11 7M05 H12 7M06 B13 7M90 I6 7M91 I6 FM01 B1 FM02 B2 FM03 B2 FM04 C2 FM05 E4 FM06 E3 FM07 E3 FM08 E3 FM09 F1 FM10 G1 FM13 H1 FM14 I1 FM15 A6 FM16 B6 FM17 B6 FM18 C6 FM19 D6 FM20 C9 FM21 H9 FM22 I9 FM23 I9 FM24 E9 FM25 F9 FM92 I7 IM01 A1 IM02 A4 IM03 B3 IM04 C3 IM05 C3 IM06 D2 IM07 D2 IM08 D3 IM09 D2 IM10 E2 IM11 F3 IM14 G3 IM17 H3 IM18 H3 IM19 I3 IM20 I3 IM21 A9 IM22 B9 IM23 B9 IM24 A11 IM25 B11 IM26 B11 IM27 B13 IM28 C14 IM29 C14 IM30 C14 IM31 D11 IM32 D11 IM33 D11 IM34 C12 IM35 C12 IM36 D12 IM37 E13 IM38 E14 IM39 F14 IM40 E12 IM41 E12 IM42 E12 IM43 E12 IM44 C7 IM45 C8 IM46 D7 IM47 D8 IM48 H11 IM49 H11 IM50 H11 IM51 H12 IM52 H12 IM53 H13 IM54 H13 IM55 I11 IM56 I11
IM57 F9 IM58 F9 IM59 D9 IM60 D9 IM61 E9 IM90 I6 IM91 I6 IM93 H6 IM94 I7 IM95 F10 IM96 F10 IM97 F10
Page 53
Circuit Diagrams and PWB Layouts
53LC7.1L LA 7.

SSB: HDMI

123456789
10 11 12 13
HDMI
B06C B06C
+3V3_SW_1
A
1810
DC1R019JBAR190
1 2 3 4 5 6 7 8 9
B
10 11 12 13 14 15
HDMI CONNECTOR-1
16 17 18 19
2021
23
22
C
D
1811
1 2 3 4 5 6 7 8 9
E
10 11 12 13 14 15
HDMI CONNECTOR-2
16 17 18 19
2021 22
23
F
G
H
I
3139 123 6263.1
123456
5801
220R
F832
F840 F841
F842 F843
F861
BC847BW
F869 F870
F871 F872
7860
2801 100n
7814
BC847BW
I831
I801
2802 100n
3862
3863
I861
3880
3881
+3V3_SW_2
RX2+A
RX1+A
RX0+A
RXC+A
RXC-A
1K0
I833
2K2
3864
1K0
2K2
RX2-A
RX1-A
RX0-A
HDMI_HOTPLUG_RESET
100R
7816
I841
BC847BW
RX2+B
RX2-B
RX1+B
RX1-B
RX0+B
RX0-B
RXC+B
RXC-B
HDMI_HOTPLUG_RESET
3882
100R
I843
7861 BC847BW
I840
I842
DOC_SCLA DOC_SDAA
+5VHDMI_A
3877
2K2
B
DOC_SCLB
DOC_SDAB
+5VHDMI_B
3883
2K2
A
DDC_RESET
DDC_RESET
+5VHDMI_A
DOC_SDAA DOC_SCLA
+5VHDMI_B
HDMI_INT
RST
IIC_SCL IIC_SDA
+5VHDMI_A
HDMI_WS
HDMI_SD
BAT54 COL
M24C02-WMN6
1 2 3
BAT54 COL
M24C02-WMN6
1 2 3
DOC_SDAB DOC_SCLB
+5V_SW
BAT54 COL
6831
7850
84
Φ
(256x8)
EEPROM
0 1
ADR
2 SDA
+5V_SW
BAT54 COL
6802
7811
84
Φ
(256x8)
EEPROM
0
ADR
1 2 SDA
F876
F877
3896 3897
1
7824
BSN20
+3V3_SW_2
6830
F874
7
WC
6
SCL
5
6801
F873
7
WC
6
SCL
5
NC
100R 100R
F850
2
10K
3809
3
3884 33R
3885
3886 33R
1
10n
33R
3830
4K7
3810 4K7
+3V3_SW_2
2820 100n
SDA16
SCL17
NC
2810
I868
RES
I867
RES
I844
I845
4804
4805
VCC
GND
3831
47K
3801
47K
5819
30R
8
7818 PCA9515ADP
SDA0 3
SCL0 2
EN 5
4
+5VHDMI_B
2804 100n
3832 47K
+3V3_SW_2
+3V3_SW_2
2803
3802 47K
100n
+3V3_SW_2
+3V3_SW_2
HDMI_INT
3820 10K
7825
BSN20
1
+3V3_SW_2
I864
I865
I866
+1V8S_SW
+3V3_SW_2
7851 BSN20
I822
+3V3_SW_2
3834
7852 BSN20
I823
+3V3_SW_2
7812 BSN20
+3V3_SW_2
3846
7813 BSN20
F851
2
3
I820
I821
4K7
4K7
3833
4K7
3828
4K7
3850
10K
2809
10n
2813
18p
2828
18p
HDMI_I2S_SCKHDMI_SCK
RX0+A RX0-A
RX1+A RX1-A
RX2+A RX2-A
RXC+A RXC-A
RX0+B RX0-B
RX1+B RX1-B
RX2+B RX2-B
RXC+B RXC-B
I846
3815
1M0
I848
HDMI_I2S_WS
7817-3
SII9025CTU
146 147 148 149 150 151 152
RES
4806
3811
4K7
1823
28M322
3819
HDMI_I2S_SD
VIA
SII9025CTU
I802
NC
NC
NC
I862
I847
33R
NC
166
153
167
168
VIA
VIA
VIA
154
155
7817-1
44 43
48 47
52 51
40 39
63 62
67 66
71 70
59 58
104
102
32 31
30 29
28 27
107
9
34 33
56 101
103
97
96
88
86
85
84
78
77
169
156
170
VIA
157
158
+
R0X0
-
+
R0X1
-
+
R0X2
-
+
R0XC
-
+
R1X0
-
+
R1X1
-
+
R1X2
-
+
R1XC
-
INT
RESET
DSCL0 DSDA0
DSCL1 DSDA1
CSCL CSDA
CLK48B
EVNODD
R0
PWR5V
R1
RSVD_A RSVDL
SCDT
XTALIN
XTALOUT
MCLKOUT
SCK
WS
SD0
SPDIF
MUTEOUT
159 160 161 162 163 164 165
MAIN
NC
Q
HSYNC
VSYNC
ODCK
SII9025CTU
100
144
0
143
1
142
2
141
3
140
4
137
5
136
6
133
7
132
8
131
9
130
10
129
11
126
12
125
13
124
14
123
15
119
16
118
17
117
18
116
19
113
20
112
21
111
22
110
23
DE
121
7817-2
6 7
8 10 11 12 13 14 17 18 19 20 81 82 83 87 93
1
2
3
I850
NC
+3V3_SW_2
5817
120R
I851 I852
1n0
2816
100n
100n
2829
2830
1n0
1n0
1n0
2849
2847
2848
1n02866
1n0
1n0
2865
2867
38424650576165
414549536064687295
69
AUDPVCC18AVCC
AGND AUDPGND
+1V8S_SW
5810
100n
2817
1n0
2850
1n0
2868
120R
2818 100n
222394
21
+1V8S_SW
5812
5811
120R
120R
I858
100n
2819
100n
100n
2833
2835
2836
1n0
1n0
1n0
2854
2853
2851
2852
1n0
1n0
2870
2869
35747992105
CVCC18 IOVCC
CGND IOGND
2436738091
2871
114
128
139
POWER
106
115
127
138
3835 33R
3851-1
18
3851-2
27
3851-3 33R
36
3852-2
2 7 33R
36
3852-3
4 5 33R3852-4
1
3853-1 33R
3853-2
27
3853-3 3 6
3853-4 33R
45
27
3854-2 33R
3854-3 3 6
45
3854-4
3855-1 33R
18
3855-2 2 7
3855-3 3 6 33R
3855-4 4 5
3856-1 1 8
27
36
3856-4 4 5
3857
3858
3859 33R
3860 33R
100n
1n0
1n0
I853
51626
4
5 33R3851-4 4
8
8
+3V3_SW_2
5813
120R
1n0
2855
1n0
2872
76
152575
33R
33R
33R3852-1 1
33R
33R
33R
33R183854-1
33R
33R
33R
33R
33R
33R3856-2
33R3856-3
33R
33R
33R
I854
100n
2838
89
90
109
108
+3V3_SW_2
5814
120R
100n
2839
1n0
2856
1n0
2873
122
1343755
TMDS PGND
120
135
HDMI_Cb(0)
HDMI_Cb(1)
HDMI_Cb(2)
HDMI_Cb(3)
HDMI_Cb(4)
HDMI_Cb(5)
HDMI_Cb(6)
HDMI_Cb(7)
HDMI_Y(0)
HDMI_Y(1)
HDMI_Y(2)
HDMI_Y(3)
HDMI_Y(4)
HDMI_Y(5)
HDMI_Y(6)
HDMI_Y(7)
HDMI_Cr(0)
HDMI_Cr(1)
HDMI_Cr(2)
HDMI_Cr(3)
HDMI_Cr(4)
HDMI_Cr(5)
HDMI_Cr(6)
HDMI_Cr(7)
I813
F805
F806
I814
01
PVCC
100n
2840
1n0
1n0
2858
2857
1n0
1n0
2875
2874
995498
GND_HS
HDMI_VCLK
+3V3_SW_2
5815
I855
1n0
2876
REGVCC
XTALVCC
F875
145
HDMI_Cb(0:7)
HDMI_Y(0:7)
HDMI_Cr(0:7)
HDMI_DE
HDMI_H
HDMI_V
78910111213
+3V3_SW_2
+3V3_SW_2
5816
I857
2877
RES
100n
2844
1n0
2860
1u0
2878
120R
I856
100n
2845
1n0
2861
100n
040707
5818
2879
120R
120R
100n
2843
1n0
2859
H_17260_008.eps
1n0
A
B
C
D
E
F
G
H
I
1810 A1 1811 D1 1823 H8 2801 A2 2802 A2 2803 C7 2804 A7 2809 H8 2810 H6 2813 H8 2816 B11 2817 B11 2818 D11 2819 B11 2820 E6 2828 I8 2829 B10 2830 B10 2833 B11 2835 B12 2836 B12 2838 B12 2839 B12 2840 B12 2843 B13 2844 B13 2845 B13 2847 C10 2848 C10 2849 C11 2850 C11 2851 C11 2852 C11 2853 C12 2854 C12 2855 C12 2856 C12 2857 C12 2858 C13 2859 C13 2860 C13 2861 C13 2865 D10 2866 D10 2867 D11 2868 D11 2869 D11 2870 D12 2871 D12 2872 D12 2873 D12 2874 D12 2875 D13 2876 D13 2877 D13 2878 D13 2879 D13 3801 C6 3802 C7 3809 H5 3810 C6 3811 H8 3815 H8 3819 I8 3820 F7 3828 D7 3830 A6 3831 A6 3832 A7 3833 B7 3834 C7 3835 E11 3846 E7 3850 H7 3851-1 E11 3851-2 E11 3851-3 F11 3851-4 F11 3852-1 F11 3852-2 F11 3852-3 F11 3852-4 F11 3853-1 F11 3853-2 G11 3853-3 G11 3853-4 G11 3854-1 G11 3854-2 G11 3854-3 G11 3854-4 G11 3855-1 H11 3855-2 H11 3855-3 H11 3855-4 H11 3856-1 H11 3856-2 H11 3856-3 I11 3856-4 I11 3857 I11 3858 I11 3859 I11 3860 I11 3862 C2 3863 C2 3864 C2 3877 C3 3880 F2 3881 F2 3882 F2 3883 F3 3884 I5 3885 I5 3886 I5 3896 G5 3897 G5 4804 A6 4805 C6 4806 G8 5801 A1 5810 A11 5811 A11 5812 A11 5813 A12 5814 A12 5815 A13 5816 A13 5817 A10 5818 A13 5819 E6 6801 C5 6802 C5 6830 A5 6831 A5 7811 C5
7812 D7 7813 E7 7814 C2 7816 C3 7817-1 E9 7817-2 D10 7817-3 C9 7818 F6 7824 H5 7825 H7 7850 A5 7851 B7 7852 C7 7860 F2 7861 F3 F805 I12 F806 I12 F832 A1 F840 B1 F841 B1 F842 C1 F843 C1 F850 H5 F851 H7 F861 D1 F869 E1 F870 E1 F871 F1 F872 F1 F873 C6 F874 A6 F875 E13 F876 G5 F877 G5 I801 A2 I802 G9 I813 I12 I814 I12 I820 D7 I821 E7 I822 B7 I823 C7 I831 C2 I833 C2 I840 C3 I841 C3 I842 F3 I843 F3 I844 G6 I845 H6 I846 H8 I847 I9 I848 I8 I850 A10 I851 A11 I852 A11 I853 A12 I854 A12 I855 A13 I856 A13 I857 A13 I858 A11 I861 F2 I862 H9 I864 I7 I865 I7 I866 I7 I867 C6 I868 A6
Page 54
Circuit Diagrams and PWB Layouts

SSB: Headphone Amp & Muting

54LC7.1L LA 7.
1234567
HEADPHONE AMP & MUTING
B06D B06D
2901
A
B
SC2_CVBS_MON_OUT_ITV
HP_AUDIO_OUT_R
C
ANTI_PLOP
D
POWER_DOWN
E
STANDBY
F
MUTEn
3139 123 6263.1
ITV Connector E
MUTING CIRCUIT
I911
I913
I914
3937
10K
0V
3938
I916
10K
BAT54 COL
0V
7919 BC847BW
6914
3911
10K
1901
I915
2902
470n
56
2904
470n
1 2 3 4
3V3
F908
F910
F905
3V3
+3V3_STBY
3935
4K7
2940
47u
HPIC_LINHP_AUDIO_OUT_L
HPIC_RIN
+3V3_STBY
BC857BW
3934
4K7
6.3V
7902
3901
47K
3906
100K
3905
47K
470n
2907
0V
7917
BC857BW
I917
I901
3907 100K
I912
4901
0V
+3V3_STBY
RES
F901
F904
6916
BAS316
3940
10K
2V6
2 2V6
3
2V6
6
2V6
5
3912
I918
3902
3908
10K
6919
33p
120K
7901-1 TS482IDT
1
2V6
84
5V3
2905
33p
120K
7901-2 TS482IDT
7
2V6
84
5V3
BAS316
3917
1K0
3918
1K0
3913
1K0
3914
1K0
3915
1K0
3916
1K0
HPIC_LOUT
+5V_SW
2908 220n
I924
2913 220n
HPIC_ROUT
1
1
1
1
1
1
I903
I902
2906
100u
3
7911 BC847BW
2
3
7912 BC847BW
2
3
7913 BC847BW
2
3
7914 BC847BW
2
3
7915 BC847BW
2
3
7916 BC847BW
2
2903
16V
3942
1K0
RES
3903
33R
3904
I904
I923
3943
10K
33R
RES
3909
33R
3910
33R
7922 BC847BW
F903
I919
I920
I921
I922
16V100u
I905
4902
RES FOR PROMO SET
EMC
EMC
F902
2
3
EMC
EMC
4903
SC1_AUDIO_MUTE_R
SC1_AUDIO_MUTE_L
SC2_AUDIO_MUTE_R
SC2_AUDIO_MUTE_L
2911
10n
2909
10n
1900
YKB21-5157N
1
2910
10n
2912
10n
ENGAGE
HP_LOUT
HP_ROUT
H_17260_009.eps
040707
A
B
C
D
E
F
1900 B7 1901 B2 2901 A4 2902 A2 2903 B5 2904 C2 2905 B4 2906 C5 2907 C3 2908 B5 2909 A7 2910 C7 2911 A7 2912 C7 2913 B5 2940 E2 3901 A3 3902 A4 3903 A6 3904 B6 3905 C3 3906 B3 3907 C3 3908 B4 3909 B6 3910 C6 3911 D2 3912 D3 3913 D4 3914 E4 3915 E4 3916 F4 3917 C4 3918 D4 3934 E3 3935 E2 3937 E1 3938 E1 3940 F3 3942 F5 3943 F6 4901 D3 4902 A7 4903 C7 6914 E2 6916 E3 6919 F3 7901-1 A4 7901-2 B4 7902 D3 7911 C5 7912 D5 7913 D5 7914 E5 7915 E5 7916 F5 7917 E3 7919 E2 7922 F6 F901 B3 F902 B6 F903 C6 F904 C3 F905 D2 F908 A2 F910 B2 I901 A3 I902 B5 I903 C5 I904 B6 I905 C5 I911 D2 I912 D3 I913 E2
I914 E1 I915 E2 I916 E2 I917 E3 I918 E4 I919 D6 I920 E6 I921 E6 I922 F6 I923 F6 I924 B5
1234567
Page 55
Circuit Diagrams and PWB Layouts
55LC7.1L LA 7.

SSB: Audio

123456789101112
B07 B07
A
B
C
D
E
F
G
H
3139 123 6263.1
AUDIO
25
24
27
22
4
30
19
28
21
VSSA
VSS
-1V3
5A07
60R
47n
2A46
IA41
47n
2A47
GNDSND
3A01
5A05 30R
FA01
IA03
IA07 EMC
2A18
IA14
IA16
IA18
2A30 100n
FA04
3A12
3A15
2A25
2A27
VSS
1n0
GNDSND
1M0
15n
15n
1M0
2V6
NC
NC
8V9
3V9
+AUDIO_POWER
+AUDIO_POWER
2A09 100n
GNDSND
8
Φ
CLASS D
POWER
AMPLIFIER
VSSP
9
26
23
VSSA
GNDSND
VDD
GNDSND
29
20
VDDP
VSSD|HW
1
161732
100n2A34
2A33 100n
GNDSND
2A10 100n
OUT1
OUT2
DIAG
HVP1
HVP2
BOOT1
BOOT2
STAB1
STAB2
2
7A01
IN1P
IN1N
IN2P
IN2N
INREF
OSCREF
OSCIO
HVPREF
DREF
ENGAGE
POWERUP
TEST
CGND VSSA
7
GNDSND
VDDA
VDDA
LCD PDP
*
10K
3A03 3A04 3A06 3A07 3A08 3A11
FA05
*
FA06
FA09
FA12
3A03
3A06
*
3A07
*
*
3A11
AUDIO_LS_L
AUDIO_LS_R
ENGAGE
STANDBYn
1 6789
2345
12K 10K 6K8 10K 12K 10K 6K8
IA01
IA05
IA10
IA11
VSSA
VSSA
6K8 22K
6K8 22K
2A16
2A20 1u0
1u02A11
3A04
*
1u02A15 1u0
3A08
*
100n
2A22 2A24 100n 3A13
2A29
39K
GNDSND
100n
22K3A26
3A19
10K
IA02
IA06
IA09
IA12
2A40
GNDSND
IA19
IA21
470n
2A12 220p
2A19 220p
IA33
IA22
IA13
IA15
NC
EMC 2A32
1n0
TDA8932T
-2V8 3
-2V8 15
-2V8 14
-2V8 12
-2V8 10
-7V6 31
11
-8V2 18
4V7
5
3V2
6
-2V6 13
RES
RES
4A01
4A02
10R
IA40
IA24
GNDSND
IA26
GNDSND
IA23
IA20
2A01
100n
2A04 220u 25V
GNDSND
GNDSND
3A09
IA35
IA36
3A17 10R
2A31
2A36
+AUDIO_POWER_+12V_DISP
11V9
VDDA
5A03
22u
5A04
22u
-AUDIO_POWER
VDD
GNDSND
2A45
1n0
12V2
10R
2A21
1n0
2A35
1n0
IA38
1n0
IA39
1n0
2A14 470n
2A28 470n
FA02
2A17
1n0
2A23
1n0
2A13
220n
2A26
220n
GNDSND
3A02
5A06
IA34
IA37
10R
30R
2A37
220n
2A38
220n
IA25
GNDSND
IA27
GNDSND
IA17
2A02
100n
2A08
220u
IA04
-12V2
+12V2
25V
3A14
3A05
22R
VSSA
22R
GNDSND
VSS
GNDSND
TO SPEAKERS
1735
B4B-PH-K
3A27
220K 3A28
220K
2A41
GNDSND
IA29
7A06 BC847BW
GNDSND
1u0
FA07
FA08 FA10 FA11
VDD
47K
3A29
IA30
47K
3A30
IA31
GNDSND
7A07 BC847BW
DC-DETECTION
BC857BW
FA32
3A31
7A05
DC_PROT
10K
1
LEFT +
2
GND
3
GND
4
RIGHT -
10 11 12
H_17260_010.eps
040707
A
B
C
D
E
G
H
1735 D12 2A01 B7 2A02 B9 2A04 B7 2A08 B9 2A09 D5 2A10 D6 2A11 D3 2A12 D4 2A13 C9 2A14 D8 2A15 D3 2A16 D3 2A17 D8 2A18 D7 2A19 D4 2A20 E3 2A21 D7 2A22 E4 2A23 E8 2A24 E4 2A25 E6 2A26 E9 2A27 E6 2A28 E8 2A29 E4 2A30 E6 2A31 E7 2A32 F5 2A33 F6 2A34 F6 2A35 D7 2A36 F7 2A37 C9 2A38 E9 2A40 F4 2A41 F10 2A45 D8 2A46 A7 2A47 A7 3A01 B7 3A02 B9 3A03 D3 3A04 D4 3A05 C10 3A06 D3 3A07 D3 3A08 D4 3A09 D7 3A11 E3 3A12 E6 3A13 E4 3A14 E10 3A15 E6 3A17 E7 3A19 E4 3A26 E4 3A27 F10 3A28 F10 3A29 E11 3A30 E11 3A31 E11 4A01 A7 4A02 A7 5A03 C8 5A04 E8 5A05 B7 5A06 B9 5A07 A6 7A01 D5
F
7A05 E12 7A06 E10 7A07 F11 FA01 B6 FA02 B9 FA04 D6 FA05 D3 FA06 D2 FA07 D11 FA08 D11 FA09 D3 FA10 D11 FA11 D11 FA12 E3 FA32 E12 IA01 D3 IA02 D4 IA03 D6 IA04 C9 IA05 D3 IA06 D4 IA07 D6 IA09 D4 IA10 D3 IA11 D3 IA12 D4 IA13 E5 IA14 E6 IA15 E5 IA16 E6 IA17 E9 IA18 E6 IA19 E4 IA20 E7
IA21 E4 IA22 F5 IA23 C7 IA24 B7 IA25 B9 IA26 B7 IA27 B9 IA29 F10 IA30 E11 IA31 E11 IA33 E5 IA34 C9 IA35 D7 IA36 D7 IA37 E9 IA38 E7 IA39 F7 IA40 A7 IA41 A7
Page 56

SSB: SRP List

1.1. Introduction
SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references.
Some of the PW
reference list for a schematic, or there will be printed references in the schematic.
1.2. Non-SRP Schematics
There are several different signals available in a schematic:
1.2.1. Power Supply Lines
All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not indicated where supplies are coming from or going to. It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic).
Outgoing Incoming
1.2.2. Normal Signals
For normal signals, a schematic reference (e.g. B14b) is placed next to the signals.
B14b
1.2.3. Grounds
For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.
1.3. SRP Schematics
SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used. A reference is created for all signals indicated with an SRP symbol, these symbols are:
name name
name name
name
name
Remarks:
When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list.
All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise.
Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference.
Additional Tip:
When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader:
Select the signal name you want to search for, with the "Select text" tool.
Copy and paste the signal name in the "Search PDF" tool.
Search for all occurrences of the signal name.
Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to "zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic.
PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version.
3104 313 6263.1
B schematics will use SRP while others will still use the manual references. Either there will be an SRP
+5V +5V
signal_name
+5V +5V
name name
Bi-directional line (e.g. SDA) into a wire tree.
Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets).
Circuit Diagrams and PWB Layouts
Power supply line.
Stand alone signal or switching line (used as less as possible).
Signal line into a wire tree.
Switching line into a wire tree.
56LC7.1L LA 7.
Netname Schematic
+12V_DISP B02 (1x) +12V_DISP B03A (1x) +12V_DISP B04A (2x) +12V_DISP B04B (1x) +12V_DISP B04C (1x) +1V8S_SW B02 (1x) +1V8S_SW B04B (3x) +1V8S_SW B06C (3x) +3V3_STBY B02 (1x) +3V3_STBY B04A (33x) +3V3_STBY B06D (3x) +3V3_SW B02 (1x) +3V3_SW B03A (1x) +3V3_SW B04A (8x) +3V3_SW B04B (11x) +3V3_SW_1 B03A (3x) +3V3_SW_1 B06C (1x) +3V3_SW_2 B06C (18x) +5V_AUD B04C (3x) +5V_D B04C (2x) +5V_IF B03A (5x) +5V_STANDBY B02 (4x) +5V_STANDBY B04A (4x) +5V_STANDBY B04B (2x) +5V_SW B02 (4x) +5V_SW B03A (2x) +5V_SW B04A (1x) +5V_SW B04B (2x) +5V_SW B04C (1x) +5V_SW B06A (2x) +5V_SW B06B (12x) +5V_SW B06C (2x) +5V_SW B06D (1x) +5VHDMI_A B06C (3x) +5VHDMI_B B06C (3x) +5VS B03A (3x) +8V B04C (2x) +AUDIO_POWER B02 (1x) +AUDIO_POWER B07 (2x) +AUDIO_POWER_+12V_DISP B04C (1x) +AUDIO_POWER_+12V_DISP B07 (1x) +VTUN B02 (1x) +VTUN B03A (1x) A(0) B04A (1x) A(0) B04B (1x) A(0:7) B04A (1x) A(0:7) B04B (1x) A(1) B04A (2x) A(1) B04B (1x) A(1:7) B04A (1x) A(10) B04A (2x) A(11) B04A (2x) A(12) B04A (2x) A(13) B04A (2x) A(14) B04A (2x) A(15) B04A (2x) A(16) B04A (2x) A(17) B04A (2x) A(18) B04A (2x) A(19) B04A (2x) A(2) B04A (2x) A(2) B04B (1x) A(3) B04A (2x) A(3) B04B (1x) A(4) B04A (2x) A(4) B04B (1x) A(5) B04A (2x) A(5) B04B (1x) A(6) B04A (2x) A(6) B04B (1x) A(7) B04A (2x) A(7) B04B (1x) A(8) B04A (2x) A(8:19) B04A (2x) A(9) B04A (2x) AD(0) B04A (2x) AD(0) B04B (1x) AD(0:7) B04A (2x) AD(0:7) B04B (1x) AD(1) B04A (2x) AD(1) B04B (1x) AD(2) B04A (2x) AD(2) B04B (1x) AD(3) B04A (2x) AD(3) B04B (1x) AD(4) B04A (2x) AD(4) B04B (1x) AD(5) B04A (2x) AD(5) B04B (1x) AD(6) B04A (2x) AD(6) B04B (1x) AD(7) B04A (2x) AD(7) B04B (1x) ALE_EMU B04A (1x) ALE_EMU B04B (1x) ANTI_PLOP B04A (1x) ANTI_PLOP B06D (1x) AUDIO_LS_L B04C (1x) AUDIO_LS_L B07 (1x) AUDIO_LS_R B04C (1x) AUDIO_LS_R B07 (1x)
-AUDIO_POWER B02 (1x)
-AUDIO_POWER B07 (1x)
BACKLIGHT_BOOST B02 (1x) BACKLIGHT_BOOST B04A (1x) BL_ADJUST B02 (1x) BL_ADJUST B04A (1x) BL_ADJUST B04B (1x) BL_ON_OFF B02 (1x) BL_ON_OFF B04A (1x) BOLT_ON_SCL B04A (2x) BOLT_ON_SCL B04B (1x) BOLT_ON_SDA B04A (2x) BOLT_ON_SDA B04B (1x) CE B04A (1x) COMP_AUDIO_IN_L B04C (1x) COMP_AUDIO_IN_L B06A (1x) COMP_AUDIO_IN_R B04C (1x) COMP_AUDIO_IN_R B06A (1x) CPU_RST B04A (1x) CS B04A (1x) CS B04B (1x) CTRL_DISP1 B04B (2x) CTRL_DISP1_up B04A (1x) CTRL_DISP1_up B04B (1x) CTRL_DISP2 B04B (2x) CTRL_DISP3 B04B (2x) CTRL_DISP4 B04B (2x) CTRL_DISP4_up B04A (1x) CTRL_DISP4_up B04B (1x) CVBS_RF B03A (1x) CVBS_RF B04B (1x) CVI_DTV_SEL B04A (1x) CVI_DTV_SEL B06B (1x) CVI2_L B06B (1x) CVI2_R B06B (1x) CX_AVDD_ADC1 B04B (2x) CX_AVDD_ADC2 B04B (2x) CX_AVDD_ADC3 B04B (2x) CX_AVDD_ADC4 B04B (2x) CX_AVDD3_ADC1 B04B (2x) CX_AVDD3_ADC2 B04B (2x) CX_AVDD3_BG_ASS B04B (2x) CX_AVDD3_OUTBUF B04B (2x) CX_PAVDD B04B (2x) CX_PAVDD1 B04B (2x) CX_PAVDD2 B04B (2x) CX_PDVDD B04B (2x) DC_5V B06B (3x) DC_PROT B04A (1x) DC_PROT B07 (1x) DDC_RESET B04A (1x) DDC_RESET B06C (2x) E_PAGE B04A (1x) ENGAGE B06D (1x) ENGAGE B07 (1x) ESD_INT B04A (1x) ESD_INT B04B (1x) ESD_RST B04A (1x) ESD_RST B04B (1x) FRONT_C_IN_T B04A (1x) FRONT_C_IN_T B04B (1x) FRONT_Y_CVBS_IN_T B04A (1x) FRONT_Y_CVBS_IN_T B04B (1x) GNDDC B02 (1x) GNDSND B02 (3x) GNDSND B07 (22x) GNDTUN B02 (1x) HD_PB_IN B04B (1x) HD_PB_IN B06A (1x) HD_PB_IN_ITV B06A (2x) HD_PR_IN B04B (1x) HD_PR_IN B06A (1x) HD_PR_IN_ITV B06A (2x) HD_Y_IN B04B (1x) HD_Y_IN B06A (1x) HD_Y_IN_ITV B06A (2x) HDMI_AUDIO_IN_L B04C (1x) HDMI_AUDIO_IN_L B06B (1x) HDMI_AUDIO_IN_R B04C (1x) HDMI_AUDIO_IN_R B06B (1x) HDMI_Cb(0) B04B (1x) HDMI_Cb(0) B06C (1x) HDMI_Cb(0:7) B04B (1x) HDMI_Cb(0:7) B06C (1x) HDMI_Cb(1) B04B (1x) HDMI_Cb(1) B06C (1x) HDMI_Cb(2) B04B (1x) HDMI_Cb(2) B06C (1x) HDMI_Cb(3) B04B (1x) HDMI_Cb(3) B06C (1x) HDMI_Cb(4) B04B (1x) HDMI_Cb(4) B06C (1x) HDMI_Cb(5) B04B (1x) HDMI_Cb(5) B06C (1x) HDMI_Cb(6) B04B (1x) HDMI_Cb(6) B06C (1x) HDMI_Cb(7) B04B (1x) HDMI_Cb(7) B06C (1x) HDMI_Cr(0) B04B (1x) HDMI_Cr(0) B06C (1x) HDMI_Cr(0:7) B04B (1x) HDMI_Cr(0:7) B06C (1x) HDMI_Cr(1) B04B (1x) HDMI_Cr(1) B06C (1x) HDMI_Cr(2) B04B (1x) HDMI_Cr(2) B06C (1x) HDMI_Cr(3) B04B (1x)
HDMI_Cr(3) B06C (1x) HDMI_Cr(4) B04B (1x) HDMI_Cr(4) B06C (1x) HDMI_Cr(5) B04B (1x) HDMI_Cr(5) B06C (1x) HDMI_Cr(6) B04B (1x) HDMI_Cr(6) B06C (1x) HDMI_Cr(7) B04B (1x) HDMI_Cr(7) B06C (1x) HDMI_DE B04B (1x) HDMI_DE B06C (1x) HDMI_H B04B (1x) HDMI_H B06C (1x) HDMI_HOTPLUG_RESET B04A (1x) HDMI_HOTPLUG_RESET B06C (2x) HDMI_INT B04A (1x) HDMI_INT B06C (2x) HDMI_SCK B04C (1x) HDMI_SCK B06C (1x) HDMI_SD B04C (1x) HDMI_SD B06C (1x) HDMI_V B04B (1x) HDMI_V B06C (1x) HDMI_VCLK B04B (1x) HDMI_VCLK B06C (1x) HDMI_WS B04C (1x) HDMI_WS B06C (1x) HDMI_Y(0) B04B (1x) HDMI_Y(0) B06C (1x) HDMI_Y(0:7) B04B (1x) HDMI_Y(0:7) B06C (1x) HDMI_Y(1) B04B (1x) HDMI_Y(1) B06C (1x) HDMI_Y(2) B04B (1x) HDMI_Y(2) B06C (1x) HDMI_Y(3) B04B (1x) HDMI_Y(3) B06C (1x) HDMI_Y(4) B04B (1x) HDMI_Y(4) B06C (1x) HDMI_Y(5) B04B (1x) HDMI_Y(5) B06C (1x) HDMI_Y(6) B04B (1x) HDMI_Y(6) B06C (1x) HDMI_Y(7) B04B (1x) HDMI_Y(7) B06C (1x) HP_AUDIO_OUT_L B04C (1x) HP_AUDIO_OUT_L B06D (1x) HP_AUDIO_OUT_R B04C (1x) HP_AUDIO_OUT_R B06D (1x) HP_LOUT B04A (1x) HP_LOUT B06D (1x) HP_ROUT B04A (1x) HP_ROUT B06D (1x) IBO_B_IN B04B (1x) IBO_B_IN B06B (1x) IBO_G_IN B04B (1x) IBO_G_IN B06B (1x) IBO_IRQ B04A (1x) IBO_IRQ B06B (1x) IBO_R_IN B04B (1x) IBO_R_IN B06B (1x) IIC_SCL B03A (2x) IIC_SCL B04A (1x) IIC_SCL B04B (1x) IIC_SCL B04C (1x) IIC_SCL B06B (1x) IIC_SCL B06C (1x) IIC_SCL_up B04A (2x) IIC_SDA B03A (2x) IIC_SDA B04A (1x) IIC_SDA B04B (1x) IIC_SDA B04C (1x) IIC_SDA B06B (1x) IIC_SDA B06C (1x) IIC_SDA_up B04A (2x) INT B04A (1x) INT B04B (1x) ISP B04A (1x) ITV_SPI_CLK B04A (2x) ITV_SPI_DATA_IN B04A (2x) KEYB B04A (2x) LCD_PWR_ON B04A (1x) LCD_PWR_ON B04B (1x) LED1 B04A (2x) LED2 B04A (2x) LIGHT_SENSOR B04A (2x) MUTEn B04A (1x) MUTEn B06D (1x) POWER_DOWN B02 (1x) POWER_DOWN B04A (1x) POWER_DOWN B06D (1x) RD B04A (1x) RD B04B (1x) REMOTE B04A (3x) RESET_n B04A (1x) RESET_n B06B (1x) RF_AGC B03A (2x) RST B04A (1x) RST B06C (1x) RST_AUD B04A (1x) RST_AUD B04C (1x) RST_H B04A (1x) RST_H B04B (1x) SAW_SW B03A (1x) SAW_SW B04A (1x)
SC1_AUDIO_IN_L B04C (1x) SC1_AUDIO_IN_L B06B (1x) SC1_AUDIO_IN_R B04C (1x) SC1_AUDIO_IN_R B06B (1x) SC1_AUDIO_MUTE_L B06B (1x) SC1_AUDIO_MUTE_L B06D (1x) SC1_AUDIO_MUTE_R B06B (1x) SC1_AUDIO_MUTE_R B06D (1x) SC1_AUDIO_OUT_L B04C (1x) SC1_AUDIO_OUT_L B06B (1x) SC1_AUDIO_OUT_R B04C (1x) SC1_AUDIO_OUT_R B06B (1x) SC1_B_IN B04B (1x) SC1_B_IN B06B (1x) SC1_CVBS_IN B04B (1x) SC1_CVBS_RF_OUT B04A (1x) SC1_CVBS_RF_OUT B06B (1x) SC1_FBL_IN B04B (1x) SC1_FBL_IN B06B (1x) SC1_G_IN B04B (1x) SC1_G_IN B06B (1x) SC1_R_IN B04B (1x) SC1_R_IN B06B (1x) SC1_RF_OUT_CVBS B04B (1x) SC1_RF_OUT_CVBS B06B (1x) SC2_AUDIO_IN_L B04C (1x) SC2_AUDIO_IN_L B06A (1x) SC2_AUDIO_IN_L B06B (1x) SC2_AUDIO_IN_R B04C (1x) SC2_AUDIO_IN_R B06A (1x) SC2_AUDIO_IN_R B06B (1x) SC2_AUDIO_MUTE_L B06B (1x) SC2_AUDIO_MUTE_L B06D (1x) SC2_AUDIO_MUTE_R B06B (1x) SC2_AUDIO_MUTE_R B06D (1x) SC2_AUDIO_OUT_L B04C (1x) SC2_AUDIO_OUT_L B06B (1x) SC2_AUDIO_OUT_R B04C (1x) SC2_AUDIO_OUT_R B06B (1x) SC2_C_IN B04B (1x) SC2_C_IN B06A (1x) SC2_C_IN B06B (1x) SC2_CVBS_MON_OUT B04B (1x) SC2_CVBS_MON_OUT B06B (1x) SC2_CVBS_MON_OUT_ITV B06B (1x) SC2_CVBS_MON_OUT_ITV B06D (1x) SC2_CVBS_Y_IN B04B (1x) SC2_CVBS_Y_IN B06A (1x) SC2_Y_CVBS_IN B06A (1x) SC2_Y_CVBS_IN B06B (1x) SIDE_AUDIO_IN_L_CON B04A (1x) SIDE_AUDIO_IN_L_CON B04C (1x) SIDE_AUDIO_IN_R_CON B04A (1x) SIDE_AUDIO_IN_R_CON B04C (1x) SIF B03A (1x) SIF B04C (1x) SIF1 B03A (2x) SIF2 B03A (2x) STANDBY B02 (2x) STANDBY B04A (2x) STANDBY B06D (1x) STANDBYn B04A (1x) STANDBYn B04B (1x) STANDBYn B07 (1x) TXAn B04B (2x) TXAp B04B (2x) TXBn B04B (2x) TXBp B04B (2x) TXCLKn B04B (2x) TXCLKp B04B (2x) TXCn B04B (2x) TXCp B04B (2x) TXDn B04B (2x) TXDp B04B (2x) VDD B07 (3x) VDDA B07 (2x) VDISP B04B (2x) VGA_H B04B (1x) VGA_H B06A (1x) VGA_H B06B (1x) VGA_V B04B (1x) VGA_V B06A (1x) VGA_V B06B (1x) VIF1 B03A (2x) VIF2 B03A (2x) VSS B07 (3x) VSSA B07 (5x) WR B04A (1x) WR B04B (1x)
H_17260_020.eps
040707
Page 57
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Overview Top Side)

1104 D6
1306 A8
1609 F6
1900 B9
1M18 F2
2128 D6
2211 C6
2255 D7
2277 D7
1160 E3
1307 A8 1308 A8 1309 A8 1310 A8 1311 A5 1312 B5 1315 A8 1601 F6 1603 F6 1606 F10 1607 F9 1608 F6
1610 F9 1611 F9 1612 F6 1613 F10 1614 F6 1615 F9 1618 F6 1619 F10 1735 A10 1810 F7 1811 F8 1823 E8
1161 E6 1162 E6 1201 D7 1210 A7 1211 A7 1212 A7 1213 A7 1214 A7 1301 B6 1304 A9 1305 A8
3139 123 6263.1
1901 B10
1M19 F1 1M20 A8 1M21 F1 1M22 F2 1M25 F9 1M26 F9 1M31 F2 1P11 A5 1R05 D3 1R06 D2 1R08 D1 2127 D6
2134 D6 2135 D6 2138 D6 2143 D6 2144 D6 2158 C3 2159 C4 2170 D5 2171 D6 2172 D6 2208 A6 2209 A6
1B11 A2 1C01 A3 1G50 A7 1G51 A7 1M01 D8 1M02 C9 1M03 F2 1M04 D10 1M15 C9 1M16 C9 1M17 C9
Part 1
H_17260_011a.eps
H_17260_011c.eps
2212 C6 2214 C6 2215 C6 2242 C6 2243 C6 2246 D7 2247 D7 2250 D7 2251 D7 2252 D7 2253 D7 2254 D7
Part 3
2256 D7 2257 D7 2259 D7 2260 D7 2261 D7 2262 A7 2263 A7 2264 A7 2265 A7 2267 D7 2268 D6 2273 D6
2283 A7 2285 A7 2311 A8 2314 B6 2315 A6 2316 B6 2317 B6 2319 B8 2327 A8 2328 A8 2329 A8 2330 A8
2331 A8 2332 A8 2333 A8 2334 A8 2335 A8 2336 A8 2337 A8 2339 A8 2340 A8 2408 B8 2409 B8 2410 B8 2411 C8
2412 C8 2413 C8 2414 C8 2417 C8 2418 C8 2419 C8 2420 B8 2421 C8 2422 C8 2423 B8 2432 C8 2433 C8 2434 C8
2435 C8 2436 C8 2437 C8 2438 C8 2439 B8 2440 B8 2441 C8 2442 C8 2443 C8 2444 C7 2445 C8 2446 C8 2447 C8
2448 C8 2449 C8 2600 F6 2601 F6 2609 F6 2613 E6 2614 E6 2615 F6 2616 F6 2617 F6 2809 F7 2810 F7 2813 E8
2828 E8 2901 B9 2902 B9 2903 B9 2906 B9 2907 B9 2909 B10 2910 B10 2911 B10 2912 B10 2940 C10 2A01 A9 2A02 A9
2A04 B9 2A08 A9 2A09 A9 2A10 B9 2A11 A9 2A12 A9 2A13 A10 2A14 A10 2A15 A8 2A16 B8 2A17 A10 2A18 A9 2A19 B9
2A20 B8 2A22 B9 2A23 A10 2A24 B9 2A26 A10 2A28 A10 2A29 B9 2A30 A9 2A32 B9 2A33 A9 2A34 A9 2A37 A10 2A38 A10
2A40 A9 2A41 A9 2B10 B4 2B11 B4 2B12 B3 2B13 B4 2B14 A3 2B15 A3 2B16 B3 2B18 C5 2B19 B5 2B20 B5 2B21 D5
57LC7.1L LA 7.
2B22 A3
2L23 A8
2M07 E9
2M55 E3
3135 D6
3225 A7
3266 C6
3344 B6
3383 A7
3411 C8
3624 F6
3852 E7
3896 E7
3A05 A9
3A31 A9
3L09 B6
3M11 E9
3M55 E2 2B24 A2 2B25 C4 2C55 A3 2C56 A3 2C57 A3 2C58 A5 2C59 A4 2C60 A3 2C61 A3 2L20 A9 2L21 A8 2L22 A8
2L24 A9 2L25 A9 2L26 A9 2L27 A9 2L28 A9 2L29 A9 2L30 A9 2L31 A9 2L32 A9 2L33 A9 2M05 E9 2M06 E9
2M10 C9 2M20 C9 2M21 C9 2M22 C9 2M23 C9 2M37 E1 2M38 E1 2M50 E3 2M51 E2 2M52 E2 2M53 E2 2M54 E2
2M56 E2 2M57 D2 2M58 D2 2M59 D2 2M60 D1 2M61 D2 2M62 D1 2M63 D1 2M65 D2 2M66 D2 3125 D6 3126 D6
3173 D5 3178 D6 3201 B7 3202 B7 3203 B7 3204 B7 3212 B7 3213 A6 3215 B7 3216 A6 3223 A7 3224 A7
3226 A7 3227 A8 3229 D7 3231 D7 3232 D7 3233 A8 3235 A8 3238 A8 3239 D6 3240 D7 3246 A7 3247 A7
3268 C6 3271 C6 3272 D6 3304 B6 3319 A6 3325 A6 3327 A6 3328 B8 3329 A6 3330 A8 3336 B8 3337 A8
3350 B6
3384 B7 3386 B6 3387 B6 3388 B6 3389 A8 3390 A8 3391 A8 3392 A8 3398 A7 3399 A7 3402 C8 3410 C8
3416 C8 3600 F6 3602 F6 3604 F6 3609 F6 3613 F6 3615 E6 3616 F6 3620 F6 3621 F6 3622 F6 3623 E6
3351 B6 3352 B6 3354 B7 3356 B7 3361 B6 3365 B6 3366 B6 3367 B6 3371 B7 3373 B7 3381 B7
Part 4
H_17260_011d.eps
3625 E6
3853 E7 3854 E8 3855 E8 3856 E8 3857 E8 3858 E8 3859 E8 3860 E7 3862 F7 3863 F7 3880 F8 3881 F8
3897 E7 3901 B9 3902 B9 3903 B9 3904 B9 3907 B9 3909 B10 3910 B10 3A01 A9 3A02 A9 3A03 A8 3A04 A9
3809 F7 3811 E8 3815 E8 3819 E8 3828 E7 3833 E7 3834 E7 3835 E7 3846 E7 3850 F7 3851 E7
Part 2
H_17260_011b.eps
3A06 A8 3A07 B8 3A08 B9 3A11 B8 3A13 B9 3A14 A10 3A19 A9 3A26 A8 3A27 A9 3A28 A9 3A29 A9 3A30 A9
3B10 B3 3B11 A3 3B12 A3 3B13 B5 3B14 A3 3B15 B5 3B17 A3 3B18 A3 3B19 A3 3L06 B6 3L07 B6 3L08 A6
H_17260_011.eps
3L10 A8 3L12 B6 3L13 B6 3L16 A8 3L20 A8 3L21 A9 3L22 A9 3L23 A9 3L24 A9 3L25 A9 3L26 B6 3M10 E9
040707
3M12 E9 3M18 C9 3M20 C9 3M21 C9 3M22 C9 3M23 C9 3M24 C9 3M50 E2 3M51 E3 3M52 E3 3M53 E2 3M54 E2
3M56 E2
3M57 D2
3M58 D2
3M59 E2
3M60 E2
3M61 E3
3M62 E3
3M63 D1
3M64 D2
3M65 D2
3M66 D2
3M67 D2
3M68 D2
3M69 D2
3M70 D2
3M71 D2
3M72 D1
3M73 D2
3M80 E1
3M81 E2
3M82 E1
3M83 E2
3M84 E1
3M85 E2
3M86 E1
3M87 E2
3M88 E1
3M89 E1
3M90 E2
3M91 E2
4124 D6
4162 E6
4164 E6
4166 E6
4174 E6
4203 A6
4204 A6
4205 A6
4206 A6
4214 A6
4215 A6
4301 B6
4302 A8
4303 A8
4308 B7
4309 A8
4310 A8
4314 B6
4315 B6
4326 A8
4401 A8
4402 A8
4448 C8
4601 F6
4602 F6
4605 F7
4806 E8
4902 B9
4903 B9
4B01 B4
4C01 A5
4C55 A3
4C56 A3
4C57 A4
4C58 A4
4C59 A4
4C60 A4
4C61 A3
4C62 A3
4L06 A5
4L07 B5
4L08 A5
4L09 A5
4L20 A8
4L21 A9
4L24 A9
4L25 A9
4M01 E8
4M02 E8
4M03 E9
4M37 E1
4M38 E2
4M57 D1
4M58 D1
5116 D6
5159 D4
5162 E6
5165 E6
5167 D6
5210 C6
5302 A8
5304 A8
5401 C8
5402 C8
5403 C8
5404 C8
5A03 A10
5A04 B10
5A05 A9
5A06 A9
5B01 B3
5B02 B4
5B03 B3
5B04 B5
5B05 B4
5B06 A5
5B10 A4
5B11 A5
5B12 A5
5B13 A4
5M14 C9
5M37 E1
5M56 E2
5M57 D1
5M58 D1
6301 A6
6302 B8
6303 B8
6304 B8
6308 A8
6309 A8
6310 A8
6311 A8
6312 A8
6313 A8
6604 F6 6605 F6 6606 F6 6607 F6 6608 F6 6615 E6 6B01 B3 6B02 B5 6B03 B5 6M06 C8 6M21 C9 6M22 C9 7113 D6 7114 D6 7202 C7 7207 A6 7311 B7 7312 A6 7313 A8 7316 A7 7410 B8 7601 F6 7812 E7 7813 E7 7814 F7 7817 E7 7824 F7 7825 F7 7851 E7 7852 E7 7860 F8 7A01 A9 7A05 A9 7A06 A9 7A07 A9 7B01 B3 7B03 B5 7B04 C4 7B05 A3 7M01 E9 7M03 E1 7M06 E2
Page 58
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 1 Top Side)

58LC7.1L LA 7.
Part 1
H_17260_011a.eps
040707
H_17260_011a.eps
040707
Page 59
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 2 Top Side)

59LC7.1L LA 7.
Part 2
H_17260_011b.eps
040707
Page 60
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 3 Top Side)

60LC7.1L LA 7.
Part 3
H_17260_011c.eps
040707
Page 61
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 4 Top Side)

61LC7.1L LA 7.
Part 4
H_17260_011d.eps
040707
Page 62
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Overview Bottom Side)

1163 E5
1M24 D2
2161 E7
2205 D4
2225 C5
2239 B4
2276 D4
2293 D4
2324 B5 1215 D4 1216 C4 1217 D4 1218 D4 1302 F7 1303 F7 1314 F7 1411 C3 1M11 E2 1M12 D2 1M13 D2 1M14 D2 1M23 E2
1M32 D2 2123 D5 2124 D5 2125 D5 2126 D5 2133 D5 2136 D5 2137 D5 2139 D5 2140 D5 2141 D5 2145 D5 2160 E6
2162 E6 2163 E6 2164 E5 2165 E6 2166 E6 2167 F6 2168 E5 2169 E6 2173 E7 2174 E7 2175 F6 2203 D4 2204 D4
2206 D4 2207 A5 2210 A5 2213 B5 2216 C4 2217 D6 2218 C5 2219 D5 2220 C5 2221 D5 2222 D5 2223 D5 2224 C5
2226 C5 2227 C5 2228 C5 2229 D5 2230 C4 2231 C4 2232 C4 2233 C4 2234 C4 2235 C4 2236 C4 2237 C4 2238 C4
2240 C4 2241 B5 2244 D5 2245 B4 2248 A5 2258 D4 2266 C4 2269 D4 2270 C4 2271 C4 2272 D4 2274 C4 2275 D4
2278 C4 2279 D4 2280 D4 2281 C4 2282 D4 2284 D5 2286 C4 2287 D4 2288 D4 2289 D5 2290 C4 2291 D4 2292 C4
2294 D4 2295 C5 2296 C5 2297 C4 2298 B4 2310 A4 2312 B4 2313 B4 2318 A4 2320 B5 2321 B4 2322 B4 2323 B4
2325 B4
2326 B4
2338 A4
2415 D3
2416 D3
2424 B3
2425 B3
2426 B3
2427 B3
2428 B3
2429 B3
2430 B3
2431 B3
2602 F1 2603 F2 2606 F2 2607 F2 2608 F2 2610 F2 2612 F2 2801 F4 2802 F4 2803 F3 2804 F4 2816 E3 2817 E3 2818 E4
Part 1
H_17260_012a.eps
Part 3
H_17260_012c.eps
3139 123 6263.1
2819 E4 2820 E4 2829 F3 2830 F3 2833 F3 2835 E4 2836 E4 2838 E4 2839 E3 2840 E3 2843 F3 2844 F3 2845 E3 2847 F3
2848 F3 2849 F3 2850 F4 2851 F3 2852 E4 2853 E3 2854 E3 2855 E3 2856 E4 2857 E4 2858 E3 2859 F4 2860 F4 2861 E3
2865 F4 2866 F4 2867 F4 2868 F4 2869 F4 2870 E4 2871 E4 2872 E3 2873 E3 2874 E3 2875 F3 2876 E4 2877 E3 2878 E3
2879 E3 2904 B3 2905 B2 2908 B2 2913 B2 2A21 A2 2A25 A2 2A27 B2 2A31 B2 2A35 A2 2A36 B2 2A45 A1 2A46 A2 2A47 A2
2B17 C7 2M01 E2 2M02 D2 2M03 D2 2M04 D2 2M09 D2 2M30 F9 2M31 F10 2M32 F9 2M33 F10 2M34 F10 2M35 F9 2M36 F9 2M40 E2
2M41 E2 2M42 E2 2M43 D2 2M44 D2 2M45 D2 2M46 D2 2M67 E2 2M68 D2 2M69 D2 2M70 D2 2M71 D2 2M90 E4 2M91 D4 3123 D5
62LC7.1L LA 7.
3124 D5
3170 F7
3222 C4
3258 D4
3305 A5
3321 B4
3343 F7
3364 A4
3395 A4
3617 F1
3884 E3
3934 C1
3L05 A4
3M15 D2
3M44 E2
4169 E6
4324 D3 3127 D5 3128 D5 3129 D5 3160 E6 3161 E7 3162 E5 3163 E5 3164 E5 3165 F6 3166 E6 3167 E6 3168 D5 3169 E6
3171 F6 3172 E5 3174 E5 3175 E5 3176 F7 3177 E5 3179 E7 3210 A5 3211 B5 3217 A5 3219 C4 3220 C4 3221 C4
3228 D4 3230 D4 3241 C4 3242 C4 3243 C4 3244 D4 3245 C4 3248 C4 3251 D4 3253 D4 3255 D5 3256 D5 3257 D4
3260 D6 3261 C6 3262 D6 3263 C5 3264 C5 3265 C5 3267 C5 3273 D3 3274 D3 3275 D3 3276 D3 3300 B4 3303 A4
3306 B5
3323 B4 3324 A4 3326 B3 3331 A4 3332 A4 3333 A4 3334 A4 3335 A4 3338 A4 3339 A4 3340 A4 3341 A4 3342 A4
3345 F7 3346 B4 3347 B4 3348 B4 3349 B4 3353 B5 3355 B5 3357 B5 3358 B5 3359 B5 3360 B4 3362 A5 3363 A4
3307 B5 3308 A5 3309 A5 3310 A4 3311 A4 3312 A4 3313 A4 3314 A4 3315 A4 3316 B4 3317 A4 3318 B4
H_17260_012b.eps
Part 4
H_17260_012d.eps
3368 A4 3372 B4 3374 A5 3375 B4 3376 A4 3377 B4 3378 B4 3379 B4 3380 A4 3382 B4 3385 B4 3393 A4 3394 A4
Part 2
3396 A5 3397 B4 3417 B3 3418 B3 3419 B3 3420 B3 3601 F1 3603 F2 3605 F2 3607 F2 3608 F2 3611 F2 3612 F2
3618 F2 3619 F2 3801 F3 3802 F3 3810 F3 3820 E4 3830 F4 3831 F4 3832 F4 3864 E3 3877 E3 3882 E3 3883 E3
3885 E3 3886 E3 3905 B2 3906 B2 3908 B2 3911 C1 3912 C1 3913 C1 3914 C1 3915 C1 3916 C1 3917 C1 3918 C1
3935 C1 3937 C1 3938 C1 3940 C1 3942 C1 3943 C1 3A09 A2 3A12 A2 3A15 B2 3A17 B2 3L01 B4 3L02 B4 3L04 A4
3L11 A5 3L14 B5 3L15 B4 3M01 E2 3M02 E2 3M03 E2 3M04 D2 3M05 D2 3M06 D2 3M07 D2 3M08 D2 3M09 D2 3M14 D2
3M30 F9 3M31 F9 3M32 F10 3M33 F10 3M34 F9 3M35 F9 3M36 F10 3M37 F10 3M38 F9 3M39 F9 3M41 E2 3M42 E2 3M43 E2
3M45 E2
4175 F6
3M46 E2
4207 C4
3M47 D2
4210 C4
3M48 D2
4211 D4
3M92 D4
4212 D4
3M93 D3
4213 C4
3M94 D4
4216 D4
3M95 D4
4217 D4
4125 D4
4306 A5
4126 D4
4307 A5
4163 E6
4313 B4
4167 E5
4316 B5
4168 E5
4323 B4
H_17260_012.eps
040707
4325 D3
4804 F4
4805 F3
4901 C1
4A01 A2
4A02 A2
4M05 E2
4M51 F10
4M52 F10
4M53 F9
4M90 D4
5160 D6
5161 E6
5163 D5 5164 F6 5166 E6 5168 E7 5211 A5 5212 D5 5213 C4 5214 C4 5215 A5 5216 C4 5217 A5 5218 D4 5219 D4 5220 C4 5221 C4 5222 C4 5223 D5 5224 C4 5225 C4 5226 C4 5227 C4 5228 C4 5301 B4 5801 E4 5810 E3 5811 F4 5812 F4 5813 E4 5814 E3 5815 F3 5816 E3 5817 E3 5818 E3 5819 E4 5A07 A2 5M01 D2 5M13 D2 6160 E5 6161 E5 6163 F6 6201 A5 6202 A5 6305 B5 6306 F7 6307 F6 6317 A4 6318 A4 6610 F1 6611 F2 6612 F2 6613 F2 6614 F2 6801 F4 6802 F3 6830 F4 6831 F4 6914 C1 6916 C1 6919 C1 6M01 E2 6M02 D2 6M03 D2 6M04 D2 6M05 D2 6M31 F9 6M32 F10 6M33 F9 6M34 F10 6M35 F9 6M42 E2 6M45 D2 6M46 D2 7160 D6 7161 E6 7162 E6 7163 E5 7164 E5 7203 C4 7204 D5 7205 C5 7206 C4 7208 A5 7210 A5 7211 D4 7213 D3 7214 D3 7308 A4 7310 B3 7314 B5 7315 B5 7317 A4 7320 A5 7321 A5 7322 A5 7323 B4 7411 C3 7811 F3 7816 E3 7818 E4 7850 F4 7861 E3 7901 B2 7902 C1 7911 C1 7912 C1 7913 C1 7914 C1 7915 C1 7916 C1 7917 C1 7919 C1 7922 C1 7B02 C6 7M04 E2 7M05 E2 7M90 D4 7M91 E4
Page 63
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 1 Bottom Side)

63LC7.1L LA 7.
Part 1
H_17260_012a.eps
040707
Page 64
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 2 Bottom Side)

64LC7.1L LA 7.
Part 2
H_17260_012b.eps
040707
Page 65
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 3 Bottom Side)

Part 3
65LC7.1L LA 7.
H_17260_012c.eps
040707
Page 66
Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 4 Bottom Side)

66LC7.1L LA 7.
Part 4
H_17260_012d.eps
040707
Page 67

Side A/V Panel

Circuit Diagrams and PWB Layouts
67LC7.1L LA 7.
D D
A
B
C
D
E
F
3139 123 6229.1
123456789
SIDE FACING SIDE AV
1301 YKF51-5564
SVHS
5
CVBS
R
YELLOW
2
1
1302-1
WHITE
L
5 6 4
1302-2
RED
8 9 7
1302-3
1303
YKB21-5101A
HEADPHONE
123456789
1
Y_CVBS
3
4
C
2
S302
3301
I306
S303
I308
4302
4301
S304
I309
S305
5 4 2
3 7 8 1
S306
S301
75R
S307
2311 22p
I311
S308
I312
2303 22p
I303
3302
47p
75R
3
DF3A6.8
6301
12
3
DF3A6.8
6303
3
DF3A6.8
6304
1212
3
DF3A6.8
6305
12
3
DF3A6.8
6306
12
3
DF3A6.8
6302
12
3308
2308 22n
**
3310
**
4308
4309
2313 3314
**
**
2314 3315
**
**
2307 22n
3
6307
DF3A6.8
12
3303
10R
3305
10R
**
**
2309
10n
23022301 47p
2304 47p
2310
23053309
**
23063311
**
3304
100R
4304
3306
100R
4306
3307
100R
4307
10K 10K10n
1301 A1 1302-1 C1 1302-2 D1 1302-3 E1 1303 E1
S307 F2 S308 F2 S310 E8 S311 E8
S312 E8 1304 B9 1308 D9 1309 D7 1310 D9 2301 A4 2302 A4 2303 A2 2304 B4
A
2305 D4 2306 E4 2307 F4 2308 F4 2309 F4 2310 F4 2311 C2 2312 D8
B
2313 D3 2314 E3 3301 B2 3302 A4 3303 A4 3304 A5 3305 B4 3306 B5 3307 C5 3308 D4 3309 D4 3310 E4 3311 E4
I314
I315
I316
I317
I318
I319 I320
FRONT_Y_CVBS_IN
FRONT_C_IN
L_FRONT_IN FRONT_DETECT R_FRONT_IN
HEAD_PH_L HEAD_PH_R
TO 1M36 OF BJ/EBJ SSB
1304
I321
1 2 3 4 5 6 7 8
9 10 11
3312 F5 3313 F5
C
3314 D4 3315 E4 4301 D2 4302 D2
TO 1H01 OF BJ SSB / TO 1M60 OF EBJ SSB
1309
1
I330
2
I331
3
I332
4 5
B5B-PH-K
5300 220R 4310
4311
S310
S311
2312 100u
I325 I326 I327 I328
4303
S312
16V
1310
B3B-PH-K
1308
56
292303-4
1 2 3
1 2 3 4
USB
D
E
4303 E8 4304 A5 4306 B5 4307 C5 4308 F4 4309 F4 4310 E7 4311 E7 5300 D7 6301 B3 6302 B3 6303 C3 6304 D3 6305 E3 6306 F3 6307 F3 I303 A3 I306 C2 I308 D2 I309 E2 I311 F2 I312 F2 I314 B7 I315 B7 I316 B7 I317 B7 I318 C7 I319 C7
F
I320 C7 I321 B9 I325 D8 I326 D8 I327 E8 I328 E8 I330 D7 I331 D7 I332 E7 S301 A2 S302 A2
33133312
**
2305 2306 2313 2314 3314 3315 3308 3310 3309 3311
DIVERSITY TABLE
EBJ 2K7 BJ 2K7
100p 100p 100p 100p NA 680p NA 680p NA 33K
NA 33K 100R 1K 100R 1K 100K NA 100K NA
LC07
1n 1n 1n 1n
NA
NA 150R 150R
33K 33K
S303 C2
G_16850_023.eps
110107
S304 D2 S305 E2 S306 F2
Page 68
Circuit Diagrams and PWB Layouts
68LC7.1L LA 7.

Layout Side A/V Panel (Top Side)

1301 A1 1302 A2 1303 A3 1304 A2 1308 A4 1309 A3 1310 A3
3139 123 6229.1

Layout Side A/V Panel (Bottom Side)

2301 A4 2302 A4 2303 A4 2304 A3 2305 A3 2306 A3
2307 A2 2308 A2 2309 A2 2310 A2 2311 A4 2312 A1
2313 A3 2314 A3 3301 A4 3302 A4 3303 A4 3304 A4
3305 A3 3306 A3 3307 A3 3308 A3 3309 A3 3310 A3
3311 A3 3312 A2 3313 A2 3314 A3 3315 A3 4301 A3
4302 A3 4303 A1 4304 A4 4306 A3 4307 A3 4308 A2
4309 A2 4310 A1 4311 A1 5300 A2 6301 A4 6302 A4
G_16850_026.eps
120107
6303 A4 6304 A3 6305 A2 6306 A2 6307 A2
3139 123 6229.1
G_16850_027.eps
020207
Page 69
Circuit Diagrams and PWB Layouts

Keyboard Control Panel (ME7)

69LC7.1L LA 7.
A
B
C
D
1234
E E
6014 BZX384-C5V6
KEYBOARD CONTROL
3014
820R
I118I116 I117
1004
3017
1014
SKQNAB
VOLUME-
0R
0R
BZX384-C5V66017
1001
3013
150R
1011
BZX384-C5V66015
SKQNAB
CHANNEL+
Diversity Resistor
F310 F311
1002
3010
390R
0R
3015
1012
SKQNAB
CHANNEL-
3099
RES
3011
3016
1013
MENU
6016 BZX384-C5V6
1003
560R
SKQNAB
3012
I115I114I112 I113I111
1015
6018 BZX384-C5V6
1005
VOLUME+
KEYBOARD
1K8
1016
SKQNAB
ON / OFF
6011
I110
SKQNAB
BZX384-C3V9
6012
BZX384-C3V9
*
3010
3011
3012
3013
3014
6011
6012
6013
F002
6013
2001
470p
F001
BZX384-C3V9
LC06
390R
560R
1K8
150R
820R
YES
YES
NO
RES
5001
Jaguar
390R
560R
1K8
150R
820R
NO
NO
YES
270R
4001
1M01 1 2 3
S3B-PH-K
A
B
C
D
Personal Notes:
1001 C1 1002 C1 1003 C1 1004 C2 1005 C2 1011 C1 1012 C1 1013 C2 1014 C2 1015 C2 1016 C3 1M01 A4 2001 B3 3010 B1 3011 B2 3012 B2 3013 B1 3014 B2 3015 B1 3016 B2 3017 B2 3099 D1 4001 B4 5001 B4 6011 B3 6012 C3 6013 B3 6014 C1 6015 C1 6016 C1 6017 C2 6018 C2 F001 B4 F002 B3 F310 D1 F311 D1 I110 B3 I111 B1 I112 B1 I113 B2 I114 B2 I115 B2 I116 C1 I117 C2 I118 C2
3139 123 6219.1
1234
G_16850_024.eps
110107
E_06532_012.eps
131004
Page 70
Circuit Diagrams and PWB Layouts

Layout Keyboard Control Panel (ME7)(Top Side)

1011 A5 1012 A6 1013 A3 1014 A2 1015 A1 1016 A7 1M01 A8
3139 123 6219.1
70LC7.1L LA 7.
G_16850_028.eps
120107

Layout Keyboard Control Panel (ME7)(Bottom Side)

2001 A1 3010 A4
3011 A6 3012 A8
3013 A5 3014 A7
3139 123 6219.1
3015 A3 3016 A6
3017 A7 3099 A8
4001 A1 5001 A1
6011 A2 6012 A3
6013 A1 6014 A4
6015 A3 6016 A5
6017 A6 6018 A8
G_16850_029.eps
020207
Page 71
Circuit Diagrams and PWB Layouts

Keyboard Control Panel (ME5P)

71LC7.1L LA 7.
A
B
C
1234
E E
KEYBOARD CONTROL
1684
1
F309
2 3
S3B-PH-K
F307
6306
F308
TO 1311 OF SSB BD
BZX384-C4V7
Diversity Resistor
3999
F310 F311
RES
BZX384-C4V7
I302
6305
3317
RES
6309
KEYBOARD
3318
150R
I304
RES
1309
SKQNAB
CH+
RES
6310
3319
390R
I305
1310
SKQNAB
CH-
RES
6314
3324
560R
I303
1314
SKQNAB
RES
6311
3320
I306
I308
1311
SKQNAB
VOL+
RES
6312
3321 820R1K8
I307
I309
1312
SKQNAB
VOL-
1313
SKQNAB
ON / OFFMENU
A
B
C
Personal Notes:
1309 C2 1310 C2 1311 C3 1312 C4 1313 C4 1314 C3 1684 B1 3317 B2 3318 B2 3319 B2 3320 B3 3321 B4 3324 B3 3999 C1 6305 C1 6306 B1 6309 C2 6310 C2 6311 C3 6312 C4 6314 C3 F307 B1 F308 B1 F309 B1 F310 C1 F311 C1 I302 B1 I303 B3 I304 B2 I305 B2 I306 B3 I307 B4 I308 C3 I309 C4
3139 123 6275.1
1234
H_17260_021.eps
040707
E_06532_012.eps
131004
Page 72
Circuit Diagrams and PWB Layouts
72LC7.1L LA 7.

Layout Keyboard Control Panel (ME5P)(Top Side)

1309 A1 1310 A3 1311 A5 1312 A7 1313 A8 1314 A4 1684 A1
3139 123 6275.1

Layout Keyboard Control Panel (ME5P)(Bottom Side)

3317 A8 3318 A8
3319 A7 3320 A4
3321 A3 3324 A5
3999 A2 6305 A8
6306 A8 6309 A7
6310 A7 6311 A4
H_17260_022.eps
040707
6312 A3 6314 A6
3139 123 6275.1
H_17260_023.eps
040707
Page 73

1080P Panel: On Chip uController

12345678
OCM ON CHIP MICROCONTROLLER
F1 F1
F2
A
B
Circuit Diagrams and PWB Layouts
OCMADDR(0) OCMADDR(1) OCMADDR(2) OCMADDR(3) OCMADDR(4) OCMADDR(5) OCMADDR(6) OCMADDR(7) OCMADDR(8) OCMADDR(9)
AA1 AA2 AA3 Y1 Y2 Y3 W1 W2 W3 V1
7101-4
GM1601
OCM-ADR
OCMADDR0 OCMADDR1 OCMADDR2 OCMADDR3 OCMADDR4 OCMADDR5 OCMADDR6 OCMADDR7|GPIO_18 OCMADDR8|GPIO_G11_B0 OCMADDR9|GPIO_G11_B1
OCMADDR10|GPIO_G11_B2 OCMADDR11|GPIO_G11_B3 OCMADDR12|GPIO_G11_B4 OCMADDR13|GPIO_G11_B5 OCMADDR14|GPIO_G11_B6 OCMADDR15|GPIO_G11_B7
OCMADDR16|GPIO_19 OCMADDR17|GPIO_20 OCMADDR18|GPIO_21 OCMADDR19|GPIO_22
73LC7.1L LA 7.
1101 D8 3110 C7 3111 C7 3112 D6 3113 D6 3114 D5 3115 D5 3116 E5 3117 E5 3118 E5 3119 D5
A
6101 D7 6102 D7
B
7101-4 A3 7101-5 C3 F110 D7 F111 D7 F112 D7 I110 D5 I111 D5 I112 D5 I113 D5 I114 E5 I115 E5 I116 E5 I117 D5
V2 V3
V4 U1 U2 U3 U4
T1
T2
T3
OCMADDR(10) OCMADDR(11) OCMADDR(12) OCMADDR(13) OCMADDR(14) OCMADDR(15) OCMADDR(16) OCMADDR(17) OCMADDR(18) OCMADDR(19)
C
D
E
F2
OCMDATA(0) OCMDATA(1) OCMDATA(2) OCMDATA(3) OCMDATA(4) OCMDATA(5) OCMDATA(6) OCMDATA(7) OCMDATA(8) OCMDATA(9) OCMDATA(10) OCMDATA(11) OCMDATA(12) OCMDATA(13) OCMDATA(14) OCMDATA(15)
AD4
OCMDATA0
AF3
OCMDATA1
AE3
OCMDATA2
AD3
OCMDATA3
AF2
OCMDATA4
AE2
OCMDATA5
AD2
OCMDATA6
AF1
OCMDATA7
AE1
OCMDATA8|GPIO_G10_B0
AD1
OCMDATA9|GPIO_G10_B1
AC1
OCMDATA10|GPIO_G10_B2
AC2
OCMDATA11|GPIO_G10_B3
AC3
OCMDATA12|GPIO_G10_B4
AB1
OCMDATA13|GPIO_G10_B5
AB2
OCMDATA14|GPIO_G10_B6
AB3
OCMDATA15|GPIO_G10_B7
7101-5
GM1601
OCM_DATA
OCM_TIMER1|PWM3|GPIO_13
OCM_UDI|GPIO_27
OCM_UDO|GPIO_26
OCM_INT1|GPIO_30
OCM_INT2|GPI_10
OCM_CS0_|GPIO_23 OCM_CS1_|GPIO_24 OCM_CS2_|GPIO_25
ROM_CS_|GPI_9
OCM_WE_
OCM_RE_
D25
M2
M1
+3V3_SW
C
3110 10K
I117
I110
I111
L2
L1
R3
R2
T4
P1
P2
R1
I112
I113
I114 I115 I116
3119
10K
3114 10K
3115 10K
#OCM_WE
#OCM_RE
3116 3117 10K
10K
10K3118
#ROM_CS
F2
F2
+3V3_SW
+3V3_SW
3112 100R
3113
100R
UART_RX
UART_TX
6101
3111 10K
6102
BZX384-C6V8
BZX384-C6V8
GPROBE UART
1101
F110 F111 F112
45
3 2 1
B3B-PH-SM4-TBT(LF)
D
E
3139 123 6225.1
1234567
G_16860_019.eps
240107
8
Page 74
Circuit Diagrams and PWB Layouts
74LC7.1L LA 7.

1080P Panel: Flash & NVM

1
23456789
10 11 12
FLASH & NVM
F2 F2
A
+3V3_IO
G
B
C
D
E
F
F5 F6
F6
F1
OCMADDR(1) OCMADDR(2) OCMADDR(3) OCMADDR(4) OCMADDR(5) OCMADDR(6) OCMADDR(7) OCMADDR(8) OCMADDR(9) OCMADDR(10) OCMADDR(11) OCMADDR(12) OCMADDR(13) OCMADDR(14) OCMADDR(15) OCMADDR(16) OCMADDR(17) OCMADDR(18)
#OCM_WE #OCM_RE #ROM_CS
+3V3_IO
NVM_WP_SCALER
SCL_IO
SDA_IO
3232 1K0 3217
220K
2212 10n 10n
2213
F238 F239 F242 F245 F247
M29W400DT-55N6
25
0
24
1
23
2
22
3
21
4
20
5
19
6
18
7
8
8
7
9
6
10
5
11
4
12
3
13
2
14
1
15
48
16
17
17
15
RB
12
RP
11
WE
28
OE
26
CE
47
BYTE
+3V3_SW
3229
RES
10K
F250
F251
F254
+3V3_IO
7201
37
EPROM
512Kx8/256Kx16
0
A
4M-1
27
46
+3V3_SW
7202 RES
8
Φ
(4Kx8)
7
WC
EEPROM
6
SCL
5
4
2210
100n 2211
16V10u
0 1 2 3 4 5 6 7
D
8
9 10 11 12 13 14 15
A-1
NC
M24C32-WMN6
0
ADR
1 2SDA
F1
1 3
F211 F213 F215 F217
F221 F223 F225 F226
F227 F229 F231 F232
F234 F235 F236 F237
F240 F243 F246 F248
2215 100n
F253
1
6211
BZX384-C6V8
3205-1 10K 3205-2 10K
3205-4
3204-1 10K 3204-2 10K 3204-3 10K 3204-4 10K
3230 3231 10K 3226 3227
3202-1 10K 3202-3 10K 3202-4 10K 3202-2 10K
+3V3_SW
3V2
5
VCC
MR
V0
SUB
2
3
18 27
45
18 27 36
5
4
10K
10K 10K
18 36 45
7
2
7203 PST596J
4
VOUT
3
GND
1201
SKQR 2 4
For Software Development only - (RES)
OCMADDR(0) OCMADDR(1) OCMADDR(2) OCMADDR(3)
OCMADDR(4) OCMADDR(5) OCMADDR(6) OCMADDR(7)
OCMADDR(8) OCMADDR(9) OCMADDR(10) OCMADDR(11)
OCMADDR(12) OCMADDR(19) OCMADDR(17) OCMADDR(18)
OCMADDR(16) OCMADDR(14) OCMADDR(13) OCMADDR(15)
29
F212 F214 F216 F218 F219 F220 F222 F224
100n
RES 2214
OCMDATA(0) OCMDATA(1) OCMDATA(2) OCMDATA(3) OCMDATA(4) OCMDATA(5) OCMDATA(6) OCMDATA(7)
OCMADDR(0)
31 33 35 38 40 42 44 30 32 34 36 39 41 43 45
9 10 13 14 16
1 2 3
10K3211
10K3213
10K
10K3210
3212
+3V3_IO
3214
10K
10K
10K3205-3 3 6 10K
F241
RES
1SS356
6210
1u0
3225
2216
3222 1K0
F252
V
2
3223 10K
RES
3215
I215
RES
F233
RES
32193218
10K
3216
3224
330R
10K
F230
RES
3228
MAIN_RESET
#RESET
F6
F3
A
B
C
D
E
F
G
1201 F8 2210 B6 2211 B6 2212 D4 2213 D5 2214 F7 2215 F8 2216 F10 3202-1 D9 3202-2 D9 3202-3 D9 3202-4 D9 3204-1 C9 3204-2 C9 3204-3 C9 3204-4 D9 3205-1 C9 3205-2 C9 3205-3 C9 3205-4 C9 3210 B9 3211 B9 3212 B9 3213 B10 3214 C10 3215 C10 3216 C10 3217 D4 3218 D10 3219 D10 3222 F9 3223 F9 3224 F10 3225 G10 3226 D9 3227 D9 3228 D10 3229 F5 3230 D9 3231 D9 3232 D4 6210 F10 6211 F8 7201 B6 7202 E6 7203 F9 F211 C8 F212 C7 F213 C8 F214 C7 F215 C8 F216 C7 F217 C8 F218 C7 F219 C7 F220 C7 F221 C8 F222 C7 F223 C8 F224 C7 F225 C8 F226 C8 F227 C8 F229 C8 F230 C10 F231 C8 F232 D8 F233 D10 F234 D8 F235 D8 F236 D8 F237 D8 F238 D5 F239 D5 F240 D8 F241 D10 F242 D5 F243 D8 F245 D5 F246 D8 F247 D5 F248 D8 F250 F5 F251 F5 F252 F9 F253 F8 F254 F5 I215 F10
H
3139 123 6225.1
PCB MB 1080 BOLT-ON 12NC : 3139_123_62241_02 PCB SB 1080 BOLT-ON 12NC : 3139_123_62251_02
12345
6 7 8 9 10 11 12
G_16860_020.eps
240107
H
Page 75
Circuit Diagrams and PWB Layouts
75LC7.1L LA 7.

1080P Panel: LVDS In

123456789101112
F3 F3
A
B
C
D
E
F
G
H
3139 123 6225.1
LVDS IN
7101-6
GM1601
VIDEO
VCLAMP|GPIO_31
VDV|VSOG|GPIO07
I310
3331
I311
I312
I314
I315 I316 I317 I318 I319 I320 I321 I322 I323
F333
270R
D16
C14
B14
A14
A17 D14 A15 B15 C15 D15 A16 B16 C16
A20
SVCLK|GPI_0
SVHSYNC|GPIO_02
SVVSYNC|GPIO_01
SVODD|GPIO_00
SVDV|VCOAST|GPIO_03 SVDATA7|GPIO_G00_B7 SVDATA6|GPIO_G00_B6 SVDATA5|GPIO_G00_B5 SVDATA4|GPIO_G00_B4 SVDATA3|GPIO_G00_B3 SVDATA2|GPIO_G00_B2 SVDATA1|GPIO_G00_B1 SVDATA0|GPIO_G00_B0
VCLK|GPI_01
3314 10K
3315
3316 10K
3319 10K
3321 10K
3324 10K
3326 10K
3329 10K
10K
10K3318
10K3320
10K3323
10K3325
10K3327
VCLK
RES
PCB MB 1080 BOLT-ON 12NC : 3139_123_62241_02 PCB SB 1080 BOLT-ON 12NC : 3139_123_62251_02
123
VODD|HSOUT|GPIO_06
VVS|GPIO_05
VHS_CSYNC|GPIO_04
VGRN0|GPIO_G02_B0 VGRN1|GPIO_G02_B1 VGRN2|GPIO_G02_B2 VGRN3|GPIO_G02_B3 VGRN4|GPIO_G02_B4 VGRN5|GPIO_G02_B5 VGRN6|GPIO_G02_B6 VGRN7|GPIO_G02_B7
VRED0|GPIO_G01_B0 VRED1|GPIO_G01_B1 VRED2|GPIO_G01_B2 VRED3|GPIO_G01_B3 VRED4|GPIO_G01_B4 VRED5|GPIO_G01_B5 VRED6|GPIO_G01_B6 VRED7|GPIO_G01_B7
VBLU0|GPIO_G03_B0 VBLU1|GPIO_G03_B1 VBLU2|GPIO_G03_B2 VBLU3|GPIO_G03_B3 VBLU4|GPIO_G03_B4 VBLU5|GPIO_G03_B5 VBLU6|GPIO_G03_B6 VBLU7|GPIO_G03_B7
B4B-PH-SM4-TBT(LF)
6
5
4 3 2 1
1302
RES
CON_STND_MAL_N40_M2
4315
4316
4317
DF13-40DP-1.25V
RES
B17
D20
B20
C20
D19
A23 C22 B22 A22 D21 C21 B21 A21
C19 B19 A19 D18 C18 B18 A18 C17
B25 A25 D24 C24 B24 A24 C23 B23
270R
3333
270R
3334
F310
F311
F312
F313
270R
3335
270R
3336
3337 270R
3357
3338 270R
RES
3310 270R 3311
270R 270R
3312
10K
4310
RES
4311
270R
3340 270R
3341 270R
270R
3342
270R3343
270R
3344
3345
3346 270R
3347 270R
270R
3339
270R
3348
VDV
VVS
VHS_CSYNC
I313
F316 F318 F319 F321 F322 F324 F325 F327
F329 F330 F332 F334 F335 F336 F338 F339
270R
270R
270R3351
270R
3352
3350
3349
3353 270R
270R3354
270R
3355
270R
3356
F341 F342 F343 F345 F346 F348 F349 F351
VFF
VGRN(0) VGRN(1) VGRN(2) VGRN(3) VGRN(4) VGRN(5) VGRN(6) VGRN(7)
VRED(0) VRED(1) VRED(2) VRED(3) VRED(4) VRED(5) VRED(6) VRED(7)
VBLU(0) VBLU(1) VBLU(2) VBLU(3) VBLU(4) VBLU(5) VBLU(6) VBLU(7)
VRED(2) VRED(3) VRED(4) VRED(5) VRED(6) VRED(7) VGRN(2)
VGRN(3) VGRN(4) VGRN(5) VGRN(6) VGRN(7) VBLU(2) VBLU(3)
VBLU(4) VBLU(5) VBLU(6) VBLU(7) VHS_CSYNC VVS VDV
VRED(0) VRED(1) VGRN(0) VGRN(1) VBLU(0) VBLU(1) VFF
+3V3_LVDSA
1u0
2316
+3V3_LVDSVCC
2315
100n
PLLVCC
27
0
29
1
30
2
32
3
RA
33
4
35
5
37 12
6
0
39
1
43
2
45
RB
3
46
4
47
5
51
6
53
0
54
1
55
2
1
RC
3
3
4
5
5
6
6
7
0
34
1
41
2
42
RD
3
49
4
50
5
2
6
INTERFACE
PLLGND
24 23
2314
100n
13
LVDSVCC
Φ
LCD PANEL
RECEIVER
GND LVDSGND
22
283644
52
4
56
VCC
CLKOUT
21
+3V3_LVDSD
314048
RA+
RA-
RB+
RB-
RC+
RC-
RD+
RD-
RCLK+
RCLK-
PDWN
8
14
100n
100n
2313
7301 THC63LVDF84B
10
9
1138
16
15
20
19
18
17
25
26
VCLK
2312
I324
100n
100R
3317
3322
3328
3330
2311
100n
3313
100R
100R
100R
100R
3332
4313
4312
2310
MAIN_SCL
F5
F2
+3V3_LVDSD
F314
2317
MAIN_SDA
MAIN_RESET
RA+
RA-
RD+
RB+
RD-
RB-
RCLK+
RCLK-
RC+
RC-
RC+
RD+
RC-
RB+
RB-
RD-
RCLK+
RA+
RA-
RCLK-
4K7
+VDISP
100n
4314
F315
F317
F320
F323
F326
F328
F331
F337
F340
F344
F354
F350
F352
F353
"300" ~ "399"
456789101112
1G51
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
42
41
G_16860_021.eps
240107
A
B
C
D
E
F
G
H
1302 B12 1G51 C12 2310 B10 2311 B10 2312 B9 2313 B9 2314 B8 2315 B8 2316 B7 2317 F10 3310 B6 3311 B6 3312 B6 3313 C10 3314 B2 3315 C2 3316 C2 3317 C9 3318 C2 3319 C2 3320 C2 3321 C2 3322 D9 3323 C2 3324 C2 3325 C2 3326 C2 3327 D2 3328 D9 3329 D2 3330 E9 3331 D2 3332 E10 3333 F4 3334 F5 3335 F5 3336 F5 3337 F5 3338 F5 3339 F5 3340 F5 3341 F5 3342 F5 3343 F5 3344 F5 3345 F5 3346 F5 3347 F6 3348 F6 3349 F6 3350 F6 3351 F6 3352 F6 3353 F6 3354 F6 3355 F6 3356 F6 3357 B5 4310 B5 4311 C5 4312 B11 4313 B11 4314 B11 4315 C12 4316 C12 4317 C12 7101-6 B3 7301 C9 F310 B5 F311 B5 F312 B5 F313 C5 F314 E10 F315 C11 F316 C6 F317 C11 F318 C6 F319 C6 F320 C11 F321 C6 F322 C6 F323 C11 F324 C6 F325 C6 F326 C11 F327 C6 F328 D11 F329 C6 F330 D6 F331 D11 F332 D6 F333 D2 F334 D6 F335 D6 F336 D6 F337 D11 F338 D6 F339 D6 F340 D11 F341 D6 F342 D6 F343 D6 F344 D11 F345 D6
F346 D6 F348 D6 F349 E6 F350 E11 F351 E6 F352 E11 F353 F11 F354 D11 I310 B2 I311 C2 I312 C2 I313 C6 I314 C2 I315 C2 I316 C2 I317 C2 I318 C2 I319 C2 I320 C2 I321 C2 I322 C2 I323 D2 I324 E9
Page 76
Circuit Diagrams and PWB Layouts
76LC7.1L LA 7.

1080P Panel: LVDS Out

12345678910
F4 F4
A
B
C
D
E
F
LDVS OUT
3413
3K3
AC16
OEXTR
C26
PWM0|GPIO_10
C25
PWM1|GPIO_11
AF17
DHS|GPIO_14
AD16
DVS|GPIO_15
AD7
DEN|GPIO_16
I415
7101-7
GM1601
CTRL
PPWR|GPIO_08
PBIAS|GPIO_09
DCLK|GPIO_17
PWM2|GPIO_12
AC7
A26
B26
D26
F410
F3
I411
3410
10K
3411 15K
I413
7412 PDTC114ET
AC+|GPIO_G06_B6
AC-|GPIO_G06_B7
A3+|GPIO_G06_B4
A3-|GPIO_G06_B5
A2+|GPIO_G05_B1
A2-|GPIO_G05_B2
A1+|GPIO_G05_B4
A1-|GPIO_G05_B5
A0+|GPIO_G05_B6
A0-|GPIO_G05_B7
SHIELD5 SHIELD4 SHIELD3 SHIELD2 SHIELD1 SHIELD0
BC+
LVDS
GM1601
7101-8
+VDISP
BC-
B3+
B3-
B2+
B2-
B1+
B1-
B0+
B0-
AE20 AF20
AE19 AF19
AE21 AF21
AE22 AF22
AE23 AF23
AD14
AE13
AE11 AD11 AC11
AF10
AE12
AF13
AF11
AF12
AF14
AE14
AF15
AE15
AF16
AE16
5410
2410
4u7
I412
7411
2
1
I410
3
SI2301BDS-T1-E3
3412
100R
I414
2414 1u0 16V
RES
5411
120R
4401
TXACp TXACn
TXA3p TXA3n
TXA2p TXA2n
TXA1p TXA1n
TXA0p TXA0n
TXBCp TXBCn
TXB3p TXB3n
TXB2p TXB2n
TXB1p TXB1n
TXB0p TXB0n
TXA0n
TXA0p TXA1n
TXA1p TXA2n
TXA2p TXACn
TXACp TXA3n
TXA3p
TXB0n
TXB0p TXB1n
TXB1p TXB2n
TXB2p TXBCn
TXBCp TXB3n
TXB3p
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
DLW21S
2412 2413 10p
2415 10p 2416 10p
2417 10p 2418 10p
2419 10p 2420 10p
2421 2422 10p
2423 10p 2424 10p
2425 10p 2426 10p
2427 10p 2428 10p
2429 10p 2430 10p
2432 10p
RES
2411
100n
2434
10p
10p
10p2431
16V
47u
+VPANEL
F411
F412 F413 F414 F415 F416 F417
F418 F419
F420 F421
F422 F423 F424 F425 F426 F427
F428 F429
F430 F431
11 12
1G52 50
48 49 46 47 44 45 425143
41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5
FI-RE41S-HF
4 3 2 1
F432
G
A
B
C
D
E
F
G
1411 B8 1412 C8 1413 C8 1414 D8 1415 D8 1416 E8 1417 E8 1418 F8 1419 F8 1420 G8 1G52 B11 2410 B4 2411 B10 2412 B9 2413 B9 2414 C4 2415 C9 2416 C9 2417 C9 2418 C9 2419 D9 2420 D9 2421 D9 2422 D9 2423 E9 2424 E9 2425 E9 2426 E9 2427 F9 2428 F9 2429 F9 2430 F9 2431 G9 2432 G9 2434 B10 3410 B4 3411 B4 3412 B4 3413 C1 4401 A6 5410 A4 5411 A5 7101-7 B2 7101-8 F4 7411 B4 7412 C4 F410 C3 F411 C10 F412 C10 F413 C10 F414 C10 F415 C10 F416 C10 F417 C10 F418 D10 F419 D10 F420 D10 F421 D10 F422 D10 F423 D10 F424 D10 F425 D10 F426 D10 F427 E10 F428 E10 F429 E10 F430 E10 F431 E10 F432 E11 I410 B5 I411 B4 I412 B4 I413 B4 I414 B4 I415 B1
H
3139 123 6225.1
PCB MB 1080 BOLT-ON 12NC : 3139_123_62241_02 PCB SB 1080 BOLT-ON 12NC : 3139_123_62251_02
"400" ~ "499"
1234567
H
G_16860_022.eps
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91011
12
Page 77
Circuit Diagrams and PWB Layouts
77LC7.1L LA 7.

1080P Panel: Supply In

123 11 12
F5 F5
SUPPLY IN
+3V3_IO
A
2535 100u 16V
2511100n
100n 2512
100n 2513
2514100n
2515100n
100n 2516
2517100n
2518100n
100n 2519
2520100n
100n 2521
B
C
+3V3_PLL
K14
K13
K12
B13
A13
D
22u
2540
16V
2541 100n
2542 100n
2543 100n
+3V3_PLL
E
7101-14 GM1601
NC
A1
C5
D5
AC17
K3
NCNC
F1
2547
F
7101-10
GM1601
G
AD19
AC19
AC20
AC13
AC14
AC15
AD17
DISPLAY PWR
LVDSA_GND_1
LVDSA_GND_2
LVDSA_GND_3
LVDSB_GND_1
LVDSB_GND_2
LVDSB_GND_3
VSSD33_LVDS
VDDD33_LVDS
LVDSA_3.3_3
LVDSA_3.3_2
LVDSA_3.3_1
LVDSB_3.3_3
LVDSB_3.3_2
LVDSB_3.3_1
AE17
AC22
AC21
AD20
AC12
AD13
AD12
+3V3_LVDSA
2578
H
3139 123 6225.1
1234
45678910
7101-9
GM1601
GPIO
GPIO_G08_B0|ICD_JTAG_CLK
GPIO_G08_B1|ICD_JTAG_MODE
GPIO_G08_B2|ICD_JTAG_TDI
GPIO_G08_B4|ICD_JTAG_TDO
GPIO_G08_B5|ICD_JTAG_RESET
3515
RES
3516 10K
3542 3543
100n
2567
3517
3518 10K 3519
3521 10K
3522 10K
100n
100n
2568
2569
I522
I523 I524
I525
I526
RES
1n0 2557
100n
10K
10K
10K
10K
10K3535
GPIO_G08_B3|DVS
GPIO_G09_B0 GPIO_G09_B1 GPIO_G09_B2 GPIO_G09_B3 GPIO_G09_B4 GPIO_G09_B5
22u6.3V
2565
10K
100R 100R
10K
10K
10K3520
10K3523
+1V8_DVI
D6D8D9
DVI_1.8 DVI_3.3
N4
DVI_SCL
N3
DVI_SDA
A6
RXC+
B6
RXC-
A8
RX0+
B8
RX0-
A9
RX1+
B9
RX1-
A10
RX2+
B10
RX2-
B11
REXT
A7
AD6 AE6 AF6 AE7 AF7 AD8
AE4 AF4 AC5 AD5 AE5 AF5
2563
100n
I513
I514
I515 I516
I517 I518
I519 I520
+3V3_DVI
7101-2
D10
GM1601
DVI
DVI_GND
A11B5B7C7D7
22p
K15
2548 100u 16V
22u 6.3V
AC10
L10
F514
AC8
D_GND
L12
2544 100n
G3
F512
2549 100n
2550 100n
AC6
L13
AC4
L14
TCLK
AB4
IO_3.3
L15
2551 100n
Y4
W4
D23
AA4
M10
M11
M12
L17
J3
H3
VDDA33_SDDS
VDDA33_DDDS
VSSA33_DDDS
VSSA33_SDDS
J2
H2
2552 100n
D22
D17
M13
M14
M15
M16
F4
G1
CLK-SYN
VDDA33_FPLL
VDDA33_RPLL
VSSA33_FPLL
VSSA33_RPLL
H4
F3
2553 100n
N11
M17
N10
7101-11
GM1601
1510
14M31818
+3V3_LVDSD
2554 100n
2523100n
100n 2522
7101-13
GM1601
SUPPLY
D_GND
N12
N13
N14
N15
H1
VDDD33_SDDS
VSSD33_DDDS
VSSD33_SDDS
K4
J4
2555 100n
2524100n
100n 2525
N16
N17
P10
P11
J1
F2
VDDD33_DDDS
ACS_RSET_HD
VSSD33_PLL
G2
2526100n
100n 2527
U17
P13
P14
P15
P16
P17
P12
2537 100n
VDDD33_PLL
G4
XTAL
K2
F513
3536 10K
3539 10K
+1V8_CORE
AD23
GPIO_G04_B0
AD24
GPIO_G04_B1
AE24
2533100n
2532100n
U16
R10
U11
R11
U10
R12
I521
3526
T16
T17
CORE_1.8
R13
R14
2538 100n
3K3
L16
T11
R15
R16
+3V3_PLL
2546
L11
R17
2539 100n
K17
D_GND
T10
22p
2530100n
100n 2529
U14
U15
100n 2531
AD15
100n 2528
K16
K10
K11
U13
T12
T13
T14
T15
U12
100n 2534
2536 100u
16V
F3
MAIN_SCL MAIN_SDA
+3V3_LBADC
C13
LBADC_33
D13
100n
2577
7101-3
GM1601
ADC
C12
I527
I528
LBADC_IN1
B12
LBADC_IN2
A12
LBADC_IN3
D12
LBADC_RETURN
LBADC_GND
10K3537
10K3538
GPIO_G04_B2
AF24
GPIO_G04_B3
AF25
GPIO_G04_B4
AF26
GPIO_G04_B5
AE25
GPIO_G04_B6
AE26
GPIO_G04_B7
AD21
GPIO_G05_B0
AD22
GPIO_G05_B3
AC18
GPIO_G06_B0
AD18
GPIO_G06_B1
AE18
GPIO_G06_B2
AF18
GPIO_G06_B3
AE8
GPIO_G07_B0
AF8
GPIO_G07_B1
AC9
GPIO_G07_B2
AD9
GPIO_G07_B3
AE9
GPIO_G07_B4
AF9
GPIO_G07_B5
AD10
GPIO_G07_B6
AE10
GPIO_G07_B7
+3V3_SW
354110K
RES
10K 3540
RES
25561n0
6.3V22u
2566
2575
3524 10K 3525
3527 10K 3528 10K
3529 3530 10K
3531 3532 10K
3533 10K 3534
"500" ~ "599"
56
7
8 9 10 11 12
NVM_WP_SCALER
F2
+1V8_ADC
100n
2564
ADC_1.8
L3
AVSYNC
L4
AHSYNC
N2
VGA_SCL
N1
VGA_SDA
C3
SOG
D2
RED+
D1
RED-
C2
GREEN+
C1
GREEN-
B2
BLUE+
B1
BLUE-
C6C8C9
C10
C11
D11
3510
10K
JTAG_CLK_SCL
JTAG_CLK_SDA
I510
I512
I511
351310K
10K 3512
10K 3514
+3V3_ADC
7101-1
GM1601
ANA-IN
100n
100n
2570
2571
B3
ADC_3.3
A5
100n
2572
B4
A3
A4
ADC_AGND ADC_DGND
C4D4E1E2E4
3511 10K
F510
F511
B3B-PH-SM4-TBT(LF)
6.3V22u 100n
2558
2559
A2D3E3
100n
100n
22u6.3V
2573
2574
2576
RES
5
1502
100n
2560
1 2 3
4
100n
100n
2561
2562
G_16860_023.eps
240107
A
B
C
D
E
F
G
H
1502 B12 1510 F5 2511 A2 2512 A2 2513 A2 2514 A2 2515 A3 2516 A3 2517 A3 2518 A3 2519 A3 2520 A3 2521 A3 2522 A5 2523 A5 2524 A5 2525 A5 2526 A5 2527 A6 2528 A7 2529 A7 2530 A7 2531 A7 2532 A7 2533 A8 2534 A8 2535 A2 2536 A8 2537 D6 2538 D6 2539 D6 2540 D3 2541 D3 2542 D3 2543 D4 2544 D4 2546 E6 2547 E3 2548 G4 2549 G4 2550 G4 2551 G4 2552 G4 2553 G5 2554 G5 2555 G5 2556 D9 2557 D9 2558 C11 2559 C12 2560 C12 2561 C12 2562 C12 2563 C10 2564 C10 2565 C10 2566 F9 2567 F9 2568 F9 2569 F9 2570 F11 2571 F11 2572 F11 2573 F11 2574 F11 2575 F9 2576 F12 2577 G7 2578 H3 3510 A11 3511 A11 3512 B11 3513 B11 3514 B11 3515 D9 3516 D9 3517 D9 3518 D9 3519 D9 3520 D9 3521 E9 3522 E9 3523 E9 3524 F9 3525 F9 3526 F6 3527 F9 3528 F9 3529 F9 3530 F9 3531 F9 3532 G9 3533 G9 3534 G9 3535 G9 3536 G5 3537 G5 3538 G5 3539 G5 3540 D9 3541 D9 3542 D9 3543 D9 7101-1 C11
7101-10 F2 7101-11 E5 7101-13 B5 7101-14 E2 7101-2 F10 7101-3 G7 7101-9 A9 F510 A12 F511 A12 F512 F4 F513 F6 F514 G4 I510 B11 I511 B11 I512 B11 I513 D10 I514 D10 I515 D10 I516 D10 I517 D10 I518 D10 I519 E10 I520 E10 I521 E6 I522 F9 I523 F9 I524 F9 I525 F9 I526 G9 I527 G6 I528 G6
Page 78
Circuit Diagrams and PWB Layouts
78LC7.1L LA 7.

1080P Panel: DDR SDRAM

123456
F6 F6
DDR SDRAM
+2V5_DDR_MAL
A
DQS
2623100n
2621100n
100n 2622
44 87 8827
NC
89 90 91
97
0
98
1
100
2
1
3
3
4
4
5
6
6
7
7
60
8
61
9
63
10
64
11
68
12
69
13
71
14
72
15
9
16
10
17
12
18
13
19
17
20
18
21
20
22
21
23
74
24
75
25
77
26
78
27
80
28
81
29
83
30
84
31
94
100n 2624
1u0
2610
FSDATA(0)
FSDATA(1)
FSDATA(2)
FSDATA(3)
FSDATA(4)
FSDATA(5)
FSDATA(6)
FSDATA(7)
FSDATA(8)
FSDATA(9)
FSDATA(10)
FSDATA(11)
FSDATA(12)
FSDATA(13)
FSDATA(14)
FSDATA(15)
FSDATA(16)
FSDATA(17)
FSDATA(18)
FSDATA(19)
FSDATA(20)
FSDATA(21)
FSDATA(22)
FSDATA(23)
FSDATA(24)
FSDATA(25)
FSDATA(26)
FSDATA(27)
FSDATA(28)
FSDATA(29)
FSDATA(30)
FSDATA(31)
FSDQS
FSVREF
FSVREF
FSDATA(20) FSDATA(21) FSDATA(22)
FSDATA(23)
FSDATA(16) FSDATA(17) FSDATA(18)
FSDATA(19)
FSDATA(4) FSDATA(5) FSDATA(6)
FSDATA(7)
FSDATA(0) FSDATA(1) FSDATA(2)
FSDATA(3)
FSDATA(28)
FSDATA(29)
FSDATA(30) FSDATA(31)
FSDATA(27) FSDATA(26)
FSDATA(25) FSDATA(24)
FSDATA(12) FSDATA(13) FSDATA(14)
FSDATA(15)
FSDATA(9) FSDATA(10)
FSDATA(11)
3636-4 3636-3 3636-2 3636-1
3635-4 3635-3 3635-2 3635-1 22R
3632-4 3632-3 3632-2 3632-1
3631-4 3631-3 3631-2 3631-1
3626 22R 3627 3628 22R
22R 22R 22R 22R
22R 22R 22R 22R
22R 22R 22R 22R
F2
47u
6.3V
3637-4 3637-3 3637-2 3637-1
3634-1 3634-2 3634-3 3634-4
3633-1 3633-2 3633-3 3633-4
22R 22R 22R
22R 22R 22R 22R
22R 22R 22R 22R
22R 22R 22R 22R
3612 3613
22R3625
22R
2642
2614100n
2612100n
3610
10K
1%
B
C
D
FSVREF
FSRAS FSCAS FSWE
FSCLK+ FSCLK­FSCKE
FSDQM(0) FSDQM(1) FSDQM(2) FSDQM(3)
FSBKSEL(0) FSBKSEL(1)
FSADDR(0) FSADDR(1) FSADDR(2) FSADDR(3) FSADDR(4) FSADDR(5) FSADDR(6) FSADDR(7) FSADDR(8) FSADDR(9) FSADDR(10) FSADDR(11)
F611 F612 F613
F614 F615 F616
2643
100n 2611
100n
F610
2644
100n 2613
3611
10K 1%
22u 16V
1%
150R3614
E
2616100n
100n 2615
5816
VREF
28
CS RAS
26
CAS
25
WE
55
CK
54
CK
53
CKE
23
0
56
1
DM
24
2
57
3
29
0
BA
30
1
31
0
32
1
33
2
34
3
47
4
48
5
A
49
6
50
7
51
8
45
9
36
10
37
11
38 39 40
NC
41 42 43
93
RFU
52
MCL
VSS VSSQ
2618100n
100n 2617
100n 2619
7601
K4D263238I-UC50
1535659629581422
466685
Φ
SDRAM
1M X 32 X 4
5
11196270768292
2620100n
5967737986
VDDQVDD
2641 47u
6.3V
D
D
99
F
G
H
"600" ~ "699"
3139 123 6225.1
123
456
7 8 9 10 11
#RESET
3615
10K
DATA(20) DATA(21) DATA(22)
DATA(23)
DATA(16) DATA(17) DATA(18)
DATA(19)
DATA(4) DATA(5) DATA(6)
DATA(7)
DATA(0) DATA(1) DATA(2)
DATA(3)
DATA(28) DATA(29) DATA(30) DATA(31)
DATA(27) DATA(26)
DATA(25) DATA(24)
DATA(12) DATA(13) DATA(14)
DATA(15)
AD)8(ATADSF
DATA(9)
DATA(10)
DATA(11)
100n 2625
10K 10K
)8(AT
2626100n
DATA(0) DATA(1) DATA(2)
DATA(3)
DATA(4) DATA(5) DATA(6)
DATA(7)
DATA(8) DATA(9) DATA(10)
DATA(11)
DATA(12) DATA(13) DATA(14)
DATA(15)
DATA(16) DATA(17) DATA(18)
DATA(19)
DATA(20) DATA(21) DATA(22)
DATA(23)
DATA(24) DATA(25)
DATA(26) DATA(27) DATA(28)
DATA(29)
DATA(30) DATA(31)
100n 2627
I610 I611
I614
2628100n
K1
M3 M4
R4
J24 K26
W25 W24
E24 E25 E26 G26 G24 H26 H24 J25 T26 R25 P24 P26 N24 N26 M25 L24 L25 M26 M24 N25 N23 P25 R26 R24 K24 J26 H25 G23 G25 F24 F25 F26
2629100n
2631100n
100n 2630
AA23
AB23
AC23
FS_2.5
RESET_
IR0|GPIO_28 IR1|GPIO_29
EXTCLK|GPI_02
FSVREF1 FSVREFVSS1
FSVREF2 FSVREFVSS2
FSDATA0 FSDATA1 FSDATA2 FSDATA3 FSDATA4 FSDATA5 FSDATA6 FSDATA7 FSDATA8 FSDATA9 FSDATA10 FSDATA11 FSDATA12 FSDATA13 FSDATA14 FSDATA15 FSDATA16 FSDATA17 FSDATA18 FSDATA19 FSDATA20 FSDATA21 FSDATA22 FSDATA23 FSDATA24 FSDATA25 FSDATA26 FSDATA27 FSDATA28 FSDATA29 FSDATA30 FSDATA31
+2V5_DDR_MAL
100n 2632
T23
V23
Y23
W23
2633100n
R23
SYSTEM
2635100n
100n 2634
7101-12 GM1601
VSSA18_DLL
K25
100n 2636
P23
2637100n
100n 2638
J23
L23
F23
H23
M23
FS_2.5
MSTR_SCL|GPI_03
MSTR_SDA|GPI_04
+1V8_CORE
2639100n
K23
E23
VDDA18_DLL
FSADDR0 FSADDR1 FSADDR2 FSADDR3 FSADDR4 FSADDR5 FSADDR6 FSADDR7 FSADDR8
FSADDR9 FSADDR10 FSADDR11
FSBKSEL0 FSBKSEL1
FSDQM0 FSDQM1 FSDQM2 FSDQM3
FSCKE
FSWE
FSCAS
FSRAS
FSCLKn
FSCLKp
FSDQS
AD25 AD26 AC24 AC25 AB26 AA24 AA25 AA26
Y24 AB25 AC26 AB24
Y25
Y26
T25
U25 U26
T24
W26
V26
V25
V24
U23
U24
L26
100n 2640
F617
F618
3639-1 22R 3639-2 3639-3 22R 3639-4 22R
3640-1 22R 3640-2 22R 3640-3 22R
3641-2 22R
3641-3 3641-4 22R
3643-4 22R 3643-3 3643-2 22R 3643-1 22R
22R
3645 22R 3646
3618
3619
3620
RES
RES
3642-122R 3642-3 3642-422R 3642-222R
22R
22R3640-4
22R3641-1 22R
22R
22R
22R
22R
22R
100R3621 100R3622
FSADDR(0) FSADDR(1) FSADDR(2) FSADDR(3)
FSADDR(4) FSADDR(5) FSADDR(6) FSADDR(7)
FSADDR(11) FSADDR(10)
FSADDR(9) FSADDR(8)
FSCKE FSRAS FSCAS
FSWE
FSDQM(0) FSDQM(1) FSDQM(2) FSDQM(3)
FSBKSEL(0) FSBKSEL(1)
FSCLK-
FSCLK+
FSDQS
+3V3_SW
RES
10K 3616
26451n0
RES
361710K
1n0 2646
RES
SCL_IO SDA_IO
RES
ADDR(0) ADDR(1) ADDR(2) ADDR(3)
ADDR(0)
ADDR(4)
ADDR(1)
ADDR(5)
ADDR(2)
ADDR(6)
ADDR(3) ADDR(4)
ADDR(7) ADDR(5) ADDR(6) ADDR(7)
ADDR(11) ADDR(8)
ADDR(10) ADDR(9)
ADDR(9)
DQM(0) DQM(1) DQM(2) DQM(3)
CKE
CAS
RAS
CLK-
CLK+
DQS
ADDR(8)
CKE
RAS
CAS
WE
DQM(0)
DQM(1)
DQM(2)
DQM(3)
WE
BKSEL(0)
BKSEL(1)
ADDR(10) ADDR(11)
BKSEL(0) BKSEL(1)
P4 P3
7 8 9 101112
12
F2
G_16860_024.eps
240107
A
B
C
D
E
F
G
H
2610 A4 2611 A2 2612 A2 2613 A2 2614 A2 2615 A2 2616 A3 2617 A3 2618 A3 2619 A3 2620 A3 2621 A4 2622 A4 2623 A4 2624 A4 2625 B7 2626 B7 2627 B7 2628 B7 2629 B7 2630 B8 2631 B8 2632 B8 2633 B8 2634 B8 2635 B8 2636 B9 2637 B9 2638 B9 2639 B9 2640 B10 2641 A4 2642 B6 2643 B2 2644 B2 2645 F11 2646 F12 3610 A2 3611 B2 3612 C7 3613 C7 3614 C2 3615 C7 3616 E11 3617 E12 3618 E11 3619 E11 3620 E11 3621 E11 3622 F11 3625 E6 3626 E6 3627 E6 3628 E6 3631-1 E6 3631-2 E6 3631-3 E6 3631-4 E6 3632-1 E6 3632-2 D6 3632-3 D6 3632-4 D6 3633-1 F6 3633-2 F6 3633-3 F6 3633-4 F6 3634-1 F6 3634-2 F6 3634-3 F6 3634-4 F6 3635-1 D6 3635-2 D6 3635-3 D6 3635-4 D6 3636-1 D6 3636-2 D6 3636-3 D6 3636-4 D6 3637-1 F6 3637-2 F6 3637-3 F6 3637-4 E6 3639-1 C11 3639-2 C11 3639-3 C11 3639-4 C11 3640-1 C11 3640-2 C11 3640-3 C11 3640-4 C11 3641-1 D11 3641-2 C11 3641-3 D11 3641-4 D11 3642-1 D11 3642-2 D11 3642-3 D11 3642-4 D11 3643-1 D11 3643-2 D11 3643-3 D11 3643-4 D11 3645 E11 3646 E11
7101-12 B8 7601 B3 F610 B2 F611 C2 F612 C2 F613 C2 F614 C2 F615 C2 F616 C2 F617 E10 F618 E10 I610 C7 I611 C7 I614 C7
Page 79
Circuit Diagrams and PWB Layouts
79LC7.1L LA 7.

1080P Panel: DC Power Supply

12345678
F7 F7
DC POWER SUPPLY
9
10
A
7714
B
C
D
2730
330u 16V
1710
F714
F715
5710
7710
1
4
2
F716
10u
+12V
3711
I712
9
PGOOD
Monitor
I710
15
VCC
VREF
SS
OSC
10K
Protection & Ref
OSC
1 2 3 4
SUPPLY
B4B-PH-SM4-TBT(LF)
CONNECTOR (PSU)
F717
F718
L6910
I714
I715
I717
E
8
EAREF
100n2713
100K3712
2715 100n
2717 100n
F
COMP
5
I721
3710 510R
3
OCSET
2720
15n
2721
1n5
+12V
I723
+12V
100n
2710
1n02711
2712
100u 16V
I713
12
BOOT
HGATE
PHASE
LGATE
PGND
NC
16
3714
2K7
GND
VFB
I716
11
I718
10
I719
14
13
7
6
I720
6701
BAS316
2714 100n
2719
3716
3717 1K8
4K73715
1K0
+12V
100n2718
4u7
I722
I711
+12V
2723 330u 16V
7
8
7701-1 SI4936ADY
2
1
4
3
3713
10R
47n2722
5
6
7701-2 SI4936ADY
+12V
2716
5711
10u
22u
+3V3
LD1117DT18
32
OUT
IN
COM
2729
100n
1
7713
LD1117DT25
32
OUT
IN
COM 2724 100n
1
30R
F722F721
5716
+3V3_IO
F2, F5
5717
30R
F723
+3V3_LVDSA
F3, F5
30R5718
F724
+3V3_LVDSD
F725
F726
F727
F728
F729
F730
F3, F5
+3V3_LBADC
F5
+3V3_ADC
F5
+3V3_SW
F1, F2, F5, F6
+3V3_DVI
F5
+3V3_PLL
F5
+3V3_LVDSVCC
F3
5719 30R
5720
30R
5721 30R
30R5722
30R
5723
5724
30R
F710
F719
2727 10u
2728 100n
+2V5
+1V8
30R
5712
5713 30R
30R
5714
5715
30R
F711
F712
F713
F720
+1V8_CORE
F5, F6
+1V8_ADC
F5
+1V8_DVI
F5
+2V5_DDR_MAL
F6
G
1211
1710 C2 2710 D5 2711 D4 2712 D5 2713 F2 2714 E5 2715 F2 2716 E6 2717 F3 2718 F5 2719 F5
A
2720 F4 2721 F4 2722 F6 2723 D8 2724 D8 2727 B9 2728 B9 2729 B8 2730 B8 3710 D4 3711 D4 3712 F2
B
3713 E6 3714 F5 3715 F5 3716 F5 3717 G5 5710 C3 5711 E6 5712 B10 5713 B10 5714 C10 5715 C10 5716 E8
C
5717 E8 5718 E8 5719 F8 5720 F8 5721 F8 5722 F8 5723 F8 5724 G8 6701 D5 7701-1 E6 7701-2 E6
D
7710 D3 7713 C8 7714 B8 F710 B9 F711 B10 F712 B10 F713 C10 F714 C3 F715 C3 F716 C4 F717 C3 F718 C3
E
F719 C9 F720 C10 F721 E7 F722 E8 F723 E8 F724 E8 F725 F8 F726 F8 F727 F8 F728 F8 F729 F8 F730 G8
F
I710 D4 I711 D6 I712 D4 I713 D5 I714 E3 I715 E3 I716 E5 I717 E3 I718 E5 I719 E5 I720 F5
G
I721 F4 I722 F5 I723 F4
H
3139 123 6225.1
H
"700" ~ "799"
G_16860_025.eps
240107
1
2
3
4
5
6 7 8 9 10 11 12
Page 80
Circuit Diagrams and PWB Layouts
80LC7.1L LA 7.

Layout 1080P Panel (Top Side)

1101 F6 1201 E5 1302 F5 1411 A3 1412 A3 1413 A3 1414 A3 1415 A3 1416 A3
1417 A4 1418 A4 1419 A4 1420 A4 1510 D4 1710 A6 1G51 F3 2210 B5 2211 B5
2214 B4 2215 E5 2216 E5 2317 E3 2410 D2 2411 A2 2412 A3 2414 E2 2434 A3
2535 B5 2536 D5 2540 D5 2548 A2 2558 E5 2565 E4 2575 E4 2576 E4 2578 A2
2610 D2 2612 B2 2613 C1 2614 D2 2615 D1 2620 C1 2621 C1 2622 C1 2623 D2
2624 C1 2641 D1 2642 B2 2643 C1 2644 B1 2710 B6 2712 B6 2716 B6 2723 E6
2730 D6 3110 E6 3111 E5 3112 E5 3113 E6 3204 C5 3205 C5 3210 B5 3211 B5
3212 C5 3213 C5 3215 C5 3216 C5 3219 C5 3222 E5 3223 E5 3224 E5 3225 E5
3228 C5 3229 B4 3313 F3 3317 F3 3322 F3 3328 F3 3330 F3 3410 D2 3411 D2
3412 E2 3610 B2 3611 C1 3627 D2 3628 D2 3631 D2 3632 C2 3635 C2 3636 C2
3639 B2 3640 B1 3641 B2 3645 B2 3646 B3 4312 E5 4313 E5 4314 E5 4315 E4
4316 E4 4317 E4 4401 E2 5410 E2 5411 D2 5710 A6 5711 B6 5715 D2 5716 B6
5721 E5 5723 D5 6101 E6 6102 E5 6210 E5 6211 E5 7101 C4 7201 C5 7202 B4
7203 E5 7301 E3 7411 D2 7412 D2 7601 C2

Layout 1080P Panel (Bottom Side)

2577 D3
2212 C2 2213 C2 2310 E3 2311 E4 2312 E4 2313 E4 2314 E4 2315 E4 2316 E4 2413 A4 2415 A4 2416 A4 2417 A4 2418 A4 2419 A4 2420 A4 2421 A4
2422 A4 2423 A4 2424 A4 2425 A4 2426 A3 2427 A3 2428 A3 2429 A3 2430 A3 2431 A3 2432 A3 2511 B3 2512 B3 2513 B3 2514 B3 2515 B3 2516 C3
2517 C3 2518 C3 2519 D4 2520 D4 2521 D4 2522 C4 2523 C4 2524 C3 2525 C3 2526 C4 2527 C4 2528 C3 2529 C4 2530 C3 2531 C4 2532 C4 2533 C3
2534 C3 2537 C2 2538 C2 2539 D3 2541 C3 2542 C3 2543 C3 2544 C2 2546 D3 2547 D3 2549 B4 2550 B4 2551 B4 2552 B4 2553 B3 2554 B3 2555 B3
2556 C2 2557 C2 2559 D3 2560 C3 2561 D3 2562 D3 2563 D3 2564 D3 2566 D3 2567 C3 2568 D3 2569 D3 2570 D3 2571 D3 2572 D3 2573 D3 2574 D3
2611 C5 2616 C5 2617 C5 2618 C5 2619 C5 2625 B4 2626 C4 2627 C4 2628 C4 2629 C4 2630 C4 2631 C4 2632 C4 2633 C4 2634 C4 2635 C4
2636 C4 2637 C4 2638 C4 2639 D4 2640 C4 2645 C3 2646 C3 2711 B1 2713 B1 2714 A1 2715 B1 2717 B2 2718 A1 2719 A1 2720 B1 2721 B1 2722 B1
2724 D1 2727 D1 2728 D1 2729 C1 3114 C2 3115 C2 3116 C3 3117 C2 3118 C3 3119 D4 3202 C2 3214 C2 3217 C2 3218 C2 3226 B2 3227 C2 3230 C3
3231 C3 3232 C2 3310 E4 3311 D4 3312 D4 3314 C4 3315 D3 3316 D3 3318 D3 3319 D3 3320 C3 3321 D3 3323 D3 3324 D3 3325 C3 3326 D3 3327 D4
3329 C4 3331 D4 3332 E3 3333 D4 3334 E4 3335 E4 3336 E4 3337 E4 3338 E4 3339 D4 3340 D4 3341 E4 3342 D4 3343 D4 3344 D4 3345 D3 3346 D4
3347 D4 3348 D3 3349 D4 3350 D4 3351 D4 3352 D4 3353 D4 3354 D4 3355 D4 3356 D4 3357 D4 3413 B3 3510 A2 3511 A2 3512 B3 3513 B3 3514 B3
3515 C3 3516 C3 3517 D3 3518 D3 3519 D2 3520 D2 3521 D2 3522 D3 3523 D2 3524 C3 3525 C3 3526 C2 3527 D3 3528 D3 3529 D3 3530 D3 3531 D3
3532 D3 3533 D3 3534 D3 3535 D3 3536 D3 3537 D3 3538 D3 3539 C3 3540 C2 3541 C2 3542 C2 3543 C2 3612 C3 3613 C3 3614 C6 3615 C3 3616 C3
3617 C3 3618 C6 3619 C6 3620 C5 3621 C3 3622 C3 3625 C6 3626 D6 3633 C6 3634 C5 3637 C6 3642 C5 3643 C5 3710 B1 3711 A2 3712 B1 3713 A1
3714 B1 3715 B1 3716 B1 3717 B2 4310 E4 4311 E4 5712 D1 5713 E2 5714 E3 5717 E3 5718 E3 5719 D3 5720 D2 5722 D3 5724 E3 6701 A1 7701 B1
7710 A1 7713 D1 7714 C1
3139 123 6225.1
G_16860_082.eps
120307
3139 123 6225.1
G_16860_083.eps
120307
Page 81
Circuit Diagrams and PWB Layouts

Front IR / LED Panel (ME7)

81LC7.1L LA 7.
A
B
C
D
E
F
12345
IR/LED/LIGHT-SENSOR
J J
7010
GP1UE260RKVF
VS
OUT
GND
4
5
1M21
1 2 3 4 5 6
S6B-PH-K
S7B-PH-K
1 2 3
S3B-PH-K
1M20
1M01
2
1
3
F010
1 2 3 4 5 6
7
+5V_STANDBY
3010
330R
3011
10K 6K8
3014
+5V_STANDBY+5V_STANDBY
3015
0R
7014
BC847B
4016
3017
10K
LIGHT_SENSOR
6014
F011 F012 F013 F014 F015 F016
2002
1u0
RESERVED
BZX384-C5V6
FOR LIGHT SENSOR ONLY
RC
LED2
+5V_STANDBY
LED1
RES
KEYBOARD
22u
2001
RC
6012
LS
7013
BPW34
6015
RES
BZX384-C4V7
BZX384-C4V7
3016 2M2
3018 4M7
3019 150R
6016
BZX384-C4V7
150R3020
+5V_STANDBY +5V_STANDBY
MFD
IR Tx
RES
6013
L-934F3BT
1
10K
RES
3021
4012
MFD
ITV
6010
1
2
L-174A2PBC-A
4017 4010
3012
RES
4013
32
GREEN
6001-2
BLUE
MFD
6K8
3
7011 BC847B
2
ITV
SPR-325MVW
ITV
6002
Bi- LED
ITV
RES
MFD ITVREF
3012
3K3 82R 820R 180R3013
YN4010 NY4011 YN4012 NY4013 NY4014 YN4015 YN4017
YN4019 N Bi-GR/RD6001
NIR ED6002
BLUE LED N6010
RED LED N6011
1
2
L-174A2F3BT
ITV
4018
YN4018
6011
1
2
L-174A2IT
4019
MFD
3013
820R
BC847B
ITV
RES
4014
12
RED
6001-1
RES
RED
4011
7012
RES
4015
SPR-325MVW
ITV
3022
MFD
10K
A
B
C
D
E
F
1M01 E1 1M20 E1 1M21 E1 2001 A2 2002 D2 3010 A2 3011 A2 3012 B4 3013 B4 3014 B2 3015 C2 3016 C3 3017 D2 3018 D3 3019 E3 3020 E3 3021 C3 3022 C5 4010 A4 4011 B5 4012 D3 4013 D4 4014 D5 4015 D5 4016 D2 4017 B4 4018 B4 4019 B5 6001-1 D5 6001-2 D4 6002 B4 6010 B3 6011 B4 6012 B2 6013 B3 6014 D2 6015 E2 6016 E2 7010 B1 7011 C4 7012 B5 7013 C2 7014 C2 F010 E2 F011 E2 F012 E2 F013 E2 F014 E2 F015 E2 F016 E2
Personal Notes:
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Circuit Diagrams and PWB Layouts
82LC7.1L LA 7.

Layout Front IR / LED Panel (ME7) (Top Side)

1M01 D4 1M20 D2 1M21 D2
6001 B2 6002 B1 6010 B2
6011 B1 6013 A1 7010 A3
7013 B4

Layout Front IR / LED Panel (ME7) (Bottom Side)

2001 C2 2002 B1 3010 C2 3011 C3 3012 B4 3013 B4
3014 B2 3015 B1 3016 A2 3017 C1 3018 B1 3019 C3
3020 C3 3021 C3 3022 C3 4001 D3 4002 C3 4004 C2
4005 C2 4010 A3 4011 B4 4012 B3 4013 B3 4014 B4
4015 C4 4016 C1 4017 A4 4018 A3 4019 B4 6012 D3
6014 D4 6015 C3 6016 C2 7011 B3 7012 C4 7014 C1
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Circuit Diagrams and PWB Layouts

Front IR / LED Panel (ME5P)

83LC7.1L LA 7.
A
B
C
D
E
F
12345
IR/LED/LIGHT-SENSOR
J J
7010
GP1UE260RKVF
VS
OUT
GND
4
5
1M21
1 2 3 4 5 6
S6B-PH-K
S7B-PH-K
1 2 3
S3B-PH-K
1M20
1M01
2
1
3
F010
1 2 3 4 5 6
7
+5V_STANDBY
3010
330R
3011
10K 6K8
3014
+5V_STANDBY+5V_STANDBY
3015
0R
7014
BC847B
4016
3017
10K
LIGHT_SENSOR
6014
F011 F012 F013 F014 F015 F016
2002
1u0
RESERVED
BZX384-C5V6
FOR LIGHT SENSOR ONLY
RC
LED2
+5V_STANDBY
LED1
RES
KEYBOARD
22u
2001
RC
6012
LS
7013
BPW34
6015
RES
BZX384-C4V7
BZX384-C4V7
3016 2M2
3018 4M7
3019 150R
6016
BZX384-C4V7
150R3020
+5V_STANDBY +5V_STANDBY
MFD
IR Tx
RES
6013
L-934F3BT
1
10K
RES
3021
4012
MFD
ITV
6010
1
2
L-174A2PBC-A
4017 4010
3012
RES
4013
32
GREEN
6001-2
BLUE
MFD
6K8
3
7011 BC847B
2
ITV
SPR-325MVW
ITV
6002
Bi- LED
ITV
RES
MFD ITVREF
3012
3K3 82R 820R 180R3013
YN4010 NY4011 YN4012 NY4013 NY4014 YN4015 YN4017
YN4019 N Bi-GR/RD6001
NIR ED6002
BLUE LED N6010
RED LED N6011
1
2
L-174A2F3BT
ITV
4018
YN4018
6011
1
2
L-174A2IT
4019
MFD
3013
820R
BC847B
ITV
RES
4014
12
RED
6001-1
RES
RED
4011
7012
RES
4015
SPR-325MVW
ITV
3022
MFD
10K
A
B
C
D
E
F
1M01 E1 1M20 E1 1M21 E1 2001 A2 2002 D2 3010 A2 3011 A2 3012 B4 3013 B4 3014 B2 3015 C2 3016 C3 3017 D2 3018 D3 3019 E3 3020 E3 3021 C3 3022 C5 4010 A4 4011 B5 4012 D3 4013 D4 4014 D5 4015 D5 4016 D2 4017 B4 4018 B4 4019 B5 6001-1 D5 6001-2 D4 6002 B4 6010 B3 6011 B4 6012 B2 6013 B3 6014 D2 6015 E2 6016 E2 7010 B1 7011 C4 7012 B5 7013 C2 7014 C2 F010 E2 F011 E2 F012 E2 F013 E2 F014 E2 F015 E2 F016 E2
Personal Notes:
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Circuit Diagrams and PWB Layouts
84LC7.1L LA 7.

Layout Front IR / LED Panel (ME5P) (Top Side)

1M01 D4 1M20 D2 1M21 D2
6001 B2 6002 B1 6010 B2
6011 B1 6013 A1 7010 A3
7013 B4

Layout Front IR / LED Panel (ME5P) (Bottom Side)

2001 C2 2002 B1 3010 C2 3011 C3 3012 B4 3013 B4
3014 B2 3015 B1 3016 A2 3017 C1 3018 B1 3019 C3
3020 C3 3021 C3 3022 C3 4001 D3 4002 C3 4004 C2
4005 C2 4010 A3 4011 B4 4012 B3 4013 B3 4014 B4
4015 C4 4016 C1 4017 A4 4018 A3 4019 B4 6012 D3
6014 D4 6015 C3 6016 C2 7011 B3 7012 C4 7014 C1
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8. Alignments

Alignments
EN 85LC7.1L LA 8.
Index of this chapter:

8.1 General Alignment Conditions

8.2 Hardware Alignments

8.3 Software Alignments

8.4 Option Settings
Note: Figures below can deviate slightly from the actual situation, due to the different set executions.
General: The Service Default Mode (SDM) and Service Alignment Mode (SAM) are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter.
8.1 General Alignment Conditions
Perform all electrical adjustments under the following conditions:
Power supply voltage (depends on region): – AP-NTSC: 120 V – AP-PAL-multi: 120 - 230 V – EU: 230 V
AC
– LATAM-NTSC: 120 - 230 V – US: 120 V
AC
or 230 VAC / 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
/ 50 Hz (± 10%).
AC
/ 60 Hz (± 10%).
Connect the set to the mains via an isolation transformer with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heatsinks as ground.
Test probe: Ri > 10 Mohm, Ci < 20 pF.
Use an isolated trimmer/screwdriver to perform alignments.
8.2 Hardware Alignments
There are no hardware alignments foreseen for this chassis, but below find an overview of the most important DC voltages on the SSB. These can be used for checking proper functioning of the DC/DC converters.
Specifications (V)
Description Test Point
+AUDIO_POWER FB21 11.40 12.00 12.60 B02_DC-DC
-AUDIO_POWER FB23 -11.40 -12.00 -12.60 B02_DC-DC
+12V_DISP FB34 11.40 12.00 12.60 B02_DC-DC
+8V F401 7.60 8.00 8.40 B04C_Audio Proc.
+5V_STANDBY FB27 4.94 5.20 5.46 B02_DC-DC
+5V_SW FB16 4.93 5.19 5.45 B02_DC-DC
+5V_D I411 4.75 5.00 5.25 B04C_Audio Proc.
+5V_AUD I410 4.75 5.00 5.25 B04C_Audio Proc.
+5V_TUN I115 4.75 5.00 5.25 B03_Tuner IF
+3V3_STBY FB13 3.10 3.30 3.50 B02_DC-DC
+3V3_SW FB17 3.1 3.3 3.5 B02_DC-DC
+3V3_MOJO FB19 3.1 3.3 3.5 B02_DC-DC
+3V3 FJ01 3.2 3.27 3.4 B03F_DVB-MOJO
+3V3FE FF14 3.2 3.27 3.4 B03B_DVB-Demod
+1V8S_SW FB11 1.70 1.80 1.90 B02_DC-DC
+1V2_MOJO FB20 1.18 1.25 1.31 B02_DC-DC
+1V2_CORE FG39 1.14 1.24 1.34 B03D_DVB-MOJO
VDISP F210 11.40 12.00 12.60 B04B_Video proc.
DiagramMin. Typ. Max.

8.3.1 Tuner Adjustment (RF AGC Take Over Point)

Purpose: To keep the tuner output signal constant as the input
signal amplitude varies.
The LC7.xx chassis comes with two tuner types: the UV1318S for the analogue sets (LC7.1x) and the TD1316AF for the hybrid sets (LC7.2x).
For the digital tuner TD1316AF, no alignment is necessary, as the AGC alignment is done automatically (standard value: “15”), even during analogue reception.
The analogue tuner UV1318S can also use the default value of “15”, however in case of problems use the following method (use multimeter and RF generator):
Apply a vision IF carrier of 38.9 MHz (105 dBµV = 178 mVrms) to test point F111 (input via 50 Ω coaxial cable terminated with an RC network of series 10 nF with 120 ohm to ground).
Measure voltage on pin 1 of the tuner.
Adjust AGC (via SAM menu: TUNER -> AGC), until voltage on pin 1 is 3.3 +0.5/-1.0 V.
Store settings and quit SAM.

8.3.2 RGB Alignment

Before alignment, choose “TV MENU” -> “Picture” and set:
“Brightness” to “50”.
“Color” to “50”.
“Contrast” to “100”.
White Tone Alignment:
Activate SAM.
Select “RGB Align.” -> “White Tone” and choose a color temperature.
Use a 100% white screen as input signal and set the following values: – All “White point” values initial to “256”. – All “BlackL Offset” values to “0”.
In case you have a color analyzer:
Measure with a calibrated (phosphor- independent) color analyzer (e.g. Minolta CA-210) in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.
Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on “256”) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see table “White D alignment values”). Tolerance: dx: ± 0.004, dy: ± 0.004.
Repeat this step for the other color Temperatures that need to be aligned.
When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM.
Table 8-1 White D alignment values
Value Cool (11000 K) Normal (9000 K) Warm (6500 K)
x 0.278 0.289 0.314
y 0.278 0.291 0.319
8.3 Software Alignments
With the software alignments of the Service Alignment Mode (SAM) the Tuner and RGB settings can be aligned. To store the data: Use the RC button “Menu” to switch to the main menu and next, switch to “Stand-by” mode.
If you do not have a color analyzes, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics).
Set the RED, GREEN and BLUE default values per temperature according to the values in the “Tint settings” table.
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EN 86 LC7.1L LA8.
Alignments
When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM.
Table 8-2 Tint settings
Alignment 26" (*) 32" 37" (*) 42"
COOL_RED t.b.d. 250 t.b.d. 249
COOL_GREEN t.b.d. 251 t.b.d. 241
COOL_BLUE t.b.d. 246 t.b.d. 246
NORMAL_RED t.b.d. 252 t.b.d. 251
NORMAL_GREEN t.b.d. 246 t.b.d. 238
NORMAL_BLUE t.b.d. 228 t.b.d. 229
WARM_RED t.b.d. 252 t.b.d. 246
WARM_GREEN t.b.d. 232 t.b.d. 222
WARM_BLUE t.b.d. 197 t.b.d. 199
(*) This data was not available at the time of writing, but for default settings use the column next to the column involved on the right.
Black Level Offset Alignment
Activate SAM.
Select “RGB Align.” -> “BlackL Offset” and choose a color.
Set all “BlackL Offset” values to “0”.
When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM.
Note: For models with “Pixel Plus”, the “Black Offset” (black level offset) should NOT be changed in SAM. These offset values of RGB should be set to “0”, and should NOT be adjusted. Any adjustment of these values will affect the low light white balance.
ADC YPbPr Gray Scale Alignment
When the grey scale is not correct, use this alignment:
Activate SAM.
Select “NVM Editor”.
Enter address “26(dec)” (ADR).
Set value (VAL) to “197(dec) ± 25”.
Store (STORE) the value.

8.4 Option Settings

8.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence/absence of these specific ICs (or functions) is made known by the option codes.
Notes:
After changing the option(s), save them with the STORE command.
The new option setting becomes active after the TV is switched “off” and “on” again with the mains switch (the EEPROM is then read again).

8.4.2 How To Set Option Codes

When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set all option numbers. You can find the correct option numbers in table “Option Codes OP1...OP7” below.
How to Change Options Codes
An option code (or “option byte”) represents eight different options (bits). When you change these numbers directly, you can set all options very quickly. All options are controlled via seven option numbers (OP1... OP7). Activate SAM and select “Options”. Now you can select the option byte (OP1.. OP7) with the CURSOR UP/ DOWN keys, and enter the new 3 digit (decimal) value. For the correct factory default settings, see the table “Option codes OP1...OP7” below. For more detailed information, see the second table “Option codes at bit level“. If an option is set (value “1”), it represents a certain decimal value. When all the correct options (bits) are set, the sum of the decimal values of each Option Byte (OP) will give the option code.
2
C
Sets 12NC Sets Type Panel Type
LC07_Latam_LCD_basic (/78)
LPL : LC260WX2-SLB2 045
867000026291 26PFL5322/78
AUO : T260XW03 V1 067
CMO : V260B1-L03 068
LPL : LC320W01-SL06 046
867000030975 32PFL5332/78
AUO : T315XW02 VD 091
CMO : V315B1-L05 069
Figure 8-1 Option codes OP1...OP7 (for all LC7.1L models)
Panel Code
(Dec)
Option Byte
Group 1 Group2
1 2 3 4 5 6 7
000 029 148 255 009 008
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004
001
060707
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Alignments
Option Bit Overview
Below find an overview of the Option Codes on bit level.
Table 8-3 Option codes at bit level (OP1-OP4)
Option Byte & Bit Dec. Value Option Name Description
Byte OP1
Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 CHINA ON = SW is for CHINA only
Bit 5 32 DTV_CHINA ON = DTV_CHINA will be available (Reserved)
Bit 4 16 DTV_EU ON = DTV will be available
Bit 3 8 UK_PNP ON = UK PNP is available
Bit 2 4 VIRGIN_MODE ON = Virgin Mode (PNP) is available
Bit 1 2 ACI ON = ACI is available
Bit 0 (LSB) 1 ATS ON = ATS is available
Total DEC Value
Byte OP2
Bit 7 (MSB) 128 1080P ON = 1080p is available
Bit 6 64 LIGHT_SENSOR ON = Light Sensor is available
Bit 5 32 AMBILIGHT ON = Ambilight Feature will be available
Bit 4 16 BACKLIGHT_DIMMING ON = Backlight Dimming is available
Bit 3 8 HUE ON = Hue is available
Bit 2 4 2D3DCF ON = 3D Comb Filter is available
Bit 1 2 WSSB ON = WSS is available
Bit 0 (LSB) 1 WIDE_SCREEN ON = TV is 16 × 9 set
Total DEC Value
Byte OP3
Bit 7 (MSB) 128 CVI2 ON=CVI1 (YPbPr)
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 VCHIP ON = VChip is available
Bit 3 8 VIDEO_TEXT ON = Video-TXT is available
Bit 2 4 STEREO_DBX ON = Stereo DBX detection is available (LATAM)
Bit 1 2 STEREO_NICAM_2CS ON = Stereo NICAM 2CS detection is available (EU/AP/China)
Bit 0 (LSB) 1 LIP_SYNC ON = Lip Sync is available
Total DEC Value
Byte OP4
Bit 7 (MSB) 128 HDMI2 ON = HDMI2 is available
Bit 6 64 HDMI1 ON = HDMI1 is available
Bit 5 32 VGA ON = VGA is available
Bit 4 16 SVHS3 ON = SVHS3 is available
Bit 3 8 AV3 ON = AV3 is available
Bit 2 4 CVI ON = CVI is available
Bit 1 2 SVHS2 ON = SVHS2 is available
Bit 0 (LSB) 1 AV2 ON = AV2 is available
Total DEC Value
OFF = SW is for Non-China AP cluster
OFF = DTV_CHINA will not be available
OFF = DTV will not be available
OFF = UK PNP is not available
OFF = Virgin Mode (PNP) is not available
OFF = ACI is not available
OFF = ATS is not available
OFF = 1080p is not available
OFF = Light Sensor is not available
OFF = Ambilight Feature will not be available
OFF = Backlight Dimming is not available
OFF = Hue is not available
OFF = 2D Comb Filter is available
OFF = WSS is not available
OFF = TV is 4 × 3 set
(For ROW)
OFF = VChip is not available
OFF = Video-TXT is not available
OFF = Stereo DBX detection is not available
OFF = Stereo NICAM 2CS detection is not available
OFF = Lip Sync is not available
OFF = HDMI2 is not available
OFF = HDMI1 is not available
OFF = VGA is not available
OFF = SVHS3 is not available
OFF = AV3 is not available
OFF = CVI is not available
OFF = SVHS2 is not available
OFF = AV2 is not available
EN 87LC7.1L LA 8.
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EN 88 LC7.1L LA8.
Alignments
Table 8-4 Option codes at bit level (OP5-OP7)
Option Byte & Bit Dec. Value Option Name Description
Byte OP5
Bit 7 (MSB) 128 NVM_CHECK ON = NVM (range) checking is available
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 MP_ALIGN ON = Using multi-point alignment for Gamma & White Point
Bit 3 8 SYS_RECVRY ON = System Recovery is available
Bit 2 4 SL_WIRED ON = BDS Smart Loader Wired is available
Bit 1 2 HOTEL ON = Hotel/BDS is available
Bit 0 (LSB) 1 SS_DEMO ON = Split Screen Demo is available
Total DEC Value
Byte OP6
Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 Reserved Not Used (Reserved)
Bit 3 8 TUNER PROFILE 0 = ATV_EU_PHILIPS UV1318S/AIH-3
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
Total DEC Value
Byte OP7
Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 CABINET PROFILE 0 = Cabinet_Profile_26_LCD_ME7
Bit 3 8
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
Total DEC Value
OFF = NVM (range) checking is not available
OFF = Using old way for Gamma (pre-defined) & WP alignment
OFF = System Recovery is not available
OFF = BDS Smart Loader Wired is not available
OFF = Hotel/BDS is not available
OFF = Split Screen is not available
1 = ATV_EU_Panasonic EN57K28G3F 2 = DTV_EU_PHILIPS TD1316AF/IHP-2 4 = ATV_AP_PHILIPS UV1316E/AIH-4 5 = ATV_AP_Tuner2 (Reserved) 6 = ATV_CHINA_ALPS TEDE9-286B 7 = ATV_CHINA_Tuner2 (Reserved) 8 = ATV_LATAM_PHILIPS UV1338/AIH-4 9 = ATV_LATAM_Tuner2 (Reserved) 10 = DTV_CHINA_Tuner1 (Reserved) 11 = DTV_CHINA_Tuner2 (Reserved) 12 = Not Used (Reserved) 13 = Not Used (Reserved) 14 = Not Used (Reserved) 15 = Not Used (Reserved)
1 = Cabinet_Profile_32_LCD_ME7 2 = Cabinet_Profile_37_42_47_LCD_ME7 3 = Cabinet_Profile_42_50_PDP_ME7 4 = Cabinet_Profile_26_LCD_ME5P 5 - 32 = Reserved
Page 89
Circuit Descriptions, Abbreviation List, and IC Data Sheets

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

Index of this chapter:

9.1 Introduction

9.2 LCD Power Supply
9.3 DC/DC converters
9.4 Front-End
9.5 Video Processing
9.6 Memory addressing
9.7 Audio Processing
9.8 HDMI
9.9 Abbreviation List
9.10 IC Data Sheets
Notes:
•Only new circuits (circuits that are not published recently) are described.
Figures can deviate slightly from the actual situation, due to different set executions.
For a good understanding of the following circuit descriptions, please use the Wiring, Block (chapter 6) and Circuit Diagrams (chapter 7). Where necessary, you will find a separate drawing for clarification.
9.1 Introduction
EN 89LC7.1L LA 9.
The LC7.x (development name “LC07”) is a new global chassis for the year 2007 (LC7.1 is the analogue range, LC7.2 is the digital range). It covers a screen size of 26 to 47 inch for LCD and 42 to 50 inch for Plasma sets. Most sets come with a new styling called “ME7”. Some key components are:
Audio: Sound processing is performed by a multi-standard sound processor MSP4450 (item 7411)
Video: Video processing is performed by the Trident video processor SVP CX32-LF (item 7202).
For analogue reception, a standard IF demodulator is used, whereas digital input signals (DVB-T; only applicable in some regions) are processed through a COFDM channel decoder together with an MPEG decoder. A so-called “Reneas” microprocessor performs the control functionality.
Important features of this chassis are:
AmbiLight: LED AmbiLight (where applicable) is introduced as the successor of glass-tube AmbiLight
1080p Full HD (where applicable).
Page 90
EN 90 LC7.1L LA9.

9.1.1 SSB Cell Layout

Circuit Descriptions, Abbreviation List, and IC Data Sheets
DC-DC CONVERSION
HYBRID TUNER
IF DEM
VIF SAW
SIF SAW
Figure 9-1 SSB top view
RENEAS
TRIDENT
VIDEO PROC.
AUDIO CLASS D
uP
HDMI
H_17260_038.eps
05077
AUDIO CLASS D
MEM
FLASH
MICRONAS
AUDIO PROC.
SDRAM
SDRAM
DC-DC CONVERSION
H_17260_049.eps
050707
Figure 9-2 SSB bottom view
Page 91
Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.2 LCD Power Supply

The Power Supply Unit (PSU) in this chassis is a buy-in and is a black-box for Service. When defective, a new panel must be ordered and the defective panel must be sent for repair, unless the main fuse of the unit is broken. Always replace the fuse with one with the correct specifications! This part is available in the regular market.
Three different PSU can be used in this chassis:
26 and 32 inch sets use a “Delta” PSU
37 and 42 inch sets use a “PPS” (Philips Power Solutions) PSU
47 inch sets use a “Delta” PSU.
Figure “Overview of PSU connectivity” shows the connectivity of the Power Supply Unit with the other panels in the set.

Figure 9-4 DC-DC converter block diagram

9.4 Front-End

EN 91LC7.1L LA 9.
G_16860_063.eps
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Figure 9-3 Overview of PSU connectivity

All Power Supply Units deliver the following voltages to the chassis:
+24 V to the inverters
+12 V to SSB
+12 V and -12 V to Audio Supply
12 V to Bolt-on Supply (where applicable)
+5.2 V Standby voltage.

9.3 DC/DC converters

A switch generates the +5.2 V (+5V_SW) from the +5.2 V (+5V_STANDBY) supply voltage. For LCD sets, this switch is mounted on-board the SSB. For PDP sets, this switch is mounted on the Power Supply Panel. This results in the +5V_STANDBY (and +5V_SW for PDP sets) voltage(s), coming from the Power Supply Unit, is (are) used as input for the on-board DC/DC converters. They deliver the following voltages to the board:
+3.3 V (+3V3_STBY)
+5.2 V (+5V_SW) (only for LCD sets)
+1.8 V (+1V8S_SW)
+34 V (+VTUN)
+3.3 V (+3V3_SW)
+3.3 V (+3V3_MOJO)
+1.2 V (+1V2_MOJO)
An overview can be found in figure “DC-DC converter block diagram”.
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This chassis uses different tuners depending on the region and execution. An overview of the different executions can be found in table “Tuner diversity”.

Table 9-1 Tuner diversity

Region Tuner Type
Europe TD1316AF hybrid
UV1318S analogue
AP UV1316E analogue
China TEDE9 analogue
Latam UV1338 analogue
For a general outline of tuner applications in this chassis see figure “Tuner IF diagram”.
4MHz
Tuner
Supply
+5V/+33V
IF AGC
Digital IF
36.16MHz
Video
SAW filter
Audio
SAW filter
RFAGC
I2C
IF Demodulator
RF AGC_analogue
Switch IC
CVBS
2ndSIF
RF AGC_digital
I2C_analogue
I2C_digital
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Figure 9-5 Tuner IF diagram
In the LC7.1x chassis (analogue sets), the signal coming from the tuner is fed to the IF demodulator (through the SAW filters) and then passed to the Trident Video Processor.

9.4.1 Video IF Amplifier

The IF-filter is integrated in a SAW (Surface Acoustic Wave) filter. In LATAM region, one filter (item 1161) is used for filtering both IF-video and IF-audio. In other regions, the type of these filters depends on the standard(s) received (region­dependency). Some filters can be switched to another standard, what makes them suitable for applications in multi­standard platforms. An overview of the SAW filter diversity can be found in table “SAW filter diversity”.
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EN 92 LC7.1L LA9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
Table 9-2 SAW filter diversity
SAW filter Switching Y/N Region Video/Audio
OFWK3953M No Europe Video
OFWK9656M Yes Europe Audio
OFWK7265L Yes AP Video
OFWK9361L No AP Sound
OFWK3956L No China Video
OFWK3955L No China Video
OFWK9352L No China Audio
OFWM1967L No LATAM Video/Audio
Switching is done by the microcontroller via SAW_SW. In table “SAW filter switching” is explained how to address the different system standards.
Table 9-3 SAW filter switching
Region SAW_SW System
Europe 1 L’
0 other systems
AP 1 B/G, D/K, I
0M/N
China 1 B/G, D/K, I
0M/N
LATAM n.a. M/N
Table 9-6 Pin assignment hybrid tuner
Pin number Description DC voltage (V)
1n.c.
2 RF AGC voltage 3.3 - 4.5 (weak or no
2
3I
4 SCL 0 to 3.3
5 SDA 0 to 3.3
6 4 MHz reference
7 supply voltage 5 ±0.25
8 broadband IF output
9 IF AGC voltage 0 to 3
10 narrowband IF output
11 narrowband IF output

9.4.2 Automatic Gain Control

In the LC7.2x chassis (digital sets), the automatic gain control depends on if the set is receiving a digital or an analogue signal. During analogue reception, the hybrid tuner receives an external AGC voltage, coming from the demodulator, to perform automatic gain control. During digital reception, no external AGC voltage is used but the tuners internal AGC loop is used.
C-bus address select 0
output
signal) < 3.3 (strong signal)
The hybrid tuner TDA1316AF, used in Europe sets, needs to be switched between digital and analogue mode. This is done by the microcontroller via DVB_SW. Refer to table “Hybrid tuner digital/analogue switching” for details.
Table 9-4 Hybrid tuner digital/analogue switching
Region DVB_SW Mode
Europe 1 analogue reception
0 digital reception
The pin assignment of all analogue tuners is equal and can be found in table “Pin assignment analogue tuners”.
Table 9-5 Pin assignment analogue tuners
Pin number Description DC voltage (V)
1 RF AGC voltage 3.3 - 4.5 (weak or no
2n.c.
3I
4 SCL 0 to 3.3
5 SDA 0 to 3.3
6n.c.
7 supply voltage 5 ±0.25
8n.c.
9 tuning supply voltage 33
10 n.c.
11 TV IF output
2
C-bus address select 0
signal) < 3.3 (strong signal)
In the LC7.1x chassis (analogue sets), the tuner receives an external AGC voltage, coming from the demodulator, to perform automatic gain control.

9.5 Video Processing

The video processing is completely handled by the Trident SVP CX32 video processor which features:
CVBS-input for analogue signals
RGB-input for digital (DVB-T) signals
Motion and “edge-adaptive” deinterlacing
Integrated ADC
Built-in 8-bit LVDS transmitter
Color stretch
Skin color enhancement
3D Digital Comb Video Decoder
Interlaced and Progressive Scan refresh
Teletext decoding
OSD and VBI/Closed Caption.
The pin assignment of the hybrid tuner can be found in table “Pin assignment hybrid tuner”.
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Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.5.1 Video Application

EN 93LC7.1L LA 9.
SIDE AV
DMM I connector
AV1
CVI1
CVI2
PC VGA
HDMI2
HDMI1
Analogue
Front End
DMMI YPbPr IN
CVI YPbPr
Decoder
FRONT_Y_CVBS_IN_T
MUX
HDMI
CVBS_RF
SC2_Y_CVBS_IN
SC2_C_IN
FRONT_C_IN_T
CVI_DTV_SEL
IBO _R _IN
IBO _G _IN
IBO _B_IN
IBO _C VB S_ IN
HD_Y_IN
HD_PB_IN HD_PR_IN
SC1_R_IN
SC1_G_IN SC1_B_IN
PC_VGA_H PC_VGA_V
HDMI_Y(0:7)
HDMI_Cb(0:7)
HDMI_Cr(0:7)
Figure 9-6 Block diagram video processing
“Block diagram video processing” shows the input and output signals to and from the Trident Video Processor in AP/LATAM applications.
During analogue reception, a CVBS signal coming from the analogue front-end is fed to the video processor via pin CVBS1. No digital reception (DVB-T) reception is foreseen in AP/LATAM region. However, an internal DMMI connector is implemented for future digital reception applications in combination with IBO. CVI_DTV_SEL is a control signal from the microprocessor. When this signal is LOW, then the MUX passes the CVI1 YPbPr input signal to the Trident Video Processor. When this signal is HIGH, then the YPbPr input signal coming from the DMMI connector is passed to the video processor. Currently, this signal is always LOW since no IBO is used.
The video processor also interfaces the AV1 and Side AV input, CVI2 (HD), VGA(PC), HDMI1 & 2. A cinch output connector for Monitor output is foreseen.
CVBS1
PR_R3
FS2
Y_G3
C
PC_R
PC_G
PC_B
FS1
Y_G1
PB_B1
PR_R1
PR_R2
Y_G2
PB_B2
AIN_HS AIN_VS
Trident
Video Processor
SVP CX32
CVBS_OUT2
7311
Reneas
micro-
processor
CS/WR/RD
7202
Trident CX
CVBS
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CPU_RST/WR/ RD/CE
A[0:7 ]
D[0:7]
CINCH Monitor out
A[0:1 9]
D[0:7]
CX_BA0/BA1 /MCLK/
CLKE/CS0/RAS/CAS/WE
CX_MA[0:11]
DQ[0:15]
CX_BA0/ BA1/MCLK/
CLKE/CS0/RAS/CAS/WE
CX_MA[0:11]
DQ[16:31]
7310
1MB
Flash Memory
7204
8MB
SDRAM
7205
8MB
SDRAM

9.6 Memory addressing

Figure “Memory block diagram” shows the interconnection between the microprocessor, the FLASH memory, the Trident Video Processor and the SDRAM.
G_16860_062 220207

Figure 9-7 Memory block diagram

Control signals CPU_RST, WR, RD and CE, address lines A[0:19] and data lines D[0:7] are used for transferring data between the microprocessor (item 7311) and the flash memory (item 7310). Control signals CS, WR and RD, address lines A[0:7] and data lines D[0:7] are used for transferring data between the Trident Video Processor (item 7202) and the microprocessor (item 7311). Control signals CX_BA0, CX_BA1, CX_MCLK, CX_CLKE, CX_CS0, CX_RAS, CX_CAS and CX_WE, address lines CX_MA[0:11] and data lines DQ[0:15] are used for transferring data between the Trident Video Processor and the SDRAM ICs (items 7204 and 7205).
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9.7 Audio Processing

The audio decoding is done entirely via the Multistandard Sound Processor (MSP) 4450P (item 7411). This processor covers the processing of both analogue and (NICAM) digital input signals by processing the (analogue) IF signal-in to processed (analogue) AF-out (baseband audio). An internal 40 ms (stereo) audio delay line (LIP SYNC) is foreseen and therefore no external delay line is necessary.
All internal clock signals are derived from an external
18.432 MHz oscillator, which, in NICAM or I turn is locked to the corresponding source.
The following functionality is included:
Automatic Standard Detection (ASD) automatically detects the actual broadcasted TV standard
Automatic Sound Select (ASS) automatically switches (without any I
2
C-bus action) between mono/stereo/
bilingual mode when the broadcast mode changes.

9.7.1 Audio Application

MSP 4450P
ANALOGUE
FRONT END
HDMI AUDIO
PC AUDIO IN
AV 2 IN
CVI 1 IN
AV 1 IN
CHINA DTV IN
CVI2 IN
2nd SIF
I2S3
AUDIO
MUX
** FOR AP ANALOGUE &
LATAM SET
ANA_IN1+
I2S_DA_IN3
I2S_WS3
I2S_CL3
SC1-IN
SC2-IN
SC3-IN
SC4-IN
SC5-IN
DACM
DACA
SC1-OUT
SC2-OUT
Figure 9-8 Block diagram audio processing
In AP/LATAM applications, the MSP features:
Sound IF input for signals coming from the analogue front­end
Three I
2
S-inputs for signals (“DATA”, “CLK” and “WS”)
coming from the HDMI interface
Five analogue inputs: for CVI1, CVI2, AV1, AV2, DTV (China) and PC audio
Loudspeaker output path
Headphone output path
Monitor output path (WYSIWYG).
Digital audio signals coming from HDMI sources are directly fed to the MSP via the I2S_DA_IN3, I2S_WS3 and I2S_CL3 lines. This ensures a “true digital path”. In case of reception of digital TV signals, a multiplexer is used to switch between China DTV or DVI2 audio. In China sets, the audio signal coming from the DTV module is in analogue format. The output from the multiplexer is fed to the MSP via the SC5-input.
The microprocessor (item 7311) controls the audio part with the following control lines:
MUTEn: used to mute the Class D amplifiers
ANTI_PLOP: used to detect any DC failure in the Class D amplifiers
DC_PROT: used to detect any DC failure in the Class D amplifiers.
2
CLASS D AMPLIFIER
S-mode, on its
LOUDSPEAKER
HEADPHONE
HP AMPLIFIER
MONITOR OUT
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9.7.2 Audio Amplifier

The audio amplifier is an integrated class-D amplifier (TDA8932T, item 7A01). It combines a good performance with a high efficiency, resulting in a big reduction in heat generation.
Principle
+V
-V
Figure 9-9 Principle Class-D Amplifier
The Class D amplifier works by varying the duty cycle of a Pulse Width Modulated (PWM) signal. By comparing the input voltage to a triangle wave, the amplifier increases duty cycle to increase output voltage, and decreases duty cycle to decrease output voltage. The output transistors of a Class D amplifier switch from 'full off' to 'full on' (saturated) and then back again, spending very little time in the linear region in between. Therefore, very little power is lost to heat. If the transistors have a low “on” resistance (RDS(ON)), little voltage is dropped across them, further reducing losses. A Low Pass Filter at the output passes only the average of the output wave, which is an amplified version of the input signal. In order to keep the distortion low, negative feedback is applied.
The advantage of Class D is increased efficiency (= less heat dissipation). Class D amplifiers can drive the same output power as a Class AB amplifier using less supply current. The disadvantage is the large output filter. The main reason for this filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. An LC filter with a cut-off frequency less than the Class D switching frequency, allows the switching current to flow through the filter instead of the load, thus reducing the overall loss and increasing the efficiency.
DC-protection
A DC-detection circuit is foreseen to protect the speakers. It is built around three transistors (items 7A05 to 7A07) and generates a protection signal (DC_PROT) to the microprocessor in case of a DC failure in the Class D amplifiers.

9.8 HDMI

9.8.1 Introduction

Note: Text below is an excerpt from the “HDMI Specification”
that is issued by the HDMI founders (see http://www.hdmi.org).
The High-Definition Multimedia Interface is developed for transmitting digital signals from DVD players, set-top boxes and other audiovisual sources to television sets, projectors and other video displays. HDMI can carry high quality multi-channel audio data and can carry all standard and high-definition consumer electronics video formats. Content protection technology is available. HDMI can also carry control and status information in both directions.
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EN 95LC7.1L LA 9.
HDMI is backward compatible with DVI (1.0). Compared with DVI, HDMI offers extra:
YUV 4:4:4 (3 × 8-bit) or 4:2:2 (up to 2 × 12-bit), where DVI offers only RGB 4:4:4 (3 × 8 bit).
Digital audio in CD quality (16-bit, 32/44.1/48 kHz), higher quality available (8 channels, 192 kHz).
Remote control via CEC bus (Consumer Electronics Control): allows user to control all HDMI devices with the TV's remote control and menus.
Smaller connector (SCART successor).
Less cables: e.g. from 10 audio/9 video cables to 3 HDMI cables.

9.8.2 Implementation

The IC used is the Sil 9025 (Silicon Image) third generation HDMI receiver, item 7817 on the SSB.
It has the following features:
Dual HDMI input connector
Two EEPROMS to support EDID
HDMI audio
2
•I
S output to low-cost DACs which operate at a frequency
of 32 to 192 kHz
Integrated HDCP decryption engine
Built-in pre-programmed HDCP keys for highest level of copy-protection security
Color space conversion RGB to YCbCr
“Hot Plug Reset” signal.
Figure “HDMI implementation” shows the HDMI configuration in this chassis.
Hot plug
HDMI_HOTPLUG_RESET
Reset
HDMI 1
HDMI 2
COMP_AUDIO LR for DVI audio input only
EDID
EDID
DDC Reset
(Port 1)
HDMI Receiver Sil9025
(Port 2)
DDC_RESET
RST
I2C
Data Enable
HDMI CLK
24 bits YCbCr 4:4:4
H and V Sync
I2S
I2S DAC
Trident
CX32
HDMI_Audio LR
Figure 9-10 HDMI implementation
HDMI connectors 1 and 2 are connected to resp. ports 1 and 2 of the HDMI receiver. The ports cannot be activated at the same moment. Switching is controlled by software. “Hot Plug Reset” and “DDC Reset” are controlled by the microprocessor.
The HDMI receiver will convert all RGB or YCbCr 4:2:2 signals to 24-bit YCbCr 4:4:4. When it receives a YCbCr 4:4:4 signal it will just pass the signal directly to the Trident Video Processor.
Microprocessor
Audio Processor
Micronas MSP4450P
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9.9 Abbreviation List

1080i 1080 visible lines, interlaced 1080p 1080 visible lines, progressive scan 2CS 2 Carrier Sound 2DNR Spatial (2D) Noise Reduction 3DNR Temporal (3D) Noise Reduction 480i 480 visible lines, interlaced 480p 480 visible lines, progressive scan AARA Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to remove horizontal black bars; keeping up the original aspect ratio
ACI Automatic Channel Installation:
algorithm that installs TV channels directly from a cable network by
means of a predefined TXT page ADC analogue to Digital Converter AFC Automatic Frequency Control: control
signal used to tune to the correct
frequency AGC Automatic Gain Control: algorithm that
controls the video input of the feature
box AM Amplitude Modulation AUO Acer Unipack Optronics AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASD Automatic Standard Detection AV Audio Video B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz BTSC Broadcast Television System
Committee CAM Conditional Access Module CBA Circuit Board Assembly (or PWB) CEC Consumer Electronics Control bus;
remote control bus on HDMI
connections CI Common Interface; E.g PCMCIA slot
for a CAM in a set top box CL Constant Level: audio output to
connect with an external amplifier CLUT Color Look Up Table ComPair Computer aided rePair COFDM Coded Orthogonal Frequency Division
Multiplexing; A multiplexing technique
that distributes the data to be
transmitted over many carriers CSM Customer Service Mode CVBS Composite Video Blanking and
Synchronization CVBS-MON CVBS monitor signal CVBS-TER-OUT CVBS terrestrial out CVI Component Video Input DAC Digital to analogue Converter DBE Dynamic Bass Enhancement: extra
low frequency amplification DDC Display Data Channel; is a part of the
"Plug and Play" feature DFU Directions For Use: owner's manual DNR Dynamic Noise Reduction DRAM Dynamic RAM DSP Digital Signal Processing DST Dealer Service Tool: special
(European) remote control designed
for service technicians DTS Digital Theatre Sound DVB(T) Digital Video Broadcast; An MPEG2
based standard for transmitting digital
audio and video. T= Terrestrial DVD Digital Versatile Disc DVI Digital Visual Interface DW Double Window
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EN 96 LC7.1L LA9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
ED Enhanced Definition: 480p, 576p EDID Extended Display Identification Data
(VESA standard)
EEPROM Electrically Erasable and
Programmable Read Only Memory EU EUrope EXT EXTernal (source), entering the set by
SCART or by cinches (jacks) FBL Fast Blanking: DC signal
accompanying RGB signals FBL-TXT Fast Blanking Teletext FLASH FLASH memory FM Field Memory / Frequency Modulation FMR FM Radio FRC Frame Rate Converter FTV Flat TeleVision H H_sync to the module HD High Definition: 720p, 1080i, 1080p HDCP High-bandwidth Digital Content
Protection; A "key" encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a "snow vision"
mode or changed to a low resolution.
For normal content distribution, the
source and the display device must be
enabled for HDCP "software key"
decoding HDMI High Definition Multimedia Interface,
digital audio and video interface HP Head Phone I Monochrome TV system. Sound
carrier distance is 6.0 MHz I2C Integrated IC bus I2S Integrated IC Sound bus IBO(Z) Intelligent Bolt On module. Z= Zapper;
module for DVB reception. IC Integrated Circuit IF Intermediate Frequency IR Infra Red IRQ Interrupt ReQuest Last Status The settings last chosen by the
customer and read and stored in RAM
or in the NVM. They are called at start-
up of the set to configure it according
the customers wishes LATAM LATin AMerica LC07 Philips chassis name for LCD TV 2007
project LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I LPL LG Philips LCD LS Loud Speaker LVDS Low Voltage Differential Signalling,
data transmission system for high
speed and low EMI communication. M/N Monochrome TV system. Sound
carrier distance is 4.5 MHz MOSFET Metal Oxide Semiconductor Field
Effect Transistor MPEG Motion Pictures Experts Group MSP Multi-standard Sound Processor: ITT
sound decoder MUTE MUTE Line NAFTA North American Free Trade
Association: Trade agreement
between Canada, USA and Mexico NC Not Connected
NICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital sound system, used mainly in Europe.
NTSC National Television Standard
Committee. Color system used mainly in North America and Japan. Color carrier NTSC M/N = 3.579545 MHz, NTSC 4.43 = 4.433619 MHz (this is a VCR norm, it is not transmitted off-air)
NVM Non Volatile Memory: IC containing
TV related data (for example, options) O/C Open Circuit ON/OFF LED On/Off control signal for the LED OAD Over the Air Download OSD On Screen Display PAL Phase Alternating Line. Color system
used mainly in Western Europe (color
carrier = 4.433619 MHz) and South
America (color carrier PAL M =
3.575612 MHz and PAL N = 3.582056
MHz) PC Personal Computer PCB Printed Circuit Board (or PWB) PDP Plasma Display Panel PIG Picture In Graphic PIP Picture In Picture PLL Phase Locked Loop. Used, for
example, in FST tuning systems. The
customer can directly provide the
desired frequency PSU Power Supply Unit PWB Printed Wiring Board (or PCB) RAM Random Access Memory RC Remote Control transmitter RC5 (6) Remote Control system 5 (6), the
signal from the remote control receiver RF Radio Frequency RGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced. RGBHV Red, Green, Blue, Horizontal sync,
and Vertical sync ROM Read Only Memory SAM Service Alignment Mode SAP Secondary Audio Program SC SandCastle: two-level pulse derived
from sync signals SC1-OUT SCART output of the MSP audio IC SC2-OUT SCART output of the MSP audio IC S/C Short Circuit SCL Clock signal on I2C bus SD Standard Definition: 480i, 576i SDA Data signal on I2C bus SDI Samsung Display Industry SDM Service Default Mode SDRAM Synchronous DRAM SECAM SEequence Couleur Avec Memoire.
Color system used mainly in France
and Eastern Europe. Color carriers =
4.406250 MHz and 4.250000 MHz SIF Sound Intermediate Frequency SMPS Switch Mode Power Supply SND SouND SOPS Self Oscillating Power Supply S/PDIF Sony Philips Digital InterFace SRAM Static RAM SSB Small Signal Board STBY Stand-by SVHS Super Video Home System SW Sub Woofer / SoftWare THD Total Harmonic Distortion TXT TeleteXT uP Microprocessor
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Circuit Descriptions, Abbreviation List, and IC Data Sheets
VL Variable Level out: processed audio
output toward external amplifier VCR Video Cassette Recorder VGA Video Graphics Array WD Watch Dog WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound XTAL Quartz crystal YPbPr Component video (Y= Luminance, Pb/
Pr= Color difference signals B-Y and
R-Y, other amplitudes w.r.t. to YUV) Y/C Video related signals: Y consists of
luminance signal, blanking level and
sync; C consists of color signal. Y-OUT Luminance-signal YUV Baseband component video (Y=
Luminance, U/V= Color difference
signals)
EN 97LC7.1L LA 9.
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9.10 IC Data Sheets

This section shows the internal block diagrams and pin layouts of ICs that are drawn as "black boxes" in the electrical diagrams (with the exception of "memory" and "logic" ICs).

9.10.1 Diagram B06C, Type SIL9025CTU(IC7817) (HDMI)

Block Diagram
Pin Configuration
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Figure 9-11 Internal block diagram and pin configuration
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Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10.2 Diagram B06C, Type UDA1334ATS (IC7810) (audio DAC)

Block Diagram
V
DDD
V
SSD
EN 99LC7.1L LA 9.
PLL0
1
BCK
2
WS
DATAI
3
UDA1334ATS
SYSCLK/PLL1
MUTE
DEEM/CLKOUT
VOUTL
6
8
9
14
Pin Configuration
4
DIGITAL INTERFACE PLL
DE-EMPHASIS
INTERPOLATION FILTER
NOISE SHAPER
DAC
13 12
V
DDA
V
15
SSA
5
DAC
10
V
ref(DAC)
7
SFOR1
11
SFOR0
16
VOUTR
BCK
WS
DATAI
V
DDD
V
SSD
1
2
3
4
UDA1334ATS
5
6
7
8
16
15
14
13
12
11
10
9
VOUTR
V
SSA
VOUTL
V
DDA
V
ref(DAC)
SFOR0SYSCLK/PLL1
PLL0SFOR1
DEEM/CLKOUTMUTE
Figure 9-12 Internal block diagram and pin configuration
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9.10.3 Diagram B07, Type TDA8932T (IC7A01) (audio amplifier)

Block Diagram
2
IN1P
3
IN1N
IN2P
IN2N
DIAG
12
15
14
4
7
6
5
INREF
CGND
POWERUP
ENGAGE
OSCILLATOR
V
SSD
PROTECTIONS:
OVP, OCP, OTP,
UVP, TF, WP
MODE
PWM
MODULATOR
PWM
MODULATOR
MANAGER
VOICSOFERCSO
DDA
CTRL
CTRL
81301
DRIVER
HIGH
DRIVER
LOW
DRIVER
HIGH
DRIVER
LOW
STABILIZER 11 V
STABILIZER 11 V
REGULATOR 5 V
V
DDA
28
BOOT1
29
V
DDP1
27
OUT1
26
V
SSP1
21
BOOT2
20
V
DDP2
22
OUT2
23
V
SSP2
V
DDA
V
SSP1
V
DDA
V
SSP2
V
SSD
25
STAB1
24
STAB2
18
DREF
11
HVPREF
13
TEST
Pin Configuration
30
HVP1
V
TDA8932
9
V
SSA
V
V
SSD(HW)
V
V
OSCREF
V
SSD(HW)
1, 16, 17, 32
SSD(HW)
DDA
SSA
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
TDA8932T
SSA
HALF SUPPLY VOLTAGE
32
V
SSD(HW)
31
OICSOP1NI
30
1PVHN1NI
29
VGAID
DDP1
28
1TOOBEGAGNE
27
1TUOPUREWOP
26
VDNGC
SSP1
25
STAB1
24
STAB2
V
23
SSP2
22
2TUOFERPVH
21
2TOOBFERNI
20
VTSET
DDP2
19
2PVHN2NI
18
FERDP2NI
17
V
SSD(HW)
19
HVP2
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Figure 9-13 Internal block diagram and pin configuration
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