Philips hef4505b DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4505B
LSI
64-bit, 1-bit per word random
access read/write memory
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors Product specification
64-bit, 1-bit per word random access
read/write memory
DESCRIPTION
The HEF4505B is a 64-bit, 1-bit per word, fully decoded
and completely static, random access memory. The
memory is strobed for reading or writing only when the
strobe input (ST), chip enable inputs (CE1and CE2) are
HIGH simultaneously. The output data is available at the
data output (D
read/write input (R/W) is HIGH and after the read access
time has passed. Note that the three-state output is initially
disabled and always goes to the LOW state before data is
valid. The output is disabled in the high-impedance
OFF-state, when the memory is not strobed or R/
LOW. R/W may remain HIGH during a read cycle or LOW
during a write cycle. The output data has the same polarity
as the input data.
) only when the memory is strobed, the
OUT
W is
HEF4505B
LSI
Fig.1 Pinning diagram.
HEF4505BP(N): 14-lead DIL; plastic
(SOT27-1)
HEF4505BD(F): 14-lead DIL; ceramic (cerdip)
(SOT73)
( ): Package Designator North America
PINNING
A
to A
0
5
CE
,CE
1
2
W read/write input
R/
address inputs
chip enable inputs
ST strobe input
D
D
IN
OUT
data input
data output
FUNCTION TABLE
ST, CE
,CE2R/WD
1
OUT
L L Z disabled
H L Z write
L H Z disabled
H H equal to memory data read
Note
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
Z = high-impedance OFF-state
MODE
SUPPLY VOLTAGE
RATING OPERATING
−0,5 to +15 4,5 to 15 V
Note
1. Minimum standby voltage for data retention is 3 V.
FAMILY DATA, I
LIMITS category LSI
DD
See Family Specifications
January 1995 2
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January 1995 3
Philips Semiconductors Product specification
64-bit, 1-bit per word random access
read/write memory
Fig.2 Functional diagram.
HEF4505B
LSI
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