INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
∙The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4052B MSI
Dual 4-channel analogue multiplexer/demultiplexer
Product specification |
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January 1995 |
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File under Integrated Circuits, IC04 |
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Philips Semiconductors |
Product specification |
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Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
DESCRIPTION
The HEF4052B is a dual 4-channel analogue multiplexer/demultiplexer with common channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs
(Y0 to Y3) and a common input/output
(Z). The common channel select logic includes two address inputs (A0 and A1) and an active LOW enable input
(E).
Both multiplexers/demultiplexers contain four bidirectional analogue switches, each with one side connected to an independent input/output (Y0 to Y3) and the other side connected to a common input/output (Z).
With E LOW, one of the four switches is selected (low impedance ON-state)
by A0 and A1. With E HIGH, all switches are in the high impedance OFF-state, independent of A0 and A1.
VDD and VSS are the supply voltage connections for the digital control
inputs (A0, A1 and E). The VDD to VSS range is 3 to 15 V. The analogue
inputs/outputs (Y0 to Y3, and Z) can swing between VDD as a positive limit and VEE as a negative limit.
VDD − VEE may not exceed 15 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically ground).
PINNING |
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Y0A to Y3A |
independent inputs/outputs |
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Y0B to Y3B |
independent inputs/outputs |
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A0, A1 |
address inputs |
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enable input (active LOW) |
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E |
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ZA, ZB |
common inputs/outputs |
FAMILY DATA,
IDD LIMITS category MSI
See Family Specifications
Fig.2 Pinning diagram.
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HEF4052BP(N): |
16-lead DIL; plastic |
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(SOT38-1) |
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HEF4052BD(F): |
16-lead DIL; ceramic |
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(cerdip) |
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(SOT74) |
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HEF4052BT(D): |
16-lead SO; plastic |
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(SOT109-1) |
Fig.1 Functional diagram. |
( ): Package Designator North America |
January 1995 |
2 |
Philips Semiconductors |
Product specification |
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Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
Fig.3 Schematic diagram (one switch).
FUNCTION TABLE
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INPUTS |
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CHANNEL |
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ON |
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E |
A1 |
A0 |
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L |
L |
L |
Y0A−ZA; Y0B−ZB |
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L |
L |
H |
Y1A−ZA; Y1B−ZB |
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L |
H |
L |
Y2A−ZA; Y2B−ZB |
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L |
H |
H |
Y3A−ZA; Y3B−ZB |
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H |
X |
X |
none |
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Notes
1.H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage (with reference to VDD) |
VEE |
−18 to + 0,5 V |
Note
1.To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE.
January 1995 |
3 |