Philips HEF4052BU, HEF4052BT, HEF4052BPB, HEF4052BP, HEF4052BDB Datasheet
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DATA SH EET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4052B
MSI
Dual 4-channel analogue
multiplexer/demultiplexer
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
DESCRIPTION
The HEF4052B is a dual 4-channel
analogue multiplexer/demultiplexer
with common channel select logic.
Each multiplexer/demultiplexer has
four independent inputs/outputs
(Y0to Y3) and a common input/output
(Z). The common channel select logic
includes two address inputs (A0and
A1) and an active LOW enable input
(
E).
Both multiplexers/demultiplexers
contain four bidirectional analogue
switches, each with one side
connected to an independent
input/output (Y
0
to Y3) and the other
side connected to a common
input/output (Z).
With E LOW, one of the four switches
is selected (low impedance ON-state)
by A0and A1. With E HIGH, all
switches are in the high impedance
OFF-state, independent of A0and A1.
VDDand VSSare the supply voltage
connections for the digital control
inputs (A0,A1 and E). The VDDto
VSSrange is 3 to 15 V. The analogue
inputs/outputs (Y0to Y3, and Z) can
swing between VDDas a positive limit
and VEEas a negative limit.
VDD− VEEmay not exceed 15 V.
For operation as a digital
multiplexer/demultiplexer, VEEis
connected to VSS(typically ground).
Fig.1 Functional diagram.
PINNING
FAMILY DATA,
I
DD
LIMITS category MSI
See Family Specifications
Y
0A
to Y
3A
independent inputs/outputs
Y
0B
to Y
3B
independent inputs/outputs
A
0
, A
1
address inputs
E enable input (active LOW)
Z
A
, Z
B
common inputs/outputs
HEF4052BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4052BD(F): 16-lead DIL; ceramic
(cerdip)
(SOT74)
HEF4052BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
January 1995 3
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Note
1. To avoid drawing V
DD
current out of terminal Z, when switch current flows into terminals Y, the voltage drop across
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDDcurrent will flow out
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may
not exceed VDDor VEE.
INPUTS CHANNEL
ON
EA
1
A
0
LLLY
0A−ZA
; Y0B−Z
B
LLHY
1A−ZA
; Y1B−Z
B
LHL Y
2A−ZA
; Y2B−Z
B
LHHY
3A−ZA
; Y3B−Z
B
H X X none
Supply voltage (with reference to VDD)V
EE
−18 to + 0,5 V
Fig.3 Schematic diagram (one switch).
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