Philips hef4052b DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4052B
MSI
Dual 4-channel analogue
multiplexer/demultiplexer
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
DESCRIPTION
The HEF4052B is a dual 4-channel
analogue multiplexer/demultiplexer
with common channel select logic.
Each multiplexer/demultiplexer has
four independent inputs/outputs
(Y0to Y3) and a common input/output
(Z). The common channel select logic
includes two address inputs (A0and
A1) and an active LOW enable input
E).
(
Both multiplexers/demultiplexers
contain four bidirectional analogue
switches, each with one side
connected to an independent
input/output (Y
to Y3) and the other
0
side connected to a common
input/output (Z).
With E LOW, one of the four switches
is selected (low impedance ON-state)
by A0and A1. With E HIGH, all
switches are in the high impedance
OFF-state, independent of A0and A1.
HEF4052B
MSI
VDDand VSSare the supply voltage
connections for the digital control
inputs (A0,A1 and E). The VDDto
VSSrange is 3 to 15 V. The analogue
inputs/outputs (Y0to Y3, and Z) can
swing between VDDas a positive limit
and VEEas a negative limit.
VDD− VEEmay not exceed 15 V.
For operation as a digital
multiplexer/demultiplexer, VEEis
connected to VSS(typically ground).
PINNING
Y
to Y
0A
to Y
Y
0B
A
, A
0
1
E enable input (active LOW)
Z
, Z
A
B
independent inputs/outputs
3A
independent inputs/outputs
3B
address inputs
common inputs/outputs
Fig.1 Functional diagram.
FAMILY DATA,
I
LIMITS category MSI
DD
See Family Specifications
Fig.2 Pinning diagram.
HEF4052BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4052BD(F): 16-lead DIL; ceramic
(cerdip)
(SOT74)
HEF4052BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
January 1995 2
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
Fig.3 Schematic diagram (one switch).
HEF4052B
MSI
FUNCTION TABLE
INPUTS CHANNEL
0A−ZA
1A−ZA
2A−ZA
3A−ZA
ON
; Y0B−Z
; Y1B−Z
; Y2B−Z
; Y3B−Z
B
B
B
B
EA
1
A
0
LLLY
LLHY
LHL Y
LHHY
H X X none
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage (with reference to VDD)V
EE
−18 to + 0,5 V
Note
1. To avoid drawing V
current out of terminal Z, when switch current flows into terminals Y, the voltage drop across
DD
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDDcurrent will flow out
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may
not exceed VDDor VEE.
January 1995 3
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