Philips HEF4044BT, HEF4044BPB, HEF4044BDB, HEF4044BD Datasheet

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

∙The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC

∙The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC

HEF4044B MSI

Quadruple R/S latch with 3-state outputs

Product specification			January 1995
File under Integrated Circuits, IC04

Philips Semiconductors	Product specification

Quadruple R/S latch with 3-state outputs

HEF4044B

MSI

The HEF4044B is a quadruple R/S latch with 3-state outputs with a common output enable input (EO). Each latch has an active LOW set input (S0 to S3), an active

LOW reset input (R0 to R3) and an active HIGH 3-state output (O0 to O3).

When EO is HIGH, the state of the latch output (On) can be determined from the function table below. When EO is LOW, the latch outputs are in the high impedance OFF-state. EO does not affect the state of the latch.

The high impedance off-state feature allows common busing of the outputs.

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

HEF4044BP(N): 16-lead DIL; plastic (SOT38-1) HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4044BT(D): 16-lead SO; plastic (SOT109-1)

( ): Package Designator North America

PINNING

EO

common output enable input

3

set inputs (active LOW)

S

0 to

S

3

reset inputs (active LOW)

R

0 to

R

O0 to O3

3-state buffered latch outputs

FUNCTION TABLE

INPUTS

OUTPUT

EO

S

n

R

n

On

L

X

X

Z

H

L

H

H

H

X

L

L

H

H

H

latched

Notes

1.H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial

Z = high impedance OFF-state

FAMILY DATA, IDD LIMITS category MSI

See Family Specifications

January 1995

2