Philips HEF4044BT, HEF4044BPB, HEF4044BDB, HEF4044BD Datasheet

DATA SH EET
Product specification File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4044B MSI
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Quadruple R/S latch with 3-state outputs
HEF4044B
MSI
The HEF4044B is a quadruple R/S latch with 3-state outputs with a common output enable input (EO). Each latch has an active LOW set input (S0 to S3), an active LOW reset input (R0 to R3) and an active HIGH 3-state output (O0to O3).
When EO is HIGH, the state of the latch output (On) can be determined from the function table below. When EO is LOW, the latch outputs are in the high impedance OFF-state. EO does not affect the state of the latch.
The high impedance off-state feature allows common busing of the outputs.
Fig.1 Functional diagram.
PINNING
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial Z = high impedance OFF-state
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
HEF4044BP(N): 16-lead DIL; plastic (SOT38-1) HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4044BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America
EO common output enable input S0to S
3
set inputs (active LOW)
R0to R
3
reset inputs (active LOW)
O
0
to O
3
3-state buffered latch outputs
INPUTS
OUTPUT
O
n
EO S
n
R
n
LXX Z HLH H HXL L H H H latched
Fig.2 Pinning diagram.
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