Philips HEF4027BT, HEF4027BPB, HEF4027BP, HEF4027BDB, HEF4027BD Datasheet
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DATA SH EET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4027B
flip-flops
Dual JK flip-flop
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Dual JK flip-flop
HEF4027B
flip-flops
DESCRIPTION
The HEF4027B is a dual JK flip-flop which is
edge-triggered and features independent set direct
(SD), clear direct (CD), clock (CP) inputs and outputs
(O,O). Data is accepted when CP is LOW, and transferred
to the output on the positive-going edge of the clock. The
active HIGH asynchronous clear-direct (CD) and set-direct
(SD) are independent and override the J, K, and CP inputs.
The outputs are buffered for best system performance.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
FUNCTION TABLES
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
O
n + 1
= state after clock positive transition
PINNING
FAMILY DATA, I
DD
LIMITS category FLIP-FLOPS
See Family Specifications
INPUTS OUTPUTS
S
D
CDCP J K O O
HLXXX H L
LHXXX L H
HHXXX H H
INPUTS OUTPUTS
S
D
CDCP J K O
n + 1
O
n + 1
L L L L no change
LL HL H L
LL LH L H
LL HH
O
n
O
n
J,K synchronous inputs
CP clock input (L to H edge-triggered)
S
D
asynchronous set-direct input (active HIGH)
C
D
asynchronous clear-direct input (active HIGH)
O true output
O complement output
HEF4027BP(N): 16-lead DIL; plastic (SOT38-1)
HEF4027BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)
HEF4027BT(D): 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
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