PHILIPS G 7 User Manual
PSSG
PHILIPS SERVICE SOLUTIONS GROUP
PHILIPS TECHNICAL
TRAINING
PHILIPS
TECH
VIDEOTAPES
MANUALS
COLOR TV
CHASSIS
Philips Technical Training (USA)
401 E. Old Andrew Johnson hwy
PO box 555
Jefferson City, TN 37760
PH: 865-475-0397
FAX: 865-475-0221
TRAINING
EMAIL: Technical.Training@Philips.com
G7
TABLE OF CONTENTS
CUSTOMER SERVICE MODE 13
EAST WEST CORRECTION CIRCUIT 11
HORIZONTAL OUTPUT CIRCUIT 9
INTRODUCTION 1
MICROPROCESSOR CIRCUIT 11
POWER SUPPLY BLOCK 5
POWER SUPPLY 8
SERVICE ALIGNMENT MODE 13
SERVICE DEFAULT MODE 11
SIGNAL FLOW 1
TROUBLESHOOTING FLOW 15
G7 COLOR TV CHASSIS
INTRODUCTION (Figure 1)
The G7 chassis is a high end TV
chassis produced by Philips
Consumer Electronics Company for
the 1999-2000 model year. The G7
chassis is used in TV sets with
27, 32, and 36 inch screen sizes.
The G7 Tuning System features 181
channel tuning with On-Screen
display. In the two tuner
version, the second Tuner and IF
circuits are located on the PIP
module. The Tuning System uses
two ICs mounted on the main
chassis, which include a
microcomputer IC and a memory IC.
The microcomputer communicates
with the Memory IC, the Customer
Keyboard, the Remote Receiver, the
U/V Tuner, the Signal Processor,
the Stereo Decoder, the PIP
module, the Side Jack Panel
(optional), the Comb Filter module
and the Power On/Off circuitry.
The Memory IC retains the settings
for favorite station, customer
control settings, and Factory
Setup data.
The chassis features a Very Large
Scale Integration (VLSI) IC for TV
signal processing. This IC
performs video IF, AFT/AGC
control, horizontal/vertical
synchronization, Chrominance/
luminance processing, and video
switching between internal and
external inputs in versions
without a PIP module. On-Screen
Graphics generation and Closed
Caption decoding are done within
the Microcomputer with signals
being sent to the TV signal
processor. The On-Screen Graphics
information is placed on the main
signal within the TV Signal
Processor. Automatic Volume Level
(AVL) control from the
microcomputer is sent to the
Stereo Decoder IC via the I2C bus.
The G7 chassis features a
Switching Mode Power Supply for
the voltage source. A "HOT"
ground reference is used in the
primary side of the power supply.
"COLD" (signal) ground is used
from the secondary of the power
supply throughout the rest of the
chassis. AN ISOLATION TRANSFORMER
IS REQUIRED WHEN DOING SERVICE ON
ANY VERSION OF THE NEW CHASSIS.
SIGNAL FLOW
The incoming RF signal is applied
to the U/V Tuner via the Antenna
and RF input. The 45.75MHz IF
signal is developed within the U/V
Tuner, then amplified by an IF
Preamplifier located inside the
Tuner. The amplified IF signal is
sent from Pin 1 of the U/V Tuner
to Pin 1 of the SAW filter 1145.
The SAW filter produces bandpass
shaping for the IF signal before
it is applied to the TV Signal
Processing Integrated Circuit 7150
Pins 48 and 49 for Processing.
AGC voltage is developed within
7150 and sent to the Tuner for RF
Amplifier gain control. The AFT
(to the Microcomputer) signal is
developed within IC 7150 and sent
to the Microcomputer via the I2C
bus for Tuner Oscillator frequency
correction.
Video switching by the Rear Jack
panel is accomplished by the
Microcomputer via SEL_MAIN_R1R2
and SEL_PIP_R1_R2. The Rear Jack
panel selects between Video1 or
page 1
FIGURE 1 - OVERALL BLOCK DIAGRAM
page 2
Video2 as the signal source for
the outputs Y_Video_RR or
Video_PIP_RR. The SVHS input is
connected to the Video1 input.
The Y_Video_RR output of the Rear
Jack can either be composite video
from Video1 or Video 2. If the
selected Video1 input is from the
SVHS Jack, this is a luminance
signal. The Y_Video_RR is fed to
switching IC 7250, which selects
between Y_Video_RR or Y-CVBS_FRT
from the Side Jack panel. If the
input to the Side Jack panel is
from an SVHS source and this
source is selected by the user as
the PIP window, the YC is fed to
a YC adder. IC 7250 then selects
between the output of the YC adder
or the Video_PIP_RR source from
the Rear Jack panel. This
Composite signal is then buffered
by transistor 7270 and becomes
Video_PIP_EXT. This Composite
video is fed to the PIP module
where it is used as the source for
the PIP window. Selected
Composite video for the main
picture from 7250 is buffered by
transistor 7255. It becomes
Y_Video_ext and is then fed to the
Comb Filter panel and Pin 17 of IC
7150 Signal Processor. Chroma
C_RR from the Rear Jack panel's
SVHS jack is fed to 7250, which
selects between C_RR and C_FRT.
This signal is then buffered by
transistor 7255 becoming C_ext
before being fed to the Comb
Filter module. Video_PIP_RR from
the Rear Jack panel is also fed to
7250, which selects between
Video_PIP_RR or the output of the
YC adder. This signal is then
buffered by transistor 7270 and
becomes Video_PIP_ext and is fed
to the PIP module.
Composite video from 7150 Pin 6 is
buffer by transistor 7161. In the
one Tuner PIP or in the non-PIP
version, the video signal is
passed through jumper 9163. In
the two Tuner version, video is
passed through resistor 3173 to
the Video PIP input of the PIP
module. The PIP module selects
either the Video from IC 7150, or
from the second Tuner located on
the PIP module. The second Tuner
on the PIP module has its own IF
circuit. The SEL_Video in the
two-tuner version is then fed back
to the input of the 4.5 MHz trap
1167. SEL_Video is fed to the
Stereo decoding circuit for audio
processing. The signal is
buffered again by transistor 7170
before being passed to Pin 13 of
7150. In the single tuner
version, video is passed through
resistor 3172 to the Video_ PIP
input of the PIP module if this
source is selected for the PIP
window. The switch inside 7150
selects between the output of 7170
or Y_Video_ext for either the
single or two tuner versions. The
Internal/External switch of IC
7150 is controlled by the
Microcomputer via the I2C bus.
Selected video from IC 7150 on Pin
38 is buffered by transistor 7176
where it is sent to the
Input/Output (I/O) panel, the Comb
filter, and the Video Text input
of the Microcomputer. The I/O
panel has an external jack for
video output. The Comb filter
separates the video into Y
(Luminance) and C (Chroma)
signals. If the SVHS input is
selected the Y signal is fed to
the Comb filter via the
Y_Video_ext line and the C signal
is fed to the Comb filter on the
C_EXT line. The Comb On/Off line
page 3
from Pin 33 of 7150 switches the
Comb Filter between VIDEO_MON and
the SVHS input. In the PIP
versions, the Y and C signals are
sent to the PIP module. The PIP
circuit selects as the main
picture the YC signals from the
Comb filter. The YC signals from
the PIP module are then looped
through the Comb filter module to
Pins 11 and 10 of IC 7150. In
the non-PIP version, the Y and C
signals are sent to pins 11 and 10
of IC 7150 from the Comb filter.
The Chroma signal on Pin 10 is fed
to an internal Demodulator inside
7150. B-Y and R-Y signals
developed by the Demodulator and
output on Pins 29 and 30. The Y
or Luminance signal on Pin 11 is
looped through 7150 to Pin 28. In
sets with the YUV panel, Y, B-Y,
and R-Y are fed to the YUV panel.
The YUV panel then selects between
the output of 7150 or the YUV
signal from the Rear Jack panel.
The Y, B-Y, and R-Y signals from
the YUV panel are fed to Pins 27,
31, and 32 of IC 7150. The YUV
panel is a Histogram circuit,
which processes the Luminance to
set the black bias level. In sets
without the YUV panel, the Y, R-Y,
and B-Y signals are fed through
jumpers 4225, 4226, and 4227.
Red, Green, and Blue On-Screen
display signals from the
Microcomputer IC 7000 Pins 34, 33,
and 32 are fed to the Signal
Processor 7150 Pins 23, 24, and
25. Fast blanking from IC 7000
Pin 35 is fed to IC 7150, Pin 26.
The On-Screen signals are applied
to the Red, Blue, and Green
signals developed in the signal
processor matrix. Brightness,
Picture, Sharpness, Color, and
Tint control voltages are
developed within IC 7150 from the
Tuning System Microcomputer, IC
7000, via the I2C bus. The Red,
Green, and Blue signals developed
by the signal processor 7150 from
Pins 21, 20, and 19 are applied to
the CRT board. On the CRT board,
these signals are amplified before
being applied to the CRT.
The Drive and Cutoff controls for
the CRT set-up are controlled
within IC 7150 and are set by the
Microcomputer IC 7000 via the I2C
bus. Adjustments are performed
with the set in the Service Test
Mode. Always use the procedures
given in the Service Manual for
setting up the CRT circuits (White
Balance). The Drive controls are
adjusted for proper mixing of the
Luminance and Chrominance signals.
The Cutoff Controls provide
adjustment of the bias level for
the CRT cutoff values.
Horizontal and Vertical signals
are developed within IC 7150.
Adjustments for Horizontal
Centering, Vertical Centering,
AFT, and Vertical Height are done
with the Remote Transmitter via
the Service Test Mode. There is
no adjustment for the Horizontal
Oscillator. The Horizontal
circuit is a count down type of
system that gets its base
frequency from the 3.58MHz
circuit.
When the set is turned On, a High
is output from IC 7000 Pin 20 to
turn On the switched +8 volt
supply. The +8 volt supply
provides voltage to Pin 37 of IC
7150 to the Horizontal oscillator.
The Horizontal drive on Pin 40
page 4
drives transistor 7610.
Horizontal drive from transistor
7610 coupled through the Driver
Transformer 5611 to drive the
Horizontal Output transistor 7620.
The Horizontal Output transistor
7620 drives the IFT and Horizontal
Yoke. The IFT develops the high
voltage, focus voltage, and
filament voltage for the picture
tube. Scan derived voltages
provided by the IFT for use by the
chassis are the G2, +200, +13, and
-13 volt.
The Vertical signal output from IC
7150, Pin 47, is applied to the
vertical output IC 7700. The
vertical signal output from IC
7700 is applied to the Vertical
Yoke. Feedback from the vertical
circuit is fed to IC 7150, Pin 46.
Vertical output on Pin 3 of 7700
is buffered by transistor 7715 to
provide Vertical sync to the
Microcomputer to synchronize the
On-Screen Display and Closed
Caption.
The Stereo decoder IC 7430
performs audio selection and Sound
processing in the G7 chassis.
SEL_Video is fed to 7430 which has
built in Sound IF and decoding
circuits. IC 7430 selects between
internally decoded audio or from
AUD_1, AUD_2, or FRT. Left and
Right monitor audio is output on
Pins 34 and 33. This signal is
fed to the Rear Jack panel. Main
Audio is output on Pins 28 and 29
and fed to the Audio amplifier
7550 before being applied to the
speakers. Headphone audio is
output on pins 25 and 26 and is
amplified by 7553 before being
applied to the Headphone jack.
The PROT_E_W_VERT line monitors
three points to shut down the set
in case of a problem. Transistor
7716 monitors the Vertical output
circuit for failure. The IFT
circuit is monitored for
overvoltage. A circuit on the EW
panel monitors for a failure of
horizontal sweep. A failure at
any one of the three points will
place a High on the PROT_E_W_VERT
line turning On transistor 7041
causing Pin 11 of Microcomputer
7000 to go Low, turning the set
Off. In the case of an
Overcurrent condition in the IFT
circuit, the PROT line which
monitors the EHT_INFO (DAG) line
will go High. This voltage is
applied to Pin 50 of the Signal
Processor 7150. If this voltage
goes above 3.9 volts, 7150 will
detect the increase. This
information will be communicated
to the Microcomputer IC 7000
through the I2C bus. The
Microcomputer will then shut the
set Off.
G7 CHASSIS POWER SUPPLY BLOCK
(Figure 2)
When the 120Vac source is connected to the G7 chassis, approximately 160Vdc is developed by the
bridge rectifier circuit. The 160
volts dc goes through transformer
5912 to the Switch Regulator
Driver IC 3917. The Start voltage
for the switching mode power
supply is taken from the neutral
leg of the input ac.
The power supply includes a single
integrated circuit, operating as a
free-running switching mode power
supply. There is no separate
power supply for standby. The
page 5
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