Copyright 2003 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
! AllFunctional blocksshaded greyarerequired for
the"BasicConfiguration".
Theremainderisrequiredforthe"EnhancedConfiguration".
RS323
DVI-D
VGA2 VGA1
1.1.3Miscellaneous
VGA1VGA2RC-OUT
Mains voltage: 95 - 264 V
Mains frequency: 50/60 Hz
Ambient temperature: + 5 to + 40 deg. C
Maximum humidity: 90% R.H.
Power consumption: around 380 W
Standby Power consumption: < 2 W
Weight: 35 kg
Dimensions (WxHxD): Speakered version:
1 - Y Ground
2 - C Ground
3 - Y 1 Vpp / 75 Ω
4 - C / 16:9 0.3 Vpp / 75 Ω
AV2: Audio - In
1 - Audio - L 0.5 Vrms/10 kΩ
2 - Audio - R 0.5 Vrms/10 kΩ
AV1: Audio/Video - In
1 - CVBS 1 Vpp / 75 Ω
Page 4
EN 4FM242 AA1.
1.3Chassis Overview
LED / SWITCH PANEL
LD
Technical Specifications, Connections, and Chassis Overview
Y-
Buffer
(up)
Y-Main
Y-
Buffer
(down)
A
SC
VGA
AUDIO AMPLIFIER
PANEL
SCAVIO PANEL
VGA CONNECTOR
PANEL
Logic-Buffer (E
)
SMPS
Figure 1-6 PWB Location
Logic Board
Logic-
B
uffer (F)
Logic-Buffer (G
X- Board
)
PLASMA DISPLAY PANEL
POWER SUPPLY PANEL
CL 36532011_010.eps
P
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Page 5
Safety Instructions, Warnings, and Notes
2.Safety Instructions, Warnings, and Notes
EN 5FM242 AA2.
2.1Safety Instructions
Safety regulations require that during a repair:
•Connect the set to the mains via an isolation transformer
(> 800 VA).
•Do not operate the monitor without the front glass plate.
One function of this glass plate is to absorb IR radiation.
Without this glass plate, the level of radiation could
damage your eyes.
•Replace safety components, indicated by the symbol
only by components identical to the original ones.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay, in particular, attention to
the following points:
•Route the wire trees correctly and fix them with the
mounted cable clamps.
•Check the insulation of the mains lead for external
damage.
•Check the electrical DC resistance between the mains plug
and the secondary side (only for sets which have a mains
isolated power supply):
1. Unplug the mains cord and connect a wire between the
two pins of the mains plug.
2. Set the mains switch to the 'on' position (keep the
mains cord unplugged!).
3. Measure the resistance value between the pins of the
mains plug and the metal shielding of the tuner or the
aerial connection on the set. The reading should be
between 4.5 MΩ and 12 MΩ.
4. Switch 'off' the set, and remove the wire between the
two pins of the mains plug.
•Check the cabinet for defects, to avoid touching of any
inner parts by the customer.
2.2Warnings
•All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD ). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Available ESD protection equipment:
– Complete kit ESD3 (small tablemat, wristband,
connection box, extension cable and earth cable) 4822
310 10671.
– Wristband tester 4822 344 13999.
•Be careful during measurements in the high voltage
section.
•Never replace modules or other components while the unit
is switched 'on'.
•When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
2.3Notes
•Clean the glass plate in front of the plasma display with a
slightly humid cloth. If, due to circumstances, there is some
dirt between the glass plate and the plasma display, this
must be cleaned by a qualified service engineer (see
section “Mechanical Instructions”).
•Measure the direct voltages and oscillograms with regard
to the chassis ground (), or hot ground () as this is
called.
•The direct voltages and oscillograms shown in the
diagrams are indicative. Measure them in the Service
Default Mode (see section “Service Modes”).
,
•Where necessary, measure the voltages in the power
supply section both in normal operation () and in standby
(). These values are indicated by means of the
appropriate symbols.
•The semiconductors indicated in the circuit diagram and in
the parts lists, are interchangeable per position with the
semiconductors in the unit, irrespective of the type
indication on these semiconductors
2.3.1Schematic Notes
•All resistor values are in ohms and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kOhm).
•Resistor values with no multiplier may be indicated with
either an 'E' or an 'R' (e.g. 220E or 220R indicates 220
Ohm).
•All Capacitor values are expressed in Micro-Farads (µ =
-6
x10
), Nano-Farads (n = x10-9), or Pico-Farads (p = x10
12
).
•Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
•An 'asterisk' (*) indicates component usage varies. Refer to
the diversity tables for the correct values.
•The correct component values are listed in the Electrical
Replacement Parts List. Therefore, always check this list
when there is any doubt.
2.3.2Rework on BGA ICs
General
Although (LF)BGA assembly yields are very high, there may
still be a requirement for component rework. By rework, we
mean the process of removing the component from the PWB
and replacing it with a new component. If an (LF)BGA is
removed from a PWB, the solder balls of the component are
deformed drastically so the removed (LF)BGA has to be
discarded.
Device removal
As is the case with any component, it is essential when
removing an (LF)BGA that the board, tracks, solder lands, or
surrounding components are not damaged. To remove an
(LF)BGA, the board must be uniformly heated to a temperature
close to the reflow soldering temperature. A uniform
temperature reduces the chance of warping the PWB.
To do this, we recommend that the board is heated until it is
certain that all the joints are molten. Then carefully pull the
component off the board with a vacuum nozzle. For the
appropriate temperature profiles, see the IC data sheet.
Area preparation
When the component has been removed, the vacant IC area
must be cleaned before replacing the (LF)BGA.
Removing an IC often leaves varying amounts of solder on the
mounting lands. This excessive solder can be removed with
either a solder sucker or solder wick. The remaining flux can be
removed with a brush and cleaning agent.
After the board is properly cleaned and inspected, apply flux on
the solder lands and on the connection balls of the (LF)BGA.
Note: Do not apply solder paste, as this has shown to result in
problems during re-soldering.
-
Page 6
EN 6FM242 AA2.
Device replacement
The last step in the repair process is to solder the new
component on the board. Ideally, the (LF)BGA should be
aligned under a microscope or magnifying glass. If this is not
possible, try to align the (LF)BGA with any board markers.
To reflow the solder, apply a temperature profile according to
the IC data sheet. So as not to damage neighbouring
components, it may be necessary to reduce some
temperatures and times.
Safety Instructions, Warnings, and Notes
Page 7
3.Directions for Use
Directions for Use
EN 7FM242 AA3.
Page 8
EN 8FM242 AA3.
Directions for Use
Page 9
Directions for Use
EN 9FM242 AA3.
Page 10
EN 10FM242 AA4.
Mechanical Instructions
4.Mechanical Instructions
Index of this chapter:
•Service Position Monitor
•Rear Cover Removal
•Service Position Panels
•PDP and Glass Plate Replacement
•Re-assembly
Note: Figures below can deviate from the actual situation, due
to different set executions.
4.1Service Position Monitor
Figure 4-1 Service Position
First, put the monitor in its service position. (Can be done via
buffers as showed on figure, but preferable via new service
position solution as described below. Still some improvising is
needed for service positions panels however). Therefore,
disconnect all cables connected to the monitor and take the
monitor of the wall (or tabletop stand). Then, fix the monitor to
the 2 service-poles. (the 2 poles together form a service-kit:
3122 785 90480; this service-stand can be used for 30” until
42” FTVs.
CL 16532099_041.eps
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4.3Service Position Panels
4.3.1SCAVIO Panel
Solder-side SCAVIO
B
CL 36532011_011.eps
Figure 4-2 Service position SCAVIO (1)
To access the panel:
1. Remove the cables from connectors 0320, 0305, 0301,
0319 and 0388 on the SCAVIO panel.
2. Remove the power cable from the mains power inlet to the
power supply (connector 0308).
3. Remove the five screws at the bottom of the SCAVIOpanel cover plate.
4. Hold the SCAVIO panel while removing the top screw, in
order to prevent that it will fall.
5. Take the panel out, and turn it 180 degrees, so that you
face the solder side of the SCAVIO panel.
6. Reconnect all cables. Use a standard power cable to
connect the mains directly to PSU-connector 0308, and
use the 'LED/Switch panel' service kit 3122 785 90410 (as
the original cable is too short).
Caution: When measuring, watch out for the 'hot' left heat sink
of the PSU!
200303
4.2Rear Cover Removal
To be able to access or measure the panels, remove the rear
cover (metal back plate):
Warning: make sure that the mains power is disconnected
before you remove the metal back plate.
1. Remove all fixation screws of the back plate, as indicated
in the figure above (five at the top, five at each side, seven
at the bottom and the two larger ones just below the 'wall
mounting holes').
2. Remove the metal back plate. Make sure that wires and flat
foils are not damaged during plate removal.
Another way to measure the SCAVIO panel:
1. Remove the five screws at the bottom of the SCAVIOpanel cover plate.
2. Hold the SCAVIO panel while removing the top screw, in
order to prevent that it will fall.
3. Put a piece of paper (or cardboard) in front of the Power
Supply.
4. Take the panel out, and turn it upward [B], so that you face
the solder-side of the SCAVIO panel.
Caution: Make sure that the metal connector plate does not
touch any 'hot' part of the Power Supply (heatsink).
Page 11
Mechanical Instructions
EN 11FM242 AA4.
Component-side SCAVIO
CL 16532099_043.eps
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Figure 4-3 Service position SCAVIO (2)
To access the other side of the SCAVIO panel:
1. Disconnect all cables going to the SCAVIO panel.
2. Remove all screws at the connectors of the connector
plate, see figure 'Solder-side SCAVIO'.
3. Remove the three fixation screws that connect the SCAVIO
panel to the connector plate, see figure 'Component-side
SCAVIO'.
4. Reconnect the SCAVIO panel, be careful: do not make a
short-circuit!
4.3.4Audio Amplifier Panel (only valid for “speaker”-version)
The solder-side of this panel is directly accessible. To access
the component-side, or to remove the whole panel, unscrew
the three fixation screws
4.3.5LED/Switch Panel and Speakers
Plastic backcover
Foam cushion
4.3.2VGA Connector Panel
How to remove the VGA Connector panel:
1. Squeeze the plastic pins that attach this panel to the
SCAVIO board, while you pull it carefully upwards.
2. Unplug the flat foil cable.
4.3.3Power Supply Panel
CL 36532011_021.eps
Figure 4-4 Remove PSU
The supply panel can not be repaired by the network. As
measure points are accessible for possible re-alignment, there
is no further service-position.
To remove the panel unscrew the 9 screws (see drawing) and
disconnect the cables.
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Figure 4-5 Service Position LED/Switch Panel and Speakers
To access or replace the LED/Switch panel and/or speakers:
1. Take the monitor from its service stand, and put it (face
down) on a soft surface (blanket or foam cushion), to
make sure that you do not damage the front glass plate.
2. Unscrew all fixation screws of the plastic back cover: five at
all sides.
3. Lift and remove the plastic back cover.
4. You can access now the LED/Switch panel and/or the
speakers.
4.3.6LED/Switch panel
To measure the component-side, or to remove the LED/Switch
panel, unscrew one fixation screw (see enlarged part of figure
'LED/Switch Panel and Speakers'), and remove the panel.
4.3.7Loudspeakers (if valid)
When you have removed the plastic back cover, you must
replace the speaker-box sealing foams (12nc: 3122 358
76221). This, to ensure that the loudspeakers are airtight.
Do not stretch the foam during mounting. Pay special
attention to the corners, to make sure that the foam is not
stretched and that it is pushed into the corners.
Page 12
EN 12FM242 AA4.
4.4PDP and Glass Plate Replacement
Shielding frame
Front displayFoam cushion
Figure 4-6 Exchange Glass Plate
To exchange the glass plate
1. Take the monitor from its service stand, and put it (face
down) on a soft surface (blanket or foam cushion), to make
sure that you do not damage the front glass plate.
2. Remove the metal back plate as described in paragraph
'Rear Cover Removal'.
3. Unscrew all fixation screws of the plastic back cover: four
at the left and right side, three at the bottom and top side.
4. Lift and remove the plastic back cover.
5. Unscrew two fixation screws of the triangular shaped cable
holder at the left bottom, see figure 'Exchange Glass Plate'.
6. Unscrew all fixation screws of the (metallised) shielding
frame, four at both sides and four at the top and bottom,
see figure 'Exchange Glass Plate'.
7. Unplug the cable of the LED/Switch panel, connector 0320.
8. You can now remove the (metallised) shielding frame,
together with the PDP, Audio panel, Power supply and
SCAVIO panel attached to it, see figure 'Exchange Glass
Plate'.
Note: To prevent scratches, make sure to put the shielding
frame together with the PDP on a soft surface.
9. Replace the glass plate.
Mechanical Instructions
CL 36532011_013.eps
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4.5Re-assembly
CL 36532011_014.eps
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Figure 4-7 Exchange PDP
To exchange the PDP panel:
1. Take out the SCAVIO panel and Power Supply panel.
2. Unscrew all fixation screws of the (metallised) shielding
frame (two at the top and two at the bottom, see figure
'Exchange PDP').
3. Replace the PDP.
To re-assemble the whole set, do all processes in reverse
order.
Notes:
•You must replace the speaker-box sealing foam, in case
the plastic rear cover has been (re)moved.
•While re-assembling, make sure all the cables are in their
original position and make sure all the EMC foams are
present to ensure 'EMC tightness'.
Page 13
Service Modes, Error Codes and Fault Finding
NORMAL OPERATION
(and all other states)
Override software
protections
Ignore all "Service unfriendly" m odes.
Start blinking LED sequence to s how the
error codes according to the blinking LED
procedure.
Lineair audio and video settings are set to
50% (middle value) except volume (set to
low volume level, 25% of max)
"UNDO" ignore all
"Service unfriendly
modes"
STANDBY
Service Default Mode
Display SDM in "top line"
(all other OSD off).
Blinking LED sequence.
OFF
SAM
Short SDM pins
(also works from Standby)
RC sequence
"00" or
"Standby"
Reset to last status
RC button.
Mains OFF
Mains ON
RC sequence
"0-6-2-5-9-6-MENU"
RC-code
0-6-2-5-9-6-OSD
or INFO+
RC-code
0-6-2-5-9-6-menu
Normal
operation
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5.Service Modes, Error Codes and Fault Finding
Index of this chapter:
1. Test points
2. Service Modes
3. Problems and Solving Tips (related to CSM)
4. ComPair
5. Error Codes
6. The Blinking LED Procedure
7. Protections
8. Repair Tips
5.1Test Points
The chassis is equipped with test points (I- and F-points)
printed on the circuit board assemblies. See test point
overviews in section “Block Diagrams”
Perform measurements under the following conditions:
•Service Default Mode.
•Video: colour bar signal (via PC or VGA-generator).
•Audio: 1 kHz, 2 V
5.2Service Modes
(via PC or VGA-generator).
PP
EN 13FM242 AA5.
5.2.1Service Default Mode (SDM)
Service Default Mode (SDM) and Service Alignment Mode
(SAM) offer several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between a Philips Customer Care Centre (P3C) and a
customer.
There is also the option of using ComPair, a hardware interface
between a computer (see requirements) and the FTV chassis.
It offers the ability of structured trouble shooting, test pattern
generation, error code reading, software version readout and
software upgrading.
Minimum requirements: a Pentium Processor, Windows 9x/NT/
2000/XP, and a CD-ROM drive (see also paragraph
“ComPair”).
Note: This FM242-monitor has different as the FM24, not a
internal pdp-testpattern that can be enabled via the SAMmenu
A test pattern however can be generated.
How?
Select via ComPair-tool the right hex-address (sub
address 0080 and then PS (Pattern Select) (00 full window
black; 01~04 full window white, red, green, blue) and more
variants until 17)
It however only works when set is signalled (Scavio and
pdp, needs a sync). This is less nice solution as in FM24.
Switch off the pattern again via hex-code 0080 and 0
Purpose
•To create a pre-defined setting to get the same
•To override SW protections (only when SDM is entered via
•To start the blinking LED procedure.
Specifications
•All picture settings at 50% (brightness, contrast, etc.).
•Colour temperature is set to 'normal'.
•Bass, treble and balance at 50%; volume at 25%.
•All service-unfriendly modes (if present) are disabled, like:
•Video blanking,
•Slow de-mute,
•Anti ageing,
•Automatic switch to Standby when no sync signals are
measurement results as given in this manual.
the 'service pins' on connector 0382).
received.
Figure 5-1 SDM Flowchart
How to enter SDM
Use one of the following methods:
•Use the standard RC-transmitter and key in the code
062596, directly followed by the MENU button.
•Short jumpers 1 and 2 of connector 0382 on the SCAVIO
panel.
After entering SDM, a blank screen is visible, with SDM in the
upper left side for recognition. The Blinking LED procedure is
started and will indicate any possible errors via the (orange)
front LED.
How to navigate
To toggle to the SAM mode, use a standard customer RCtransmitter and key in the code 062596, directly followed by the OSD (i+) key.
How to exit
Use one of the following methods (the set returns to its last
status):
•Switch the set to STANDBY by pressing the power button
on the remote control transmitter (if you switch the set 'off'
by removing the Mains power, the set will return in SDM,
when the Mains power is re-applied).
•Use the standard RC-transmitter and key in the code 00.
5.2.2Service Alignment Mode (SAM)
Purpose
•To perform (software) alignments.
•Easy way to identify the commercial type number of the
set.
•Easy identification of the used software versions.
•To display (or clear) the error code buffer.
•View operational hours.
Specifications
•Operation hours counter.
•Software version reading.
•Error buffer reading and erasing.
•Software alignments.
Page 14
EN 14FM242 AA5.
RC button,
e.g. P+ or P-
STANDBY
Do not store
settings made
during alignments
RC button,
e.g. P+ or P-
"UNDO" ignore
all "Service
unfriendly
modes"
"Standby"
Settings made
during alignments
are stored
STANDBY
NORMAL OPERATION
RC sequence "0-6-2-5-9-6-OSD "(for Europe & A/P)
RC sequence "0-6-2-5-9-6-INFO+" (for USA/LatAm)
Short SAM pins (works also from Standby)
RC sequence
"00"
or
or
Ignore all "Ser vice
unfriendly" mod es
Service Alignment Mode
Display "SAM" top level
menu
Upper menu selection
(with cursor buttons)
Lower menu selection
(with cursor buttons)
RC-code "0-6-2-5-9-6-OSD"
RC-code "0-6-2-5-9-6-INFO+"
RC-code "0-6-2-5-9-6-MENU" -
Service Modes, Error Codes and Fault Finding
Mains ON
OFF
(Settings made
during alignments
are stored)
Mains OFF
or
SAM submenus
(whitepoints, align-
ments, etc.)
Figure 5-2 SAM Flowchart
How to enter
Use one of the following methods:
•Use a standard RC-transmitter and key in the code 062596
directly followed by the OSD (i+) button
Note: the OSD (i+) is not available on the original FM242
remote control, therefore use another Philips remote
control (e.g. MG, EMG or A10).
•Short jumpers 3 and 4 of connector 0382 on the SCAVIO
panel.
The following screen is visible:
Service Alignment Menu General
Type Nr. - AG Code42FD9945/01 **00 00
SW Version OTC AAAAAB-X.Y_xxxxx
SW Version PW AAAABC-X.Y_xxxxx
SW Version EPLD AAAABC-X.Y_xxxxx
Errors 1 xx xx xx xx xx
Errors 2 xx xx xx xx xx
Operational hours xx
Reset error buffer Press OK to reset
Store Press OK to store
CL 26532011_016.eps
SDM
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4. SW Version PW (AAAABC-X.Y-xxxxx). See description
above.
5. SW Version EPLD (AAAABC-X.Y-xxxxx). See description
above.
6. Errors 1. Gives the last five errors of the error buffer. The
last detected error is displayed at the most left position.
The errors are displayed as 2 digit numbers and separated
by a space. When less than 10 errors occurred, the rest of
the line(s) is empty. In case of no errors the text 'No Errors'
is displayed behind menu item 'Errors 1'. See paragraph
5.5 for a description.
7. Errors 2. Gives the first five errors of the error buffer. The
last detected error is displayed at the most left position.
8. Operational hours. The Operations Hours indicate the
time that the display was active with half an hour resolution.
It represents the system hours (OTC), not the PDP hours.
9. Reset error buffer. Erase the contents of the error buffer.
Press 'OK' on your remote control to activate. The content
of the error buffer is cleared.
10. Store. This will store the performed alignments. Press 'OK'
on your remote control to activate.
Note: if you do not want to store the performed alignments,
leave the SAM mode via code 00 on your remote control.
Do not activate the 'store' item.
How to navigate
Use one of the following methods:
•Select the sub-menu's (upper line) with the CURSOR
LEFT/RIGHT keys on the remote control transmitter.
•Select the menu items with the CURSOR UP/DOWN keys.
With the CURSOR LEFT/RIGHT keys it is possible to:
– Activate the selected menu item.
– Change the value of the selected menu item.
•To toggle to the SDM mode, use the standard customer
RC-transmitter and key in the code 062596, directly
followed by the MENU key.
How to exit
Use one of the following methods:
•Switch the set 'off' (with the Mains switch or by pulling the
Mains cord).
Note: new alignment settings are always stored, even
when item 'store' was not activated!
•Switch the set to 'standby' by pressing the power button on
the remote control transmitter.
Note: new alignment settings are always stored, even
when item 'store' was not activated!
•Use the standard RC-transmitter and key in the code 0 0.
Note: new alignment settings are not stored (except when
item 'store' was activated)!
5.2.3Customer Service Mode (CSM)
Figure 5-3 SAM Menu 'General'
1. Type Nr. Gives the commercial type number of the
monitor, e.g. 42FD9945/01.
2. AG Code. Is not implemented.
3. SW Version OTC (AAAAAB-X.Y-xxxxx).
Note: You will find details of the latest software versions in
the chapter 'Software Survey' of the 'Product Survey Colour Television' publication, which is published four
times each year.
•A = the chassis name (FM23 for 32" displays or FM242
for 42" SDI-displays).
•B = the region (E= Europe, A= Asia Pacific, U= NAFTA,
L= LATAM; in our case G = Global).
•(if valid) C = the configuration name (B= Basic, E=
Enhanced; for PW & EPLD-software this will be named
B).
•X = the main software version number.
•Y = the sub software version number.
•x = last five digits of 12nc code.
Purpose
When a customer is having problems with his TV-set, he can
call his dealer or helpdesk. The service technician can than ask
the customer to activate the CSM, in order to identify the status
of the set. Now, the service technician can judge the severe
ness of the complaint. In many cases, he can advise the
customer how to solve the problem, or he can decide if it is
necessary to visit the customer.
The CSM is a read only mode, therefore modifications in this
mode are not possible.
Page 15
Service Modes, Error Codes and Fault Finding
Normal operati on mode
Key in sequence: 1-2-3-6-5-4 on RC
Store current picture, sound and feature settings for later
retrieval (only store if needed to go back to normal
operation).
Set pre-defined picture, sound and feature settings (to be
able to see and hear if the set is working pr operly and to be
able to read the CSM information).
Ignore service unfriendly options
Volume up/down
Numerical key,
external
If other key
= standby
"Cursor right"
To previous CSM page
Restore picture, sound and
feature settings (that were
stored during entry)
Display CSM information screen
"Cursor left"
Other key,
e.g. "menu"
mains off
Figure 5-4 CSM Flowchart
How to enter
Use the standard customer RC-transmitter and key in the code
123654.
When CSM is entered, the values of brightness, contrast, etc.
are set to 50% (of max. value), and volume is set to 25%, to
ensure that you always have a picture and sound.
After switching 'on' the Customer Service Mode, the following
screen will appear:
Customer Service Menu 1
1 - Type Nr. - AG Code 42FD9945/01
2 - SW Version OTC AAAAAB-X.Y_xxxxx
3 - SW Version PW AAAABC-X.Y_xxxxx
4 - SW Version EPLD AAAABC-X.Y_xxxxx
5 - Code 1 xx xx xx xx xx
6 - Code 2 xx xx xx xx xx
7 - Volume xx
8 - Brightness xx
9 - Contrast xx
Customer Service Menu 2
10 - Colour xx
11 - Tint xx
12 - Sharpness xx
13 - Soundmode xx
14 - Source xx
15 - AV Mute xx
Figure 5-5 CSM Menu
To next CSM page
Increase/decrease
volume
Switch to prese t/
channel or external
Standby
(when the set is switched on,
picture, sound and feature
settings (that were stored
during entry) are restored)
Off
(when the set is switched on,
picture, sound and feature
settings (that were stored
during entry) are restored)
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EN 15FM242 AA5.
•(if valid) C = the configuration name (B= Basic, E=
Enhanced).
•X = the main software version number.
•Y = the sub software version number.
•x = last five digits of 12nc code.
3. SW Version PW (AAAABC-X.Y-xxxxx). See description
above.
4. SW Version EPLD (AAAABC-X.Y-xxxxx). See description
above.
5. Code 1. Gives the last five errors of the error buffer. The
last detected error is displayed at the most left position.
The errors are displayed as 2 digit numbers and separated
by a space. When less than 10 errors occurred, the rest of
the line(s) is empty. In case of no errors, the text 'No Errors'
is displayed behind menu item 'Code 1'. See paragraph
“Error Buffer” for a description.
6. Code 2. Gives the first five errors of the error buffer. The
last detected error is displayed at the most left position.
7. Volume. Gives the last volume status for the selected
source, as set by the customer.
8. Brightness. Gives the last brightness status for the
selected source, as set by the customer.
9. Contrast. Gives the last contrast status for the selected
source, as set by the customer.
10. Colour (not present in Basic configuration). Gives the last
colour status for the selected source, as set by the
customer.
11. Tint (only for NTSC Enhanced configuration). Gives the
last tint status for the selected source, as set by the
customer.
12. Sharpness. Gives the last sharpness status for the
selected source, as set by the customer.
13. Source. Gives the selected source, as set by the
customer.
14. AV Mute. Indicates if AV Mute is 'on' or 'off'.
How to navigate
Use one of the following methods:
•Switch to the other CSM page with the CURSOR LEFT/
RIGHT keys on the remote control.
•You can increase/decrease volume with the VOLUME UP/
DOWN keys on the remote control.
•You can switch to another source with the NUM/EXT keys
on the remote control.
How to exit
Use one of the following methods:
•Press the MENU key of the remote control transmitter.
•Switch the set to 'standby' with the Power switch on the
remote control.
•Switch the set 'off' with the Mains power switch.
5.3Problems and Solving Tips (Related to CSM)
5.3.1Picture Problems
Note: Below described problems are all related to the monitor
settings. The procedures to change the value (or status) of the
different settings are described.
1. Type Nr. AG Code. Gives the commercial type number of
the monitor, e.g. 42FD9945/01. AG Code is not
implemented.
2. SW Version OTC (AAAAAB-X.Y-xxxxx) Note: You will find
details of the latest software versions in the chapter
'Software Survey' of the 'Product Survey - Colour
Television' publication, which is published four times each
year.
•A = the chassis name (FM23 for 32" displays or FM242
for 42" SDI-displays).
•B = the region (E= Europe, A= Asia Pacific, U= NAFTA,
L= LATAM or G = Global).
Picture too dark or too bright
Increase/decrease the BRIGHTNESS and/or the CONTRAST
value when the picture improves after you have switched on
the Customer Service Mode. The new value is automatically
stored.
White line around picture elements and text
Decrease the SHARPNESS value when the picture improves
after you have switched on the Customer Service Mode. The
new value is automatically stored.
Snowy picture and/or unstable picture
A scrambled or decoded signal is received.
Page 16
EN 16FM242 AA5.
Service Modes, Error Codes and Fault Finding
Black and white picture
Increase the COLOUR value when the picture improves after
you have switched on the Customer Service Mode. The new
value is automatically stored.
Menu text not sharp enough
Decrease the CONTRAST value when the picture improves
after you have switched on the Customer Service Mode. The
new value is automatically stored.
5.3.2Sound Problems
(if valid, related to speaker-version yes or no)
No sound from left or right speaker
Check item 'Volume' in the CSM mode. If value is low, increase
the volume level. The new value is automatically stored.
No sound or sound too loud (after channel change/
switching on)
Increase/decrease the VOLUME level when the volume is OK
after you switched on the CSM. The new value is automatically
stored.
5.4ComPair
5.4.1Introduction
ComPair (Computer Aided Repair) is a service tool for Philips
Consumer Electronics products. ComPair is a further
development on the European DST (Dealer Service Tool),
which allows faster and more accurate diagnostics. ComPair
has three big advantages:
•ComPair helps you to quickly get an understanding on how
to repair the chassis in a short time by guiding you
systematically through the repair procedures.
•ComPair allows very detailed diagnostics (on I
is therefore capable of accurately indicating problem areas.
You do not have to know anything about I
yourself because ComPair takes care of this.
•ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the
microprocessor is working) and all repair information is
directly available. When ComPair is installed together with
the SearchMan electronic manual of the defective chassis,
schematics and PWBs are only a mouse click away.
5.4.2Specifications
ComPair consists of a Windows based faultfinding program,
and an RS232 cable between PC and the (defective) product.
The ComPair faultfinding program is able to determine the
problem of the defective monitor. ComPair can gather
diagnostic information in two ways:
•Automatic (by communication with the monitor): ComPair
can automatically read out the contents of the entire error
buffer. Diagnosis is done on I2C level. ComPair can send
and receive commands to the micro controller of the
monitor, and so can access the I2C bus of the monitor. In
this way, it is possible for ComPair to communicate (read
and write) to devices on the I2C busses of the FTV monitor.
•Manually (by asking questions to you): Automatic
diagnosis is only possible if the micro controller of the
monitor is working correctly and only to a certain extend.
When this is not the case, ComPair will guide you through
the faultfinding tree by asking you questions (e.g. Does the
screen give a picture? Click on the correct answer: YES /
NO) and showing you examples (e.g. Measure test-point
F7 and click on the correct oscillogram you see on the
oscilloscope). You can answer by clicking on a link (e.g.
2
C level) and
2
C commands
text or a waveform picture) that will bring you to the next
step in the faultfinding process.
By a combination of automatic diagnostics and an interactive
question / answer procedure, ComPair will enable you to find
most problems in a fast and effective way.
Beside fault finding, ComPair provides some additional
features like:
•Software upgrading (upload possible to OTC and PW
Scaler).
•Emulation of the (European) Dealer Service Tool (DST).
•If both ComPair and SearchMan (Electronic Service
Manual) are installed, all the schematics and the PWBs of
the set are available by clicking on the appropriate
hyperlink. Example: Measure the DC-voltage on capacitor
C2228 (Schematic/Panel) of the SCAVIO panel. Click on
the 'Panel' hyperlink to automatically show the PWB with a
highlighted capacitor C2568. Click on the 'Schematic'
hyperlink to automatically show the position of the
highlighted capacitor.
5.4.3How to Connect
1. First, install the ComPair Browser software on your PC
(read the installation instructions carefully).
2. Connect an RS232 interface cable between a free serial
(COM) port on your PC and the RS232 connector on the
FM242 plasma monitor.
3. Switch the plasma monitor 'off' and 'on' again (with the
Mains switch).
4. Start the ComPair program and follow the instructions.
Note: once the set is in ComPair mode, the front LED will blink
red, at a frequency of 0.3 Hz.
Note: The RS232 cable is not included. It is a standard cable
(9p sub-D male-to-female) that can be obtained by a computer
store. It is supplied however with the ComPair interface (4822
727 21631), necessary for servicing other Philips TVs.
5.5Error Buffer
The error code buffer contains all detected errors since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is written at the left side and all other errors shift one
position to the right.
5.5.1How to Read the Error Buffer
Use one of the following methods:
•On screen via the SAM (only if you have a picture).
Examples:
–Errors: 6 0 0 0 0, error code 6 is the last and only
detected error.
–Errors: 9 6 0 0 0, error code 6 was first detected and
error code 9 is the last detected (newest) error.
•Via the blinking LED procedure (when you have no
picture). See paragraph “The blinking led procedure”.
•Via ComPair.
Page 17
Service Modes, Error Codes and Fault Finding
EN 17FM242 AA5.
5.5.2How to Clear the Error Buffer
The error code buffer is cleared in the following cases:
•By activation of the 'Reset error buffer' command in the
SAM menu.
•When you transmit the code 062599 with a standard
remote control transmitter.
12EP1K30QCEPLD processor 7656 SC11
13PDPI2C error of the
20Download comm.Errors during
21CSP comm.CSP time-out er-
40Temperature alarm Detections of
70Over voltageVs, Va, +5V,
71Vs under voltageVs under voltage Black
72Va under voltageVa under voltage Black
73+5V under voltage+5V under volt-
74+3V3 under voltage +3V3 under volt-
75DC-PROTAudio amplifier
Notes:
•In case of non-intermittent faults, clear the error buffer
before you begin the repair. This to ensure that old error
codes are no longer present.
•If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another
error code and not the actual cause (e.g., a fault in the
protection detection circuitry can also lead to a protection).
•In case error 70 occurs, the belonging over-voltage line
cause can be located via measuring. (via measuring all 4
voltages simultaneously with an oscilloscope). Chosen
(only Enhanced)
sor
I/O expander
SCAVIO
PSU
(only Enhanced)
ceiver
(only Enhanced)
PDP
downloading
ror
over-temperature
+3V3 overvoltage
age
age
protection
7798SC13
7812SC14
7540SC8
7370P3
7225SC5
7170SC4
7280SC5
Black
P
box
P
box
P
box
Black
P
box
Black
P
box
Black
P
box
FM242-workshops will be trained how to do so. (special
document will be generated for this).
5.6The Blinking LED Procedure
Via this procedure, you can make the contents of the error
buffer visible via the front LED (orange colour).This is
especially useful when there is no picture. When no errors are
present, the LED will stay green.
When the SDM is entered, or when code 062500 is entered
with the remote control, the LED will blink the contents of the
error-buffer.
Error-codes ≥ 10 are shown as follows:
1. n long blinks of 750 ms, which is/are an indication of the
decimal digit,
2. a pause of 1.5 s,
3. n short blinks (n = 1-9),
4. when all the error-codes are displayed, the sequence
finishes with a LED blink of 3 s,
5. the sequence starts again.
Example of error buffer: 12 9 6 0 0
After entering SDM:
1. 1 long blink of 750 ms followed by a pause of 1.5 s,
2. 2 short blinks followed by a pause of 3 s,
3. 9 short blinks followed by a pause of 3 s,
4. 6 short blinks followed by a pause of 3 s,
5. 1 long blink of 3 s to finish the sequence,
6. the sequence starts again.
5.7Protections
You can read the error codes of the error buffer via the service
menu (SAM), the blinking LED procedure, or via ComPair. If a
fault situation is detected an error code will be generated and if
necessary, the set will be put in the protection mode. Blinking
of the red LED at a frequency of 5 Hz indicates the protection
mode.
In some error cases, the microprocessor does not put the set
in the protection mode. The error codes are indicated by an
orange front LED.
To get a quick diagnosis the chassis has three service modes
implemented:
•The Customer Service Mode (CSM): easy way to read out
the status of the set.
•The Service Default Mode (SDM): start-up of the set in a
predefined way.
•The Service Alignment Mode (SAM): adjustment of the set
via a menu and with the help of test patterns.
Exceptional ‘protection’ situation
There exists one ‘protection’ (due to too high internal settemperature), where the set does not switch to ‘protection’mode but to Standby-mode. This protection is not logged into
the error-buffer.
When the set becomes too warm, an ‘On Screen Display’message will be showed set is going to switch to Standby. After
some time set can be switched on again. (It is very unlikely this
will happen. For that reason this performance has been
accepted).
Temperature error
The monitor will switch to standby
automatically.
Please allow cool down.
Page 18
EN 18FM242 AA5.
5.8Repair Tips
If one of the errors of the error buffer points to a defective
supply, then the supply-panel must be send for central repair.
If the symptoms (still to be communicated; e.g. when VS-value
is too high some pixels do not extinguish, when VS-value is too
low some pixels do not enlighten) match with a possible
misalignment of a supply-line, this supply-line could be
checked, and re-aligned.
Only do this if there is a slight spec-violation.
In case it does not help, re-align to the previous wrong setting,
to keep cause-image in tact, for central repair workshop.
Replace supply panel by a new one, and match the supply with
the pdp. (See alignment instructions in chapter “Alignments”).
Service Modes, Error Codes and Fault Finding
Page 19
Block Diagrams, Testpoint Overviews, and Wiring Diagram
6.Block Diagrams, Testpoint Overviews, and Wiring Diagram
Block Diagram Video
VIDEO
VGA
VGA
CONNECTOR
037103180318
VGA1-R
1
VGA1-G
2
VGA1-B
3
VGA1-TXD
4
VGA1 IN
15P"D"SHELL
CONNECTOR
5
6
6
1
11
7
2
12
7
8
3
13
9
8
4
14
10
15
VGA2
IN/OUT
15P"D"SHELL
CONNECTOR
6
11
7
12
8
13
9
14
10
15
RC-OUT
SC6
RS-232
IN/OUT
5
10
4
9
3
8
2
7
1
6
BLOCK DIAGRAM
5
1
2
3
4
5
RS 232 INPUT
CONTROL
RC-VGA1
9
10
VGA1-RXD
11
DCC-SDA-1
12
VGA1-H
13
VGA1-V
14
DCC-SCL-1
ST24FC21
VGA2-R
VGA2-G
VGA2-B
VGA2-TXD
VGA2-RXD
DDC-SDA-2
VGA2-H
VGA2-V
DDC-SCL-2
RXD
TXD
5
DDC
7
NVM
7904
DDC
NVM
7907
ST24FC21
+5V-STBY-SW+5V-STBY-SW
7352
ST3232E
11
14
12
13
6366
PS-232-ACT
SC7
3913
7340 A+B
74HC4052D
1
TXD-OTC
3
5
TXD-PW
12
13
14
10
9
LOGIC
6
15
0372
1
2
3
4
5
6
7
8
9
N.C.
10
11
12
13
14
15
0376
1
2
3
RL_ICN
4
5
GL_ICN
6
LD_ICN
7
IR_TX
8
IR_RX
9
10
11
SEE
6
1
13
9
2
11
6
7900
EBOX-PRESENT
10
7937
7940
7910
VGA1-R
VGA1-G
VGA1-B
VGA1-TXD
VGA1-RXD
9
RC-VGA1
4
VGA1-H
10
VGA1-V
VGA2-R
VGA2-G
VGA2-B
VGA2-TXD
VGA2-RXD
8
VGA2-H
VGA2-V
3
12
5
VGA-OUTN
7915
SELECT-3
SELECT-2
SC8
SC7
TXD-2
RXD-2
RC
RC-CONTR
11
9
10,13
3
5
7310
SC8
2
4
6
12
13
15
8
10
29
17
19
21
27
28
23
25
31
30
32
7303 C+D
7303 A+B
1.4
7315, 7316
7325, 7326
SC6
F303
31
F304
29
F305
27
F308
21
F309
20
18
F306
25
F307
23
4
F311
16
F312
14
F313
12
6
5
F314
10
F315
8
2
3
1
12
VGA2-TXD
8
VGA2-RXD
SELECT-4
26VGA1-RXD
VGA1-TXD
SELECT-1
VGA1-RXD
TXD-OTC
RXD-OTC
TDX-PW
RXD-PW
73237322
RC-OUT
7320
RC-VGA1
7321
VGA
INPUT
SC8
SC8
SC7
SC10
VGA1-R
VGA1-G
VGA1-B
VGA1-TXD
VGA1-RXD
RC-VGA1
VGA1-H
VGA1-V
(EBOX-
PRESENT)
SC7
TV MODE
VGA2-TXD
VGA2-RXD
VGA2-H
VGA2-V
VGA2OUTN
SC6
RC-OUT
6379
6378
SC3
R/Pr/Cr
G/Y/Y
B/Pb/Cb
2fh 1fh 2fh
V
H
VGA2OUTN
SC6
SC10
SC10
VGA1-V
VGA1-H
VGA1-RXD
VIDEO SELECTION
& MATRIX
AV3 (HD)
V-HD-EXT
F072
H-HD-EXT
F075
AV1
7311-A
7311-B
7311-C
VGA1-H
VGA1-V
11
F071
F070
Y-H D
F073
251
SVHS
SC2
VGA1-V
VGA1-H
VGA2-V
VGA2-H
VGA2-V
VGA2-H
VGA2-EN
VGA2-OUT
7370 A+B
O.S.
O.S.
F074
AV2
34
SC11
SYNC
SELECTION
SC11
7060
7065
75
9
R
G
B
Pr
Y
Pb
1Fh
Cr
Y
Cb
CVBS
C
Y
SC3
VGA2-R
VGA2-G
VGA2-B
SC7
VGA2-EN NOT
VGA2-OUTN
SC6
SYNC-ACT
SC7
UART-ACT
SC7
7141
7138
7135
70792Fh
7074
7084
1fh BUFFER
7117
Cr
7113
Ys
7121Y-HD
Cb
F236
F235
VIDEO SELECTION
7007 A+C
74HCT4053T
14
4
6
11-9
7088
7090
MATRIX
LOGIC
RGB
SC5
MATRIX-SEL
8x
8x
H-DEC
V-DEC
clock
PW-SDA
3250
3250
PW-SCL
VGA1-R
VGA2-R
R-2Fh
R-YUV
VGA1-G
VGA2-G
G-2Fh
G-YUV
VGA1-B
VGA2-B
B-2Fh
B-YUV
VGA1-V
VGA2-V
VGA1-H
VGA2-H
SC4
4
15
14
Y-D E C
UV-DEC
F240
F247
1250
VIDCLK
24.576MHz
SC11
V-HD
12,14
H-HD
1,5
SC10
2
4
1
5
15
11
12
14
2
4
1
5
2
4
15
11
SC9
SC9
7146
74HC4052D
LOGIC
7158
74HC4052D
LOGIC
7009
74HC4052D
LOGIC
DVI-D INPUT
DVI-D INPUT SOCKET
7102
CLAMP
7103
CLAMP
7104
CLAMP
7280
SDA 9400
23
22
54
0375
INTERLACER
CLOCK
7145
7148
7151
7154
7157
7160
12
13
5
3
R-2Fh
G-2Fh
B-2Fh
7089
I054
74HCT4053D
R-NTSC
R-ATSC53
I058
I065
G-NTSC
G-ATSC21
I072
I078
B-NTSC
B-ATSC123
I083
VIDE-SELECTION
DECODER
DECODERDE-INTERLACER
7225
SAA7118C
VIDEO
DE-
ADC
CODER
SYNC
CNTRL
P4
ERR
9
10
14
16
17
18
23
24
SYNC
7129
F146
3
7130
F152
13
9
VIDEO-SEL-1
VIDEO-SEL-2
7131
VIDEO-SEL-1
VIDEO-SEL-2
V-ADC
H-ADC
SYNC-SEL
VIDEO-SEL-2
7100-B
BLANKING
7100-C
BLANKING
7100-A
BLANKING
SC11
HD-CLAMPN
SC8
F158
SC8
F211
F210
SC10
SC8
SCL
DDC
SDA65
EPROM
6210
R-YUV
G-YUV
B-YUV
8x8xY-OUT
UV-OUT
61
V OUT-DEINT
60 H OUT-DEINT
V PEN
62
CLKOUT-DEINT
26
F249
PW-SDA
3284
21
3285
20
PW-SCL
10
3
9
10
3
13
9
10
1
2
6
7
9
DE-
ERR
11
19FM242 AA6.
SC11
HD-BLANKN
F246
F245
SC10
SC10
SC4
RX2-
RX2+
7215
ST24FC21
RX1-
RX1+
+5V-STBY-SW
RXD-
RXD+
RXC+
RXC-
VIDEO SELECTION - ADC
119R-ADC
110G-ADC
100B-ADC
GBLKSPL
SC10
GCOAST
RXO+
RXO-
RX1+
RX1-
RX2+
RX2-
RXC+
RXC-
PW-SDA
3209
PW-SCL
3210
7170
AD9887KS
81V-ADC
82H-ADC
93
94
62
63
59
60
56
57
65
66
53RTHERMDATACK
ERR
92
91
ADC-TMDSPWEPLD
8x
ADC
8x
ADC
8x
ADC
SYNC. PROC
+
CLOCK
GENERATION
8x
8x
TMDS
RECEIVER
8x
DE
SC2
H-SYNC
V-SYNC
SYNC SELECTION
& SWITCHING
Y-H D
C-SYNC-OUT
SC11
SC11
H-PRESNT
10
H-HD-EXT
2
1
8x
8x
8x
8x
8x
8x
8x
8x
8x
8x
8x
8x
V-HD-EXT
75 OHM-ON
SC11
7007-B
74HCT4053D
10 6
SC9
MUXES
7000 - 7002
7006 - 7010
PROCESSING
7025 A-B
LM319D
COMPARATOR
10
5
15
VGA2-EN-NOT
SCALER - CLOCK
GENERATOR
24.576 MHz
SC7
SC7
V-SYNC
H-SYNC
+
-
+
-
SDA-1
SCL-1
SCALER-PW164-MEMORY
SC10
8x GRE (0-7)
8x GRO (0-7)
8x GGE (0-7)
8x GGO (0-7)
8x GBE (0-7)
8x GBO (0-7)
138
139
140
134
137
7
12
+5B
7040
LM 1881M
2
3051
7060
3571
3570
16
SYNC
SLICER
7570
FS6377
5
6
GENERATOR
1
CLOCK
ERR
SC5
SC11
V-SYNC-TTL
V-SYNC-POL-N
H-SYNC-TTL
H-SYNC-POL-N
V-SYNC-CMP
H-SYNC-CMP
C-SYNC-LM
1
V-SYNC-LM
3
VGA2-EN
5
ADVS
ADHS
ADSOG
GCLK
ADDE
F615
F616
15
13
12
10
SC11
SC4
SC7
SC7
SC9
SC7
SC6
SC2
SC8
SC3
F619
F633
F618
CLKOUT-DEINT
8x UV-OUT
VOUT-DEINT
HOUT-DEINT
PW-START
PW-PRESET
SDA-2
SCL-2
PW-SDA
PW-SCL
RXD-PW
TXD-PW
VGA2-OUT
VGA2-EN
VIDEO-SEL-1
VIDEO-SEL-2
SYNC-SEL
SC10
GBLKSPL
GCOAST
8x Y-OUT
VPEN
MCLK
3608
3606
3604
3605
7605
PW164
CONTROL FUNCTIONS
SC8
SDA1
SC7
SCL1
SC7
SDA1
SCL1
SC7
7574
74LVC125A
5
9
GRAPHICS PORT
SYNC
DECODER
AND
TIMER
YUV
TO
RGB
CLOCK
GEN
MICRO-
PROCESSOR
UART
3541
15
14
3540
PIXEL PROC.
VIDEO
PORT
7540
PCF8574A
3532
3531
32
6
8
1112
8x DRE (0-7)
8x DGE (0-7)
SCALER
SC9
DCK EXT
8x DBG (0-7)
PARITYPARITY-OUT
F637
F639
F634
F638
7630
M29W160DT
DATA
FLASH
ADD
ROM
CNTRL
7628
CY62126
DATA
ADD
SRAM
CNTRL
PW-NVM
SC9
7580
M24C32
SDA
EXP.
ERR
10
I/O
3
9
F566
F565
F563
F564
F569
F567
7530
PCF8591
ADC
ERR
4
5
6
7
9
10
11
12
7563
1
4
2
3
VIDCLK
(24.567 MHz)
VXCA
(18.432 MHz)
MCLK
(120 MHz)
DCKEXT
(36 MHz)
5
SCL
6
SELECT-1
SELECT-2
SELECT-3
SELECT-4
VIDEO-SEL-1
POWER-DOWN
VIDEO-SEL-2
3548
MSP-RESET
0315
1
2
0316
1
2
TEMP3-SENSOR
SC5
SC14
AUDIO
SC10
SC10
NVM
ERR
8
TEMPSENSOR S1
(OPTIONAL)
TEMPSENSOR S2
(OPTIONAL)
P3
SC6
SC6
SC12
SC6 SC3
SC14
SC11
SC3
BACK-END-EPLD
DVS
DHS
DEN
DCLK
FBX MODE
1-2 FH
SYNC
SC5
SC6
SC10
SC8
SC10
SC12
SC10 SC11
SC10 SC11
SC12
V-SYNC-TTL
V-SYNC-POL-N
H-SYNC-TTL
H-SYNC-POL
C-SYNC-LM
V-SYNC-LM
V-SYNC-COMP
H-SYNC-COMP
VGA1-V
VGA1-H
VGA2-V
VGA2-H
SYNC-SEL
VIDEO-SEL-1
VIDEO-SEL-2
PW-SDA
PW-SCL
SDA-1-3V3
3664
SCL-1-3V3
3662
7656-A+B+C
EP1K30FC256
A
SC12
8x R-OUT (0-7)
8x G-OUT (0-7)
8x B-OUT (0-7)
V-SYNC-OUT
H-SYNC-OUT
BLANK-OUT
PARITY-OUT
SC10
PWDWN--LVDS
DIGITAL
CONTRAST
SYNC
DELAY
SYNC
PROC.
ERR
12
BACK-END-LVDS OUTP
7670
DS90CC385M
50-56
2-4
6-8
10-15
16,18-20
22-25
F619
28
F690
27
F692
30
25
DCLK
31
32
B
CONTROLS
C
SUPPLY
& GROUND
SC12
SC12
PLASMA
DISPLAY
PANEL
LVDS
TTL PARALLEL
TO
LVDS
(LVDS
ENCODER)
TTL
LVD S
POWER DOWN
SDA-1-3V3
SCL-1-3V3
PDP-GO
SC7
CPU-GO
IRQ-PDP
PDP
8x R-OUT (0-7)
8x G-OUT (0-7)
8x B-OUT (0-7)
V-SYNC-OUT
H-SYNC-OUT
BLANK-OUT
PWRDWN-LVDS
75 OHM-ON
SC2
H-PRESENT
SC2
HD_BLANKN
HD_CLAMPN
C-SYNC-OUT
SC2
TV MODE
SC6
V-HD
H-HD
7655
EPC2
DATA
CNTRL
PROM
585
PROG
SOCKET
48
TX OUT0-M
47
TX OUT0-P
46
TX OUT1-M
45
TX OUT1-P
42
TX OUT2-M
41
TX OUT2-P
38
TX OUT3-M
37
TX OUT3-P
3837TX CLK OUT-M
TX CLK OUT-P
3680
3684
ERR
30
CL 26532038_001.eps
SC3
PDP
INTERFACE
CONNECTOR
PDP-GO
CPU-GO
IRQ-PDP
0318
19
17
15
13
11
9
3
1
7
5
4
14
18
8
10
6
150402
Page 20
Block Diagrams, Testpoint Overviews, and Wiring Diagram
Block Diagram Audio
20FM242 AA6.
AUDIO
AUDIO SOURCE
SC13
SELECT
L
AUDIO
VGA IN
R
L
AUDIO
FLEX
VGA
R
L
AUDIO
DVI-D
R
L
AV1
AUDIO
CVBS
R
L
AV2
AUDIO
YC
R
AV3
L
AUDIO
RGB
YPbPr
R
YCbPr
SC1-L
SC1-R
D-CTR-NIL
D-CTR-ONE
CONTROL
LED
LD
PANEL
7107
RC
RECEIVER
2
6127
1101
4
ON/OFF
5
SWITCH
6
7120
F713
F714
1
4
SC8
SC6
GREEN
RED
F710
F711
RS-232
IN/OUT
2
6
2
A
6
B
2
6
7800 A+B
74HC4053D
2
12
7718
POWER-OK
RS232 INPUT
5
10
4
9
3
8
2
7
1
6
6103
2
3
7
1
2
3
7714
LM833D
7734
LM833D
7754
LM833D
0376
1
2
3
4
5
6
7
8
9
10
11
10,11
7103
7105
1
7
1
7
1
7
15
14
ANTI PLOP
+9V-STBY
7801
7802
BLOCK DIAGRAM
RXD
TXD
RL_ICN
GL_ICN
LD_ICN
IR_TX
IR_RX
GREEN-LED
RED-LED
RC-IN
LIGHT-SENSOR-IN
+8V6
+5V-STBY-SW
+9V-STBY-SW
+9V-STBY
L4
R4
L5
R5
L6
R6
L2
R2
L3
R3
L1
R1
7803
SEE
VIDEO
N.C.
L1
L2
L3
L4
L5
L6
R1
R2
R3
R4
R5
R6
7805
7806
AUDIO-ENABLE
SC14
0320
1
2
3
4
5
6
7
8
9
10
5798
+8V6
SC8
0320
1
2
3
4
5
6
7
8
9
10
10
11
25
24
23
20
19
18
7798
TEA6422D
3
ERR
4
5
6
9
MATRIX
SWITCH
7807
7808
CONTROL
FUNCTIONS 2
ICON_NOT
ICON_NOT
1
LD_ICN
GL_ICN
RL_ICN
SC7
IR_TX
IR_RX
SC7
+8V6
+5V-STBY-SW
+9V-STBY-SW
+9V-STBY
SC14
3795
28SDA-AUDIO
3794
27
12 PRE-OUT1-L
13
PRE-OUT1-R
SC15
AUDIO
DELAY LINE
A
B
7555
74HC4053D
2
1
12
13
5
3
7550
74HC4053D
2
1
12
13
AUDIO-PROCESSOR
SCL-AUDIO
GREEN_LED
15
14
RED_LED
4
15
14
BLOCK DIAGRAM
RC
VIDEO
I2SDATA-IN1
I2SDATA-IN2
B
7879
TC74HC590AF
RC
SC6
SEE
7812
MSP3415G
3
2
17
21
40
41
DEMO-
DULATOR
PRE-
SCALE
DAC
DIGITAL
DAC
SOUND
7874
TC74HC590AF
F872
CONTROL FUNCTIONS 1
SC7
SC6
SC6
7517
ADM 810
RESET
DSP
PROC.
VGA1-H
VGA1-V
2
ERR
2
I2S-DATA-OUT
I2S-CLOCK
DACM-L
DAC
DACM-R
DAC
7870
TC74HC590AF
7432
7433
RESET
SC13
SERVICE PINS
0382
1
3
5
7
9
+5V
SDA-AUDIO
SCL-AUDIO
13
12
16
14
27
26
8
9
3130L
R
5 18.432 MHz VXCA
6
7x
7x
1415
6MHz
OTC-H
RESET
SC7
SC10
PW_FLASH_RESET
ICONN_NOT
SC8
STANDBY
SC8
SC10
PW-START
SC8
POWER-OK
CPU-GO
PDP-GO
SC12
IRQ-PDP
SC6 RC-CNTL
SC10
PW-RESET
SC10
PW-START
SC8 FAN-SP2
SC8 FAN-SP1
SC6 UART-ACT
SC6
SYNC-ACT
GND-LED
RED-LED
RC
LIGHT-SEN-IN
2
SDM
4SAM
6CMP
8
10
3813
3812
4810
4811
A
B
I660
I659
7841
LM833D
3
6
7851
LM833D
3
6
7861
TS462CD
2
6
SC9
SDA-1
SCL-1
1
7
F813
1
7
1
7
AUDIO DELAY PROC.
A
7880
CY7C199B
RAMCOUNTERCOUNTER"D" F.F."D" F.F.
SERVICE-IN
3419
3380-C
3422
3421
SCL-1
SDA-1
16
17
83
84OTC-V
74
109
120
119
95
96
116
115
93
110
108
95
104
103
99
98
114
113
100
105
106
SC7
7x8x
7383
SAA5801H
7881
74HCT573
8x
FRAME
OTC
ERR
91
ERR
92
ERR
93
ERR
94
ERR
95
ERR
96
ERR
97
8x
82
86
85
88
87
89
90
91
92
43
42
40
41
SC13
F816
SC7
F817
3404-C
3404-D
3404-A
3404-B
3402-D
3402-C
3402-B
3402-A
3464-D
3464-C
3464-A
3464-B
L-POS
L-NEG
AUDIO-ENABLE
D-CTR-ONE
D-CTR-NIL
7882
74HCT573
SDA-NVM-1
SCL-NVM-1
RESET
SC7
ROM-CS
RAM-CS
ROM-OE
RAM-OE
DATA
ADDRESS
CONTROL
DATA
ADDRESS
CONTROL
SC6
RS_232_ACT
F812
SC1-L
SC1-R
17
15
F383
F427
SDA-1
F428
SCL-1
F425
SDA-2
F426
SCL-2
RXD-OTC
TXD-OTC
R-POS
R-NEG
10
0388
7
6
5
4
3
2
1
4884
24 ms MONITOR
4894
40 ms TV
SEE
IIC DIAGRAM
SC10
SC6
7430
MC24C32
5
6
NVM
ERR
7
7
7510 - 74 LVCOOAD
1
2
9
7506
AM29DL164DT
DUAL
BANK
FLASH
ROM
7500
MSM51V18165F
DRAM
7435
A2
0388
88
7
6
5
4
3
2
1
FILTERS
+9V-STBY A
I2S-DATA-IN1
I2S-DATA-IN2
6
11
26
28
7515,7516
12
L-POS
L-NEG
AUDIO-ENABLE
R-POS
L-NEG
CS
OE
CS
OE
FLASH
RESET
7225
LM833DT
3
2
5
6
3207
3222
7211
BC857BM
AUDIO
A3
AMPL-
1730
2.5A
7735,7736
STAB
1740
2.5A
7745,7746
STAB
A4
A5
A6
7302
7402
7502
7602
L-HIGH
AUDIO
AMPLL-LOW
AUDIO
AMPLR-HIGH
AUDIO
AMPLR-LOW
F730
F735
F740
F745
7315
LM311D
2
3
7415
LM311D
2
3
7515
LM311D
2
3
7615
LM311D
2
3
A3
A4
A5
A6
7260-A
LM833DT
3
1
2
3259
F231
3220
1
7238-A
LM833DT
F241
3240
7
F211
TO
0302
P6
POWER
SUPPLY
3
1
2
3234
7260-B
LM833DT
5
7
6
3274
7238-B
LM833DT
5
7
6
3244
SUPPLY & DC PROTECTION
A7
0302
9
8
7
6
5
4
3
2
1
L-HIGH
L-LOW
AU-EN-NOT
R-HIGH
L-HIGH
DC-PROT
+9V-STBY
F258
F235
F273
F245
8
1,4
8
1,4
8
1,4
8
1,4
OUT_PROT
VSDN-POS
VCC-10-POS
VSDN-NEG
VCC-10 -NEG
7
7
7
7
3315
3328
F328
3318
3415
3428
F428
3418
3515
3528
F528
3518
3615
3628
F628
3618
OUT_LH
OUT_LL
OUT_RH
OUT_RL
VCC-10-POS
VCC-10-NEG
VCC-10-POS
VCC-10-NEG
VCC-10-POS
VCC-10-NEG
VCC-10-POS
VCC-10-NEG
VCC_10_POS
3749
VCC_10_NEG
F330
F430
F530
F630
3755
3765
2760
3330
7330
2330
2355
7355
3355
3430
7430
2430
2455
7455
3455
3530
7530
2530
2555
7555
3555
3630
7630
2630
2655
7655
3655
37703771 3780
+9V-STBY
+9V-STBY A
6750
2759
6760
7755
3337
3362
3437
3462
3537
3552
3637
3662
7751
7365-2
IRF7343
G
F365
G
7365-1
IRF7343
7465-2
IRF7343
G
F465
G
7465-1
IRF7343
7565-2
IRF7343
G
F565
G
7565-1
IRF7343
7665-2
IRF7345
G
F665
G
7665-1
IRF7345
5753
3751
7761
DC-PROT
5335
D
S
D
S
7340
D
S
D
S
7440
D
S
D
S
7540
D
S
D
S
7640
3781
CL 26532038_002.eps
VSDN-POS
5365
2355
5366
VSDN-NEG
OUT_PROT
A7
5435
VSDN-POS
5465
2465
5460
VSDN-NEG
OUT_PROT
A7
5535
VSDN-POS
5565
2565
5560
VSDN-NEG
OUT_PROT
A7
5335
VSDN-POS
5665
2665
5660
VSDN-NEG
OUT_PROT
A7
DC-PROTECT
7753
BC857BW
3752
150402
OUT_LH
OUT_LL
OUT_RH
OUT_RL
0303
0304
5
L-HIGH
4
3
2
1
L-LOW
R-HIGH
4
3
2
1
R-LOW
Page 21
Block Diagrams, Testpoint Overviews, and Wiring Diagram
Power Lines Overview
21FM242 AA6.
SC8
0319
0305
1
2
3
4
5
6
7
8
9
10
11
12
13
1
8
9
10
11
12
8004
AC LINE
3
VCC
NC
AC NEUTRAL
1
CONTROL FUNCTIONS 2
+9V-STBY
+9V-STBY-SW
+8V6
+5V-STBY-SW
+3V3-STBY-SW
POWER O.K.
SC7
STAND-BY
SC7
1100
T1A
+3V3
1105
500mA
SC13
OTC
+9V-STBY
+9V-STBY-SW
+8V6
+5V-STBY-SW
+3V3-STBY-SW
+5V-POW
+3V3
POWER SUPPLY PANEL
LED / SWITCH PANEL
LD
0320
+5V
+5V-STBY-SW
+8V6
+5V-STBY-SW
+5V
+5V_STBY_SW
0320
10
9
8
7
6
10
9
8
7
6
VGASC6
03180318
321
5541
+9V-STBY
+9V-STBY-SW
+5V-STBY-SW
5008
VGA CONNECTOR
5901
35305530
1101
6916
+5V REF
+5V_EXP
ON/OFF
SWITCH
1
2
3
+8V6
+5V-STB-SW
+5V
TO FANS
1
8006
NC
GND
FAN_SP
PDP-SUPPLY
(BLACKBOX)
_ON
D3.3V1
8009
10
PDP ASSYFROM MAINS-INLET
SYNC SELECTION
SC2
4
5
6
+3V3-STBY-SW
+5V
5007
5060
5009
SC3
+5V
+8V6
5140
5164
3164
VIDEO SELECTION
&MATRIX
5170
5167
7165
6166
+5V
+5A
+5B
6-7009
+5M
+5V
+8SW
+8V6
+8AA
+8A
VREF1
VREF2
GND
PDP_GO
RSV
V
GND
SC4
SC5
1
+5V-STBY-SW
+5V-POW
+3V3
VIDEO SELECTION - ADC
7175
5197
LD1117
1170
500mA
5196
5198
5199
VIDEO
+8V6
+5V
1270
+3V3
500mA
5220
5222
5224
5221
5223
5228
+5V_STBY_SW
+3V3PLL
+3V3
+3V3-AD
+3V3MAIN1
+3V3OUTPUT
+3V3MAIN2
3V3AA
3V3DB
3V3DD
+8V6
+5V
+3V3VID
3V3DA
3V3DC
3V3DE
S
D5V
D3.3V1
GND
GND
+9V_STBY_SW
+9V_STBY
8002
13
+3V3_STBY_SW
+5V_STBY_SW
8V6
SCL-1
SDA-1
POWER_OK
GND
SC6
+5V
SC7
RES
STANDBY
FAN_SP_2
FAN_SP_1
1
VGA INPUT
+5V
5300
+8V6
+5V-STBY-SW
6302
5302
5350
6353
5352
CONTROL FUNCTIONS 1 OTC
+5V
+8V6
+3V3-STBY-SW
5520
5521
5522
5523
5524
+5V
+8B
+5V-STBY-SW
+5S
+5R
+5V
+8V6
+3V3-STBY-SW
+3V3-CNTL-A
+3V3-CNTL-B
+3V3-CNTL-C
+3V3-CNTL-D
+3V3-CNTL-E
8005
1
NC
GND
fAN_SP
SCALER, CLOCK-GENERATOR
SC9
+3V3
1575
500mA
+3V3-STBY-SW
+5V
+5V-STBY-SW
SCALER-PW164 + MEMORY
SC10
+3V3
5572
5630
8007
Va
NC
Vcc
GND
GND
GND
NC
Vs
Vs
Vs
+3V3
+3V3-PW
+3V3-STBY-SW
+5V-OE
+5V-STBY-SW
+3V3-PW
+3V3W
+3V3
+2V5
9
PDP
ASSY
1
8003
VSND_NEG
VSND_NEG
GND_SND
GND_SND
VSND_POS
VSND_POS
GND_SND
9V_STBY
DC_PROT
8008
D5V
V
G
DND
SCAN
V
GND
V
SET
GND
GND
S
V
V
S
8010
V
A
V
A
NC
GND
GND
8011
V
A
V
A
NC
GND
GND
8001
5V
GND
12
GND
GND
SC11
GND
GND
+3V3
+8V6
GND
3V3
3V3
3V3
3V3
3V3
BACK-END-EPLD
1670
500mA
D
7641
3640
G
TL431
1
5642
5643
5644
5645
5646
5647
5648
5649
(IF VALID)
1
9
1
PDP
ASSY
10
1
PDP
ASSY
5
1
N.C.
5
+3V3-PLD
S
7640
+2V5
+2V5PLDA
+2V5PLDB
+2V5PLDC
+3V3PLDA
+3V3PLDB
+3V3PLDC
+3V3PLDD
+3V3PLDE
SUPPLY & DC PROTECTION
A7
0302
9
8
7
6
5
4
3
2
1
FILTERS
A2
+9V-STBY
VCC-10-POS
VCC-10-NEG
AUDIO AMPLI LEFT HIGH
A3
VCC-10-POS
VCC-10NEG
VSDN-POS
VSDN-NEG
AUDIO AMPLI LEFT LOW
A4
VCC-10-POS
VCC-10-NEG
VSDN-POS
VSDN-NEG
AUDIO AMPLI RIGHT HIGH
A5
VCC-10-POS
VCC-10-NEG
VSDN-POS
VSDN-NEG
AUDIO AMPLI LEFT LOW
A6
VCC-10-POS
VCC-10-NEG
VSDN-POS
VSDN-NEG
BACK-END-LVDS
SC12
AUDIO SOURCE SELECT
SC13
+8V6
+9V-STBY
AUDIO-PROCESSOR
SC14
+5V
+8V6
AUDIO-DELAY-LINE
SC15
+5
DC-PROT
5796
3796
5810
3810
5870
5335
5725
5335
5360
5435
5460
5535
5560
5635
5660
1730
2A5
7735,7736
STAB
1740
2A5
7745,7746
STAB
3315
3318
3330
????
3415
3418
3430
3455
3515
3518
3530
3555
3615
3618
3630
3655
+3V3-PW
+3V3-STBY-SW
+8V6
+8V6A
+4V3A
+9V-STBY
+5V
+8V6
+8V6B
+4V3B
+5D
CL 36532011_018.eps
+9V-STBY
VSDN-POS
VCC-10-POS
VSDN-NEG
VCC-10-NEG
8-7315
1-7315
C-7330
C-7335
8-7415
1-7415
C-7430
C-7455
8-7515
1-7515
C-7530
C-7555
8-7615
1-7615
C-7630
C-7655
200303
Page 22
I2C-IC Overview
IIC
CONTROL
SC7
FUNCTIONS 1
86
MASTER
HW IIC
85
7383
SAA5801H
OTC
MAIN-
PROCESSOR
(MASTER)
ERR
91
ERR
92
ERR
93
ERR
94
ERR
95
ERR
96
ERR
97
88
SLAVE
HW IIC
87
91
MASTER
HW IIC
92
74
108
109
Block Diagrams, Testpoint Overviews, and Wiring Diagram
CONTROL
RESET
3404-C
3404-D
3404-A
3404-B
3398-C
3402-B
3402-A
3384
3007
ADDRESS
ADDRESS
DATA
34143415
34103413
IIC BUS 4
SDA_NVM_1
SCL_NVM_1
4431
7
PW_RESET
PW_FLASH_RESET
MSM51V18165F
DATA
+5V_STBY_SW
SDA-1
SCL-1
+3V3_CNTR_D
SDA-2
SCL-2
PW_START
+3V3_CNTL_D
3432
34333431
5
7430
M24C32
(NVM)
EEPROM
7500
RAM
7506
FLASH
0382
10
SERVICE
COMPAIR
CONNECTION
3430
6
ERR
7
9
IIC BUS 1
(slow 100KHz)
IIC BUS 2
(slow 100KHz)
SC8
3541
SC10
3608
3606
FUNCTIONS 2
3540
15
SLAVE
HW IIC
7540
PCF8574AT
I/O EXP.
ERR
PW164
3
A4
D6
E2
14
MASTER
SW
IIC
EXT INT
PROCESSOR
SCALER
SC9
9
PCF8591
7605
PW164
CO-
FOR
AND
OSD
7571
3532
SLAVE
HW IIC
7530
ADC
ERR
MASTER
CLOCK
GENERATOR
1
15
3531
10
4
B1
SW
C2
IIC
A1
C4
E3
3
4
3602
3603
GENERATOR
3604
3605
PW_RESET
DATA
ADDRESS
ADDRESS
+5V
1
SLAVE
HW IIC
7570
FS6377
CLOCK
ERR
IIC BUS 5
5
DATA
SC14
SCL_SW
SDA_SW
35703571
16
36013600
NVM
SC9
PW_SDA_NVM
PW_SCL_NVM
4581
M29W160DT
AUDIO
PROC.
13
SLAVE
HW IIC
MSP3415G
AUDI O
PROC.
+3V3_PW
7628
CY62126
RAM
7630
FLASH
7812
ERR
7
22FM242 AA6.
SOURCE
SC13
SELECT
48104811
SCL_AUDIO
SDA_AUDIO
38123813
12
2
IIC BUS 3
(slow 100KHz)
+3V3_PW
3583
35823581
5
7580
M24C32
(NVM)
EEPROM
6630
3633
28
SLAVE
HW IIC
7798
TEA6422Q
MATRIX
SWITCH
ERR
3580
6
ERR
8
37943795
27
1
PW_SDA
PW_SCL
SC8
SC4
0375
6
7
CONTROL
FUNCTIONS2
VIDEO-SEL.
ADC
92
SLAVE
HW IIC
7170
AD9887KS
ADC +
TMDS REC.
ERR
10
DVI-D INPUT SOCKET
SCL
SDA
0319
6
7
32103209
91
7215
ST24FC21
DDC
EPROM
PROTECTION
P3
0319
6
7
PCF8574A
74
SLAVE
HW IIC
7370
I/O EXP.
ERR
6
SC5
VCA
VGA1 IN
15P"D"SHELL
CONNECTOR
11
12
13
14
15
VGA2 IN/OUT
15P"D"SHELL
CONNECTOR
11
12
13
14
15
33703371
73
VIDEO-SEL.
DECODER
3250
P10
SLAVE
HW IIC
7225
SAA7118E
VIDEO
DECODER
ERR
VGA
CONNECTOR
0371
6
1
7
12
2
8
3
13
9
4
10
14
5
15
0372
6
1
7
12
2
8
3
13
9
4
10
14
5
15
9
SC12
3251
N9
DCC-SDA-1
DCC-SCL-1
DCC-SDA-2
DCC-SCL-2
BACK-END
LVDS OUTPUT
SDA-1
SCL-1
7676
BSN20
DS
G
3284
21
SLAVE
HW IIC
7280
SDA9400
DE-
INTERLACER
ERR
11
7904
ST24FC21
5
DDC
7
NVM
7907
ST24FC21
5
DDC
7
NVM
7675
BSN20
DS
G
+3V3_STBY_SW
3285
20
36863682
+3V3_STBY_SW
36853681
SDA-1_3V3
SCL-1_3V3
SC11
EP1K30FC256
BACK-END
EPLD
3664
C5C4
SLAVE
IIC
7656
EPLD
ERR
12
SLAVE
IIC
C8
C6
3663 3661
3662
SC12
4680
4684
BACK-END
LVDS OUTPUT
0301
16
18
PLASMA DISPLAY
PDP
PANEL
6
7
SDA-1_3V3
SCL-1_3V3
ERR
30
PW_SDA
PW_SCL
Error Device Description Item Diagr.
1
TEA6422D Audio switch (only
2
MSP3451G Sound processor 7812 SC14
3
PCF8574-SCAVIO I/O expander SCAVIO 7540 SC8
4
PCF8591 AD-DA expander 7530 SC8
5
FS6377 Clock generator 7570 SC9
6
PCF8574-PSU I/O expander PSU 7370 P3
7
24C16 OTC NVM OTC 7430 SC7
8
24C16 PW NVM PW 7580 SC9
9
SAA7118 Video decoder
10
AD9887 ADC/TMDS receiver 7170 SC4
11
SDA9400 De-interlacer (only
12
EP1K30QC EPLD processor 7656 SC11
13
PDP I2C error of the PDP
20
Download comm. Errors during downloading
21
CSP comm. CSP time-out error
40
Temperature alarmDetections of over-temperature
70
Over voltage Vs, Va, +5V, +3V3 overvoltage
(only
Enhanced
Enhanced
Enhanced
) 7798 SC13
) 7225 SC5
) 7280 SC5
Black
P
box
71
Vs under voltage Vs under voltage Black
P
box
72
Va under voltage Va under voltage Black
P
box
73
+5V under voltage +5V under voltage Black
P
box
74
+3V3 under voltage +3V3 under voltage Black
P
box
75
DC-PROT Audio amplifier protection Black
P
box
HW = HARDWARE
SW = SOFTWARE
CL 36532011_019.eps
210303
Page 23
Block Diagrams, Testpoint Overviews, and Wiring Diagram
Note: The Service Default Mode (SDM) and Service Alignment
Mode (SAM) are described in chapter “Service Modes”.
Menu navigation is done with the 'CURSOR UP, DOWN, LEFT
or RIGHT' keys of the remote control transmitter.
8.1General Alignment Conditions
Perform all electrical adjustments under the following
conditions:
•Mains voltage and frequency: 220 V
otherwise stated.
•Connect the set to the Mains via an isolation transformer.
•Allow the set to warm up for approximately 20 minutes.
•Measure the voltages and waveforms in relation to chassis
ground (with the exception of the voltages on the primary
/ 50 Hz unless
AC
side of the power supply). Never use the cooling fins/plates
as ground.
•Test probe: Ri > 10 MΩ, Ci < 2.5 pF.
•Use an isolated trimmer/screwdriver to perform the
alignments.
Use a VGA-generator or a Personal Computer (contact your
National Service Organisation for the necessary test pattern
files) as test pattern generator and connect it to the VGA1 input
of the FM242 plasma monitor. When you use a PC, start
Microsoft PowerPoint (or Paintbrush), and load the mentioned
file. Then display the picture as full screen.
8.2Hardware Alignments
There no alignments needed, except in care the pdp has been
exchanged or the pdp-supply has been exchanged.
In that case the both must be matched.
Figure 8-1 Supply Alignment
Page 68
EN 68FM242 AA8.
Alignments
Procedure:
•See figure above
•The 6 pot meters influencing VSB, 3.3SBSW, VCC, D5V,
8V6, VFAN are not critical for matching. In case of doubt
values can be checked versus mentioned voltages.
•The 5 pot meters VS, VA, VSET, VE, VSC have to be
matched with the values displayed on the pdp-label.
•Start with aligning pot meter VR8008 to adjust VS and then
respectively VR8010 (VA), VR8003 (VSET), VR8005 (VE),
VR8004 (VSCAN)
•To double check, repeat whole sequence again, to check
right value
8.3Software Alignments
Enter the Service Alignment Mode (see chapter 5). The SAM
menu will now appear on the screen.
Select one of the following alignment menus via the upper
horizontal bar:
1. Scaler (Scal.)
2. Video 1 (Vid.1)
3. Video 2 (Vid.2)
4. Options (Opt.)
Note: the last three items are not available in the Basic
configuration.
8.3.1General
Table 8-1 SAM Menu 'Gen.'
Service Alignment Menu General
Type nr. - AG Code42FD9945/01 **00 00
SW version OTCAAAAAB-X.Y xxxxx
SW version PWAAAABC-X.Y xxxxx
SW version EPLDAAAABC-X.Y xxxxx
Errors 1xx xx xx xx xx
Errors 2xx xx xx xx xx
Operational hoursxx
Reset error bufferPress OK to reset
StorePress OK to store
Store
Select this item, and press OK, to store the made alignments.
Note: There are several methods to exit the SAM, each with its
own characteristics:
•Switch the set 'off' (with the Mains switch or by pulling the
Mains cord); new alignment settings are always stored,
even when item 'store' was not activated!
•Switch the set to 'Standby' by pressing the power button on
the remote control transmitter; new alignment settings are
always stored, even when item 'store' was not activated!
•Use a standard RC-transmitter and key in the code 00; new
alignment settings are not stored, except when item 'store'
was activated!
8.3.2Scaler
Table 8-2 SAM Menu 'Scal.'
Service Alignment Menu Scaler
Test patternOn / Off
Color temperature6500K / 8700K / 10000K
White pointAdjust ...
Align ADCPress OK to execute
Clear user settingsPress OK to clear
The lower 2 menu lines, only are valid when having a VGAsource. (otherwise low lighted)
Test pattern
This function makes it possible to generate a 'colour bar' test
pattern (generated by the PW Scaler IC). You can use this
picture, to check the video path, starting at the PW Scaler IC to
the plasma display.
Colour temperature
Select the appropriate colour temperature for the alignments
(see also 'White point' adjustment below).
White Point
Table 8-3 SAM Menu 'Scaler - White Point'
Service Alignment Menu Scaler - White point
White point red<-------------|------------> 125
White point green<---------|----------------> 100
White point blue<-----------|--------------> 110
Press OK when done
Method 1 (with colour analyser)
1. Supply, via an external VGA source (e.g. a PC with
1024x768 mode, or a VGA generator), a 'White Drive' test
pattern (ask your NSO). This picture consists of a black
picture with in the middle a 100% white square.
2. Set BRIGHTNESS to '53' and CONTRAST to '65' (via the
standard customer menu).
3. Go to the SAM menu.
4. Set COLOUR TEMPERATURE to '8700 K'.
5. Measure with a CTV colour analyser (calibrated with the
spectra) on the centre of the white square on the screen.
6. Select 'White point' in the SAM Scaler menu, and press
CURSOR RIGHT.
7. Adjust with the CURSOR UP/DOWN or LEFT/RIGHT
command, the three white points Red, Green and Blue to
'128' (do not go above this value!), and align with one or
two of the drivers to the correct coordinates (see table).
8. Repeat the same measurement for respectively colour
temperature '6500 K' and '10000 K'.
9. Repeat again if necessary.
Table 8-4 White Point XY-coordinates
Colour Temperature xy
5600 K (Cool)313 329
8700 K (Normal)289 299
10000 K (Warm)280 289
Method 2 (without colour analyser)
Without a CTV colour analyser, it is possible to set some
parameters, which are based on average values from
production.
These values will be communicated in a later stage.
Page 69
Alignments
EN 69FM242 AA8.
Table 8-5 White point RGB-values
Colour Temperature RGB
5600 K (Cool)
8700 K (Normal)
10000 K (Warm)
Align ADC
1. Supply, via an external VGA source (e.g. a PC, mode
1024x768), the 'ADC alignment' test pattern (retrieve this
file of the NSO). This picture consists of a half black and
half white picture: black is 16, and white is 235 on a full
scale of 255 (=770 mV).
2. Go to the SAM menu.
3. Select 'Align ADC' in the SAM Scaler menu, and press
CURSOR RIGHT.
This function makes it possible to generate a 'full white' test
pattern (generated by the de-interlacer SDA9400, item 7280).
You can use this picture, to check the video path of the external
inputs AV1, 2 and 3, starting at item 7280
Note: The proper functioning of the Digital Video Decoder
SAA7118 is not tested!
Note: To generate the test pattern, it is necessary to feed a
signal to one of the AV-inputs. (if not the menu lines are low
lighted)
Brightness
This is the setting of IC7225 (SAA7118). Not necessary to
align, fixed value is:
•PAL/SECAM: 132
•NTSC: 139
Contrast
This is the setting of IC7225 (SAA7118). Not necessary to
align, fixed value is:
•PAL/SECAM: 139
•NTSC: 128
Lum. delay PAL
Apply a PAL colour bar/grey scale pattern as a test signal.
Adjust value until the transients of the colour part and black and
white part of the test pattern are at the same position. Fixed
value is 4.
Lum. delay SECAM
Apply a SECAM colour bar/grey scale pattern as a test signal.
Adjust value until the transients of the colour part and black and
white part of the test pattern are at the same position. Fixed
value is 4.
Lum. delay NTSC
Apply a NTSC colour bar/grey scale pattern as a test signal.
Adjust value until the transients of the colour and black & white
part of the test area are at the same position. Fixed value is 4.
8.3.5Options (Enhanced version only)
Table 8-8 SAM Menu 'Opt.'
Service Alignment Menu Options
Vs/Va control
Display size
VirginOn / Off
ICONN controlOn / Off
Fan control
Virgin
Normally 'off'. When this option is set to 'on', the display starts
with the language selection menu.
ICONN control
Normally 'off'. Set this option to 'on' in case a so-called
'ICONN'-box (for Hotel TV) is connected to the display.
Caution: When this option is set to 'on', without an ICONNBox connected to the monitor, one cannot control the monitor
anymore (because the RC connection is interrupted).
There are two ways to restore the remote control again:
•Connect pin 8 (IR_TX) to pin 9 (IR_RX) on the RS232
connector of the monitor (the easiest way to do this, is to
make a 'dummy' connector with these pins connected, and
plug this into the monitor), or
•Set the set in the Service Alignment Mode (SAM) via
shorting jumpers 1 and 2 of connector 0382 on the
SCAVIO panel. After this you can enter the appropriate
menu to set 'ICONN control' to 'off' again.
With the 'Luminance delays' alignment, you can place the
luminance information on the chrominance information (push
brightness onto the colour). Use a colour bar/grey scale pattern
as test signal.
These values are normally fixed.
Page 70
EN 70FM242 AA9.
Circuit Descriptions and List of Abbreviations
9.Circuit Descriptions and List of Abbreviations
Index of this chapter:
1. General
2. Power Supply unit (very limited)
3. VGA connector panel
4. SCAVIO panel
5. Audio Amplifier panel
6. LED/Switch panel
7. Plasma Display Panel
8. Abbreviations
9. IC Block diagrams
Notes:
•Figures can deviate slightly from the actual situation, due
to different set executions.
•For a good understanding of the following circuit
descriptions, please use the diagrams in chapter 6 and 7.
Where necessary, you will find a separate drawing for
clarification.
9.1General
The FM242 is the 3rd generation Philips plasma monitors.
Related to the FM242 it is a cost down product. A lower
specified pdp is used here (SDI-pdp), however performing still
very acceptable. In comparison to the FTV1.9DE, it has:
Video
DVI-D
AV3
AV2
AV1
Loop thru of RGB
and H,V signals
from VGA1 only
VGA2
RS232-C
VGA1
D
V
I
Y/G
Pb/B
Pr/R
H,V
1fH YUV
YC
CVBS
V
G
IN
A
OUT
2
RS
Sub-D
232
9 P
C
RC
out
V
G
In
A
1
Audio Processing
L/R VGA in
L/R CVBS
L/R YC
L/R HD
L/R DVI
L/R Flex VGA
(only output in
Basic config.)
! All Functional blocks shaded grey are r equired for
the"Basic Configuration".
The remainder is required f or the "Enhanced Configuration".
are optional or prepared
*
Y/H/V
YPbPr
Digital Video
Decoder
SAA7118
3D Comb*
NVM
DDC
R
S232C
ICONN
NVM
DDC
+9V_STBY
NVM
DDC
Sync
decoder
YPbPr
enable
audio
RGB
RGB+HV
RS232
Interrupt
gener.
RGB
RGB+HV
RGB+HV
De-interlacer
SDA9400
ST
RS 232
Driver
+5V_Stby_Sw
RS232C
activity int.
Contro l
Audio Switch
TEA6422D
Output
Switch
RGB+HV
H,V
RGB+HV
RS232C/
TTL
RC5 to E-box
Video +
switching
UART (Ebox)
TMDS
NVM
Flash ROM
32Kbit
UART
PW
Sync.
Interrupt
Gener.
Per channel
2Mbyte
PW
PixelWorks
PW164_10R or 10RK
Video Scaling
Co-processor
Interrupt
OTC
Main Pro cessor
SAA5801H/xx
SAM,
SDM,
RS232c
service
int. pins
UART
Interrupt
gener.
+9V_STBY
HP Filter +
Amp
LP Filter +
Amp
PW
Sync
select
PW/OTC
Switch
4052
IO Exp-
SC1
PCF8574
ADC Exp
PCF8591
H and/or V
from VGA1
I
RGB+HV
ADC +
TMDS
Decoder
AD9887
2
C_Bus -3
MSP Reset
MSP Audio Processor
MSP3415G
I2S
Audio D elay
32KSRAM
I2C_Bus 5
(sw bu s to NVM)
RGB+HV
Digital
YUV
Digital
UART
OTC
H,V
VGA1
switch-
VGA1
Switch
4052
I2SI2S
CY7C1399
Audio Amplifier
Figure 9-1 Control and Data Path
•The power supply has been exchanged by another supplypanel
•A new SCAVIO panel, which takes over the tasks of the
former AVC and LIMESCO panels.
•A new class-D audio amplifier,
•A VGA-resolution pdp. It is possible to use this product as
stand-alone monitor or, in combination with the so-called
F21R Receiver box, for TV applications.
There are two configurations:
•Basic: which has one video input (VGA1) and one video
output (VGA2). The VGA2 video output is directly
connected to the VGA1 video input, without any
processing. The audio output of VGA2 is also directly
connected to the VGA1 audio input.
•Enhanced: which has six video inputs (VGA1, VGA2, DVID, CVBS, YC and HD) and six corresponding audio inputs.
These inputs are internally converted to the appropriate
signals. The VGA2 connection is here bi-directional (FlexVGA).
Note: In all descriptions below, the Enhanced version of the
FM242 is discussed. When there are important differences
between the Basic and Enhanced versions, this is mentioned.
SRAM
128kbyte
Reset
C_Bus -2
2
I
Mute
Mute
+9V_STBY
Tweeter
Low/Mid
video
control
(sw bus to NVM)
Fan Control PW M
Power OK, 5V test,
8V6 test
I2C_Bus 4
EPLD
EP1K30QC
IR RXr
(RC in)
PROM
for EPLD
Power ON
Reset
Flash
ROM
2Mbyte
DRAM
2Mbyte
NVM
32Kbit
generator
I2C_Bus -1
Light
Sensor
LVDS
Encoder
DS90C385
Clock
Red
LED
3v3Stby/
5vStdby
CPUgo =>
PDP go =>
<= IRQ_PDP
POWER_DOW N =>
PSU
Green
LED
Serial Digital RGB with
clock and Sync information
Display
Control
IO expander
PS
U
PCF8574AT
PSU
AC/DC, DC/DC converters
Audio supply, 5V,8V6, 3v3, Vs,Va
Protec tion
3v3,5v S tandby PSU
Fan driver
RC / LED / Switch Panel
PDP
MPU
Vs,Va,VccVsago
AC i/p
ON/OFF switch
(see description)
CL 26532038_006.eps
2x
FAN
*
2x
FAN
010502
Page 71
Circuit Descriptions and List of Abbreviations
EN 71FM242 AA9.
9.1.1Input/Output
The main inputs are:
•Basic: VGA only,
•Enhanced: VGA, Flex-VGA, DVI-D, HD-RGB+HV, HD-
2fH-YPbPr (sync on Y), 1fH-YCbCr (sync on Y), YC, CVBS
on cinch. Flex-VGA gives the user a choice to configure the
'loop-through VGA output' as an output or as input.
9.1.2Video
This mainly consists of an analogue processing part and a
digital processing part. The video inputs like VGA (Basic
configuration), CVBS, YC, HD-RGB/YUV (1fH and 2fH) and
DVI-D are received and processed.
The VGA signals are first converted to digital signals and then
processed by the PW Scaler.
The YPbPr (2fH) signal is discretely converted to RGB,
whereas the YCbCr (1fH) signal is processed in the SAA7118
Digital Video decoder.
The base-band video inputs (CVBS and YC) are output from
this decoder as digital YUV, which are then further processed
by the Pixel Works Scaler (PW).
The signals on the digital DVI input are first decoded by the
TMDS decoder inside the AD9887 and then processed by the
PW Scaler.
The PW Scaler output is going through an EPLD and then via
an LVDS Encoder to the SDI PDP (Plasma Display Panel) as
differential serial data. This PDP has a resolution of 852(H) x
480 (V) pixels.
9.1.3Audio
This mainly hosts the audio inputs for the various video inputs.
They go through an I
2
C controlled source selector. The main
audio processing is done by the Micronas MSP3415G version
with built-in UltraBass-II algorithm.
A digital delay line is created using the I
2
S channel and SRAM.
The delay created can be selected between two values, one for
the Receiver box, and one for the Monitor.
The processed audio signals are then differentially transmitted
to the audio amplifier panel. This amplifier drives a tweeter and
a twin-drive woofer (low/mid range). Active filtering is done
prior to the amplifiers.
9.1.4Control
The main controller is the OTC, referred to as the 'main
processor'. This operates in co-ordination with the processor in
the Pixel Works Scaler (PW), referred to as the 'co-processor'.
When the FM242 monitor is connected to an F21R Receiver
box, the UART commands from the Receiver box will control
the monitor.
In stand-alone mode, the monitor can be controlled via the
Remote Control or via the RS232C port.
DDC1/2B (Digital Data Channel, an I
2
C-based protocol) is
implemented with separate identification NVMs for the two
VGA inputs and the DVI-D input as well. In addition, the
RS232C port can be used for software download to the PW and
the OTC. The target for downloading is controlled via a switch
in the RS232C path; the switch itself is controlled by the OTC.
9.1.5Power Supply
Connectors
Y/G
Pb/B
Pr/R
AV3
H,V
YC
AV2
AV1
CVBS
D
V
DVI-D
I
Loop thru of RG
and H,V signals
from VGA1 only
+5V_STBY_SW
+5V_STB Y_SW
V
B
G
Flex
A
2
NVM
DDC
RS
Sub-D
232
9 P
C
RC
out
V
G
In
A
1
NVM
DDC
Audio processingAudio amplifier
L/R VGA in
L/R CVBS
L/R YC
L/R HD
L/R DVI
L/R Flex VGA
(only output in
Basic config.)
! All Functional blocks shaded grey are required f or
the"Basic Configuration".
The remainder is required for t he "Enhanced Configuration".
are optional or prepared
*
YPbPr
3D Comb*
+5V_STBY_SW
NVM
DDC
+5V
Sync
decode
Digital Video
SAA7118
+8V6
Cont rol
+5V
RC5 to RCout
buffer
RC5 to VGA1
buffer
audio
enable
+9V_STBY
RGB
Decoder
+8V6
ST
RS 232
Driver
+5V_STBY_SW
RS232
Interrupt
gener.
+5V_STBY_SW
+5V_STBY_SW
Audio Switch
TEA6422D
OutputSwitch
+5V
+5V
De-interlacer
SDA9400
+8V6
Video
+3V3+3V3+3V3
NVM
ADC +
TMDS
Decoder
AD9887
CY7C1399
+3V3
32Kbit
Sync.
Interrupt
Gener.
Per channel
VSND_NEG VSND_POS
Video +
Sync
switching
+8V6
+3V3
PW/OTC
+5V_STBY_SW
Switch
4052
IO Exp-
+5V_STBY_SW
SC1
PCF8574
+5V
ADC Exp
PCF8591
Temp.Sensor
+8V6
Discrete
electronics
+5V
MSP Audio Processor
MSP3415G
+8V6
Audio Dela y
+5V
32KSRAM
+8V6
Flash ROM
2Mbyte
PW
PixelWorks
PW164_10R or 10RK
Video Scaling
Co-processor
+3V3
OTC
Main Proc essor
SAA5801H/xx
service
int. pins
VGA1
Switch
4052
UART
Interrupt
gener.
HP Filter +
Amp
LP Filter +
Amp
SRAM
128kbyte
+2V5+2V5
Clock
generator
+5V
+9V_STBY
Tweeter
Mute
Mute
Low
/Mid
+9V_STBY
EP1K30FC
converter
EPLD
PROM
for EPLD
+3V3
Power ON
Reset
Flash
ROM
2Mbyte
DRAM
2Mbyte
NVM
32Kbit
+3V3_STBY_SW
+5V_STBY_SW
RC/LED/switch panel
+8V6
IR RXr
Light
(RC in)
Sensor
+8V6
Local
LVDS
Encoder
DS90C385
+9V_STBY_SW
+9V_STB Y
+8V6
PSU
Red
LED
+5V
+3V3
+3V3_STBY_SW
+5V
PSU
AC/DC, DC/DC converters
Audio supply, 5V,8V6, 3v3, Vs,Va
Protect ion
3v3,5v St andby PSU
Fan driver
+5V_STBY_SW
VSND_NEG VSND_POS
Green
LED
PDP
Vpr2
MPU
Vcc
Vs,Va
*
IO expander
AC i/p
ON/OFF switch
(see description)
CL 26532038_007.eps
010502
Figure 9-2 Power Supply Path
Page 72
EN 72FM242 AA9.
Circuit Descriptions and List of Abbreviations
The PSU consists of a pre-conditioner part and a DC/DC
converter part. This converter supplies power to the PDP high
voltages, the auxiliary voltages, and the audio amplifier. There
is a separate standby power supply, which supplies the Main
Processor, PDP microcontroller, interrupt generator and some
other circuits.
The mains inlet module will host the inlet and filtering.
There is a functional 'Mains on/off' switch on the LED panel.
This switch is on the secondary side, controlling the relays on
the primary side.
9.2Power Supply Unit (Diagrams P)
The Power Supply Unit (PSU) is designed to provide regulated
output voltages for the plasma display panel (PDP) and the
built-in electronic panels (such as e.g. the SCAVIO and Audio
Amplifier panels).
It will house the Pre-conditioner, DC/DC converters and the
Standby circuitry. In addition, this panel will house the
protection and the (optional) fan drive circuitry.
For Service this supply-panel is a black-box.
When defect (this can be traced via error-codes in the error
buffer, or by strange phenomena), a new panel must be
ordered, and after receipt, the defective panel must be send for
repair.
In that case before sending it, check if the supply-output lines
match with the values on the pdp-sticker.
9.3VGA Connector Panel (Diagram VGA)
The Video Graphics Array (VGA) panel serves as an interface
between the peripheral VGA equipment (Receiver box, PC,
etc.) and the SCAVIO panel. Some specifications of this panel:
•Two NVMs are present, which hold identification data for
the DDC line.
•Further, there are buffers present for the incoming and
outgoing sync signals.
•RC_OUT cinch for linking with other equipment.
•Provision to terminate the incoming sync lines with 75 Ω via
the EBOX_PRESENT line.
For a description, see the next SCAVIO chapter.
9.4SCAVIO Panel (Diagrams SC)
The Scaler Control Audio Video Input Output (SCAVIO) panel
contains:
•All the input connectors,
•Analogue and digital video processing,
•Scaler (co-processor)
•Interface to the PDP,
•Audio processing (excluding the audio amplifier),
•OTC (main processor), and
•RS232C in/out.
Note: There are two versions of this panel, a Basic and an
Enhanced version. Therefore, a lot of components are
therefore not mounted for the Basic version.
For the circuit description, we divide the board into the following
parts:
1. Supply
2. Video processing
3. Audio processing
4. Control
version, VGA2 can be switched as output, via the control signals VGA2_OUT and VGA2_EN.
9.4.1Supply
See figure 'Power Supply Part' in paragraph 9.1.5. (even
opletten dat hij goed verwijst)
! All Functional blocks shaded grey are required for
the"Basic Configuration".
The remainder is required for the "Enhanc ed Configuration".
YUV2fH progressive
dig.
I2C BUS 3
MEMORY
76057170
PW164
Pixelworks
7656
RGB
dig.
EPLD
I2C BUS 1
I2C BUS 2
7670
RGB
dig.
LVDS
to OTC (7383)
CL 26532038_011.eps
analogue
processing
path
AV1
CVBS
YC
AV2
0375
DVI-d
HD
AV3
Flex
VGA
2
VGA
1
RS
232
1fH
Figure 9-3 Video path
This mainly consists of a small analogue processing part and
a larger digital signal processing part.
The video inputs like CVBS, YC, High Definition RGB, or YUV
(1fH and 2fH), VGA, and DVI-D are received and processed.
The YPbPr (2fH) is discretely converted to RGB, whereas the
YCbCr (1fH) is processed in the SAA7118 Digital Video
decoder. The base-band video inputs (CVBS and YC) are
output from the digital video decoder as digital YUV, which are
then further processed by the PixelWorks Scaler.
The VGA signals are first AD converted and then processed by
the PW Scaler.
The digital input on the DVI is first decoded by the TMDS
decoder inside the AD9887 and then processed by the PW
Scaler.
The PW Scaler output is going through an EPLD and then via
the LVDS transmitter to the PDP (Plasma Display Panel) as
differential serial data.
Analogue Video
This part describes the analogue video and synchronisation
path of all inputs, until it reaches the 'analogue digital
converters' of either the AD9887 (ADC+TMDS Decoder) or the
SAA7118E (Digital Video Decoder).
Also the switching part is described and the necessary control
signals.
In principle, all video control functions are done by the
PixelWorks processor.
Note: This part also includes the VGA connector panel that is
mounted on top of the SCAVIO panel.
Inputs
There are five video inputs, which are divided in three types:
•VGA (2fH): named VGA1 and VGA2. Both are 15-pole
SUB-D connectors for RGB and HV, and are situated on
the VGA connector panel. For automatic identification by a
PC, each VGA input is foreseen with a DDC NVM IC. VGA2
is set default as loop through of VGA1. In the Enhanced
to PDP
240402
Page 73
Circuit Descriptions and List of Abbreviations
EN 73FM242 AA9.
•YPbPr/RGB (combined 2fH and 1fH): named AV3 and
suitable for YCbCr/HD-YPbPr/HD-RGB + HV. These are
cinch inputs. YPbPr and RGB are seen as separate inputs
by the HW and must be properly selected by SW.
•CVBS like (1fH): named AV1 for CVBS and AV2 for Y/C.
These are also cinch inputs.
Video Path
The 1fH signals (including YPbPr) are buffered (item 7113/21/
17) and go directly to a digital video processor, the SAA7118E
(item 7225 on diagram SC5), where they are converted into a
digital signal.
The 2fH signals are also buffered; both YPbPr (item 7074/84/
79) and RGB (item 7141/38/35) buffers get the same input
signals.
When YPbPr signals are connected, the correct input must be
selected, to get a picture with proper colours. Thus, the signals
must pass a video matrix (item 7088/90, see diagram SC3),
where they are converted into RGB. There are two matrices, an
NTSC and an ATSC. With the MATRIX_SEL signal, the correct
matrix is chosen (item 7089). The detection is done automatic,
by an algorithm in the EPLD.
After the matrix, the signals enter a clamp/blanking circuit
(7102/03/04 and 7100), for the removal of the residual sync
signals. The control is done via the lines HD_BLANKN and
HD_CLAMPN coming from the EPLD.
All RGB signals come together at 4-pole switches (item 7146/
58), one for each colour, where they are switched to the AD
converter item 7170 (R_ADC, G_ADC and B_ADC).
Sync Path
All incoming H and V sync signals go to a 4-pole switch (item
7009) where SYNC_SEL and VIDEO_SEL_2 determine, which
signal is available on the ADC.
Before this switch, the VGA sync path is rather straight, only 1
switch (item 7007) is added for the VGA2 sync signals, which
determines if VGA2 sync is input or output (VGA2_OUT).
In the Basic configuration, these switches are omitted, and
replaced by jumpers (4009/4010).
The external sync (AV1 - 3) signals are treated differently. Both
H_HD_EXT and V_HD_EXT go to three circuits:
•A comparator circuitry with an LM319 (item 7025), to
ensure both sync pulses are always positive going (H and
V_SYNC_CMP),
•A level detection circuitry (items 7000 to 7002), to detect if
the sync is of TTL level (H and V_SYNC_TTL),
•A positive/negative going detection circuitry (items 7006 to
7010), to indicate the polarity of the sync in case of TTL
level (H and V_SYNC_POL_N).
All above-mentioned signals go to the EPLD (see also diagram
SC11) for further processing.
Processed sync signals H_HD and V_HD coming from the
EPLD, are also switched to the ADC (H_ADC and V_ADC)
along with the proper RGB signals (R_ADC, G_ADC and
B_ADC).
Digital Video
This part describes the digital video path on the SCAVIO panel,
starting at the AD converters in either the AD9887 (item 7170)
or in the SAA7118E (item 7225) and ending at the output for the
PDP.
For both the Basic as the Enhanced version, everything 'after'
the PixelWorks chip, is equal.
For the Basic version, the input for the PixelWorks only
consists of the 'Graphics path'.
For the Enhanced version, it is both the 'Graphics path' as the
'Video path'.
The SCAVIO panel contains the following functions in the video
path:
1. The 'YPbPr to RGB matrix' and '2fH Video+Sync Switch'
are explained above in the 'Analogue Video' part.
2. The 'Digital Video' path containing the Digital Video
Decoder and the De-interlacer.
3. The 'Digital Graphics' path containing the ADC+TMDS
decoder.
4. The 'Scaler' which is the PixelWorks (PW164-10R) plus
Memory.
5. The 'EPLD' for sync decoding and video manipulation.
6. The 'LVDS' encoder.
The Digital 'Graphics Path'
This is a straightforward application of the Analogue Devices
AD9887 (item 7170). Inputs for this device are:
•FTV Receiver box,
•VGA formats (up to SXGA@75 Hz),
•2fH RGB+HV (only in Enhanced version),
•2fH YPbPr, which is converted to RGB by the 'YUV to RGB'
matrix (only in Enhanced version),
•DVI-d (only in Enhanced version).
Analogue input: The AD9887 is meant to sample 'pixel
synchronous'. To achieve this, a (software) driver is running on
the PixelWorks processor (PW). After hooking up a source to
the AD9887, the PW starts counting the number of lines per
field and calculates the H-period time. With these two values, it
determines the exact match or the closest match out of a lookup-table (LUT) with VGA standards. When the correct standard
is determined, the PW will set the AD9887 I
correct value. The AD9887 should now sample with exact the
same frequency as the incoming standard requires. This is
done to get an optimal picture performance.
It also is a 'must' when a computer graphics card is connected,
because there is no, or very little, post anti-aliasing filtering
done on such cards. Therefore, the outputted RGB samples
need to be exactly aligned with the sampling of the AD
converter.
Analogue input signals can go up to SXGA@75 Hz, which
gives a pixel clock of 135 MHz. In fact, it can handle any
standard with a pixel rate up to 140 MHz.
Special modes are made for the F21R E-box, for both PAL and
NTSC. These are invoked when an E-box is connected to the
SCAVIO panel.
Digital input: Via the DVI connector (Enhanced version only)
it is possible to insert TMDS (Transition Minimised Differential
Signalling) data into the SCAVIO panel. DVI is a fairly new
computer graphics standard, which can be seen as the digital
follow-up of the analogue VGA interface. The TMDS signal is
directly fed into the AD9887, where any DVI standard up to
SXGA@60 Hz can be decoded to RGBHV.
The preferred VGA standard for the FM242 is programmed in
the DDC EEPROM (item 7215), which can be read by the PC.
Via an internal switch, it is possible to choose between the
analogue input and the digital input. The output format is for
both inputs the same (8 bit RGB plus HV). The driver
determines whether the AD9887 outputs single or dual pixels.
For lower standards like VGA@60Hz, the interface will be
single pixel, which means that every clock cycle one byte of R,
G, and B data is outputted. Dual pixel means that on every
clock cycle two bytes of R, G, and B data outputted. These two
bytes are de-multiplexed, which is done to make the interface
more robust for jitter, set-up, and hold times, and to reduce the
digital data rate over the PCB (reduced EMC).
Digital 'Video Path'
This path is only available in the Enhanced version of the
SCAVIO panel and is used for the following input signals:
•CVBS input,
•Y/C input, and
•1fH YPbPr.
It is a straightforward application of the Philips SAA7118 (item
7225) and the Micronas SDA9400 (item 7280).
2
C registers to the
Page 74
EN 74FM242 AA9.
Circuit Descriptions and List of Abbreviations
The SAA7118 is a PAL/NTSC/SECAM Digital Video Decoder
with adaptive digital comb filter and component video input. It
decodes all input standards to 4:2:2 YCbCr, which then is
processed by the SDA9400.
The SDA9400 is a motion adaptive de-interlacer, which makes
a progressive video signal from the interlaced input.
Depending on the motion in the picture, it will just interleave the
odd and even field (no motion: ABAB) or repeats the same field
twice; this is also known as line doubling (motion: AABB). The
motion detection is pixel based, with a soft-switch between
'motion' and 'no motion'.
After the de-interlacer, the signal is fed as a 4:2:2 YCbCr
progressive scan signal to the video port of the PixelWorks
processor.
The PixelWorks PW164 Scaler
The PixelWorks PW164 Image Processor is a highly integrated
(Ball Grid Array, BGA) chip, which interfaces video inputs and
computer graphics in virtually any format to the PDP.
Computer images from VGA to UXGA resolution input to the
chip can be resized to fit on the PDP. Horizontal and vertical
image scalers, coupled with intelligent frame locking circuitry
create sharp images, centred on the screen and without user
intervention. An embedded DRAM frame buffer and memory
controller perform the frame rate conversion.
Video data from 4:3 aspect ratio NTSC or PAL and 16:9 aspect
ratio sources such as HDTV and DVD are supported. Nonlinear scaling (only with Receiver Box) and separate horizontal
and vertical scalers allow these inputs to be resized optimally
for the native resolution of the PDP.
For more information, see http://www.pixelworksinc.com/
index.phtml
Table 9-1 PixelWorks Scaler: Ports
Pin NameI/ORemark
C2 PW_SCL+3V3 output to I2C devices, Video
related
B1PW_SDA+3V3 output to I2C devices, Video
related
A1PW_SDA_NVM +3V3 output to I2C device NVM
C4 PW_SCL_NVM +3V3 output to I2C device NVM
B3SCL_2+3V3 output to I2C device OTC
A2SDA_2+3V3 output to I2C device OTC
A3VIDEO_SEL_1 +3V3 output to video selection
switches (see truth ta-
ble)
C5 VIDEO_SEL_2 +3V3 output to video selection
Service remark: Desoldering/soldering of this BGA-ICs
requires very specialised (BGA) equipment. This can only be
done by the full-equipped service repair workshops. (See also
chapter “Safety Instructions, warning and notes”).
The EPLD
The main reason to add the EPLD, is the contrast reserve
function. Other reasons:
•Black and white ADC adjustment. The EPLD provides a
high-resolution measurement of the black and white level,
to adjust the gain and offset of the ADC (AD9887). It is read
2
via I
C.
•LVDS reset. This function resets the LVDS transmitter on
the SCAVIO board, in case the LVDS transmitter starts up
without a clock. This could cause an abnormal picture.
Therefore, as soon as the clock is not fast enough (as
during start-up) the EPLD will keep the LVDS transmitter in
reset.
•Receiver-box mode detection. For loop through mode (a
second FTV monitor connected to the output of the first
monitor), a secondary detection is needed to check the
presence of an Receiver or E-box.
•ATSC sync detection/ decoding. Core for proper sync
decoding for ATSC sources.
•Contrast reserve. This function can increase the gain of
the video signal to a factor of two. It will reduce the gain
again if it sees too many overflows (code 255) in any of the
R, G, or B channels. Adjustable via two parameters: user
contrast and overflow limit. Parameters are I
2
C controlled.
The LVDS transmitter
This DS90C385MTD56 IC from National Semiconductors
converts 28 bits of CMOS/TTL data into four LVDS (Low
Voltage Differential Signalling) data streams. A PLL transmit
clock is transmitted in parallel with the data streams over a fifth
LVDS link. Every cycle of the clock, 28 bits of input data are
sampled and transmitted. At a transmit clock frequency of 36
MHz, 24 bits of RGB data and 3 bits of display control data are
transmitted per LVDS data channel. This IC operates at 3.3 V
For more information, see http://www.national.com/
Picture Mute
In some cases, it is necessary to mute the video output:
•In Monitor mode:
– During switch 'on/off' of the monitor,
– During source change,
– During video or sync loss, or
– By a user action (A/V-mute or mute)
– In audio only mode (when the ICONN-box is
connected).
•In TV mode:
– During switch 'on/off' of the Monitor/Receiver box,
– During source change in the Receiver box,
– During video or sync loss, or
– In audio only mode (Receiver box mutes the picture).
Most of the picture mute controls are done via the PixelWorks
co-processor.
Anti Ageing
In order to prevent visible luminance differences, due to ageing
of the monitor, a special algorithm is implemented. This
algorithm is based on horizontal shifting of the picture in the
Page 75
Circuit Descriptions and List of Abbreviations
EN 75FM242 AA9.
monitor. For good understanding some terms will now first be
explained:
•Ageing: The effect that the efficiency of a plasma cell
(pixel) decreases as a function of the total time that it is
illuminated. This effect occurs mostly because of phosphor
ageing. As a result, the cell brightness decreases over
time. An alternative name for ageing is 'burn-in'.
•Picture shifting: Fixed structures, like logo's, OSDs, and
subtitles, will cause burn-in effects. The only way to mask
this to a certain extends, is picture shifting so that the 'burnin' effect is smeared out over a larger area, and makes it
less visible.
Most of the anti-ageing controls are implemented in the
PixelWorks co-processor.
Horizontal
Horizontal anti-ageing steps:
•Step width/height, the step width/height shall be 1
horizontal pixel width (approx. 1 mm).
•Number of steps, the maximum number of steps in
horizontal direction shall be 9.
•Time between steps, the time between the steps shall be
5 minutes.
The effect of H anti-ageing is a horizontal movement (start at
After every step, the updated value is stored in NVM and gives
an indication about the direction (0...4 and 13...15 to the right
and 5...12 to the left).
The horizontal anti-ageing is a process, which is basically
independent of any other processes that are running in SW.
This means that this process should never be reset in order to
get the best anti-ageing effect. Therefore, the horizontal shift
positions and directions need to be stored in NVM, so that he
anti-ageing process returns to its latest position after the set
has been switched off or to standby. There is only one H and
one V shift value for the anti-ageing process that is applicable
for the AV1, AV2, and AV3 inputs.
Note: Horizontal shift cannot be done for sources that are
screen filling and do not have sufficient overscan.
↓
9 15
↓↑
10 14
↓↑
11 13
↓↑
12
With the following sequence:
0 → 1 → 2 → ...... → 14 → 15 → 0 → 1 → etc.
After every step, the vertical shift position and its direction are
stored in NVM. So the anti-ageing process returns to its last
position after the set has been switched off (or to standby).
Also, if by any cause (i.e. VGA-source selection or when
service/factory mode is active), the anti-ageing process is
stopped; the vertical shift position should be restored after
resuming the anti-ageing process.
9.4.3Audio processing (Diagrams SC13, 14 and 15)
This chapter describes the audio processing on the SCAVIO
board. The circuit enables to connect several audio sources,
selects the source on the desired input, and performs audio
processing and audio delay. It also matches the output signals
for the Audio Amplifier panel.
The sound-related electronics for FM242 are very straight
forward, and consists of a Micronas MSP3415G sound
processor, an active high pass and low pass filter, and
separate Class-D amplifiers for woofers and tweeters.
Vertical
V-shift is done in the F21R Receiver box when the TV mode is
active, or in the enhanced configuration when the monitor
mode is active.
Vertical anti-ageing steps:
•Height/height, the height/height shall be 1 display line
(approximately 1 mm).
•Number of steps, the maximum number of steps in
vertical direction shall be 9.
•Time between steps, the time between the steps shall be
80 minutes, which equals one complete horizontal ageing
shift (16 steps x 5 minutes).
The effect of V anti-ageing is a vertical movement (start at 0):
4
↑↓
3 5
↑↓
2 6
↑↓
1 7
↑↓
0 8
Page 76
EN 76FM242 AA9.
Circuit Descriptions and List of Abbreviations
Audio
inputs
VGA1
Audio-VGA-in
VGA2
Audio-Flex-VGA
DVI-D
Audio-DVI
AV1
Audio-CVBS
AV2
Audio-YC
AV3
Audio-YPbPr
Power-ok
MSP-Reset
I2C-SDA
I2C-SCL
(Enhanced only)
(Enhanced only)
(Enhanced only)
7801 : 7808
-4dB
-4dB
-4dB
Mute
Logic
&
-4dB
(Basic only)7880
7798
(Enhanced only)
Matrix
Switch
TEA6422
Out 1
Out 2
Out 3
PRE-out1 (L)
PRE-out2 (R)
(Basic only)
(Enhanced only)
Switch
7800
-4dB
-4dB
(Enhanced only)
(Enhanced only)(Enhanced only)
(Enhanced only)
(Enhanced only)
(Enhanced only)
In 4
In 5
In 6
In 2
In 3
In 1
I2C-SDA
I2C-SCL
SCART1-in
SCART2-in
I2C
I2S-DA-Out
D-CTRL-0
Digital Audio
Delay Line
T1T2
I2S
AUDIO DSP
MSP3415
D-CTRL-1
II2S-DA-In1
I2C-SCL
I2C-SDA
I2S7812
I2S-DA-In2
MSP-Reset
DACM-L
DACM-R
SC1-OUT
+3.0dB
2* Differential
Amplifier
7841
+4.9dB
7851
+4.9dB
0388
L-NEG
L-POS
R-NEG
L-NEG
Audio out (to Audio Amplifier)
Audio Enable
= Only for Basic configuration.
Figure 9-4 Audio Path
The processing part consists mainly of the following
components:
•MSP3415G: a DSP sound processor from Micronas. This
component is able to do all kinds of digital signal
processing like volume, bass/treble, UltraBass and
balance. It has analogue inputs and outputs, as well as an
2
I
S in/output used for digital audio delay.
•RAM with its logic to be able to store the I
2
S information for
audio delay.
•Anti-plop/ mute circuit: which is necessary to prevent
disturbances on the audio lines during start-up or
switching.
•TEA6422: a matrix switch of ST. This component is able to
switch six inputs to three different outputs (only used in the
Enhanced version).
MSP3415G
Ultra Bass
Because of the closed box implementation in FM242, a
common DBE solution will not give an optimal bass
performance. A closed box needs a substantial boost over a
wide frequency range, while DBE operates in a limited
frequency region.
Adaptive Ultra Bass 2 (UB2) is a suitable alternative. This
feature is based on the psycho-acoustic effect of the missing
fundamental, and gives the impression of a deep bass while
the loudspeakers do not reproduce these low frequencies. This
feature is implemented in the MSP3415G.
Audio delay
To compensate for 'lip sync error' (the difference in time
between the aural and visual perceptions), two different audio
delays are selectable via the customer's menu (one for the
Receiver box and one for the Monitor).
This is done at the audio processor IC7812 via an I
an additional delay circuit (IC7880 - 7882).
One can select delays of 24 ms (I2S_DATA_IN1) and 40 ms
(I2S_DATA_IN2), or no delay.
In case of a delay, the AUDIO_L/R_IN is re-routed as
I2S_DATA_OUT to the audio delay circuit and, depending on
the selected delay, returned as I2S_DATA_IN1 or
I2S_DATA_IN2, resulting in AUDIO_L/R_OUT.
Anti-plop/Mute
In several cases, it is necessary to mute the sound output. This
muting is handled by the MSP sound processor, or by the
Receiver box in case of TV-mode.
•In Monitor mode:
– During switch 'on/off' of the monitor.
– During source change.
– During video or sync loss, or
– By a user action (A/V-mute or mute).
•In TV mode:
– During switch 'on/off' of the Monitor/Receiver box.
– During source change in the Receiver box.
– During video or sync loss, or
– By a user action (mute).
9.4.4Control (Diagrams SC7, 8 and 9)
Introduction
As a main controller, better known as OTC (On screen display,
Teletext and Control). It is a 8051 (XA) based controller from
Philips Semiconductors, the SAA5801H.
Although the OTC is the main controller, it acts as a 'slave'
when communicating with the PixelWorks IC via the I
When the monitor is connected to an F21R Receiver box, the
UART commands from the Receiver box will control the
monitor.
CL 26532038_012.eps
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2
S bus and
2
C-bus 2.
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Circuit Descriptions and List of Abbreviations
EN 77FM242 AA9.
In stand-alone mode, the monitor can be controlled via the
Remote Control or via the RS232C port.
DDC1/2B (Display Data Channel, an I
2
C based protocol) is
implemented with separate NVMs for the two VGA inputs and
the DVI-D input as well.
OTC Processor
73407540
UART
RS232
SWITCH
SYNC
DETECT
RESET
5V TEST
8V TEST
SELECT-1
SELECT-2
SELECT-3
SELECT-4
7812
AUDIO
(MSP)
RS-232-ACT
UART-ACT
TXD-OTC
RXD-OTC
SYNC-ACT
I2C-1
3V3-STBY
RESET
STANDBY
POWER-OK
5V-TEST
8V-TEST
MSPRESET
EXPANDER
7383
SAA5801
IO
PCF8574
I2C-1
POWER
DOWN
RS232
VGA2
(FLEX)
VGA1
PSU
TXD
RXD
VGA2-TXD
VGA2-RXD
VGA1-TXD
VGA1-RXD
VGA1-H
VGA1-V
5V
8V
PDP
PDP-GO
OTC
ROM-CS
It is also possible to use the RS232C port for software upload
to the PW Scaler and the OTC. The target for downloading is
controlled via a switch in the RS232C path; the switch itself is
controlled by the OTC.
CPU-GO
IRQ-PDP
RAM-CS
ROM-OE
RAM-OE
7530
ADC
GENERATOR
7656
EPLD
CLOCK
TEMP-1
TEMP-2
CLOCK
GENERATOR
NVM-WE
I2C-NVM
RED-LED
GREEN-LED
PW-RESET
PW-START
I2C-2
RAS
CASL
CASH
AC(0:9)
DC(0:15)
7500
7430
NVM
OTC
LEDS
7605
PW
DRAM
&
RC
RECEIVER
RC-OUT
RC5-IN
RC-CNTL
SERVICE
INPUT
SERVICE_IN
WP
7506
7510
&
DC(0:15)
FLASH ROM
WE
AC(0:20)
Figure 9-5 Control Part
This part describes the Main Control part of the SCAVIO panel
and the interfaces with the software. The control function
consists of the following tasks:
•Control of external IOs, like fan speed, temperature,
power-up, this signal will be held 'high' until 240 ms after V
has become stable.
During power-down, the system will be reset as soon as the
V
drops below 3.08 V.
CC
service and RC5,
•UART communication with Receiver box,
•RS232 control / communication,
•Supports the uploading of new SW into the Flash-ROMs,
•Start-up of monitor and initialisation via I
2
C,
•Error detection and storing.
Start-up from Standby
When the monitor is in standby mode, it can wake-up in several
ways:
•When an RC command is received (RC_IN).
•Detection of H- and/or V-sync on VGA1.
•Detection of UART communication on VGA1.
Start-up and Shut-down
The POR signal is not generated on the PSU, but on the
•Detection of RS232 communication.
•Detection of Service modes.
SCAVIO board. This is done with a fully integrated ADM810T
POR chip (item 7517), which senses the 3.3 V coming from the
PSU. The sense level is 3.08 V. During power-up as well as
power-down, this chip will make the RESET signal high. During
RC Command Reception
When a RC command is received at the RC receiver on the
LED panel, it will go directly to the RC input of the OTC (RC_IN
on pin 100). If the monitor is in standby, and a proper RC command is send, it will wake up.
CL16532099_004.eps
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Circuit Descriptions and List of Abbreviations
The RC commands are routed to the Receiver box via the
VGA1 connector pin 9 (RC_VGA1), but this loop through
connection is controlled by RC_CNTL. Below is the truth table.
Table 9-3 RC Commands overview
F21REE-box FM242Monitor RC
RC_CNTL
commands
In StandbyIn StandbySend to E-box Low
In StandbyOnBlockedHigh
OnIn StandbySend to E-box Low
OnOnSend to E-box Low
Note: All RC commands are direct available on a separate RCout cinch connector (RC_OUT) on the VGA connector panel.
H- and/or V-sync Detection
When both H and or V sync are present on VGA1, there is a
pulse (low) on SYNC_ACT. When only H is present,
SYNC_ACT is continuously low. The SW disables the
interrupt, once an interrupt is received.
UART Communication Detection
When there is UART communication on VGA1, the UART
detection circuitry generates on every falling edge a pulse on
UART_ACT. This is a negative going pulse with a width of ±
470 s. The first pulse will trigger the main software to check for
the FTV System Protocol (FSP). The SW disables the interrupt,
once an interrupt is received.
RS232 Communication Detection
When an RS232 connection is made, and communication is
started (pulses on RS232_RXD), RS232_ACT becomes 'high'.
Via a transistor, RS232_ACT will make SERVICE_IN low.
When the Monitor is operating (+5 V available), this signal is
made low (in fact it is disabled).
Service Mode Detection
It is possible to enter four different Service Modes (provided the
OTC is still supplied by the +3V3_STBY).
Via the SERVICE_IN signal, which is an ADC input of the OTC,
a voltage drop is detected from +3.3 V to V
V
is a DC voltage, which represents the mode to be entered:
X
.
X
Table 9-4 Service Mode levels
Service mode Limits Vx [V] Vx [V] Remarks
SDM3.0 > Vx > 2.4 ± 2.60382-2 to GND
SAM2.4 > Vx > 1.8 ± 2.00382-4 to GND
COMPAIR1.8 > Vx > 1.2 ± 1.40382-6 to GND
RS232 active Vx < 0.8>0.8Plug in RS232, start
program
2
C
I
There are four I
overview in chapter 6):
2
•I
C bus 1 is a (5 V) device bus, controlled by the OTC, and
2
C busses used in the monitor (see also I2C
connected to the following devices:
–PDP.
– EPLD.
– IO expander SCAVIO - PCF8574A.
– IO expander PSU - PCF8574A.
– ADC - PCF8591.
– Clock generator for PW - FS6377.
– Sound processor MSP3415G.
– Audio switch TEA6422 (Enhanced version only).
2
•I
C bus 2 is used for communication with the PixelWorks
co-processor (PW). Although the OTC is the main
controller, it will act in this case as a 'slave', since the PW
can only act as a 'master'. Before any I
2
C commands are
exchanged, the PW gets an interrupt (PW_START) to
indicate that the OTC wants to talk to the PW.
2
•I
C bus 3 is a (5 V) device bus, controlled by the PW, and
connected to the following devices:
– Video Decoder SAA7118 (Enhanced version only).
– De-interlacer SDA9400 (Enhanced version only).
– ADC/TMDS receiver AD9887.
– 3D Comb filter MN8783LSI (optional).
2
•I
C bus 4 is a (5 V) device bus, only connected to the NVM
(to avoid data corruption).
Notes:
•The PDP and EPLD are in fact 3.3 V bus devices, but they
need to be connected to bus 1, since the OTC is the first
controller to be fully operating at start-up. For this reason,
2
an I
C level shifter (items 7675/76 on diagram SC12) is
included, which converts the 5 V signals into 3V3 and visa
versa.
•One of the first commands is to set the clock generator
(item7570), else the PW can not start-up.
RS232/UART
(FLEX VGA)
VGA2
15 pin Sub-D
RS232
9 pin Sub-D
VGA1
15 pin Sub-D
VGA2_TXD
4
VGA2_RXD
11
12
15
3
2
4
VGA1_TXD
11
12
VGA1_RXD
15
ST232
74HCT
125-A/B
S1
74HCT
125-C/D
RXD
TXD
S4
74HC4052
n.c.
n.c.
n.c.
n.c.
S3 S2
Figure 9-6 RS232/UART
Introduction
The FM242 monitor is equipped with an RS232 interface. Via a
9 pin Sub-D connector, it is possible to connect a PC for special
modes like:
•SW download.
•Factory purposes.
•Service.
•Professional use.
A second option is the connection of a so-called ICONN-box for
Institutional TV (Hotel TV).
For communication with the Receiver Box, UART is used,
because this protocol can handle longer cable distances than
2
I
C. The (Receiver box) UART is interfaced via a 15 pin Sub-D
connector (VGA connector). Via this UART connection, the
F21R Receiver box and the FM242 Monitor can communicate
(via FSP). By doing so, the monitor will know that there is an
Receiver box connected and thus it is operating as a TV
configuration.
RS232/UART Control
The OTC (SELECT_1 to 4) controls the RS232/UART
switches. When the monitor is in Receiver box mode, there is
no RS232 communication possible. The monitor is default set
in Receiver box mode (switch to n.c. position) and the UART
from/to VGA1 is enabled, to allow communication with
Receiver box.
If no Receiver box is detected, the UART is disabled to ensure
that there will be no communication towards the OTC, and the
switch is set to OTC. Below the truth table of the switches is
shown, which determine the TXD/RXD path.
(1) Software download or ComPair mode.
(2) Software download or Debug mode.
(3) When S3 = 1 the 74HCT4052 is in a tri-state ('off' state).
(4) When S4 = 0 the TXD out of RS232 is disabled (S4 may not
become low in any other case).
UART Detection
When the VGA1_RXD line is continuously 'low', the OTC might
run slow due the fact that so-called 'break' signals are
generated. To prevent this, a small circuitry is added to detect
whether VGA1_RXD is continuously 'low' (item 7310).
When the VGA1_RXD line is 'low' for about 20 ms, the bufferswitch (item 7303-A) is opened. After this buffer, a second
discrete buffer is placed (items 7315/16), which keeps the
RXD_OTC line 'high' and changes the 5 V into a 3.3 V level.
ICONN-box
For application of a Flat TV in a hotel environment, the monitor
is designed to operate with a so-called ICONN-Box. The
ICONN-box will take over the user control of the monitor, by
intercepting the RC5-commands coming from a dedicated RCtransmitter, which sends specific hotel-mode commands and
sending its own RC-commands to the microprocessor in the
monitor.
So in the ICONN-Box, the hotel-mode commands will be
converted to RC5-commands, which than can be interpreted by
the monitor.
When connected to the RS232 input, this box takes over the
control of the IR-receiver in the monitor. It is also able to control
the front LED. The switches (7550 for the IR and 7555 for the
LED signals) are controlled by the ICONN_NOT signal.
The ICONN-Box shall interface the Monitor with the following
signals:
•IR-RX. These are the RC5-commands coming from the
specific hotel RC5 - transmitter, which are received via the
RC5-receiver of the monitor.
•IR_TX. These are the RC5-commands generated by the
ICONN-Box and send to the monitor.
•RL_ICN. Control signal from the microprocessor (of the
monitor), indicating the power state of the monitor. The
ICONN-Box and monitor LED are driven in parallel.
•GL_ICN. Control signal from the microprocessor (of the
monitor), indicating the functionality of the monitor, to drive
the LED on the ICONN-Box.
•LD_ICN. Control signal from the ICONN-Box to drive the
green LED on the monitor.
9.5Audio Amplifier Panel (Diagram A)
9.5.1Introduction
AUDIO
AMPLIFIER
MUTE
PSU
7260-A
L-HIGH
HPF
7238-A
L-LOW
LPF
7260-B
R-HIGH
HPF
7238-B
R-LOW
LPF
1kHz3kHz
LOW
HIGH
(LPF)
(HPF)
TWEETER RIGHT
TWIN-CONE SPEAKER RIGHT
MUTE
MUTE
MUTE
MUTE
6dB/OCT
SCAVIO
TWEETER LEFT
TWIN-CONE SPEAKER LEFT
AUDIO AMPLIFIER
7225-A
L-POS
L-NEG
7225-B
R-POS
R-NEG
AUDIO
ENABLE
63Hz
Figure 9-7 Blockdiagram Audio Amplifier
This panel houses the audio filters and amplifiers necessary for
driving the speakers. The differential audio inputs (for common
mode immunity) come from the SCAVIO panel (via connector
0388).
The PSU delivers the positive and negative supply voltage of
14.5 V
, as well as the +9V_STBY voltage.
DC
After being filtered and amplified, the signals go to the speaker
section, where the (twin cone) low/mid range speakers and the
tweeters are driven (load impedance is 8 Ω).
9.5.2Supply (Diagram A7)
The supply voltage is a symmetrical voltage of +/- 14.5 V
generated by the main supply via L5002.
•V
•V
(+14.5 VDC) on connector 0302 pin 5/6, and
SND_POS
(-14.5 VDC) on connector 0302 pin 1/2.
SND_NEG
9.5.3Filter (Diagram A2)
Electrical filtering is needed for following reasons:
•Limiting the cone excursion, thereby reducing the
distortion.
•Increasing the power handling capacity (PHC).
In the FM242, active second order Sallen-Key filters are used,
with crossover frequencies of 1 kHz for the lowpass filter, and
3 kHz for the highpass filter.
The audio signals are filtered before the amplifier. There are
some reasons for doing this:
•It is now easy to do active filtering, and
L
R
CL16532099_003.eps
HIGH LEFT
MID/LOW LEFT
HIGH RIGHT
MID/LOW RIGHT
040402
DC
,
Page 80
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Circuit Descriptions and List of Abbreviations
•At less costs (no expensive coils and capacitors).
Low Pass Filter (LPF)
For L and R separately, a Low Pass Filter (IC7238A and B) is
processing L_LOW and R_LOW.
The output signal of this filter is then fed to the audio amplifier
(identical for right channel).
High Pass Filter (HPF)
For L and R separately, a High Pass Filter (IC7260A and B) is
processing L_HIGH and R_HIGH.
The output signal of this filter is then fed to the audio amplifier
(identical for right channel).
9.5.4Amplifier (Diagrams A3 to A6)
Each speaker has its' own 15 W class-D amplifier. These
amplifiers combine a good performance with a high efficiency,
resulting in a big reduction in heat generation.
Principle
Audio-power-amplifier systems have traditionally used linear
amplifiers, which are well known for being inefficient. In fact, a
linear Class AB amplifier is designed to act as a variable
resistor network between the power supply and the load. The
transistors operate in their linear region, and the voltage that is
dropped across the transistors (in their role as variable
resistors) is lost as heat, particularly in the output transistors.
Class D amplifiers were developed as a way to increase the
efficiency of audio-power-amplifier systems.
+V
instead of the load. The filter is less lossy than the speaker,
which causes less power dissipated at high output power and
increases efficiency in most cases.
9.5.5Mute (Diagram A2 to A6)
A mute switch (item 7302) is provided at the PWM inputs (item
7315, LM311). This switch is controlled by the
AUDIO_ENABLE line, which checks the availability of the
+9V_STBY voltage.
9.5.6Protections
Short-circuit Protection (Diagram A3)
A protection is made against a too high temperature of
transistor 7355 in case of a short-circuit of output FET 7365-1.
Transistor 7340 is sensing the current through transistor 7355
via R3355, and activates the DC-protection line (see below) in
case the current becomes too high. This is the same for all four
amplifier parts.
DC-protection (Diagram A7)
+9V_STBY
5753
OUT_LH
A
OUT_RH
3770
3780
OUT_LL
3771
3781
OUT_RL
2760
VCC_10_POS
VCC_10_NEG
3775
3765
3750
3760
3752
2753
3751
77517761
7735
3754
DC_PROT
7755
CL16532099_001.eps
200801
-V
CL16532099_002.eps
200801
Figure 9-8 Principle Class-D Amplifier
The Class D amplifier works by varying the duty cycle of a
Pulse Width Modulated (PWM) signal.
By comparing the input voltage to a triangle wave, the amplifier
increases duty cycle to increase output voltage, and decreases
duty cycle to decrease output voltage.
The output transistors (item 7365 on diagram A3) of a Class D
amplifier switch from 'full off' to 'full on' (saturated) and then
back again, spending very little time in the linear region in
between. Therefore, very little power is lost to heat. If the
transistors have a low 'on' resistance (R
), little voltage is
DS(ON)
dropped across them, further reducing losses.
A Low Pass Filter at the output passes only the average of the
output wave, which is an amplified version of the input signal.
In order to keep the distortion low, negative feedback is applied
(via R3308). A second feedback loop (via R3310) is tapped
after the output filter, in order to decrease the distortion at high
frequencies.
The advantage of Class D is increased efficiency (= less heat
dissipation). Class D amplifiers can drive the same output
power as a Class AB amplifier using less supply current.
The disadvantage is the large output filter that drives up cost
and size. The main reason for this filter is that the switching
waveform results in maximum current flow. This causes more
loss in the load, which causes lower efficiency. An LC filter with
a cut-off frequency less than the Class D switching frequency
(350 kHz), allows the switching current to flow through the filter
Figure 9-9 DC Protection
Because of the symmetrical supply, a DC-blocking capacitor,
between the amplifier and the speaker, is not necessary.
However, it is still necessary to protect the speaker for DC
voltages.
The following protections are therefore implemented:
•Via R3765 and R3775, each stabilised supply voltage line
(via items 7735 and 7745) is checked on deviations.
•Via R3770/3771/3780/3781, each amplifier output is
checked for DC-voltage.
Via R3765/3775, a virtual earth is imposed on point A. When
one of the supply voltages deviates, a DC voltage will occur on
this point. If point A is positive, T7751 will conduct. If it is
negative, T7761 will conduct.
Both cases will make T7735 conduct, so that the DC-PROT
signal will be made high. This ensures that the power supply is
rapidly trimmed back.
Capacitor C2760 will ensure that only DC-signals at point A will
activate the protection.
9.6LED/Switch Panel (Diagram LD)
This panel contains:
•The red and green status LEDs,
•The RC input receiver,
•The light sensor, and
•The 'on/off' switch.
All signals on this panel come directly from the SCAVIO panel:
•The LED and sensor signals (RED_LED, GREEN_LED
and LIGHT_SEN_IN) are routed to the OTC. When a F21R
Receiver box is connected, the sensor signal is routed to
the OTC of this box (via UART), where it will control the
HOP via I
2
C.
Page 81
Circuit Descriptions and List of Abbreviations
EN 81FM242 AA9.
•The RC signal (RC_IN) is routed to the OTC, the VGA1
connector, and the RC-out cinch connector.
•The signals to (+9V_STBY) and from (+9V_STBY_SW) the
'on'/'off' switch are routed to the PSU board.
9.7Plasma Display Panel (PDP)
9.7.1General
The PDP, which is used in the FM242, is a product of SDI
(Samsung Display Industry) . When defect, a new panel must
be ordered, and after receipt, the defective panel must be send
for repair in the packing (flight case) of the new ordered panel.
9.7.2Operation
Principle
Plasma displays work by applying a voltage between two
transparent display electrodes on the front glass plate of the
display. The electrodes are separated by an MgO dielectric
layer and surrounded by a mixture of neon and xenon gases.
When the voltage reaches the 'firing level', a plasma discharge
occurs on the surface of the dielectric, resulting in the emission
of ultra violet light.
This UV light then excites the phosphor material at the back of
the cell and emits visible light. Each cell or sub-pixel has red,
blue or green phosphor material and three sub-pixels combine
to make up a pixel. The intensity of each colour is controlled by
varying the number and width of voltage pulses applied to the
sub-pixel during a picture frame. This is implemented by
dividing each picture frame into sub-frames.(for 50 Hz-mode
there are 12 sub frames, for the 60 Hz-mode there are 10 sub
frames). During a sub-frame, all cells are first addressed those to be lit are pre-charged to a specific address voltage then during the display time the display voltage is applied to the
entire screen lighting those that were addressed.
Each sub-frame has a weighting-factor. (Time-entity depends
on size and number of pixels on the screen). This is a purely
digital PWM control mechanism, which is a key advantage as it
eliminates any unnecessary digital to analogue conversions.
9.8Abbreviation list
ADCAnalogue to Digital Converter
AMAmplitude Modulation
APAsia Pacific
AVExternal Audio Video
B/GMonochrome TV system. Sound
carrier distance is 5.5 MHz
BGABall Grid Array
BTSCBroadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
ComPairComputer aided rePair
CVBSComposite Video Blanking and
Synchronisation
DACDigital to Analogue Converter
DDCDisplay Data Channel (a protocol
based on I2C)
D/KMonochrome TV system. Sound
carrier distance is 6.5 MHz
DFUDirection For Use: description for the
end user
DNRDynamic Noise Reduction
DRAMDynamic RAM
DSPDigital Signal Processing
DTSDigital Theatre Sound
DVDDigital Versatile Disc
DVI-dDigital Visual Interface, d = digital only
EEPROMElectrically Erasable and
Programmable Read Only Memory
EMIElectro Magnetic Interference
EPLDErasable Programmable Logic Device
EUEurope
EXTExternal (source), entering the set via
SCART or Cinch
FLASHFlash memory
FMFrequency Modulation
FSPFTV System Protocol
FTVFlat TeleVision
HPHeadphone
IMonochrome TV system. Sound
carrier distance is 6.0 MHz
I2CIntegrated IC bus
I2SIntegrated IC Sound bus
ICONNInstitutional CONNector
IFIntermediate Frequency
InterlacedScan mode where two fields are used
to form one frame. Each field contains
half the number of the total amount of
lines. The fields are written in 'pairs',
causing line flicker.
IRInfra Red
IRQInterrupt Request
LATAMLatin America
LEDLight Emitting Diode
L/L'Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LSLoudspeaker
LVDSLow Voltage Differential Signalling
M/NMonochrome TV system. Sound
carrier distance is 4.5 MHz
MOSFETMetal Oxide Silicon Field Effect
sound system, mainly used in Europe.
NTCNegative Temperature Coefficient,
non-linear resistor
Page 82
EN 82FM242 AA9.
Circuit Descriptions and List of Abbreviations
NTSCNational Television Standard
Committee. Colour system mainly
used in North America and Japan.
Colour carrier NTSC M/N = 3.579545
MHz, NTSC 4.43 = 4.433619 MHz
(this is a VCR norm, it is not
transmitted off-air)
NVMNon Volatile Memory: IC containing
TV related data e.g. alignments
OCOpen Circuit
OSDOn Screen Display
OTCOn screen display, Teletext and
Control
P50Project 50 or Easy Link
PALPhase Alternating Line. Colour system
conditioner)
PIPPicture In Picture
PLLPhase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
PORPower On Reset, signal to reset the P
Progressive ScanScan mode, where all scan lines are
displayed in one frame at the same
time, creating a double vertical
resolution.
PTCPositive Temperature Coefficient, non
linear resistor
PWPixel Works (manufacturer) video
scaling co-processor
PWMPulse Width Modulation
RAMRandom Access Memory
RCRemote Control handset
RC5Remote Control system 5, signal from
the remote control receiver
RGBRed Green Blue
ROMRead Only Memory
SCARTSyndicat des Constructeurs
d'Appareils Radiorecepteurs et
Televisieurs
SCAVIOScaler Control Audio Video Input and
Output
SCLSerial Clock I2C
SDASerial Data I2C
SDISamsung Display Industry
SDRAMSynchronous DRAM
SECAMSEequence Couleur Avec Memoire.
Colour system mainly used in France
and East Europe. Colour carriers =
4.406250 MHz and 4.250000 MHz
SMPSSwitched Mode Power Supply
SOGSync On Green
SOPSSelf Oscillating Power Supply
S/PDIFSony Philips Digital InterFace
SRAMStatic RAM
STBYStandby
SVHSSuper Video Home System
SWSoftware
SXGA1280x1024
THDTotal Harmonic Distortion
TMDSTransition Minimised Differential