Philips CGY2013G Datasheet

INTEGRATED CIRCUITS

DATA SH EET

CGY2013G

GSM 4 W power amplifier

Preliminary specification
Supersedes data of 1996 Jul 12
File under Integrated Circuits, IC17

1998 Jan 23

Philips Semiconductors Preliminary specification

GSM 4 W power amplifier CGY2013G

FEATURES

• Power Amplifier (PA) overall efficiency 52%

• 35.5 dB gain

• 0 dBm input power

• Gain control range >55 dB

• Low output noise floor of PA < −130 dBm/Hz in GSM RX

band

• Wide operating temperature range −20 to +85 °C

• LQFP 48 pin package

• Compatible with power ramping controller PCF5077

• Compatible with GSM RF transceiver SA1620.

APPLICATIONS

• 880 to 915 MHz hand-held transceivers for E-GSM
applications

• 900 MHz Time Division Multiple Access (TDMA)
systems.

QUICK REFERENCE DATA

SYMBOL PARAMETER

V

DD

I

DD

P

o(max)

T

amb

positive supply voltage − 3.6 − V
positive peak supply current − 2.4 − A
maximum output power − 35.5 − dBm
operating ambient temperature −20 − +85

(1)

GENERAL DESCRIPTION

The CGY2013G is a GSM class 4 GaAs Monolithic
Microwave Integrated Circuit (MMIC) power amplifier
specifically designed to operate at 3.6 V battery supply.

The PA requires only a 30 dB harmonic low-pass filter to
comply with the GSM transmit spurious specification.
It can be switched off and its power controlled by
monitoring the actual drain voltage applied to the amplifier
stages.

MIN. TYP. MAX. UNIT

ο

C

Note

1. For conditions, see Chapters “AC characteristics” and “DC characteristics”.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

CGY2013G LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2

1998 Jan 23 2

Philips Semiconductors Preliminary specification

GSM 4 W power amplifier CGY2013G

BLOCK DIAGRAM

handbook, full pagewidth

RFI

(1) Ground pins 1 to 4, 9to 17, 20 to 26, 28, 30, 32, 34 to 41 and 43 to 48.

V

DD1

29 33 42

27

(1)

GND

V

DD2

V

Fig.1 Block diagram.

GG1

31

V

DD3

CGY2013G

V

GG2

SENSOR

DRIVER

5,6,7,8

19

MGD627

18

DETO/V

DD5

RFO/V

DD4

PINNING

SYMBOL PIN DESCRIPTION

GND 1 to 4 ground
RFO/V

DD4

5 to 8 power amplifier output and fourth stage supply voltage
GND 9 to 17 ground
DETO/V
V

GG2

DD5

18 power sensor output and supply voltage

19 fourth stage negative gate supply voltage
GND 20 to 26 ground
RFI 27 power amplifier input
GND 28 ground
V

DD1

29 first stage supply voltage
GND 30 ground
V

GG1

31 first three stages negative gate supply voltage
GND 32 ground
V

DD2

33 second stage supply voltage
GND 34 to 41 ground
V

DD3

42 third stage supply voltage
GND 43 to 48 ground

1998 Jan 23 3

Philips Semiconductors Preliminary specification

GSM 4 W power amplifier CGY2013G

handbook, full pagewidth

RFO/V
RFO/V
RFO/V
RFO/V

GND
GND
GND
GND

DD4
DD4
DD4
DD4

GND
GND

GND
GND

GND

DD3

V

GND
43

42

18

19

DD5

GG2

V

DETO/V

GND
41

20

GND

GND
40

21

GND

GND
39

22

GND

GND
38

23

GND

GND

24 37

GND

36
35
34
33
32
31
30
29
28
27
26
25

MGD628

GND
GND
GND
V

DD2

GND
V

GG1

GND
V

DD1

GND
RFI
GND
GND

GND

GND
47

14

GND

46

15

GND

GND

GND

45

44

CGY2013G

16

17

GND

GND
48

1
2
3
4
5
6
7
8

9
10
11
12

13

GND

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION
Operating conditions

The CGY2013G is designed to meet the European
Telecommunications Standards Institute (ETSI) GSM
documents, the

“ETS 300 577 specification”

, which are

defined as follows:

• ton= 542.8 µs

• T = 4.3 ms

• Duty cycle = 1/8.

The device is specifically designed for pulse operation
allowing the use of a LQFP48 plastic package.

1998 Jan 23 4

Power amplifier

The power amplifier consists of four cascaded gain stages
with an open-drain configuration. Each drain has to be
loaded externally by an adequate reactive circuit which
also has to be a DC path to the supply.

The amplifier bias is set using a negative voltage applied
at pins V

GG1

and V

. This negative voltage must be

GG2

present before the supply voltage is applied to the drains
to avoid current overstress for the amplifier.