Datasheet CBTV4010 Datasheet (Philips)

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INTEGRATED CIRCUITS

CBTV4010

10-bit DDR SDRAM mux/bus switch

Product data
File under Integrated Circuits — ICL03

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2002 Feb 19

Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

FEA TURES

• Enable signal is SSTL_2 compatible

• Optimized for use in Double Data Rate (DDR) SDRAM

applications

• Designed to be used with 400 Mbps/200 MHz DDR data bus

• Switch on resistance is designed to eliminate the need for series

resistor to DDR SDRAM

• 20 Ω on resistance

• Internal 100 Ω pull-down resistors

• Low differential skew

• Matched rise/fall slew rate

• Low cross-talk data-data/data-DQM

• Independent DIMM control lines

• Latch-up protection exceeds 500 mA per JESD78

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

C
C
I

CCZ

IN

ON

Propagation delay
An to Yn

Input capacitance – control pins VI = 0 V or V
Channel on capacitance Vin = 1.5 V 7 pF
Total supply current VCC = 2.5 V 500 µA

CL = 7 pF; VCC = 2.5 V 140 ps

DESCRIPTION

This 10-bit bus switch is designed for 2.3 V to 2.7 V VCC operation
and SSTL_2 select input levels.

Each Host port pin is multiplexed to one of four DIMM port pins.
When the S pin is low the corresponding 10-bit bus switch is turned
on. The on-state connects the Host port to the DIMM port through a
20 Ω nominal series resistance. When the S pin is high the switch is
open and a high-impedance state exists between the two ports. The
DIMM port is terminated with a 100 Ω resistor to ground when the
S pin is high. The design is intended to have only one DIMM port
active at any time.

The part incorporates a very low cross-talk design. It has a very low
skew between outputs (< 50 ps) and low skew (< 50 ps) for rising
and falling edges. The part has optional performance in DDR data
bus applications.

Each switch has been optimized for connection to 1 or 2-bank
DIMMs.

The low internal RC time constant of the switch (20 Ω × 7 pF) allows
data transfer to be made with minimal propagation delay.

The CBTV4010 is characterized for operation from 0 to +85 °C.

CONDITIONS

T

= 25 °C; GND = 0 V

amb

CC

TYPICAL UNIT

1.8 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE ORDER CODE DWG NUMBER

TFBGA64 (Thin Fine Pitch BGA) 0 to +85 °C CBTV4010EE SOT746-1

2002 Feb 19 853-2315 27756

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Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

64-BALL BGA CONFIGURA TION

1 234 5 6 78 91011

DD

S1

NC

V

GND

3DP9

HP9
3DP8
2DP8

HP8

GND

2DP7 1DP7

S0

DD

S3

HP7 3DP6

V

A

S2

B

NC

C
D

2DP9

E

1DP9

F

0DP9

G
H

1DP8

J

0DP8

K

3DP7

L

1DP0

2DP0

0DP0

GND HP0

0DP7

2DP6

HP6 GND HP5

1DP6 0DP6

1DP1

2DP1 3DP1

HP2

3DP2
0DP3

HP3

GND

0DP4

HP4

3DP4

2DP5

1DP5

3DP0
0DP1 HP1 GND

3DP5

0DP2
1DP2
2DP2

1DP3
2DP3
3DP3

1DP4
2DP4
0DP5

NOTE: BLANK SPACE INDICATES NO BALL

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION

B6, B9, C10, F2,
F10, J2, J10, K3,

HP0–HP9 Host ports

K6, K9

A2, B1, B3, C2 S0–S3 Select

A5, A6, A7, A9,

A10, A11, B5, B7,

B8, B11, C11, D10,

E1, E2, E10, E11,

F1, F11, G1, G2,

G11, H2, H10, J1,

J11, K1, K4, K5,

K8, K10, K11, L1,

L2, L3, L5, L6, L7,

L9, L10, L11

B10, D2, G10, K2,

0DP0–3DP3
0DP1–3DP1
0DP2–3DP2
0DP3–3DP3
0DP4–3DP4
0DP5–3DP5
0DP6–3DP6
0DP7–3DP7
0DP8–3DP8
0DP9–3DP9

GND Ground

DIMM ports

K7,

A1, B2 V

DD

Positive supply voltage

FUNCTION TABLE

INPUT

S

L Host port = DIMM port

H

H = High voltage level
L = Low voltage level

FUNCTION

Host port = Disconnect

DIMM port = 100 Ω to GND

SA00589

2002 Feb 19

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Philips Semiconductors Product data

SYMBOL

PARAMETER

UNIT

CBTV401010-bit DDR SDRAM mux/bus switch

SIMPLIFIED SCHEMATIC, EACH FET SWITCH

HPx nDPx
A

Sn

Sw

B

100 Ω

SW00889

LOGIC DIAGRAM (POSITIVE LOGIC)

HP0

HP9

S0

S1

S2

Sw

Sw

Sw

Sw

Sw

Sw

Sw

Sw

0DP0

1DP0

2DP0

3DP0

0DP9

1DP9

2DP9

3DP9

ABSOLUTE MAXIMUM RA TINGS

SYMBOL

V

CC

I

IK

V

I

T

stg

V

I

DC supply voltage –0.5 to +3.3 V
DC input clamp current V
DC input voltage range (S pin only)
Storage temperature range –65 to 150 °C
DC input voltage range (except S pin)

PARAMETER CONDITIONS RATING UNIT

1, 3

S3

< 0 –50 mA

2

2

I/O

VCC + 0.3 V

–0.5 to 3.3 V

SW00901

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

3. The package thermal impedance is calculated in accordance with JESD 51.

RECOMMENDED OPERATING CONDITIONS

LIMITS

Min Typ Max

V

V
V

T

amb

NOTE:

1. All unused control inputs of the device must be held at V

DC supply voltage 2.3 2.5 2.7 V

CC

High-level input voltage DIMM port and Host 1.6 — — V

IH

Low-level Input voltage DIMM port and Host — — 0.9 V

IL

Operating free-air temperature range 0 — +85 °C

or GND to ensure proper device operation.

CC

2002 Feb 19

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Philips Semiconductors Product data

CC

CC I CC

2

r

2

On-resistance

Ω

SYMBOL

PARAMETER

FROM (INPUT)

TO (OUTPUT)

UNIT

CBTV401010-bit DDR SDRAM mux/bus switch

DC ELECTRICAL CHARACTERISTICS

LIMITS

T

SYMBOL PARAMETER TEST CONDITIONS

Min Typ

V

I

CC

C
C

on

Input clamp voltage VCC = 2.3 V; II = –18 mA — — –1.2 V

IK

S — — ±100

Host port — — ±100

DIMM port — — ±100

I

Input leakage current

I

VCC = 2.5 V; VI = V
S = V

CC

S = GND for I

IL (test)

or GND;

Quiescent supply current VCC = 2.5 V; IO = 0, VI = VCC or GND — 0.7 1.5 mA
Control pin capacitance VI= 2.5 V or 0 — 1.8 3 pF

in

Switch on capacitance Vin= 1.5 V — — 10 pF

on

VCC = 2.5 V; V
VCC = 2.5 V; V

= 0.8 V; VB = 1.0 V 16 20 30

A

= 1.7 V; VB = 1.5 V 16 20 30

A

NOTES:

1. All typical values are at V

2. Measured by the current between the Host and the DIMM terminals at the indicated voltages on each side of the switch.

= 2.5 V, T

CC

amb

= 25 °C

3. Capacitance values are measured at a of 10 MHz and a bias voltage 3 V. Capacitance is not production tested.

= 0 to +85 °C

amb

UNIT

1

Max

µA

AC CHARACTERISTICS

VCC = +2.5 V ±0.2 V

Min Typ Max

t
t

t

Propagation delay

pd

enable S

en

disable S

dis

Output skew

t

osk

Any output to any output, Waveform 4
(see note 2)

Edge skew

t

esk

Difference of rising edge propagation delay
to falling edge propagation delay,
Waveform 5 (see note 2)

NOTES:

1. The propagation delay is based on the RC time constant of the typical on–state resistance of the switch and a load capacitance, when driven
by an ideal voltage source (zero output impedance); 20 Ω × 7 pF.
This parameter is not production tested.

2. Skew is not production tested.

1

HPx or xDPx xDPx or HPx — — 140 ps

n
n

HPx or nDPx 1 — 2 ns
HPx or nDPx 1 — 3 ns

— 25 50 ps

— 25 50 ps

2002 Feb 19

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Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

HPx to nDPx AC WAVEFORMS AND TEST CIRCUIT

AC WAVEFORMS

D or H

H or D

1.25 V

t

PLH

1.25 V 1.25 V

Waveform 1. Input (D or H) to Output (H or D) Propagation

Delays

Sn

(Low-level

enabling

Output

nDPx

(see Note)

1.25 V

t

PZH

1.25 V

Note:

The output is high except when disabled by the Sn control.

t

PHZ

1.25 V

t

PHL

1.25 V

VOH – 0.15 V

2.5 V

0 V

V

V

SA00620

2.5 V

0 V

V

OL

V

OH

V

OL

TEST CIRCUIT HPx to xDPx

From Output
Under Test

C

= 30 pF

L

OH

DEFINITIONS

= Load capacitance includes jig and probe capacitance

C

OL

L

NOTES:

1. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 10 MHz, Z

≤ 2.5 ns.

t

f

2. The outputs are measured one at a time with one transition per
measurement.

500 Ω

Load Circuit

= 50 Ω, tr ≤ 2.5 ns,

O

SA00622

Waveform 2. 3-State Output Enable and Disable Times

2002 Feb 19

SA00621

6

Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

nDPx to HPx AC WAVEFORMS AND TEST CIRCUIT

AC WAVEFORM

(Low-level

Sn

enabling

Output

HPx

SW at 4.3 V

(see Note 1)

Output

HPx

SW at Open

(see Note 2)

Note:

1. The output is low except when disabled by the Sn control.

2. The output is high except when disabled by the Sn control.

1.25 V

t

PZL

1.25 V

t

PZH

1.25 V

t

PHZ

1.25 V

t

PLZ

VOL + 0.3V

V

Waveform 3. 3-State Output Enable and Disable Times

OH

– 0.3V

2.5 V

0 V

2.5V

V

OL

V

OH

V

OL

SA00623

TEST CIRCUIT nDPx to HPx

2 × V

From Output
Under Test

C

= 30 pF

L

DEFINITIONS

= Load capacitance includes jig and probe capacitance

C

L

500 Ω

500 Ω

Load Circuit

TEST SW

t

pd

t

PLZ/tPZL

t

PHZ/tPZH

open

2 × V

GND

SW

CC

NOTES:

1. All input pulses are supplied by generators having the
following characteristics: PRR ≤ 10 MHz, Z

≤ 2.5 ns.

t

f

2. The outputs are measured one at a time with one transition per

O

measurement.

CC

Open

GND

SA00624

= 50 Ω, tr ≤ 2.5 ns,

INPUT

RISING EDGE

OUTPUT

Waveform 4. Skew Between Any Two Outputs

1.25 V

SKEW

1.25 V 1.25 V

1.25 V

Waveform 5. Rising and Falling Edge Skew

FALLING EDGE

SKEW

SA00568

2.5 V

0 V

V

OH

V

OL

skew

ANY TWO OUTPUTS

SW00396

2002 Feb 19

7

Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

TFBGA64: plastic thin fine-pitch ball grid array package; 64 balls; body 7 x 7 x 0.7 mm SOT746-1

2002 Feb 19

8

Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

NOTES

2002 Feb 19

9

Philips Semiconductors Product data

CBTV401010-bit DDR SDRAM mux/bus switch

Data sheet status

Product

Data sheet status

Objective data

Preliminary data

Product data

[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

[1]

status

Development

Qualification

Production

[2]

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Contact information

For additional information please visit
http://www.semiconductors.philips.com . Fax: [phone]

For sales offices addresses send e-mail to:

[e-mail].

Definitions

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.

This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.

 Koninklijke Philips Electronics N.V. 2002

All rights reserved. Printed in U.S.A.

Date of release: 02-02

Document order number: 9397 750 09463

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2002 Feb 19

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