Philips buk9620-100b Datasheet

Page 1

1. Product profile

1.1 General description

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.

1.2 Features and benefits

BUK9620-100B

N-channel TrenchMOS logic level FET

Rev. 02 — 6 May 2009 Product data sheet

 AEC-Q101 compliant  Low conduction losses due to low

on-state resistance

 Suitable for logic level gate drive

sources

 Suitable for thermally demanding

environments due to 175 °C rating

1.3 Applications

 12 V, 24 V and 42 V loads  Automotive and general purpose

power switching

 Motors, lamps and solenoids

1.4 Quick reference data

Table 1. Quick reference

Symbol Parameter Conditions Min Typ Max Unit

tot

Static characteristics

DSon

Avalanche ruggedness

DS(AL)S

drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - - 100 V drain current VGS=5V; Tmb=25°C;

; see Figure 3

≤ 100 V;

sup

= 25 °C; unclamped

total power dissipation

drain-source on-state resistance

non-repetitive drain-source avalanche energy

see Figure 1 Tmb= 25 °C; see Figure 2 - - 203 W

VGS= 4.5 V; ID=25A; Tj= 25 °C; see Figure 11; see Figure 12

=5V; ID=25A;

Tj= 25 °C; see Figure 12; see Figure 11

ID=63A; V RGS=50Ω; VGS=5V; T

j(init)

--63A

- 16.4 22.3 mΩ

- 16.2 20 mΩ

- - 222 mJ

Page 2

NXP Semiconductors

2. Pinning information

BUK9620-100B

N-channel TrenchMOS logic level FET

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphic symbol

1G gate 2D drain 3S source

mb D mounting base; connected to

drain

bb076

SOT404

(D2PAK)

3. Ordering information

Table 3. Ordering information

Type number Package

BUK9620-100B D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one

Name Description Version

lead cropped)

4. Limiting values

SOT404

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

DGR

tot

stg

Source-drain diode

Avalanche ruggedness

DS(AL)S

drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - 100 V drain-gate voltage RGS=20kΩ -100V gate-source voltage -15 15 V drain current Tmb=25°C; VGS=5V; see Figure 1; see Figure 3 -63A

=100°C; VGS=5V; see Figure 1 -45A

peak drain current Tmb=25°C; tp≤ 10 µs; pulsed; see Figure 3 -253A total power dissipation Tmb=25°C; see Figure 2 -203W storage temperature -55 175 °C junction temperature -55 175 °C

source current Tmb=25°C - 63 A peak source current tp≤ 10 µs; pulsed; Tmb=25°C - 253 A

non-repetitive drain-source avalanche

ID=63A; V T

j(init)

sup

= 25 °C; unclamped

≤ 100 V; RGS=50Ω; VGS=5V;

-222mJ

energy

Product data sheet Rev. 02 — 6 May 2009 2 of 12

Page 3

NXP Semiconductors

BUK9620-100B

N-channel TrenchMOS logic level FET

120

der

(%)

0 20015050 100

03aa24

Tmb (°C)

Fig 1. Normalized continuous drain current as a

function of mounting base temperature

(A)

Limit R

DSon

= VDS / I

120

der

(%)

0 20015050 100

03na19

Tmb (°C)

Fig 2. Normalized total power dissipation as a

function of mounting base temperature

003aac769

10 μs

100 μs

-1

1 10 10

1ms

10 ms

100 ms

VDS (V)

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

Product data sheet Rev. 02 — 6 May 2009 3 of 12

Page 4

NXP Semiconductors

003aa c770

5. Thermal characteristics

BUK9620-100B

N-channel TrenchMOS logic level FET

Table 5. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

th(j-mb)

thermal resistance from

see Figure 4 - - 0.75 K/W junction to mounting base

th(j-a)

(K/W)

th (j-m b)

thermal resistance from junction to ambient

= 0.5

0.2

-1

0.1

0.05

0.02

-2

single shot

-3

1e-6 10

mounted on printed circuit board;

-50-K/W

minimum footprint; SOT404 package

-5

-4

-3

-2

-1

δ =

(s )

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

Product data sheet Rev. 02 — 6 May 2009 4 of 12

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NXP Semiconductors

6. Characteristics

BUK9620-100B

N-channel TrenchMOS logic level FET

Table 6. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

(BR)DSS

GS(th)

drain-source breakdown voltage

gate-source threshold voltage

ID=0.25mA; VGS=0V; Tj=25°C 100 - - V

=0.25mA; VGS=0V; Tj=-55°C 90 - - V

ID=1mA; VDS = VGS; Tj=25°C;

11.582V

see Figure 10

=1mA; VDS = VGS; Tj= 175 °C;

0.5 - - V

see Figure 10

=1mA; VDS = VGS; Tj=-55°C;

--2.3V

see Figure 10

DSS

GSS

DSon

drain leakage current VDS=100V; VGS=0V; Tj= 175 °C - - 500 µA

=100V; VGS=0V; Tj= 25 °C - 0.05 1 µA

gate leakage current VDS=0V; VGS=10V; Tj= 25 °C - 2 100 nA

=0V; VGS=-10V; Tj= 25 °C - 2 100 nA

drain-source on-state resistance

VGS=4.5V; ID=25A; Tj=25°C;

see Figure 11; see Figure 12

=10V; ID=25A; Tj=25°C;

see Figure 11

=5V; ID=25A; Tj=175°C;

; see Figure 12

- 16.4 22.3 mΩ

- 15.6 18.5 mΩ

--50mΩ

see Figure 12; see Figure 11

=5V; ID=25A; Tj=25°C;

see Figure 12

; see Figure 11

- 16.2 20 mΩ

Dynamic characteristi cs

Q Q Q C C C

G(tot) GS

GD iss oss rss

total gate charge ID=25A; VDS=80V; VGS=5V;

=25°C; see Figure 14; see Figure 15

gate-source charge - 9.5 - nC

- 53.4 - nC

gate-drain charge - 21.2 - nC input capacitance VGS=0V; VDS=25V; f=1MHz; output capacitance - 340 411 pF

Tj=25°C; see Figure 16

reverse transfer

- 4300 5657 pF

- 150 201 pF

capacitance

d(on)

d(off)

turn-on delay time VDS=30V; RL=1.2Ω; VGS=5V;

=10Ω; Tj=25°C

rise time - 116 - ns

G(ext)

turn-off delay time - 173 - ns fall time - 77 - ns internal drain

inductance

from drain lead 6 mm from package to centre of die; Tj=25°C

from upper edge of drain mounting base to

=25°C

internal source inductance

centre of die; T from source lead to source bond pad;

Tj=25°C

-45-ns

-4.5-nH

-2.5-nH

-7.5-nH

Product data sheet Rev. 02 — 6 May 2009 5 of 12

Page 6

NXP Semiconductors

BUK9620-100B

N-channel TrenchMOS logic level FET

Table 6. Characteristics

…continued

Symbol Parameter Conditions Min Typ Max Unit

Source-drain diode

source-drain voltage IS=25A; VGS=0V; Tj=25°C;

- 0.86 1.2 V

see Figure 13

reverse recovery time IS=20A; dIS/dt = -100 A/µs; VGS=0V;

=30V; Tj=25°C

recovered charge - 272 - nC

-1

10 I

(A)

-2

-3

-4

-5

-6

0123

maxtypmin

03aa36

(V)

150

(A)

120

012345

-80-ns

003aa c771

VGS (V) =

4.5

3.4

3.2

2.7

2.5

(V)

Fig 5. Sub-threshold drain current as a function of

gate-source voltage

DS on

(mΩ)

246810

003aa c772

(V)

Fig 7. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

Fig 6. Output characteristics: drain cur re nt as a

function of drain-source voltage; typical values

160

gfs (S)

120

0 30 60 90 120

003aa c774

(A)

Fig 8. Forward transconductance as a function of

drain current; typical values.

Product data sheet Rev. 02 — 6 May 2009 6 of 12

Page 7

NXP Semiconductors

BUK9620-100B

N-channel TrenchMOS logic level FET

120

(A)

01234

Tj = 150 °C

003aa c776

25 °C

(V)

Fig 9. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

003aa c773

VGS (V) =

4.5

DS on

(mΩ)

2.7 3.22.5 3 3.4

2.5

GS(th)

(V)

1.5

0.5

-60 0 60 120 180

max

typ

min

03aa33

(°C)

Fig 10. G ate-source threshold voltage as a function of

junction temperature

03aa29

0 30 60 90 120 150

(A)

Fig 11. Drain-source on-state resistance as a function

of drain current; typical values.

-60 0 60 120 180 T

(°C)

Fig 12. Normalized drain-so urce on-state resistance

factor as a function of junction temperature

Product data sheet Rev. 02 — 6 May 2009 7 of 12

Page 8

NXP Semiconductors

003aaa508

BUK9620-100B

N-channel TrenchMOS logic level FET

120

003aa c778

(A)

150 °C

Tj = 25 °C

00.511.52 (V)

Fig 13. Source current as a function of source drain

voltage; typical values.

Tj = 25

(V)

003aa c777

GS(pl)

GS(th)

GS1QGS2

G(tot)

Fig 14. Gate charge waveform definitions

(pF)

003aa c775

is s

VDS = 14V

VDS = 80V

0 204060

(nC )

Fig 15. G ate-source voltage as a function of turn-on

gate charge; typical values.

oss

rs s

-1

1 10 10

VDS (V)

Fig 16. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical values

Product data sheet Rev. 02 — 6 May 2009 8 of 12

Page 9

NXP Semiconductors

7. Package outline

BUK9620-100B

N-channel TrenchMOS logic level FET

Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)

mounting

base

SOT40

e e

DIMENSIONS (mm are the original dimensions)

0.64

0.46

max.

UNIT

4.50

4.10

OUTLINE

VERSION

SOT404

1.40

1.27

0.85

0.60

IEC JEDEC JEITA

Fig 17. Package outline SOT404 (D2PAK)

1.60

10.30

1.20

9.70

REFERENCES

0 2.5 5 mm

scale

eLpH

2.90

2.54

2.10

15.80

14.80

2.60

2.20

EUROPEAN

PROJECTION

ISSUE DATE

05-02-11 06-03-16

Product data sheet Rev. 02 — 6 May 2009 9 of 12

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NXP Semiconductors

8. Revision history

BUK9620-100B

N-channel TrenchMOS logic level FET

Table 7. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BUK9620-100B_2 20090506 Product data sheet - BUK9620-100B_1 Modifications: BUK9620-100B_1 20090323 Objective data sheet - -

• Data sheet status changed from 'Objective' to 'Product'.

Product data sheet Rev. 02 — 6 May 2009 10 of 12

Page 11

NXP Semiconductors

BUK9620-100B

N-channel TrenchMOS logic level FET

9. Legal information

9.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com

[1][2]

Product status

[3]

Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full dat a sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

9.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

, including those pertaining to warranty,

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

TrenchMOS — is a trademark of NXP B.V.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]

Product data sheet Rev. 02 — 6 May 2009 11 of 12

Page 12

NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2

5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10

9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .11

9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11

9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .11

9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .11

10 Contact information. . . . . . . . . . . . . . . . . . . . . .11

BUK9620-100B

N-channel TrenchMOS logic level FET

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]

Document identifier: BUK9620-100B_2

Date of release: 6 May 2009