Philips buk9529-100b_buk9629-100b Datasheet

1. Product proﬁle

b

1.1 Description

1.2 Features

BUK95/9629-100B

TrenchMOS™ logic level FET

Rev. 01 — 18 April 2003 Product data

N-channel enhancement mode ﬁeld-effect powertransistorina plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology.

Product availability:

BUK9529-100B in SOT78 (TO-220AB) BUK9629-100B in SOT404 (D2-PAK).

■ Very low on-state resistance ■ Q101 compliant

■ 175 °C rated ■ Logic level compatible.

1.3 Applications

■ Automotive systems ■ 12 V, 24 V and 42 V loads

■ Motors, lamps and solenoids ■ General purpose power switching.

1.4 Quick reference data

■ E

DS(AL)S

■ ID≤ 46 A ■ P

≤ 152 mJ ■ R

=24mΩ (typ)

DSon

≤ 157 W.

tot

2. Pinning information

Table 1: Pinning - SOT78 and SOT404, simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g) 2 drain (d) 3 source (s) mb mounting base;

connected to drain (d)

[1] It is not possible to make connection to pin 2 of the SOT404 package.

[1]

m

MBK106

12

3

SOT78 (TO-220AB)

mb

2

13

SOT404 (D

2

-PAK)

MBK116

g

MBB076

d

s

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

3. Limiting values

Table 2: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

DR

I

DRM

Avalanche ruggedness

E

DS(AL)S

drain-source voltage (DC) - 100 V drain-gate voltage (DC) RGS=20kΩ - 100 V gate-source voltage (DC) - ±15 V drain current (DC) Tmb=25°C; VGS=5V;

-46A

Figure 2 and 3

T

= 100 °C; VGS=5V;Figure 2 -32A

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs;

- 186 A

Figure 3

total power dissipation Tmb=25°C; Figure 1 - 157 W storage temperature −55 +175 °C junction temperature −55 +175 °C

reverse drain current (DC) Tmb=25°C - 46 A peak reverse drain current Tmb=25°C; pulsed; tp≤ 10 µs - 186 A

non-repetitive drain-source avalanche energy

unclamped inductive load; ID=46A;

≤ 100 V; VGS=5V; RGS=50Ω;

V

DS

starting T

mb

=25°C

- 152 mJ

9397 750 11249

Product data Rev. 01 — 18 April 2003 2 of 15

Philips Semiconductors

03na19

0

40

80

120

0 50 100 150 200

P

der

(%)

BUK95/9629-100B

TrenchMOS™ logic level FET

T

(°C)

mb

P

tot

P

der

-----------------------

P

tot 25 C°()

100%×=

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

3

10

60

I

D

(A)

40

20

0

0 50 100 150 200

03nm56

Tmb (°C)

VGS≥ 5V

Fig 2. Continuous drain current as a function of

mounting base temperature.

03nm54

I

D

(A)

Limit R

2

10

1

1 10 10

DSon

= VDS / I

D

tp = 10 µs

100 µs

DC

2

1 ms

10 ms 100 ms

VDS (V)

10

3

Tmb=25°C; IDM single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 11249

Product data Rev. 01 — 18 April 2003 3 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

4. Thermal characteristics

Table 3: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-mb)

R

th(j-a)

thermal resistance from junction to mounting base

thermal resistance from junction to ambient

SOT78 (TO-220AB) vertical in still air - 60 - K/W

2

SOT404 (D

-PAK) minimum footprint; mounted on a PCB - 50 - K/W

4.1 Transient thermal impedance

Figure 4 - - 0.95 K/W

1

Z

th(j-mb)

(K/W)

10

-1

-2

-3

0.1

0.05

-6

10

δ = 0.5

0.2

0.02

single sh ot

P

-5

10

-4

10

-3

10

-2

10

-1

10

03nm55

δ =

t

p

T

tp (s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

t

p

T

t

1

9397 750 11249

Product data Rev. 01 — 18 April 2003 4 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

5. Characteristics

Table 4: Characteristics

Tj=25°C unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

drain-source breakdown voltage

V

I

DSS

I

GSS

R

GS(th)

DSon

gate-source threshold voltage ID= 1 mA; VDS=VGS;

drain-source leakage current VDS= 100 V; VGS=0V

gate-source leakage current VGS= ±15 V; VDS= 0 V - 2 100 nA drain-source on-state

resistance

Dynamic characteristics

Q Q Q C C C t

d(on)

t

r

t

d(off)

t

f

L

d

L

s

g(tot) gs

gd iss oss rss

total gate charge VGS=5V; VDD=80V; gate-source charge - 7 - nC gate-drain (Miller) charge - 13 - nC input capacitance VGS=0V; VDS=25V; output capacitance - 236 283 pF reverse transfer capacitance - 103 141 pF turn-on delay time VDD= 30 V; RL= 1.2 Ω; rise time - 86 - ns turn-off delay time - 96 - ns fall time - 46 - ns internal drain inductance from drain lead 6 mm from

internal source inductance from source lead 6 mm from

ID= 0.25 mA; VGS=0V

=25°C 100 - - V

T

j

= −55 °C89--V

T

j

Figure 9

=25°C 1.1 1.5 2 V

T

j

= 175 °C 0.5 - - V

T

j

= −55 °C - - 2.3 V

T

j

=25°C - 0.02 1 µA

T

j

= 175 °C - - 500 µA

T

j

VGS=5V; ID=25A;

Figure 7 and 8

=25°C - 24 29 mΩ

T

j

= 175 °C--75mΩ

T

j

= 4.5 V; ID=25A - - 32 mΩ

V

GS

=10V; ID=25A - 22 27 mΩ

V

GS

-33-nC

=25A;Figure 14

I

D

- 3270 4360 pF

f = 1 MHz; Figure 12

-30-ns

=5V; RG=10Ω

V

GS

- 4.5 - nH

package to centre of die from contact screw on

- 3.5 - nH mounting base to centre of die SOT78

from upper edge of drain

- 2.5 - nH mounting base to centre of die SOT404

- 7.5 - nH package to source bond pad

9397 750 11249

Product data Rev. 01 — 18 April 2003 5 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

Table 4: Characteristics

…continued

Tj=25°C unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Source-drain diode

V

SD

source-drain (diode forward) voltage

t

rr

Q

r

reverse recovery time IS=20A;dIS/dt = −100 A/µs recovered charge - 196 - nC

IS= 25 A; VGS=0V;

Figure 15

= −10 V; VDS=30V

V

GS

- 0.85 1.2 V

- 114 - ns

9397 750 11249

Product data Rev. 01 — 18 April 2003 6 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

150

Label is VGS (V)

I

D

(A)

100

50

0

0246810

10

5

03nm51

4

3.8

3.6

3.4

3.2 3

2.8

2.6

VDS (V)

Tj=25°C; tp= 300 µsT

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

03nm52

543.83.63.43.23

R

DSon

60

(mΩ)

50

40

R

DSon

(mΩ)

35

30

25

20

0 5 10 15

=25°C; ID=25A

j

Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

2.5

a

2

03nm50

VGS (V)

03ng41

40

30

Label is VGS (V)

20

0 40 80 120

10

ID (A)

Tj=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

1.5

1

0.5

0

-60 0 60 120 180

R

DSon

=

a

---------------------------- -

R

DSon 25 C°()

Tj (°C)

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

9397 750 11249

Product data Rev. 01 — 18 April 2003 7 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

2.5

V

GS(th)

(V)

2.0

1.5

1.0

0.5

0.0

-60 0 60 120 180

ID= 1 mA; VDS=V

GS

max

typ

min

03ng52

Tj (ºC)

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

03nm48

g (S)

80

fs

60

-1

10

I

D

(A)

-2

10

-3

10

-4

10

-5

10

-6

10

0 0.5 1 1.5 2 2.5 3

Tj=25°C; VDS=V

GS

03ng53

maxtypmin

VGS (V)

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

6000

C

(pF)

4000

C

iss

03nm53

40

C

oss

2000

20

0

0 25 50 75 100

ID (A)

0

-2

10

C

rss

-1

10

1 10 10

VDS (V)

2

Tj=25°C; VDS=25V VGS= 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of

drain current; typical values.

Fig 12. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical values.

9397 750 11249

Product data Rev. 01 — 18 April 2003 8 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

100 I

D

(A)

75

50

25

0

012345

Tj = 175

C

°

Tj = 25 °C

03nm49

VGS (V)

5

V

GS

(V)

4

3

2

1

0

0 10203040

VDS=25V Tj=25°C; ID=25A

Fig 13. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

100

I

D

(A)

75

Fig 14. Gate-source voltage as a function of gate

charge; typical values.

03nm47

VDD = 80 VVDD = 14 V

QG (nC)

03nm46

50

25

Tj = 175 °C Tj = 25 °C

0

0.0 0.5 1.0 1.5 VSD (V)

VGS=0V

Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.

9397 750 11249

Product data Rev. 01 — 18 April 2003 9 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

6. Package outline

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78

AE

p

A

1

q

D

1

D

(1)

L

1

b

L

1

L

2

mounting

base

Q

123

b

e

0 5 10 mm

scale

c

DIMENSIONS (mm are the original dimensions)

L

(1)

b

A

4.5

4.1

A

1.39

1.27

1

UNIT

mm

Note

1. Terminals in this zone are not tinned.

OUTLINE VERSION

SOT78 SC-463-lead TO-220AB

b

c

1

1.3

1.0

0.7

0.4

0.9

0.7

IEC JEDEC EIAJ

D

15.8

6.4

15.2

5.9

REFERENCES

e

E

1

10.3

2.54

9.7

L

15.0

13.5

L

3.30

2.79

2

1

max.

3.0

qQ

p

3.8

3.0

3.6

2.7

EUROPEAN

PROJECTION

2.6

2.2

ISSUE DATE

00-09-07 01-02-16

Fig 16. SOT78 (TO-220AB).

9397 750 11249

Product data Rev. 01 — 18 April 2003 10 of 15

Philips Semiconductors

BUK95/9629-100B

TrenchMOS™ logic level FET

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped)

E

D

1

D

H

D

mounting

base

2

A

1

SOT404

A

13

e e

DIMENSIONS (mm are the original dimensions)

0.64

0.46

D

max.

11

UNIT

mm

A

4.50

4.10

OUTLINE

VERSION

SOT404

A

1.40

1.27

b

1

0.85

0.60

IEC JEDEC EIAJ

D

1

1.60

10.30

1.20

9.70

REFERENCES

b

0 2.5 5 mm

scale

E

eLpH

2.90

2.54

2.10

D

15.80

14.80

Qc

2.60

2.20

L

p

c

Q

EUROPEAN

PROJECTION

ISSUE DATE

99-06-25 01-02-12

Fig 17. SOT404 (D2-PAK).

9397 750 11249

Product data Rev. 01 — 18 April 2003 11 of 15

Philips Semiconductors

7. Soldering

BUK95/9629-100B

TrenchMOS™ logic level FET

handbook, full pagewidth

8.15

7.95

4.85

8.35

2.25

4.60

2.15

1.50

0.30

3.00

1.50

10.85

10.60

10.50

7.50

7.40

1.70

8.275

5.40

8.075

0.20

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig 18. Reﬂow soldering footprint for SOT404.

5.08

1.20

1.30

1.55

MSD057

9397 750 11249

Product data Rev. 01 — 18 April 2003 12 of 15

Philips Semiconductors

8. Revision history

Table 5: Revision history

Rev Date CPCN Description

01 20030418 - Product data (9397 750 11249)

BUK95/9629-100B

TrenchMOS™ logic level FET

9397 750 11249

Product data Rev. 01 — 18 April 2003 13 of 15

Philips Semiconductors

9. Data sheet status

BUK95/9629-100B

TrenchMOS™ logic level FET

Level Data sheet status

I Objective data Development This data sheet contains data from the objective speciﬁcation for product development. Philips

II Preliminary data Qualiﬁcation This data sheetcontainsdata from the preliminary speciﬁcation. Supplementary data will be published

III Product data Production This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

[1]

Product status

10. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation.

[2][3]

Deﬁnition

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in order to improve the design and supply the best possible product.

right to make changes at any time in order to improve the design, manufacturing and supply.Relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, andmakes no representations or warrantiesthat these products are free from patent, copyright,or mask work right infringement, unless otherwise speciﬁed.

12. Trademarks

11. Disclaimers

TrenchMOS —is a trademark of Koninklijke Philips Electronics N.V.

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors

Contact information

For additional information, please visit http://www.semiconductors.philips.com. For sales ofﬁce addresses, send e-mail to: [email protected]. Fax: +31 40 27 24825

9397 750 11249

Product data Rev. 01 — 18 April 2003 14 of 15

Philips Semiconductors

Contents

1 Product proﬁle . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

4 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

4.1 Transient thermal impedance . . . . . . . . . . . . . . 4

5 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

7 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13

9 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 14

10 Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

BUK95/9629-100B

TrenchMOS™ logic level FET

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Date of release: 18 April 2003 Document order number: 9397 750 11249