Philips buk9245 Datasheet

Page 1
M3D300

1. Description

2. Features

BUK9245-55A
TrenchMOS™ logic level FET
Rev. 01 — 11 October 2001 Product data
N-channel enhancement mode field-effect powertransistorina plastic package using TrenchMOS™1 technology, featuring very low on-state resistance.
Product availability:
BUK9245-55A in SOT428 (D-PAK).
■ TrenchMOS™ technology
■ Q101 compliant
■ 175 °C rated
■ Logic level compatible.

3. Applications

■ Automotive and general purpose power switching:
◆ 12 V and 24 V loads
◆ Motors, lamps and solenoids.

4. Pinning information

Table 1: Pinning - SOT428 (D-PAK), simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g) 2 drain (d) 3 source (s) mb mounting base;
connected to drain (d)
mb
2
13
Top view
SOT428 (D-PAK)
MBK091
g
MBB076
d
s
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Page 2
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET

5. Quick reference data

Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
V I
D
P T R
DS
tot j DSon
drain-source voltage (DC) − 55 V drain current (DC) Tmb=25°C; VGS=5V − 28 A total power dissipation Tmb=25°C − 70 W junction temperature − 175 °C drain-source on-state resistance Tj=25°C; VGS=5V; ID= 5 A 31 45 mΩ
=25°C; VGS= 4.5 V; ID= 5 A − 50 mΩ
T
j
=25°C; VGS= 10 V; ID= 5 A 27 40 mΩ
T
j

6. Limiting values

Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
DR
I
DRM
Avalanche ruggedness
W
DSS
drain-source voltage (DC) − 55 V drain-gate voltage (DC) RGS=20kΩ−55 V gate-source voltage (DC) −±15 V drain current (DC) Tmb=25°C; VGS=5V;
− 28 A
Figure 2 and 3
T
= 100 °C; VGS=5V;Figure 2 − 20 A
mb
peak drain current Tmb=25°C; pulsed; tp≤ 10 µs;
− 112 A
Figure 3
total power dissipation Tmb=25°C; Figure 1 − 70 W storage temperature −55 +175 °C operating junction temperature −55 +175 °C
reverse drain current (DC) Tmb=25°C − 28 A pulsed reverse drain current Tmb=25°C; pulsed; tp≤ 10 µs − 112 A
non-repetitive avalanche energy unclamped inductive load; ID=28A;
≤ 55 V; VGS=5V; RGS=50Ω;
V
DS
starting T
=25°C
j
− 62 mJ
9397 750 08559
Product data Rev. 01 — 11 October 2001 2 of 12
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 3
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET
120
P
der
(%)
80
40
0
0 50 100 150 200
P
tot
P
der
-----------------------
P
tot 25 C°()
100%×=
03aa16
T
(oC)
mb
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
30
I
D
(A)
25
20
15
10
5
0
25 50 75 100 125 150 175 200
03ng00
Tj (ºC)
VGS≥ 4.5 V
I
D
°
()
100%×=
I
-------------------
der
I
D25C
Fig 2. Continuous drain current as a function of
mounting base temperature.
3
10
I
D
(A)
2
10
10
1
1 10 10
R
DSon
= V
DS
/ I
D
DC
VDS (V)
03nf98
tp = 10 µs
100 µs
1 ms
10 ms 100 ms
2
Tmb=25°C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 08559
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data Rev. 01 — 11 October 2001 3 of 12
Page 4
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET

7. Thermal characteristics

Table 4: Thermal characteristics
Symbol Parameter Conditions Value Unit
R
th(j-a)
R
th(j-mb)
thermal resistance from junction to ambient 71.4 K/W thermal resistance from junction to mounting
Figure 4 2.1 K/W
base

7.1 Transient thermal impedance

T
tp (s)
δ =
03nf99
t
p
T
t
1
10
Z
th(j-mb)
(K/W)
1
10
10
δ = 0.5
0.2
0.1
0.05
-1
0.02
Single Shot
-2
-6
10
-5
10
-4
10
-3
10
-2
10
P
t
p
-1
10
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 08559
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data Rev. 01 — 11 October 2001 4 of 12
Page 5
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET

8. Characteristics

Table 5: Characteristics
Tj=25°C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
V
I
DSS
I
GSS
R
GS(th)
DSon
gate-source threshold voltage ID= 1 mA; VDS=VGS;
drain-source leakage current VDS= 55 V; VGS=0V
gate-source leakage current VGS= ±10 V; VDS=0V − 2 100 nA drain-source on-state
resistance
Dynamic characteristics
Q Q Q C C C t
d(on)
t
r
t
d(off)
t
f
L
d
L
s
g(tot) gs
gd iss oss rss
total gate charge VGS=5V;VDD=44V; gate-to-source charge − 1.6 − nC gate-to-drain (Miller) charge − 6.3 − nC input capacitance VGS=0V; VDS=25V; output capacitance − 140 166 pF reverse transfer capacitance − 97 132 pF turn-on delay time VDD= 30 V; RL= 1.2 Ω; rise time − 132 − ns turn-off delay time − 38 − ns fall time − 112 − ns internal drain inductance measured from drain to
internal source inductance measured from source lead
ID= 0.25 mA; VGS=0V
=25°C55−−V
T
j
= −55 °C50−−V
T
j
Figure 9
=25°C 1 1.5 2 V
T
j
= 175 °C 0.5 −−V
T
j
= −55 °C −−2.3 V
T
j
=25°C − 0.05 10 µA
T
j
= 175 °C −−500 µA
T
j
VGS=5V; ID=5A;
Figure 7 and 8
=25°C − 31 45 mΩ
T
j
= 175 °C −−90 mΩ
T
j
= 4.5 V; ID=5A −−50 mΩ
V
GS
=10V; ID= 5 A − 27 40 mΩ
V
GS
− 14 − nC
=5A;Figure 14
I
D
− 750 1006 pF
f = 1 MHz; Figure 12
− 10 − ns
=5V; RG=10Ω
V
GS
− 2.5 − nH
centre of die
− 7.5 − nH
to source bond pad
9397 750 08559
Product data Rev. 01 — 11 October 2001 5 of 12
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 6
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET
Table 5: Characteristics
…continued
Tj=25°C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Source-drain diode
V
SD
source-drain (diode forward) voltage
t
rr
Q
r
reverse recovery time IS=20A;dIS/dt = −100 A/µs recovered charge − 53 − nC
80
I
D
(A)
60
40
20
0
0246810
8
6
VGS (V) = 10
IS= 8 A; VGS=0V;
Figure 15
= −10 V; VDS=30V
V
GS
03nf95
5
4
3
2.2
VDS (V)
− 0.85 1.2 V
− 50 − ns
45
R
DSon
(mΩ)
40
35
30
25
3691215
03nf94
VGS (V)
Tj=25°CT
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
100
R
VGS (V) = 3
DSon
(mΩ)
80
60
40
20
0
0 20406080
3.4
3.8 4 5
Tj=25°C
03nf96
ID (A)
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
=25°C; ID=5A
j
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
2
a
1.5
1
0.5
0
-60 0 60 120 180
R
DSon
=
a
---------------------------- -
R
DSon 25 C°()
03ne89
Tj (ºC)
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 08559
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data Rev. 01 — 11 October 2001 6 of 12
Page 7
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET
2.5
V
GS(th)
(V)
2
1.5
1
0.5
0
-60 0 60 120 180
ID= 1 mA; VDS=V
max
typ
min
GS
03aa33
T
(oC)
j
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
20
g
fs
(S)
15
10
5
0
0 5 10 15 20 25
03nf92
ID (A)
-1
10
I
D
(A)
-2
10
-3
10
-4
10
-5
10
-6
10
0 0.5 1 1.5 2 2.5 3
Tj=25°C; VDS=V
GS
03aa36
maxtypmin
(V)
V
GS
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
C
2100
(pF)
1800
1500
1200
900
600
300
C
iss
C
oss
C
0
10
-2
10
-1
rss
1 10 10
03nf97
VDS (V)
2
Tj=25°C; VDS=25V VGS= 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical values.
9397 750 08559
Product data Rev. 01 — 11 October 2001 7 of 12
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 8
Philips Semiconductors
BUK9245-55A
TrenchMOS™ logic level FET
20
I
D
(A)
15
10
5
Tj = 175 ºC Tj = 25 ºC
0
01234
03nf93
VGS (V)
5
V
GS
(V)
4
3
2
1
0
VDS=25V Tj=25°C; ID=5A
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
20
I
S
(A)
15
Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values.
03nf91
VDD = 14 V
VDD = 44 V
03691215
03nf90
QG (nC)
10
5
Tj = 175 ºC
0
0.0 0.2 0.4 0.6 0.8 1.0
Tj = 25 ºC
VSD (V)
VGS=0V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
9397 750 08559
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data Rev. 01 — 11 October 2001 8 of 12
Page 9
Philips Semiconductors

9. Package outline

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped)
seating plane
y
A
E
b
2
A
mounting
base
A
2
A
1
E
1
BUK9245-55A
TrenchMOS™ logic level FET
SOT428
D
1
D
H
E
L
2
2
L
13
b
1
e
e
1
DIMENSIONS (mm are the original dimensions)
A
(1)
A
UNIT
mm
Note
1. Measured from heatsink back to lead.
A
1
max.
0.65
2.38
0.45
2.22
OUTLINE VERSION
SOT428 TO-252 SC-63
b
2
0.89
0.89
0.71
0.71
IEC JEDEC EIAJ
bc
b
1
max.
1.1
0.9
b
5.36
5.26
2
wAM
D
c
max.
0.4
6.22
0.2
5.98
REFERENCES
L
1
0 10 20 mm
scale
E
max.
6.73
6.47
E
min.
4.0
1
D
max.
4.81
4.45
1
ee
4.57
2.285
H
E
1
max.
10.4
9.6
L
1
L
min.
2.95
0.5
2.55
EUROPEAN
PROJECTION
L
0.7
0.5
2
w
max.
0.2 0.2
ISSUE DATE
98-04-07 99-09-13
y
Fig 16. SOT428 (D-PAK).
9397 750 08559
Product data Rev. 01 — 11 October 2001 9 of 12
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 10
Philips Semiconductors

10. Revision history

Table 6: Revision history
Rev Date CPCN Description
01 20011011 - Product data; initial version.
BUK9245-55A
TrenchMOS™ logic level FET
9397 750 08559
Product data Rev. 01 — 11 October 2001 10 of 12
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 11
Philips Semiconductors
Philips Semiconductors

11. Data sheet status

BUK9245-55A
BUK9245-55A
TrenchMOS™ logic level FET
TrenchMOS™ logic level FET
Data sheet status
Objective data Development Thisdatasheet contains data from the objectivespecificationfor product development.Philips Semiconductors
Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a
Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[1]
Product status
12. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
[2]
Definition
reserves the right to change the specification in any manner without notice.
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.

13. Disclaimers

Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, andmakes no representations or warrantiesthat these products are free from patent, copyright,or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: [email protected]. Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
9397 750 08559
9397 750 08559
Product data Rev. 01 — 11 October 2001 11 of 12
Product data Rev. 01 — 11 October 2001 11 of 12
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 12
Philips Semiconductors
Contents
1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
5 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7.1 Transient thermal impedance . . . . . . . . . . . . . . 4
8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
13 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
BUK9245-55A
TrenchMOS™ logic level FET
© Koninklijke Philips Electronics N.V. 2001. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Date of release: 11 October 2001 Document order number: 9397 750 08559
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