Philips buk9213-30a Datasheet

M3D300

1. Description

2. Features

BUK9213-30A

TrenchMOS™ logic level FET

Rev. 01 — 29 July 2002 Product data

N-channel enhancement mode ﬁeld-effect powertransistorina plastic package using TrenchMOS™ technology, featuring very low on-state resistance.

Product availability:

BUK9213-30A in SOT428 (D-PAK).

■ TrenchMOS™ technology

■ Q101 compliant

■ 175 °C rated

■ Logic level compatible.

3. Applications

■ Automotive and general purpose power switching:

◆ 12 V loads

◆ Motors, lamps and solenoids.

4. Pinning information

Table 1: Pinning - SOT428 (D-PAK), simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g) 2 drain (d) 3 source (s) mb mounting base;

connected to drain (d)

mb

2

13

Top view

SOT428 (D-PAK)

MBK091

g

MBB076

d

s

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

5. Quick reference data

Table 2: Quick reference data

Symbol Parameter Conditions Typ Max Unit

V I

D

P T R

DS

tot j DSon

drain-source voltage (DC) - 30 V drain current (DC) Tmb=25°C; VGS=5V

[1]

-75A total power dissipation Tmb=25°C - 150 W junction temperature - 175 °C drain-source on-state resistance Tj=25°C; VGS=5V; ID= 25 A 11 13 mΩ

=25°C; VGS= 4.5 V; ID= 25 A - 14.4 mΩ

T

j

=25°C; VGS= 10 V; ID= 25 A 9 11 mΩ

T

j

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

DR

I

DRM

Avalanche ruggedness

E

DS(AL)S

drain-source voltage (DC) - 30 V drain-gate voltage (DC) RGS=20kΩ -30V gate-source voltage (DC) - ±15 V drain current (DC) Tmb=25°C; VGS=5V;

Figure 2 and 3

= 100 °C; VGS=5V;Figure 2

T

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs;

[1]

-75A

[2]

-55A

[1]

-54A

- 311 A

Figure 3

total power dissipation Tmb=25°C; Figure 1 - 150 W storage temperature −55 +175 °C junction temperature −55 +175 °C

reverse drain current (DC) Tmb=25°C

[1]

-75A

[2]

-55A

peak reverse drain current Tmb=25°C; pulsed; tp≤ 10 µs - 311 A

non-repetitive drain-source avalanche energy

unclamped inductive load; ID=55A;

≤ 30 V; VGS=5V; RGS=50Ω;

V

DS

starting T

=25°C

j

- 467 mJ

[1] Current is limited by power dissipation chip rating [2] Continuous current is limited by bondwires.

9397 750 09965

Product data Rev. 01 — 29 July 2002 2 of 13

Philips Semiconductors

03na19

0

40

80

120

0 50 100 150 200

P

der

(%)

BUK9213-30A

TrenchMOS™ logic level FET

T

(°C)

mb

P

der

tot

----------------------

P

tot 25 C°()

100%×=

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

3

10

I

D

(A)

Limit R

DSon

= VDS/I

D

100

I

D

(A)

75

50

25

0

0 50 100 150 200

capped at 55 A due to bondwires

03nf64

Tmb (°C)

VGS≥ 4.5 V

Fig 2. Continuous drain current as a function of

mounting base temperature.

03nf62

tp = 10 µs

2

10

capped at 55 A due to bondwires

10

1

-1

10

1 10 10

DC

VDS (V)

100 µs

1 ms

10 ms 100 ms

2

Tmb=25°C; IDM is single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 09965

Product data Rev. 01 — 29 July 2002 3 of 13

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

7. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-a)

R

th(j-mb)

thermal resistance from junction to ambient - 71.4 - K/W thermal resistance from junction to mounting

Figure 4 - 0.56 1.0 K/W

base

7.1 Transient thermal impedance

1

Z

th(j-mb)

(K/W)

10

-1

-2

-3 10

δ = 0.5

0.2

0.1

0.05

0.02

single shot

-6

10

P

-5

10

-4

10

-3

10

-2

10

-1

03nf63

δ =

t

p

T

tp (s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

t

p

T

t

1

9397 750 09965

Product data Rev. 01 — 29 July 2002 4 of 13

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

8. Characteristics

Table 5: Characteristics

Tj=25°C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

drain-source breakdown voltage

V

I

DSS

I

GSS

R

GS(th)

DSon

gate-source threshold voltage ID= 1 mA; VDS=VGS;

drain-source leakage current VDS= 30 V; VGS=0V

gate-source leakage current VGS= ±10 V; VDS= 0 V - 2 100 nA drain-source on-state

resistance

Dynamic characteristics

Q Q Q C C C t

d(on)

t

r

t

d(off)

t

f

L

d

L

s

g(tot) gs

gd iss oss rss

total gate charge VGS=5V;VDD=24V; gate-to-source charge - 7 - nC gate-to-drain (Miller) charge - 18 - nC input capacitance VGS=0V; VDS=25V; output capacitance - 550 660 pF reverse transfer capacitance - 334 457 pF turn-on delay time VDD= 20 V; RL= 2.7 Ω; rise time - 202 - ns turn-off delay time - 134 - ns fall time - 158 - ns internal drain inductance measured from drain to

internal source inductance measured from source lead

ID= 0.25 mA; VGS=0V

=25°C30--V

T

j

= −55 °C27--V

T

j

Figure 9

=25°C 1 1.5 2 V

T

j

= 175 °C 0.5 - - V

T

j

= −55 °C - - 2.3 V

T

j

=25°C - 0.05 10 µA

T

j

= 175 °C - - 500 µA

T

j

VGS=5V; ID=25A;

Figure 7 and 8

=25°C - 11 13 mΩ

T

j

= 175 °C--24mΩ

T

j

= 4.5 V; ID= 25 A; - - 14.4 mΩ

V

GS

=10V; ID= 25 A; - 9 11 mΩ

V

GS

-37-nC

=25A;Figure 14

I

D

- 2140 2852 pF

f = 1 MHz; Figure 12

-26-ns

=5V; RG=10Ω;

V

GS

- 2.5 - nH

centre of die

- 7.5 - nH

to source bond pad

9397 750 09965

Product data Rev. 01 — 29 July 2002 5 of 13

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

Table 5: Characteristics

…continued

Tj=25°C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Source-drain diode

V

SD

source-drain (diode forward) voltage

t

rr

Q

r

reverse recovery time IS=20A;dIS/dt = −100 A/µs recovered charge - 24 - nC

IS= 15 A; VGS=0V;

Figure 15

= −10 V; VDS=20V

V

GS

- 0.85 1.2 V

-55-ns

9397 750 09965

Product data Rev. 01 — 29 July 2002 6 of 13

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

03nj73

VDS (V)

03nj74

16

R

DSon (mΩ)

14

12

10

8

6

0 5 10 15

=25°C; ID=25A

j

Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

2

a

1.5

I

D

(A)

300

200

100

10 9

8

0

0246810

7

6

5

4.8

4.6

4.4

4.2 4

3.8

3.6

3.4

3.2 3

2.8

2.6

2.4

label is VGS (V)

Tj=25°C; tp= 300 µsT

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

R

DSon (mΩ)

30

25

label is VGS (V)3 3.2 3.4 3.6 3.8

4

5

03nj72

VGS (V)

03aa27

20

15

10

5

0 100 200 300

10

ID (A)

Tj=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

1

0.5

0

-60 0 60 120 180

R

a

DSon

=

----------------------------

R

DSon 25 C°()

Tj (°C)

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

9397 750 09965

Product data Rev. 01 — 29 July 2002 7 of 13

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

2.5

V

GS(th)

(V)

2

1.5

1

0.5

0

-60 0 60 120 180

ID= 1 mA; VDS=V

GS

max

typ

min

03aa33

Tj (°C)

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

03nj70

g

(S)

60

fs

40

-1

10

I

D

(A)

-2

10

-3

10

-4

10

-5

10

-6

10

0123

Tj=25°C; VDS=V

GS

03aa36

maxtypmin

VGS (V)

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

5000

C (pF)

3750

C

iss

C

oss

03nj75

20

0

0 204060

ID (A)

2500

1250

C

rss

0

10

-1

1 10 10

VDS (V)

2

Tj=25°C; VDS=25V VGS= 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of

drain current; typical values.

Fig 12. Input,output and reverse transfer capacitances

as a function of drain-source voltage; typical values.

9397 750 09965

Product data Rev. 01 — 29 July 2002 8 of 13

Philips Semiconductors

BUK9213-30A

TrenchMOS™ logic level FET

100

I

D

(A)

75

50

25

Tj = 175 °C

0

012345

Tj = 25 °C

03nj71

VGS (V)

5

V

GS

(V)

4

3

2

1

0

0 10203040

VDS=25V Tj=25°C; ID=25A

Fig 13. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

100

I

S

(A)

75

Fig 14. Gate-source voltage as a function of turn-on

gate charge; typical values.

03nj69

VDD = 14 V

VDD = 24 V

QG (nC)

03nj68

50

25

0

0.0 0.5 1.0 1.5

Tj = 175 °C Tj = 25 °C

VSD (V)

VGS=0V

Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.

9397 750 09965

Product data Rev. 01 — 29 July 2002 9 of 13

Philips Semiconductors

9. Package outline

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped)

seating plane

y

A

E

b

2

A

mounting

base

A

2

A

1

BUK9213-30A

TrenchMOS™ logic level FET

SOT428

E

1

D

H

E

L

2

L

13

b

1

e

1

DIMENSIONS (mm are the original dimensions)

(1)

A

UNIT

mm

Note

1. Measured from heatsink back to lead.

OUTLINE VERSION

SOT428 TO-252 SC-63

2.38

2.22

1

0.65

0.45

b

2

0.89

0.93

0.71

0.73

IEC JEDEC JEITA

bc

b

1

1.1

0.9

b

5.46

5.26

wAM

D

c

2

0.4

6.22

0.2

5.98

REFERENCES

D

1

L

1

0 10 20 mm

scale

D

1

min.

4.0

E

EH

6.73

6.47

4.81

4.45

1

2.285

ee

1

4.57

10.4

9.6

E

2.95

2.55

L

1

L

min.

0.5

EUROPEAN

PROJECTION

L

0.9

0.5

2

y

w

max.

0.2 0.2

ISSUE DATE

99-09-13 01-12-11

Fig 16. SOT428 (D-PAK).

9397 750 09965

Product data Rev. 01 — 29 July 2002 10 of 13

Philips Semiconductors

10. Revision history

Table 6: Revision history

Rev Date CPCN Description

01 20020729 - Product data, initial version.

BUK9213-30A

TrenchMOS™ logic level FET

9397 750 09965

Product data Rev. 01 — 29 July 2002 11 of 13

Philips Semiconductors

11. Data sheet status

BUK9213-30A

TrenchMOS™ logic level FET

Data sheet status

Objective data Development This data sheet contains data fromthe objective speciﬁcation forproduct development. Philips Semiconductors

Preliminary data Qualiﬁcation This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published at a

Product data Production This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the right to

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[1]

Product status

12. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation.

[2]

Deﬁnition

reserves the right to change the speciﬁcation in any manner without notice.

later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in order to improve the design and supply the best possible product.

make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notiﬁcation (CPCN) procedure SNW-SQ-650A.

13. Disclaimers

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes norepresentationsor warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speciﬁed.

14. Trademarks

TrenchMOS —is a trademark of Koninklijke Philips Electronics N.V.

Contact information

For additional information, please visit http://www.semiconductors.philips.com. For sales ofﬁce addresses, send e-mail to: [email protected]. Fax: +31 40 27 24825

9397 750 09965

Product data Rev. 01 — 29 July 2002 12 of 13

Philips Semiconductors

Contents

1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

5 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

7 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

7.1 Transient thermal impedance . . . . . . . . . . . . . . 4

8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12

12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

13 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

BUK9213-30A

TrenchMOS™ logic level FET

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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Date of release: 29 July 2002 Document order number: 9397 750 09965