Philips buk7y13-40b Datasheet

Page 1
BUK7Y13-40B
N-channel TrenchMOS standard level FET
Rev. 03 — 26 May 2008 Product data sheet

1. Product profile

1.1 General description

Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.

1.2 Features and benefits

175 °C rated Q101 compliantSuitable for standard level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
12 V loads Air bagAutomotive ABS systems Automotive transmission controlFuel pump and injection Motors, lamps and solenoids

1.4 Quick reference data

Table 1. Quick reference
Symbol Parameter Conditions Min Typ Max Unit
V
DS
I
D
P
tot
Dynamic characteristics
Q
GD
Static characteristics
R
DSon
Avalanche ruggedness
E
DS(AL)S
drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C --40V drain current VGS=10V; Tmb=25°C;
see Figure 1 and 4
total power dissipation Tmb=25°C; see Figure 2 --85W
gate-drain charge ID=10A; VDS=32V;
VGS= 10 V; see Figure 14
drain-source on-state resistance
non-repetitive drain-source avalanche energy
VGS=10V; ID=25A;
=25°C; see Figure 13 and
T
j
12
ID=58A; V RGS=50Ω; VGS=10V;
=25°C; unclamped
T
j(init)
sup
≤ 40 V;
--58A
-5-nC
-1113mΩ
--85mJ
Page 2
NXP Semiconductors
m

2. Pinning information

BUK7Y13-40B
N-channel TrenchMOS standard level FET
Table 2. Pinning
Pin Symbol Description Simplified outline Graphic symbol
1, 2, 3 S source
mb
D
4 G gate mb D mounting base;
connected to drain
1234
G
bb076
S
SOT669 (LFPAK)

3. Ordering information

Table 3. Ordering information
Type number Package
BUK7Y13-40B LFPAK plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
Name Description Version

4. Limiting values

Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V V V I
I P T T
DS DGR GS
D
DM
tot stg j
drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C-40V drain-gate voltage RGS=20kΩ -40V gate-source voltage 20 20 V drain current Tmb=25°C; VGS= 10 V; see Figure 1 and 4 -58A
peak drain current Tmb=25°C; tp≤ 10 μs; pulsed; see Figure 4 - 234 A total power dissipation Tmb=25°C; see Figure 2 -85W storage temperature -55 175 °C junction temperature -55 175 °C
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source avalanche energy
E
DS(AL)R
repetitive drain-source avalanche energy
Source-drain diode
I
S
I
SM
source current Tmb=25°C-58A peak source current tp≤ 10 μs; pulsed; Tmb=25°C - 234 A
= 175 °C; VGS= 10 V; see Figure 1 -41A
T
mb
ID=58A; V
=10V; T
V
GS
see Figure 3
≤ 40 V; RGS=50Ω;
sup
=25°C; unclamped
j(init)
-85mJ
[1][2]
--J
[3]
[1] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [2] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [3] Refer to application note AN10273 for further information.
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 2 of 12
Page 3
NXP Semiconductors
P
der
=
P
tot
P
tot(25°C
)
× 100 %
60
I
D
(A)
003aab217
BUK7Y13-40B
N-channel TrenchMOS standard level FET
120
P
der
(%)
03na19
40
20
0
0 50 100 150 200
T
(°C)
mb
VGS 10V
Fig 1. Continuous drain current as a function of
mounting base temperature
2
10
I
AL
(A)
10
80
40
0
0 20015050 100
Tmb (°C)
Fig 2. Normalized total power di ss ipation as a
function of mounting base temperature
003aab220
(1)
(2)
1
(3)
-1
10
-3
10
-2
10
-1
10
1 10
(ms)
t
AL
(1) Singleípulse;Tj=25°C. (2) Singleípulse;T
= 150°C.
j
(3) Repetitive.
Fig 3. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche perio d
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 3 of 12
Page 4
NXP Semiconductors
BUK7Y13-40B
N-channel TrenchMOS standard level FET
3
10
(A)
I
D
10
10
10
Limit R
2
1
−1
1 10
DSon
= VDS / I
D
tp = 10 μs
100 μs
DC
10
VDS (V)
1 ms
10 ms
100 ms
Tmb=25°C;IDMis single pulse
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

5. Thermal characteristics

003aab218
2
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance
see Figure 5 --1.8K/W from junction to mounting base
10
Z
th (j-mb )
(K/W)
1
10
10
-1
-2
10
δ = 0.5
0.2
0.1
0.05
0.02
single shot
-6
P
t
-5
10
-4
10
-3
10
-2
10
-1
10
03nm01
t
p
δ =
T
p
T
t
t
1
(s)
p
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 4 of 12
Page 5
NXP Semiconductors

6. Characteristics

BUK7Y13-40B
N-channel TrenchMOS standard level FET
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
drain-source breakdown voltage
gate-source threshold voltage
ID=250μA; VGS=0V;
Tj=25°C
=250μA; VGS=0V;
I
D
=-55°C
T
j
ID=1mA; VDS = VGS; Tj=25°C;
see Figure 10
=1mA; VDS = VGS;
I
D
and 11
40 - - V
36 - - V
234V
--4.4V
Tj=-55°C; see Figure 10
I
DSS
=1mA; VDS = VGS;
I
D
= 175 °C; see Figure 10
T
j
drain leakage current VDS=40V; VGS=0V;
1- - V
--500μA
Tj= 175 °C
=40V; VGS=0V; Tj=25°C - 0.02 1 μA
V
DS
I
GSS
gate leakage current VDS=0V; VGS=20V; Tj=25°C - 2 100 nA
=0V; VGS=-20V;
V
DS
-2100nA
Tj=25°C
R
DSon
drain-source on-state resistance
VGS=10V; ID=25A;
= 175 °C; see Figure 12
T
j
V
=10V; ID=25A; Tj=25°C;
GS
--25mΩ
-1113mΩ
see Figure 13 and 12
Source-drain diode
V
SD
source-drain voltage IS=25A; VGS=25V; Tj=25°C;
-0.851.2V
see Figure 16
t
rr
Q
r
reverse recovery time IS=20A; dIS/dt = 100 A/μs;
=0V; VDS=30V
V
recovered charge - 22 - nC
GS
-41-ns
Dynamic characteristi cs
Q Q Q C C C
G(tot) GS
GD iss oss rss
total gate charge ID=10A; VDS=32V; gate-source charge - 6 - nC
VGS=10V; seeFigure 14
gate-drain charge - 5 - nC input capacitance VGS=0V; VDS=25V; output capacitance - 280 336 pF
f=1MHz; Tj=25°C; see Figure 15
reverse transfer
-19-nC
- 983 1311 pF
- 138 189 pF
capacitance
t
d(on)
t
r
t
d(off)
t
f
turn-on delay time VDS=30V; RL=2.5Ω; rise time - 25 - ns
VGS=10V; R
G(ext)
=10Ω
turn-off delay time - 35 - ns fall time - 27 - ns
-9-ns
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 5 of 12
Page 6
NXP Semiconductors
j
=25°C;ID=25A
j
=25°C;VDS=25V
BUK7Y13-40B
N-channel TrenchMOS standard level FET
003aab394
8
7.5
7
6.5
6
5.5
5
VDS (V)
(A)
I
160
D
120
80
40
0
0108262
9.51020 9
8.5
VGS (V) = 4.5
Tj=25°C
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
003aab400
(A)
50
I
D
40
20
R
DSon
(mΩ)
15
10
5
42016812
003aab395
(V)
V
GS
Fig 7. Drain-source on-state resistance as a function
of gate-source volta ge; typical values
003aab401
g
(S)
70
fs
60
30
20
10
0
0642
Tj = 175 °C
Tj = 25 °C
VGS (V)
VDS=25V
Fig 8. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
50
40
30
5302515 2010
I
(A)
D
Fig 9. Forward transconductance as a function of
drain current; typical values
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 6 of 12
Page 7
NXP Semiconductors
j
=25°C;VDS=V
GS
j
=25°C
BUK7Y13-40B
N-channel TrenchMOS standard level FET
5
V
GS(th)
(V)
4
3
2
1
0
−60 180120060
ID=1mA;VDS=V
GS
max
typ
min
03aa32
Tj (°C)
Fig 10. Gate-source threshold voltage as a function of
junction temperature
2
a
1.5
1
0.5
003aab851
−1
10
I
D
(A)
−2
10
−3
10
−4
10
−5
10
−6
10
0642
min typ max
03aa35
VGS (V)
Fig 11. Sub-threshold drain current as a function of
gate-source volt age
003aab396
10
20
R
DSon
(mΩ)
30
20
10
VGS (V) = 6
78
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 7 of 12
0
−60 180120060
R
DSon
a =
R
DSon(25°C
)
Tj (°C)
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
0
0 16012040 80
ID (A)
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
Page 8
NXP Semiconductors
GS
=0V; f =1MHz
BUK7Y13-40B
N-channel TrenchMOS standard level FET
10
V
GS
(V)
8
6
4
2
0
024168
VDS = 14 V
003aab399
VDS = 32 V
QG (nC)
Tj=25°C;ID=10A
Fig 14. Gate-source voltage as a function of gate
charge; typical values
60
1600
C
(pF)
1200
800
400
C
iss
C
oss
C
rss
0
−1
10
003aab397
2
DS
(V)
10
101
V
Fig 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical values
003aab398
I
s
(A)
40
Tj = 175 °C
20
0
0 1.00.80.4 0.60.2
Tj = 25 °C
VSD (V)
VGS=0V
Fig 16. Source current as a function of source-drain voltage; typical values
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 8 of 12
Page 9
NXP Semiconductors

7. Package outline

Plastic single-ended surface-mounted package (LFPAK); 4 leads
E
b
2
A
A
c
2
BUK7Y13-40B
N-channel TrenchMOS standard level FET
SOT669
2
C
E
1
L
1
D
H
L
2
1
234
e
1/2 e
b
w
mounting
base
M
A
D
1
X
c
A
C
A
1
detail X
b
3
b
4
(A )
3
θ
L
yC
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
D
UNIT
mm
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE VERSION
A
1
0.15
1.20
0.00
1.01
SOT669 MO-235
A
A
3
2
1.10
0.25 4.20 1.27 0.25 0.1
0.95
IEC JEDEC JEITA
b
b
bcA e
2
0.50
4.41
0.35
3.62
3
2.2
2.0
b
4
0.9
0.25
0.7
0.19
REFERENCES
c
0.30
0.24
(1)
D
2
4.10
3.80
1
max
E
5.0
4.8
(1)
(1)
E
1
3.3
3.1
H
L
6.2
0.85
5.8
0.40
EUROPEAN
PROJECTION
L
1.3
0.8
L
wy
2
1
1.3
0.8
ISSUE DATE
04-10-13 06-03-16
θ
8° 0°
Fig 17. Package outline SOT669 (LFPAK)
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 9 of 12
Page 10
NXP Semiconductors
BUK7Y13-40B
N-channel TrenchMOS standard level FET

8. Revision history

Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BUK7Y13-40B_3 20080526 Product data sheet - BUK7Y13-40B_2 Modifications: BUK7Y13-40B_2 20071002 Product data sheet - BUK7Y13-40B_1 BUK7Y13-40B_1 20070924 Product data sheet - -
• Table 5, maximum th ermal resistance value updated
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 10 of 12
Page 11
NXP Semiconductors
BUK7Y13-40B
N-channel TrenchMOS standard level FET

9. Legal information

9.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this docu ment may have changed si nce this docum ent was pub lished and may dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

9.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertain i ng to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.

10. Contact information

For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected]
BUK7Y13-40B_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 26 May 2008 11 of 12
Page 12
NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
10 Contact information. . . . . . . . . . . . . . . . . . . . . 11
11 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
BUK7Y13-40B
N-channel TrenchMOS standard level FET
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 26 May 2008
Document identifier: BUK7Y13-40B_3
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