Philips buk7e2r3-40c Datasheet

Page 1

1. Product profile

1.1 General description

Stan dard level gate drive N-channel e nhancement mode Field-Ef fect T ransistor (FET) in a plastic package using advanced T renchMOS technolo gy. This product has been designed and qualified to the appropriate AEC standard for use in high performan ce automotive applications.

1.2 Features and benefits

BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Rev. 03 — 26 January 2009 Product data sheet
AEC Q101 compliantAvalanche robust
Suitable for standard level gate driveSuitable for thermally demanding
environment up to 175°C rating

1.3 Applications

12V Motor, lamp and solenoid loadsHigh performance automotive power
systems
High performance Pulse Width
Modulation (PWM) applications

1.4 Quick reference data

Table 1. Quick reference
Symbol Parameter Conditions Min Typ Max Unit
V
DS
I
D
P
tot
Static characteristics
R
DSon
Avalanche ruggedness
E
DS(AL)S
drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - - 40 V drain current VGS=10V; Tmb=25°C;
; see Figure 3;
≤ 40 V;
sup
= 25 °C; unclamped
total power dissipation
drain-source on-state resistance
non-repetitive drain-source avalanche energy
see Figure 1 Tmb= 25 °C; see Figure 2 - - 333 W
VGS=10V; ID=25A; Tj= 25 °C; see Figure 12; see Figure 13
ID= 100 A; V RGS=50Ω; VGS=10V; T
j(init)
[1]
- - 100 A
[2]
- 1.96 2.3 mΩ
--1.2J
[1] Refer to document 9397 750 12572 for further information. [2] Continuous current is limited by package.
Page 2
NXP Semiconductors

2. Pinning information

BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1G gate 2D drain 3S source
mb
G
mb D mounting base; connected to
drain
321
mbb076
SOT226
(TO-220 A B ; I 2 PAK)

3. Ordering information

Table 3. Ordering information
Type number Package
BUK7E2R3-40C TO-220AB;
Name Description Version
plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB SOT226
I2PAK
D
S
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 2 of 14
Page 3
NXP Semiconductors

4. Limiting values

BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
Avalanche ruggedness
E
DS(AL)S
E
DS(AL)R
drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - 40 V drain-gate voltage RGS=20kΩ -40V gate-source voltage -20 20 V drain current Tmb=25°C; VGS=10V; see Figure 1;
[1][2] -100A
see Figure 3;
=25°C; VGS=10V; see Figure 1;
T
mb
see Figure 3 T
=100°C; VGS= 10 V; see Figure 1; [1][2] -100A
mb
;
[1]
[3] -276A
peak drain current Tmb=25°C; tp≤ 10 µs; pulsed; see Figure 3 -1104A total power dissipation Tmb=25°C; see Figure 2 -333W storage temperature -55 175 °C junction temperature -55 175 °C
source current Tmb=25°C; [1][3] -276A
=25°C; [1][2] -100A
T
mb
peak source current tp≤ 10 µs; pulsed; Tmb=25°C - 1104 A
non-repetitive drain-source avalanche
ID=100A; V T
= 25 °C; unclamped
j(init)
≤ 40 V; RGS=50Ω; VGS=10V;
sup
-1.2J
energy repetitive drain-source
avalanche energy
see Figure 4; [4][5]
[6][7]
--J
[1] Refer to document 9397 750 12572 for further information. [2] Continuous current is limited by package. [3] Current is limited by power dissipation chip rating. [4] Maximum value not quoted. Repetitive rating defined in avalanche rating figure. [5] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [6] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [7] Refer to application note AN10273 for further information.
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 3 of 14
Page 4
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
300
I
D
(A)
200
100
0
(1)
0 50 100 150 200
003aab004
(°C)
T
mb
Fig 1. Continuous drain current as a function of
mounting base temperature
4
10
I
D
(A)
3
10
limit R
DSon
= VDS/I
D
120
P
der
(%)
80
40
0
0 20015050 100
03aa16
Tmb (°C)
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aab028
δ = 10 μs
VDS (V)
100 μs
1 ms
10 ms 100 ms
2
10
10
1
−1
10
−1
10
(1)
DC
101
Fig 3. Safe operating area; continuous and peak drain cur rents as a function of drain-source voltage
2
10
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 4 of 14
Page 5
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
10
3
I
AL
003aab013
(A)
10
2
(1)
(2)
10
(3)
1
-3
10
-2
10
-1
10
1 10
t
(ms)
AL
Fig 4. Single-pulse and repetitive avalanche rating; avalanche current as a fun ction of avalanche time
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 5 of 14
Page 6
NXP Semiconductors

5. Thermal characteristics

BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance from
see Figure 5 - - 0.45 K/W junction to mounting base
R
th(j-a)
thermal resistance from
vertical in free air - 50 - K/W junction to ambient
t
p
003aab020
T
tp (s)
δ =
t
p
T
t
110
Z
th(j-mb)
(K/W)
1
δ = 0.5
0.2
−1
10
0.1
0.05
0.02
−2
10
single shot
−3
10
−6
10
−5
10
−4
10
−3
10
−2
P
−1
10
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 6 of 14
Page 7
NXP Semiconductors

6. Characteristics

BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
V
GSth
I
DSS
I
GSS
R
DSon
I
DSS
drain-source breakdown voltage
gate-source threshold voltage
gate-source threshold voltage
drain leakage current VDS=40V; VGS=0V; Tj= 25 °C - 0.02 1 µA gate leakage current VDS=0V; VGS=20V; Tj= 25 °C - 2 100 nA
drain-source on-state resistance
drain leakage current VDS=40V; VGS=0V; Tj= 175 °C - - 500 µA
ID=250µA; VGS=0V; Tj=-55°C 36 - - V
=250µA; VGS=0V; Tj=25°C 40 - - V
I
D
ID=1mA; VDS = VGS; Tj=25°C; see
234V
Figure 10; see Figure 11
ID=1mA; VDS = VGS; Tj= 175 °C; see
Figure 10
I
D
Figure 10
V
DS
; see Figure 11
=1mA; VDS = VGS; Tj=-55°C; see
; see Figure 11
=0V; VGS=-20V; Tj= 25 °C - 2 100 nA
VGS=10V; ID=25A; Tj= 175 °C; see
1- - V
--4.4V
--4.26mΩ
Figure 12; see Figure 13
=10V; ID=25A; Tj=25°C; see
V
GS
Figure 12
; see Figure 13
- 1.96 2.3 mΩ
Dynamic characteristi cs
Q Q Q V
G(tot) GS GD
GS(pl)
total gate charge ID=25A; VDS=32V; VGS=10V; see gate-source charge - 49 - nC
Figure 15
gate-drain charge - 67 - nC gate-source plateau
ID=25A; VDS=32V; see Figure 15 -5-V
- 175 - nC
voltage
C
iss
C
oss
C
rss
input capacitance VGS=0V; VDS=25V; f=1MHz;
=25°C; see Figure 16
T
output capacitance - 1606 1927 pF
j
reverse transfer
- 8492 11323 pF
- 1101 1508 pF
capacitance
t
d(on)
t
r
t
d(off)
t
f
L
D
turn-on delay time VDS=30V; RL=1.2Ω; VGS=10V;
R
=10Ω
rise time - 133 - ns
G(ext)
-65-ns
turn-off delay time - 146 - ns fall time - 119 - ns internal drain
inductance
from drain lead 6 mm from package to
centre of die
from upper edge of drain mounting base to
-4.5-nH
-2.5-nH
centre of die
L
S
internal source
from source lead to source bonding pad - 7.5 - nH inductance
Source-drain diode
V
SD
source-drain voltage IS=25A; VGS=0V; Tj= 25 °C; see
- 0.85 1.2 V
Figure 14
t
rr
Q
r
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 7 of 14
reverse recovery time IS=20A; dIS/dt = -100 A/µs; VGS=0V; recovered charge - 57 - nC
VDS=30V
-75-ns
Page 8
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
003aab005
VDS (V)
I
(A)
300
D
200
100
0
20 10
7
6.5
0108462
VGS (V) = 6
5.5
5
4.5
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
180
g
(S)
120
fs
003aab008
6
R
DSon
(mΩ)
5
4
3
2
1
0 300200100
VGS (V) = 5.5
003aab007
6.5
7
8
10
20
ID (A)
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values
400
I
(A)
300
D
003aab010
60
0
0 20406080
I
(A)
D
Fig 8. Forward transconductance as a fun ction of
drain current; typical values
200
100
Tj = 175 °C Tj = 25 °C
0
013467
(V)
V
GS
Fig 9. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 8 of 14
Page 9
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
5
V
GS(th)
(V)
4
3
2
1
0
−60 180120060
max
typ
min
03aa32
Tj (°C)
Fig 10. G ate-source threshold voltage as a function of
junction temperature
003aab006
R
DSon
(mΩ)
4
3
−1
10
I
D
(A)
−2
10
−3
10
−4
10
−5
10
−6
10
0642
min typ max
03aa35
VGS (V)
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
2
a
1.5
03aa27
2
1
5101520
V
(V)
GS
Fig 12. Drain-source on-state resistance as a function
of gate-source voltage; typical values
1
0.5
0
-60 0 60 120 180 T
(°C)
j
Fig 13. Normalized drain-so urce on-state resistance
factor as a function of junction temperature
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 9 of 14
Page 10
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
200
I
S
(A)
150
100
Tj = 175 °C Tj = 25 °C
50
0
0.0 0.5 1.0 1.5 2.0
003aab012
(V)
V
SD
Fig 14. Source current as a function of source-drain
voltage; typical values
14000
C
C
(pF)
10500
iss
C
oss
10
V
GS
(V)
8
6
4
2
0
0 50 100 150 200
VDD = 14 V VDD = 32 V
003aab011
(nC)
Q
G
Fig 15. G ate-source voltage as a function of gate
charge; typical values
003aab009
7000
C
rss
3500
0
−2
10
−1
1
1010
V
DS
(V)
2
10
Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 10 of 14
Page 11
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET

7. Package outline

Plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB SOT226
A
D
1
D
E
A
1
mounting
base
b
b
1.3
1.0
1
c
1
0.7
0.4
L
DIMENSIONS (mm are the original dimensions)
A
UNIT
Ab
1
1.40
4.5
mm
4.1
1.27
0.85
0.60
123
b
e
e
05
D
D
max
1
1.6
11
1.2
10.3
9.7
L
1
Q
10 mm
scale
E
eQ
2.54
15.0
13.5
L
L
1
2.6
3.30
2.2
2.79
c
OUTLINE VERSION
SOT226
REFERENCES
IEC JEDEC JEITA
low-profile
3-lead TO-220AB
EUROPEAN
PROJECTION
ISSUE DATE
05-06-23 06-02-14
Fig 17. Package outline SOT226 (I2PAK)
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 11 of 14
Page 12
NXP Semiconductors
N-channel TrenchMOS standard level FET
BUK7E2R3-40C

8. Revision history

Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BUK7E2R3-40C_3 20090126 Product data sheet - BUK75_7E2R3-40C_2 Modifications:
BUK75_7E2R3-40C_2 20060810 Product data sheet - BUK75_7E2R3-40C_1 BUK75_7E2R3-40C_1 20060503 Product data sheet - -
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Type number BUK7E2R3-40C separated from data sheet BUK75_7E2R3-40C_2.
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 12 of 14
Page 13
NXP Semiconductors
BUK7E2R3-40C
N-channel TrenchMOS standard level FET

9. Legal information

9.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com
[1][2]
Product status
[3]
Definition
.

9.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full dat a sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

9.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
, including those pertaining to warranty,

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
BUK7E2R3-40C_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 26 January 2009 13 of 14
Page 14
NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .6
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .7
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 3
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
10 Contact information. . . . . . . . . . . . . . . . . . . . . .13
BUK7E2R3-40C
N-channel TrenchMOS standard level FET
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 26 January 2009
Document identifier: BUK7E2R3-40C_3
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