Philips buk7610-55al Datasheet

Page 1
BUK7610-55AL
N-channel TrenchMOS standard level FET
Rev. 02 — 9 January 2008 Product data sheet

1. Product profile

1.1 General description

N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP General-Purpose Automotive (GPA) TrenchMOS technology specifically optimized for linear operation. This product has been designed and qualified to the appro priate AEC standard for use in automotive critical applications.

1.2 Features

175 °C rated Q101 compliantStable operation in linear mode  TrenchMOS technology
12 V and 24 V loads Automotive systemsDC linear motor control Repetitive clamped inductive switching

1.4 Quick reference data

Table 1. Quick reference
Symbol Parameter Conditions Min Typ Max Unit
I
D
drain current VGS=10V; Tmb=25°C;
see Figure 4 and 1
P
tot
total power dissipation Tmb=25°C; see Figure 2 - - 300 W
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source avalanche energy
ID=75A; V R
GS
T
j(init)
inductive load
Static characteristics
R
DSon
drain-source on-state resistance
VGS=10V; ID=25A;
=25°C; see Figure 12 and
T
j
13
[1] Continuous current is limited by package.
≤ 55 V;
sup
=50Ω; VGS=10V;
=25°C; unclamped
[1]
--75A
--1.1J
-8.510mΩ
Page 2
NXP Semiconductors
m

2. Pinning information

BUK7610-55AL
N-channel TrenchMOS standard level FET
Table 2. Pinning
Pin Symbol Description Simplified outline Graphic symbol
1 G gate
mb
D
2 D drain 3 S source
G
mb D mounting base;
S
connected to drain
2
13
bb076
SOT404 (D2PAK)

3. Ordering information

Table 3. Ordering information
Type number Package
BUK7610-55AL D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead
Name Description Version
SOT404
cropped)

4. Limiting values

Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V V V I
I P T T
DS DGR GS
D
DM
tot stg j
drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C-55V drain-gate voltage RGS=20kΩ -55V gate-source voltage -20 20 V drain current Tmb=25°C; VGS= 10 V; see Figure 4 and 1
peak drain current Tmb=25°C; tp≤ 10 μs; pulsed - 490 A total power dissipation Tmb=25°C; see Figure 2 - 300 W storage temperature -55 175 °C junction temperature -55 175 °C
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source avalanche energy
E
DS(AL)R
repetitive drain-source avalanche energy
Source-drain diode
I
S
I
SM
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 2 of 13
source current Tmb=25°C
peak source current tp≤ 10 μs; pulsed; Tmb=25°C - 490 A
[1][2]
- 122 A
=25°C; VGS= 10 V; see Figure 4 and 1
T
mb
= 100 °C; VGS= 10 V; see Figure 4
T
mb
ID=75A; V
=10V; T
V
GS
≤ 55 V; RGS=50Ω;
sup
=25°C; unclamped
j(init)
[3]
-75A
[3]
-75A
-1.1J
inductive load see Figure 3
=25°C
T
mb
[4][5]
--J
[6]
[1][2]
- 122 A
[3]
-75A
Page 3
NXP Semiconductors
P
der
=
P
tot
P
tot(25°C
)
× 100 %
[1] Current is limited by power dissipation chip rating. [2] Refer to document 9397 750 12572 for further information. [3] Continuous current is limited by package. [4] Single shot avalanche rating limited by maximum junction temperature of 175 °C. [5] Repetitive avalanche rating limited by average junction temperature of 170 °C. [6] Refer to application note AN10273 for further information.
150
003aaa726
120
BUK7610-55AL
N-channel TrenchMOS standard level FET
03aa16
I
D
(A)
100
(1)
50
0
0 50 100 150 200
(°C)
T
mb
VGS 10V
(1) Cappedat 75 A due to package.
Fig 1. Continuous drain current as a function of
mounting base temperature
2
10
I
AV
(A)
P
der
(%)
80
40
0
0 50 100 150 200
Fig 2. Normalized total power di ss ipation as a
function of mounting base temperature
(1)
(2)
003aaa739
Tj = 25 ˚C
(°C)
T
mb
10
(3)
150 ˚C
1
-1
10
-2
10
-1
10
1 10
t
(ms)
AV
(1) Singleíshot. (2) Singleíshot. (3) Repetitive.
Fig 3. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 3 of 13
Page 4
NXP Semiconductors
BUK7610-55AL
N-channel TrenchMOS standard level FET
3
10
I
D
(A)
2
10
10
1
1 10 10
Limit R
DSon
(1)
= V
/ I
DS
D
DC
VDS (V)
tp = 10 μs
100 μs
1 ms
10 ms
100 ms
Tmb=25°C; IDMis singlepulse
(1) Cappedat 75 A due to package.
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

5. Thermal characteristics

003aaa737
2
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
R
th(j-mb)
thermal resistance from junction to ambient
thermal resistance
mounted on a printed-circuit
-50-K/W board; minimum footprint; vertical in still air
see Figure 5 -0.250.5K/W
from junction to mounting base
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 4 of 13
Page 5
NXP Semiconductors
1
Z
th(j-mb )
δ = 0.5
(K/W)
0.2
-1
10
0.1
0.05
0.02
-2
10
BUK7610-55AL
N-channel TrenchMOS standard level FET
003aaa734
t
P
δ =
p
T
10
-3
10
single shot
-6
t
p
T
-5
10
-4
10
-3
10
-2
10
-1
10
t
t
1
(s)
p
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration

6. Characteristics

Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
V
GS(th)
gate-source threshold voltage
I
DSS
I
GSS
R
DSon
drain leakage current VDS=55V; VGS=0V;
gate leakage current VDS=0V; VGS=+20V;
drain-source on-state resistance
ID=250μA; VGS=0V;
=-55°C
T
j
=250μA; VGS=0V;
I
D
T
=25°C
j
ID=1mA; VDS = VGS; Tj=25°C; see Figure 10
I
=1mA; VDS = VGS;
D
and 11
50 - - V
55 - - V
234V
1- -V Tj= 175 °C; see Figure 10 and
11
=1mA; VDS = VGS;
I
D
=-55°C; see Figure 10 and 11
T
j
--4.4V
--500μA
Tj= 175 °C
=55V; VGS=0V; Tj=25°C - 0.05 10 μA
V
DS
-2100nA
Tj=25°C
=0V; VGS=-20V;
V
DS
=25°C
T
j
VGS=10V; ID=25A;
-2100nA
--20mΩ Tj= 175 °C; see Figure 12 and
13
=10V; ID=25A; Tj=25°C;
V
GS
see Figure 12
and 13
-8.510mΩ
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 5 of 13
Page 6
NXP Semiconductors
BUK7610-55AL
N-channel TrenchMOS standard level FET
Table 6. Characteristics
…continued
Symbol Parameter Conditions Min Typ Max Unit
Source-drain diode
V
SD
source-drain voltage IS=25A; VGS=0V; Tj=25°C;
-0.851.2V see Figure 16
t
rr
Q
r
reverse recovery time IS=20A; dIS/dt = -100 A/μs;
=0V; VDS=30V; Tj=25°C
V
GS
recovered charge IS=20A; dIS/dt = -100 A/μs;
-73-ns
-430-nC VGS=0V; VDS=30V; Tj=25°C
Dynamic characteristi cs
Q
G(tot)
total gate charge ID=25A; VDS=44V;
=10V; Tj=25°C;
V
GS
-124-nC see Figure 14
Q
GS
gate-source charge ID=25A; VDS=44V;
-22-nC VGS=10V; Tj=25°C; see Figure 14
Q
GD
gate-drain charge ID=25A; VDS=44V;
-50-nC VGS=10V; Tj=25°C; see Figure 14
V
C
GS(pl)
iss
gate-source plateau voltage
input capacitance VGS=0V; VDS=25V;
ID=25A; VDS=44V; Tj=25°C; see Figure 14
-5-V
- 4710 6280 pF f=1MHz; Tj=25°C; see Figure 15
C
oss
output capacitance VGS=0V; VDS=25V;
f=1MHz; T
=25°C;
j
- 980 1180 pF see Figure 15
C
rss
reverse transfer capacitance
VGS=0V; VDS=25V; f=1MHz; T
=25°C;
j
- 560 770 pF see Figure 15
t
d(on)
t
r
turn-on delay time VDS=30V; RL=1.2Ω;
VGS=10V; R
=25°C
T
j
G(ext)
=10Ω;
rise time VDS=30V; RL=1.2Ω;
VGS=10V; R
G(ext)
=10Ω;
-33-ns
-117-ns Tj=25°C
t
d(off)
turn-off delay time VDS=30V; RL=1.2Ω;
V
GS
=10V; R
G(ext)
=10Ω;
-132-ns Tj=25°C
t
f
L
D
fall time VDS=30V; RL=1.2Ω;
internal drain inductance
VGS=10V; R
=25°C
T
j
from upper edge of drain mounting base to center of die;
G(ext)
=10Ω;
-95-ns
-2.5-nH Tj=25°C
L
S
internal source inductance
from source lead to source bond
=25°C
pad; T
j
-7.5-nH
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 6 of 13
Page 7
NXP Semiconductors
j
=25°C
DS
=25V
BUK7610-55AL
N-channel TrenchMOS standard level FET
400
I
D
(A)
20 18
300
16 14 12
200
100
0
0246810
VGS (V) = 10
9.5 9
8.5 8
7.5 7
6.5 6
5.5 5
4.5
003aaa729
(V)
V
DS
Tj=25°C
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
003aaa732
g
(S)
40
fs
35
(V) = 20
003aaa731
(A)
I
D
20
R
DSon
(mΩ)
15
10
5
0
0 100 200 300 400
10987
V
GS
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values
150
I
(A)
100
D
003aaa733
30
50
25
20
0 20406080
I
(A)
D
Tj = 175 °C
0
0246810
Tj = 25 °C
(V)
V
GS
Tj=25°C; VDS=25V
Fig 8. Forward transconductance as a function of
drain current; typical values
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Fig 9. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Product data sheet Rev. 02 — 9 January 2008 7 of 13
Page 8
NXP Semiconductors
j
=25°C; VDS=V
GS
a =
R
DSon
R
DSon(25°C
)
BUK7610-55AL
N-channel TrenchMOS standard level FET
5
V
GS(th)
(V)
4
3
2
1
0
−60 180120060
ID=1mA;VDS=V
GS
max
typ
min
03aa32
Tj (°C)
Fig 10. Gate-source threshold volt ag e as a function of
junction temperature
18
003aaa730
−1
10
I
D
(A)
−2
10
−3
10
−4
10
−5
10
−6
10
0642
min typ max
03aa35
VGS (V)
Fig 11. Sub-threshold drain current as a function of
gate-source volt age
2
03ne89
R
DSon
(mΩ)
14
10
6
5 101520
(V)
V
GS
Tj=25°C; ID=25A
Fig 12. Drain-source on-state resistance as a function
of gate-source voltage; typical values
a
1.5
1
0.5
0
-60 0 60 120 180 T
(°C)
j
Fig 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 8 of 13
Page 9
NXP Semiconductors
GS
=0V; f =1MHz
BUK7610-55AL
N-channel TrenchMOS standard level FET
10
V
GS
(V)
8
VDS = 14 V
6
4
2
0
0 50 100 150
003aaa735
VDS = 44 V
(nC)
Q
G
Tj=25°C; ID=25A
Fig 14. Gate-source voltage as a function of gate
charge; typical values
150
8000
C
(pF)
6000
4000
2000
C
iss
C
oss
C
rss
0
-1
10
1 10 10
003aaa738
2
VDS (V)
Fig 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical values
003aaa736
I
S
(A)
100
Tj = 25 °C
50
Tj = 175 °C
0
0.0 0.3 0.6 0.9 1.2 (V)
V
SD
VGS=0V
Fig 16. Source current as a function of source-d rain voltage; typical values
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 9 of 13
Page 10
NXP Semiconductors
N-channel TrenchMOS standard level FET

7. Package outline

Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
E
BUK7610-55AL
SOT404
A
A
1
D
1
D
H
D
mounting
base
2
L
p
13
b
e e
0 2.5 5 mm
scale
c
Q
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
4.50
4.10
OUTLINE VERSION
SOT404
A
1.40
1.27
0.64
0.46
D
max.
11
b
1
0.85
0.60
IEC JEDEC JEITA
D
1
1.60
10.30
1.20
9.70
REFERENCES
E
eLpH
2.90
2.54
2.10
D
15.80
14.80
Qc
2.60
2.20
EUROPEAN
PROJECTION
ISSUE DATE
05-02-11 06-03-16
Fig 17. Package outlin e SOT404 (D2PAK)
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 10 of 13
Page 11
NXP Semiconductors
N-channel TrenchMOS standard level FET
BUK7610-55AL

8. Revision history

Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BUK7610-55AL_2 20080109 Product data sheet - BUK75_7610_55AL_1 Modifications:
BUK75_7610_55AL_1 20041022 Product data sheet - -
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Typical thermal resistance (j-mb) figure added in Table 5.
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 11 of 13
Page 12
NXP Semiconductors
BUK7610-55AL
N-channel TrenchMOS standard level FET

9. Legal information

9.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this docu ment may have changed si nce this docum ent was pub lished and may dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

9.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected t o
result in personal injury , death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
, including those pertaining to warranty,

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.

10. Contact information

For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected]
BUK7610-55AL_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 January 2008 12 of 13
Page 13
NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
10 Contact information. . . . . . . . . . . . . . . . . . . . . 12
11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
BUK7610-55AL
N-channel TrenchMOS standard level FET
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 9 January 2008
Document identifier: BUK7610-55AL_2
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