Philips buk663r5-30c Datasheet

Page 1
BUK663R5-30C
N-channel TrenchMOS intermediate level FET
Rev. 02 — 16 November 2010 Product data sheet

1. Product profile

1.1 General description

Intermediate level gate drive N-channel enhancement mode Field-Ef fe ct Transistor (FET) in a plastic package using advanced TrenchMOS technology. This product has been designed and qualified to the appropriate AEC Q101 st andard for use in h igh performance automotive applications.

1.2 Features and benefits

Suitable for thermally demanding
environments due to 175 °C rating
gate drive sources

1.3 Applications

12 V Automotive systemsElectric and electro-hydraulic power
steering
Motors, lamps and solenoid control
Start-Stop micro-hybrid applicationsTransmission controlUltra high performance power
switching

1.4 Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
I
D
P
tot
Static characteristics
R
DSon
drain-source voltage Tj≥ 25 °C; Tj≤ 175°C --30V drain current VGS=10V; Tmb=25°C;
see Figure 1
total power dissipation
drain-source on-state resistance
Tmb= 25 °C; see Figure 2 --158W
VGS=10V; ID=25A; T
=25°C; see Figure 11
j
[1]
--100A
-2.93.5mΩ
Page 2
NXP Semiconductors
m
Table 1. Quick reference data …continued
Symbol Parameter Conditions Min Typ Max Unit
Avalanche ruggedness
E
DS(AL)S
Dynamic characteristics
Q
GD
[1] Continuous current is limited by package.

2. Pinning information

N-channel Tre nchMOS intermediate level FET
non-repetitive drain-source avalanche energy
gate-drain charge ID=25A; VDS=24V;
ID=100A; V
=50Ω; VGS=10V;
R
GS
T
= 25 °C; unclamped
j(init)
sup
≤ 30 V;
VGS= 10 V; see Figure 13; see Figure 14
BUK663R5-30C
--242mJ
-20-nC
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 G gate 2DDrain 3Ssource
mb
G
mb D mounting base; connected to
drain
2
13
bb076
SOT404 (D2PAK)

3. Ordering information

Table 3. Ordering information
Type number Package
BUK663R5-30C D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
Name Description Version
(one lead cropped)
D
S
SOT404
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 2 of 14
Page 3
NXP Semiconductors

4. Limiting values

BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
Avalanche ruggedness
E
DS(AL)S
E
DS(AL)R
drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - 30 V gate-source voltage DC
Pulsed
drain current Tmb=25°C; VGS=10V; see Figure 1
= 100 °C; VGS=10V; see Figure 1
T
mb
peak drain current Tmb=25°C; tp≤ 10 µs; pulsed;
[1]
-16 16 V
[2]
-20 20 V
[3]
- 100 A
[3]
- 100 A
- 616 A
see Figure 3 total power dissipation Tmb=25°C; see Figure 2 - 158 W storage temperature -55 175 °C junction temperature -55 175 °C
source current Tmb=25°C
[3]
- 100 A
peak source current tp≤ 10 µs; pulsed; Tmb= 25 °C - 616 A
non-repetitive drain-source avalanche energy
repetitive drain-source
ID= 100 A; V
=10V; T
V
GS
≤ 30 V; RGS=50Ω;
sup
= 25 °C; unclamped
j(init)
- 242 mJ
[4][5][6]
--J
avalanche energy
[1] -16V accumulated duration not to exceed 168 hrs. [2] Accumulated pulse duration not to exceed 5mins. [3] Continuous current is limited by package. [4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [5] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [6] Refer to application note AN10273 for further information.
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 3 of 14
Page 4
NXP Semiconductors
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
200
I
D
(A)
150
100
50
0
0 50 100 150 200
(1)
003aae303
T
(°C)
mb
Fig 1. Continuous drain current as a function of
mounting base temperature
3
10
120
P
der
(%)
80
40
0
0 20015050 100
03na19
Tmb (°C)
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aae305
I
(A)
D
10
10
1
2
-1
10
Limit R
= VDS / I
DSon
1 10 10
D
tp =10 μs
100 μs
DC
1 ms
10 ms 100 ms
V DS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain -sou rce voltage
2
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 4 of 14
Page 5
NXP Semiconductors

5. Thermal characteristics

BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance from junction to
see Figure 4 --0.95K/W
mounting base
1
Z
th(j-mb)
(K/W)
10
10
10
-1
-2
-3
-6
10
δ = 0.5
0.2
0.1
0.05
0.02
single shot
P
-5
10
-4
10
-3
10
-2
10
-1
10
003aae304
t
p
δ =
T
t
p
T
t
t
1
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 5 of 14
Page 6
NXP Semiconductors

6. Characteristics

BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
drain-source breakdown voltage
gate-source threshold voltage ID=1mA; VDS=VGS; Tj=25°C;
ID=250µA; VGS=0V; Tj=25°C30--V
=250µA; VGS=0V; Tj= -55 °C 27 - - V
I
D
1.8 2.3 2.8 V
see Figure 9; see Figure 10
=1mA; VDS=VGS; Tj=-55°C;
I
D
--3.3V
see Figure 9 I
=1mA; VDS=VGS; Tj= 175 °C;
D
0.8--V
see Figure 9
I
DSS
I
GSS
R
DSon
drain leakage current VDS=30V; VGS=0V; Tj= 175 °C - - 500 µA
=30V; VGS=0V; Tj= 25 °C - 0.02 1 µA
V
DS
gate leakage current VDS=0V; VGS=20V; Tj= 25 °C - 2 100 nA
=0V; VGS=-20V; Tj= 25 °C - 2 100 nA
V
DS
drain-source on-state resistance
VGS=10V; ID=25A; Tj=25°C; see Figure 11
=5V; ID=25A; Tj=25°C;
V
GS
-2.93.5mΩ
-4.25.2mΩ
see Figure 11 V
=4.5V; ID=25A; Tj=25°C;
GS
-4.96.5mΩ
see Figure 11
=10V; ID=25A; Tj= 175 °C;
V
GS
see Figure 12
; see Figure 11
--6.7mΩ
Dynamic characteristi cs
Q
G(tot)
total gate charge ID=25A; VDS=24V; VGS=10V;
see Figure 13
=25A; VDS=24V; VGS=5V;
I
D
; see Figure 14
-78-nC
-45-nC
see Figure 13; see Figure 14 Q Q C
C
C
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
GS GD
iss
oss
rss
gate-source charge ID=25A; VDS=24V; VGS=10V; gate-drain charge - 20 - nC
see Figure 13
; see Figure 14
input capacitance VGS=0V; VDS=25V; f=1MHz;
=25°C; see Figure 15
T
j
output capacitance VGS=0V; VDS=25V; f=1MHz;
=25°C; see Figure 14
T
j
reverse transfer capacitance VGS=0V; VDS=25V; f=1MHz;
T
=25°C
j
turn-on delay time VDS=25V; RL=1Ω; VGS=10V;
=10Ω
R
rise time - 54 - ns
G(ext)
turn-off delay time - 135 - ns fall time - 83 - ns internal drain inductance from upper edge of drain mounting
base to centre of die ; T
=25°C
j
internal source inductance from source lead to source bond
-15-nC
- 3530 4707 pF
- 623 748 pF
- 381 522 pF
-19-ns
-3.5-nH
-7.5-nH
pad ; Tj=25°C
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 6 of 14
Page 7
NXP Semiconductors
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Table 6. Characteristics …continued
Symbol Parameter Conditions Min Typ Max Unit
Source-drain diode
V
SD
source-drain voltage IS=25A; VGS=0V; Tj=25°C;
see Figure 16 t
rr
Q
r
reverse recovery time IS=20A; dIS/dt = -100 A/µs; recovered charge - 57 - nC
VGS=0V; VDS=25V
-0.81.2V
-46-ns
80
I
D
(A)
60
40
20
0
012345
Tj = 175 °C
003aae307
Tj = 25 °C
V
GS
(V)
Fig 5. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aae312
R
DSon
(mΩ)
15
12
125
g
fs
(S)
100
75
50
25
0
0 25 50 75 100
003aae308
I
(A)
D
Fig 6. Forward transconductance as a function of
drain current; typical values
003aae306
4.0
(A)
I
D
100
80
10
6
4.5
5
9
6
3
0
0 4 8 12 16
V
(V)
GS
Fig 7. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
60
3.8
40
3.6
20
0
00.511.52
3.4
3.3
VGS (V ) = 3.2
V
(V)
DS
Fig 8. Output characteristics: drain current as a
function of drain-source voltage; typica l v al ue s
Product data sheet Rev. 02 — 16 November 2010 7 of 14
Page 8
NXP Semiconductors
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
4
V
GS(th)
(V)
3
2
1
0
-60 0 60 120 180
max
typ
min
003aad805
(°C)
T
j
Fig 9. Gate-source threshold voltage as a function of
junction temperature
003aae310
4.0
R
DS on
(mΩ)
15
12
VGS (V) = 3.6
3.8
-1
10
I
D
(A)
-2
10
min
typ
-3
10
-4
10
-5
10
-6
10
01234
max
003aad806
(V)
V
GS
Fig 10. Sub-thr eshold drain current as a function of
gate-source voltage
2
a
1.5
03aa27
9
6
3
0
0 25 50 75 100
4.5
5.0
6.0 10
(A)
I
D
Fig 11. Drain-source on-state resistance as a fun ction
of drain current; typical values
1
0.5
0
−60 0 60 120 180
T
(°C)
j
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 8 of 14
Page 9
NXP Semiconductors
003aaa508
003aae313
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
003aae311
24V
Q
(nC)
G
V
V
V
V
DS
GS(pl)
GS(th)
GS
I
D
Q
GS1QGS2
Q
GS
Q
G(tot)
10
V
GS
(V)
8
6
VDS = 14V
4
Q
GD
2
0
020406080
Fig 13. Gate charge waveform definitions Fig 14. Gate-source vo ltage as a function of gate
charge; typical values
003aae309
C
is s
(A)
I
100
S
80
C
(pF)
10
4
3
10
C
oss
C
rs s
2
10
-1
10
1 10 10
VDS (V)
2
Fig 15. Input, output and reverse tran sfer capacitances
as a function of drain-source voltage; typical values
60
40
Tj = 175 °C
Tj = 25 °C
20
0
0 0.3 0 .6 0 .9 1.2
V
(V)
SD
Fig 16. Sourc e current as a function of source-drain
voltage; typical values
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 9 of 14
Page 10
NXP Semiconductors
4

7. Package outline

BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
E
D
1
D
H
D
mounting
base
2
L
13
SOT40
A
A
1
p
e e
DIMENSIONS (mm are the original dimensions)
0.64
0.46
D
max.
11
UNIT
mm
A
4.50
4.10
OUTLINE VERSION
SOT404
A
1.40
1.27
b
1
0.85
0.60
IEC JEDEC JEITA
Fig 17. Package outline SOT404 (D2PAK)
D
1
1.60
10.30
1.20
9.70
REFERENCES
b
0 2.5 5 mm
scale
E
eLpH
2.90
2.54
2.10
D
15.80
14.80
Qc
2.60
2.20
c
Q
EUROPEAN
PROJECTION
ISSUE DATE
05-02-11 06-03-16
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 10 of 14
Page 11
NXP Semiconductors

8. Revision history

BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BUK663R5-30C v.2 20101116 Product data sheet - BUK663R5-30C v.1 Modifications:
• Status changed from objective to product.
• Various changes to content.
BUK663R5-30C v.1 20100521 Objective data sheet - -
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 11 of 14
Page 12
NXP Semiconductors
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET

9. Legal information

9.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) descr ibed in this document may have changed since this document was publish ed and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

9.3 Disclaimers

Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
In no event shall NXP Semiconductors be lia ble for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual
, unless otherwise
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 12 of 14
Page 13
NXP Semiconductors
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpret ed or construed as an offer to sell products that is open f or acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

9.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
BUK663R5-30C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 16 November 2010 13 of 14
Page 14
NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
10 Contact information. . . . . . . . . . . . . . . . . . . . . .13
BUK663R5-30C
N-channel Tre nchMOS intermediate level FET
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 16 November 2010
Document identifier: BUK663R5-30C
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