Philips buk6218-40c Datasheet

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BUK6218-40C

N-channel TrenchMOS intermediate level FET

Rev. 1 — 4 October 2010 Product data sheet

1. Product profile

1.1 General description

Intermediate level gate drive N-channel enhancement mode Field-Ef fe ct Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.

1.2 Features and benefits

 AEC Q101 compliant  Suitable for standard and logic level

 Suitable for thermally demanding

environments due to 175 °C rating

gate drive sources

1.3 Applications

 12 V Automotive systems  Electric and electro-hydraulic power

steering

 Motors, lamps and solenoids

 Start-Stop micro-hybrid applications  Transmission control  Ultra high performance power

switching

1.4 Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

tot

Static characteristics

DSon

drain-source voltage

drain current VGS=10V; Tmb=25°C;

total power dissipation

drain-source on-state resistance

Tj≥ 25 °C; Tj≤ 175°C --40V

--42A

see Figure 1 see Figure 2 --60W

VGS=10V; ID=10A; T

= 25 °C; see Figure 11

-13.516mΩ

Page 2

NXP Semiconductors

Table 1. Quick reference data …continued

Symbol Parameter Conditions Min Typ Max Unit

Avalanche ruggedness

DS(AL)S

Dynamic characteristics

2. Pinning information

N-channel Tre nchMOS intermediate level FET

non-repetitive drain-source avalanche energy

gate-drain charge ID=25A; VDS=32V;

ID=42A; V

=10V; T

sup

j(init)

≤ 40 V;

=25°C;

unclamped

VGS= 10 V; see Figure 13; see Figure 14

BUK6218-40C

--25mJ

-7.7-nC

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphic symbol

1 G gate 2 D drain 3Ssource

mb D mounting base; connected to

drain

bb076

SOT428 (DPAK)

3. Ordering information

Table 3. Ordering information

Type number Package

BUK6218-40C DPAK plastic singl e-ended surface-mounted package (DPAK); 3 leads

Name Description Version

(one lead cropped)

SOT428

Product data sheet Rev. 1 — 4 October 2010 2 of 14

Page 3

NXP Semiconductors

4. Limiting values

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

tot

stg

Source-drain diode

Avalanche ruggedness

DS(AL)S

DS(AL)R

drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - 40 V gate-source voltage Pulsed

[1] [2]

-20 20 V

-16 16 V

drain current Tmb=25°C; VGS=10V; see Figure 1 -42A

=100°C; VGS= 10 V; see Figure 1 -30A

peak drain current Tmb=25°C; tp≤ 10 µs; pulsed;

- 168 A

see Figure 3 total power dissipation see Figure 2 -60W storage temperature -55 175 °C junction temperature -55 175 °C

source current Tmb=25°C - 42 A peak source current tp≤ 10 µs; pulsed; Tmb= 25 °C - 168 A

non-repetitive drain-source avalanche energy

repetitive drain-source

ID=42A; V

j(init)

sup

= 25 °C; unclamped

≤ 40 V; VGS=10V;

[3][4][5]

-25mJ

--J

avalanche energy

[1] Accumulated pulse duration not to exceed 5 minutes. [2] -16V accumulated duration not to exceed 168 hrs [3] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [4] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [5] Refer to application note AN10273 for further information.

Product data sheet Rev. 1 — 4 October 2010 3 of 14

Page 4

NXP Semiconductors

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

(A)

0 50 100 150 200

003aae856

(°C)

Fig 1. Continuous drain current as a function of

mounting base temperature

(A)

Limit R

DSon

= VDS / I

120

der

(%)

0 20015050 100

Tmb (°C)

Fig 2. Normalized total power dissipation as a

function of mounting base temperature

003aae846

tp =10 μs

03aa16

-1

1 10 10

100 μs

1 ms

10 ms

100 ms

V DS (V)

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain -sou rce voltage

Product data sheet Rev. 1 — 4 October 2010 4 of 14

Page 5

NXP Semiconductors

5. Thermal characteristics

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

Table 5. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

th(j-mb)

thermal resistance from

see Figure 4 --2.52K/W junction to mounting base

003aae858

tp (s)

δ =

th(j-mb)

(K/W)

δ = 0.5

0.2

0.1

0.05

0.02

-1

single shot

-2

-6

-5

-4

-3

-2

-1

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

Product data sheet Rev. 1 — 4 October 2010 5 of 14

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NXP Semiconductors

6. Characteristics

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

Table 6. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

(BR)DSS

GS(th)

drain-source breakdown voltage

gate-source threshold voltage

ID=250µA; VGS=0V; Tj=25°C 40--V

=250µA; VGS=0V; Tj= -55 °C 36 - - V

ID=1mA; VDS=VGS; Tj=25°C;

1.8 2.3 2.8 V

see Figure 9; see Figure 10

=1mA; VDS=VGS; Tj=-55°C;

--3.3V

see Figure 9 I

=1mA; VDS=VGS; Tj= 175 °C;

0.8--V

see Figure 9

DSS

GSS

DSon

drain leakage current VDS=40V; VGS=0V; Tj= 25 °C - 0.02 1 µA

=40V; VGS=0V; Tj= 175 °C - - 500 µA

gate leakage current VDS=0V; VGS=20V; Tj= 25 °C - 2 100 nA

=0V; VGS=-20V; Tj= 25 °C - 2 100 nA

drain-source on-state resistance

VGS=10V; ID=10A; Tmb=25°C; see Figure 11

=4.5V; ID=10A; Tj=25°C;

- 13.5 16 mΩ

- 20.7 28 mΩ

see Figure 11 V

=5V; ID=10A; Tmb=25°C;

- 18.4 23 mΩ

see Figure 11

=10V; ID=10A; Tj= 175 °C;

see Figure 11

; see Figure 12

--34mΩ

Dynamic characteristi cs

G(tot)

total gate charge ID=25A; VDS=32V; VGS=10V;

see Figure 13

=25A; VDS=32V; VGS=5V;

; see Figure 14

-22-nC

- 12.9 - nC

see Figure 13; see Figure 14

iss

oss

rss

gate-source charge ID=25A; VDS=32V; VGS=10V; gate-drain charge - 7.7 - nC

see Figure 13

; see Figure 14

input capacitance VGS=0V; VDS=25V; f=1MHz;

=25°C; see Figure 15

output capacitance - 134 161 pF

reverse transfer

-3.5-nC

- 873 1170 pF

- 101 140 pF

capacitance

d(on)

d(off)

turn-on delay time VDS=30V; RL=1.2Ω; VGS=10V;

=10Ω

rise time - 20.8 - ns

G(ext)

-7.4-ns

turn-off delay time - 30.6 - ns fall time - 20.1 - ns internal drain

inductance

internal source inductance

measured from upper edge of drain mounting base to centre of die;

=25°C

Tj= 25 °C; measured from source lead to source bond pad.

-3.5-nH

-7.5-nH

Product data sheet Rev. 1 — 4 October 2010 6 of 14

Page 7

NXP Semiconductors

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

Table 6. Characteristics …continued

Symbol Parameter Conditions Min Typ Max Unit

Source-drain diode

source-drain voltage IS=25A; VGS=0V; Tj=25°C;

see Figure 16

reverse recovery time IS=20A; dIS/dt = -100 A/µs; VGS=0V; recovered charge - 35.9 - nC

VDS=25V

-0.91.2V

-34-ns

(S)

0 10203040

003aae842

(A)

Fig 5. Forward transconductance as a function of

drain current; typical values

003aae844

(A)

0 2.5 5 7.5 1 0

6.010.0

003aae843

VGS (V) = 5

4.5

4.0

3.8

3.6

3.4

3.2

(V)

Fig 6. Output characteristics: drain current as a

function of drain-source voltage; typica l v al ue s

003aae845

DSon

(mΩ)

0246

Fig 7. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

Tj = 25 °CTj = 175 °C

(V)

0 5 10 15 20

(V)

Fig 8. Drain-source on-state resistance as a function

of gate-source voltage; typical values

Product data sheet Rev. 1 — 4 October 2010 7 of 14

Page 8

NXP Semiconductors

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

GS(th)

(V)

-60 0 60 120 180

max

typ

min

003aad805

(°C)

Fig 9. Gate-source threshold voltage as a function of

junction temperature

003aae848

DSon

(mΩ)

VGS (V) = 4.5

3.8

4.0

3.6

-1

(A)

-2

min

typ

-3

-4

-5

-6

01234

max

003aad806

(V)

Fig 10. Sub-thr eshold drain current as a function of

gate-source voltage

1.5

03aa27

0 204060

5.0

6.0

10.0

(A)

Fig 11. Drain-source on-state resistance as a fun ction

of drain current; typical values

0.5

−60 0 60 120 180

(°C)

Fig 12. Normalized drain-source on-state resistance

factor as a function of junction temperature

Product data sheet Rev. 1 — 4 October 2010 8 of 14

Page 9

NXP Semiconductors

003aaa508

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

32V

003aae851

(nC)

GS(pl)

GS(th)

GS1QGS2

G(tot)

(V)

0102030

VDS = 14V

Fig 13. Gate charge waveform definitions Fig 14. Gate-source vo ltage as a function of gate

charge; typical values

(pF)

003aae853

(A)

iss

003aae849

0.01 0.1 1 10 100

oss

rss

(V)

Fig 15. Input, output and reverse tran sfer capacitances

as a function of drain-source voltage; typical values

0 0.3 0.6 0.9 1.2

Tj = 25 °CTj = 175 °C

(V)

Fig 16. Sourc e current as a function of source-drain

voltage; typical values

Product data sheet Rev. 1 — 4 October 2010 9 of 14

Page 10

NXP Semiconductors

N-channel Tre nchMOS intermediate level FET

7. Package outline

lastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)

BUK6218-40C

SOT42

mounting base

0 5 10 mm

scale

DIMENSIONS (mm are the original dimensions)

0.2

max

0.2

UNIT

OUTLINE

VERSION

SOT428 SC-63

0.93

2.38

0.46

2.22

bcD

1.1

0.89

0.9

0.71

IEC JEDEC JEITA

5.46

0.56

5.00

0.20

TO-252

6.22

5.98

REFERENCES

min

4.0

min

6.73

4.45

6.47

2.285 4.57

10.4

2.95

9.6

2.55

EUROPEAN

PROJECTION

min

0.5

0.9

0.5

ISSUE DATE

06-02-14

06-03-16

Fig 17. Package outline SOT428 (DPAK)

Product data sheet Rev. 1 — 4 October 2010 10 of 14

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NXP Semiconductors

8. Revision history

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

Table 7. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BUK6218-40C v.1 20101004 Product data sheet - -

Product data sheet Rev. 1 — 4 October 2010 11 of 14

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NXP Semiconductors

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

9. Legal information

9.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) desc r ibed in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

9.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

In no event shall NXP Semiconductors be lia ble for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual

, unless otherwise

Product data sheet Rev. 1 — 4 October 2010 12 of 14

Page 13

NXP Semiconductors

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpret ed or construed as an offer to sell products that is open f or acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

9.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]

Product data sheet Rev. 1 — 4 October 2010 13 of 14

Page 14

NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3

5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .1 0

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11

9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12

9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12

9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12

9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13

10 Contact information. . . . . . . . . . . . . . . . . . . . . .13

BUK6218-40C

N-channel Tre nchMOS intermediate level FET

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]

Date of release: 4 October 2010

Document identifier: BUK62 18-40C