Philips blf6g10s-45 Datasheet

Page 1
BLF6G10S-45
Power LDMOS transistor
Rev. 03 — 20 January 2010 Product data sheet

1. Product profile

1.1 General description

45 W LDMOS power transistor for base station applications at frequ en cies fr om 700 MHz to 1000 MHz.
Table 1. Typical performance
RF performance at T
Mode of operation f V
2-carrier W-CDMA 920 to 960 28 1.0 23 8 −48.5
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR= 7.5 dB at 0.01 % probability on CCDF per carrier; carrier
spacing5MHz.
= 25 °C in a common source class-AB production test circuit.
case
DS
(MHz) (V) (W) (dB) (%) (dBc)
P
L(AV)
G
p
η
D
ACPR
[1]
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.

1.2 Features

supply voltage of 28 V and an I
Average output power = 1.0 WGain = 23 dBEfficiency = 8 %
ACPR = −48.5 dBcEasy power controlIntegrated ESD protectionExcellent ruggednessHigh efficiencyExcellent thermal stabilityDesigned for broadband operation (700 MHz to 1000 MHz)Internally matched for ease of useCompliant to Directive 2002/95/EC, regarding restriction of hazardous substances
(RoHS)
of 350 mA:
Dq
Page 2
NXP Semiconductors
2

1.3 Applications

RF power amplifiers for W-CDMA base stations and multi carrier applications in the
700 MHz to 1000 MHz frequency range.

2. Pinning information

Table 2. Pinning
Pin Description Simplified outline Symbol
1drain 2gate 3source
[1] Connected to flange.

3. Ordering information

BLF6G10S-45
Power LDMOS transistor
1
[1]
3
2
2
sym11
1
3
Table 3. Ordering information
Type number Package
BLF6G10S-45 - ceramic earless flanged package; 2 leads SOT608B

4. Limiting values

Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
T
stg
T
j
drain-source voltage - 65 V gate-source voltage −0.5 +13 V drain current - 13 A storage temperature −65 +150 °C junction temperature - 225 °C

5. Thermal characteristics

Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-case)
thermal resistance from junction to case
Name Description Version
T
case
=80°C;
1.7 K/W
PL= 12.5 W
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 2 of 10
Page 3
NXP Semiconductors

6. Characteristics

Table 6. Characteristics
Tj = 25 °C per section; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
(BR)DSS
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
BLF6G10S-45
Power LDMOS transistor
drain-source breakdown voltage
gate-source threshold voltage VDS=10 V; ID=72mA 1.35 1.9 2.35 V gate-source quiescent voltage VDS=28 V; ID= 430 mA 1.7 2.15 2.7 V drain leakage current VGS=0V; VDS=28V--1.4μA drain cut-off current VGS=V
gate leakage current VGS=11V; VDS= 0 V - - 140 nA forward transconductance VDS=10V; ID=3.6A - 5 - S drain-source on-state
resistance
VGS=0V; ID=0.5mA65--V
V
=10V
DS
VGS=V
GS(th)
GS(th)
+3.75 V;
+ 3.75 V;
-12.5-A
-0.2-Ω
ID=2.52A

7. Application information

Table 7. Application information
Mode of operation: 2-carrier W-CDMA; PAR7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 1-64 PDPCH; f RF performance at V class-AB production test circuit.
Symbol Parameter Conditions Min Typ Max Unit
G
p
RL
in
η
D
ACPR adjacent channel power ratio P

7.1 Ruggedness in class-AB operation

The BLF6G10S-45 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: V I
Dq
power gain P input return loss P drain efficiency P
=350mA; PL = 35 W (CW); f = 960 MHz.
= 922.5 MHz; f2= 927.5 MHz; f3= 952.5 MHz; f4= 957.5 MHz;
1
=28V; IDq= 350 mA; T
DS
=25 °C; unless otherwise specified; in a
case
= 1.0 W 21.8 23 24.5 dB
L(AV)
= 1.0 W 5.5 9 - dB
L(AV)
= 1.0 W 7 8 - %
L(AV)
= 1.0 W - −48.5 −45.5 dBc
L(AV)
DS
=28V;
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 3 of 10
Page 4
NXP Semiconductors
001aaf991
BLF6G10S-45
Power LDMOS transistor
G
(dB)
25
p
23
21
19
17
15
0504020 3010
η
D
G
p
PL (W)
75
η
D
(%)
60
45
30
15
0
VDS=28V; IDq= 350 mA; f = 960 MHz.
Fig 1. One-tone CW power gain and drain effici ency as functions of load power; typical values
G
(dB)
25
p
23
21
001aaf992
η
D
G
p
70
η
D
(%)
55
40
IMD
(dBc)
0
IMD3
IMD5
−30
IMD7
001aaf993
19
17
15
0806020 40
P
L(PEP)
25
10
−5
(W)
VDS=28V; IDq= 350 mA; f1= 960 MHz; f
= 960.1 MHz.
2
Fig 2. Two-tone CW power gain and drain efficiency
as functions of peak envelope load power; typical values
−60
−90
0806020 40
=28V; IDq= 350 mA; f1= 960 MHz;
V
DS
f
= 960.1 MHz.
2
P
L(PEP)
(W)
Fig 3. Intermodulation distortion as a function of
peak envelope load power; typical values
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 4 of 10
Page 5
NXP Semiconductors
BLF6G10S-45
Power LDMOS transistor
(1) (2)
P
L(AV)
001aaf994
(dBm)
25
G
p
(dB)
23
21
19
17
20 363224 28
(1)
(2)
G
p
η
D
VDS=28V; IDq= 350 mA; f1= 952.5 MHz; f
= 957.5 MHz; carrier spacing 5 MHz.
2
(1) f = 955 MHz. (2) f = 925 MHz.
Fig 4. 2-carrier W-CDMA power gain and drain
efficiency as functions of average load power; typical values
16
12
8
4
0
η
(%)
P
L(AV)
001aaf997
(dBm)
−40
D
ACPR
(dBc)
−45
−50
−55
−60
20 363224 28
=28V; IDq= 350 mA; carrier spacing 5 MHz.
V
DS
(1)
(2)
(1) f = 955 MHz. (2) f = 925 MHz.
Fig 5. 2-carrier W-CDMA adjacent channel power
ratio as function of average load power; typical values

8. Test information

input 50 Ω
Fig 6. Test circuit for operation at 900 MHz
V
GS
C8
C1
C2
C11
C9
R1
C3
C4
C12
R3
C13 C14
C6 C5
C15 C16C10
R2
F1
C7
V
DS
001aaf995
output
50 Ω
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 5 of 10
Page 6
NXP Semiconductors
6
BLF6G10S-45
Power LDMOS transistor
−
R2
C15
+
C16
C7
BLF6G10S-45
OUTPUTBOARD TP
001aaf99
F1
C10
C9
C11
R1
C1
C8
C2 C3
C4
C12 C13
C14
C6
C5
BLF6G10S-45
INPUTBOARD
TP
The striplines are on a double copper-clad Taconic RF35 Printed-Circuit Board (PCB) with εr=3.5 and thickness = 0.76 mm.
See Table 8 for list of components.
Fig 7. Component layout for 920 MHz and 960 MHz test circuit for 2-carrier W-CDMA
Table 8. List of components (see Figure 6
and Figure 7).
All capacitors should be soldered vertically.
Component Description Value Remarks
C1 multilayer ceramic chip capacitor 3.0 pF C2 multilayer ceramic chip capacitor 1 pF C3 multilayer ceramic chip capacitor 6.2 pF C4 multilayer ceramic chip capacitor 1.8 pF C5 multilayer ceramic chip capacitor 1.0 pF C6 multilayer ceramic chip capacitor 6.8 pF C7 multilayer ceramic chip capacitor 6.8 pF C8, C11, C14 multilayer ceramic chip capacitor 68 pF C9, C10, C12, C13 multilayer ceramic chip capacitor 330 nF;
[1] [1] [1] [1] [1] [1] [1] [1] [2]
50 V
C15 multilayer ceramic chip capacitor 4.5 μF;
[2]
50 V C16 Electrolytic capacitor 220 μF F1 Ferrite SMD bead - Ferroxcube BDS3/3/8.9-4S2
or equivalent Q3 BLF6G10S-45 ­R1 SMD resistor 4.7 Ω;
0.1 W
R2 SMD resistor 6.8 Ω;
0.1 W
[1] American Technical Ceramics type 100B or capacitor of same quality. [2] TDK or capacitor of same quality.
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 6 of 10
Page 7
NXP Semiconductors
B
C
BLF6G10S-45
Power LDMOS transistor

9. Package outline

eramic earless flanged package; 2 leads
D
A
3
D
1
U
1
F
A
SOT608
1
H
2
b
DIMENSIONS (mm dimensions are derived from the original inch dimensions)
UNIT A
4.62
mm
3.76
0.182
inch
0.148
b
7.24
6.99
0.285
0.275
c D
0.15
0.10
0.006
0.004
10.21
10.01
0.402
0.394
D1E E
10.29
10.21
10.03
10.01
0.405
0.402
0.395
0.394
1
10.29
10.03
0.405
0.395
w1A
0 5 mm
scale
F H
1.14
15.75
0.89
14.73
0.045
0.620
0.035
0.580
Q U1U
1.70
1.45
0.067
0.057
10.24
9.98
0.403
0.393
U
2
10.24
9.98
0.403
0.393
c
E
1
Q
w
2
1
0.51
0.020
E
OUTLINE VERSION
SOT608B
IEC JEDEC JEITA
REFERENCES
EUROPEAN
PROJECTION
ISSUE DATE
06-12-06 09-08-26
Fig 8. Package outline SOT608B
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 7 of 10
Page 8
NXP Semiconductors

10. Abbreviations

Table 9. Abbreviations
Acronym Description
3GPP 3rd Generation Partnership Project CCDF Complementary Cumulative Distribution Function CW Continuous Waveform DPCH Dedicated Physical CHannel LDMOS Laterally Diffused Metal Oxide Semiconductor PAR Peak-to-Average power Ratio PDPCH transmission Power of the Dedi cated Physical CHannel RF Radio Frequency SMD Surface-Mount Device VSWR Voltage Standing-Wave Ratio W-CDMA Wideband Code Division Multiple Access
BLF6G10S-45
Power LDMOS transistor

11. Revision history

Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF6G10S-45_3 20100120 Product data sheet - BLF6G10S-45_2 Modifications:
BLF6G10S-45_2 20090210 Product data sheet - BLF6G10S-45_1 BLF6G10S-45_1 20070223 Preliminary data sheet - -
• Section 1.1 “General description” lower frequency range extended to 700 MHz from 800 MHz.
• Section 1.2 “Features” lower frequency range extended to 700 MHz from 800 MHz.
• Section 1.3 “Applications” lower frequency range extended to 700 MHz from 800 MHz.
• Section 12 “Legal information” export control disclaimer added.
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 8 of 10
Page 9
NXP Semiconductors
BLF6G10S-45
Power LDMOS transistor

12. Legal information

12.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this docu ment may have changed si nce this docum ent was pub lished and may dif fer in case of multiple devices. The latest product statu s
information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

12.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

12.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonabl y be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
, including those pertaining to warranty,

12.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.

13. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
BLF6G10S-45_3 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 20 January 2010 9 of 10
Page 10
NXP Semiconductors

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Application information. . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation . . . . . . . . . 3
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 8
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
13 Contact information. . . . . . . . . . . . . . . . . . . . . . 9
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
BLF6G10S-45
Power LDMOS transistor
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 20 January 2010
Document identifier: BLF6G10S-45_3
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