Philips blf645 Datasheet

Page 1
BLF645
Broadband power LDMOS transistor
Rev. 01 — 27 January 2010 Product data sheet

1. Product profile

1.1 General description

A 100 W LDMOS RF power push-pull transistor for broadcast transmitter and industrial applications. The transistor is suitable for the frequency range HF to 1400 MHz. The excellent ruggedness and broadband performance of this device makes it ideal for digital applications.
Table 1. Typical performance
RF performance at T
Mode of operation f V
CW, class-AB 1300 32 100 - 18 56 ­2-tone, class-AB 1300 32 - 100 18 45 −32
= 25 °C in a common source test circuit.
h
P
DS
(MHz) (V) (W) (W) (dB) (%) (dBc)
P
L
L(PEP)
G
p
η
D
IMD

1.2 Features

CW performance at 1300 MHz, a drain-source voltage VDS of 32 V and a quiescent
drain current I
Average output power = 100 WPower gain = 18 dBDrain efficiency = 56 %
2-tone performance at 1300 MHz, a drain-sour ce voltage V
drain current I
Peak envelope load power = 100 WPower gain = 18 dBDrain efficiency = 45 %
Intermodulation distortion = −32 dBcIntegrated ESD protectionExcellent ruggednessHigh power gainHigh efficiencyExcellent reliabilityEasy power controlCompliant to Directive 2002/95/EC, regarding Restriction of Hazard ou s Subs tances
(RoHS)
= 0.9 A for total device:
Dq
= 0.9 A for total device:
Dq
of 32 V and a quiescent
DS
Page 2
NXP Semiconductors
7

1.3 Applications

Communication transmitter applications in the HF to 1400 MHz frequency rangeIndustrial applications in the HF to 1400 MHz frequency range

2. Pinning information

Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1drain 1 2drain 2 3gate 1 4gate2 5source
BLF645
Broadband power LDMOS transistor
12
5
43
[1]
3
4
1
5
2
sym11
[1] Connected to flange.

3. Ordering information

Table 3. Ordering information
Type number Package
BLF645 - flanged balanced LDMOST ceramic package; 2

4. Limiting values

Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
T
stg
T
j
drain-source voltage - 65 V gate-source voltage −0.5 +11 V drain current - 32 A storage temperature −65 +150 °C junction temperature - 200 °C
Name Description Version
SOT540A
mounting holes; 4 leads

5. Thermal characteristics

Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-c)
[1] R
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 2 of 13
thermal resistance from junction to case T
is measured under RF conditions.
th(j-c)
= 80 °C; PL = 100 W
case
[1]
0.67 K/W
Page 3
NXP Semiconductors

6. Characteristics

Table 6. Characteristics per section
Tj = 25 °C per section; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
(BR)DSS
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
C
iss
C
oss
C
rs
BLF645
Broadband power LDMOS transistor
drain-source breakdown voltage VGS=0V; ID=0.9mA 65--V gate-source threshold voltage VDS=32 V; ID=90mA 1.4 1.9 2.4 V gate-source quiescent voltage VDS=32V; IDq= 450 mA 1.5 2.0 2.5 V drain leakage current VGS=0V; VDS=32V --1.4μA drain cut-off current VGS=V
=10V
V
DS
GS(th)
+3.75V;
gate leakage current VGS= ±10 V; VDS= 0 V - - 120 nA forward transconductance VDS=10V; ID= 4.5 A - 6.4 - S drain-source on-state resista n ce VGS=V
GS(th)
+3.75V;
ID=3.15A
input capacitance VGS= 0 V; VDS=32V;
f=1MHz
output capacitance VGS= 0 V; VDS=32V;
f=1MHz
feedback capacitance VGS= 0 V; VDS=32V;
f=1MHz
-14-A
- 220 - mΩ
-69-pF
-25-pF
-1.2-pF

7. Application information

Table 7. RF performance in a common-source class-AB circuit
=25°C; IDq = 0.9 A for total dev ice.
T
h
Mode of operation f V
CW, class-AB 1300 32 100 > 16.5 > 53

7.1 Ruggedness in class-AB operation

The BLF645 is capable of withstanding a load misma tch corr esponding to VSWR = 10 : 1 through all phases under the following conditions: V power.
DS
P
L
G
p
η
D
(MHz) (V) (W) (dB) (%)
= 32 V; f = 1300 MHz at rated load
DS
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 3 of 13
Page 4
NXP Semiconductors
001aal362

8. Test information

8.1 RF performance

The following figures are measured in a class-AB production test circuit.

8.1.1 1-Tone CW

BLF645
Broadband power LDMOS transistor
20
G
p
(dB)
19
18
17
16
15
14
13
0 16012040 80
G
p
η
D
001aal361
PL (W)
70
η
D
(%)
60
50
40
30
20
10
0
VDS = 32 V; IDq= 900 mA (for total device); f = 1300 MHz.
Fig 1. Power gain and drain efficiency as function of
load power; typical values
20
G
p
(dB)
19
18
17
16
15
14
13
12
0 16012040 80
(7) (6) (5) (4) (3) (2) (1)
PL (W)
VDS = 32 V; f = 1300 MHz.
= 200 mA (for total device).
(1) I
Dq
= 400 mA (for total device).
(2) I
Dq
= 600 mA (for total device).
(3) I
Dq
= 900 mA (for total device).
(4) I
Dq
= 1200 mA (for total device).
(5) I
Dq
= 1400 mA (for total device).
(6) I
Dq
= 1800 mA (for total device).
(7) I
Dq
Fig 2. Power gain as a function of load power;
typical values
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 4 of 13
Page 5
NXP Semiconductors
001aal363
P
L
(dBm)
BLF645
Broadband power LDMOS transistor
55
ideal P
53
L
(2)
51
49
47
45
27 373531 3329
(1)
P
L
Pi (dBm)
VDS = 32 V; IDq= 900 mA (for total device); f = 1300 MHz. (1) P (2) P
= 50.5 dBm (112 W).
L(1dB)
= 51.5 dBm (141 W).
L(3dB)
Fig 3. Load power as function of input power; typical values
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 5 of 13
Page 6
NXP Semiconductors

8.1.2 2-Tone CW

BLF645
Broadband power LDMOS transistor
P
L(PEP)
001aal364
(W)
60
η
D
(%)
50
40
30
20
10
0
20
G
p
(dB)
19
18
17
16
15
14
0 16012040 80
G
p
η
D
VDS = 32 V; IDq= 900 mA (for total device); f = 1300 MHz; carrier spacing = 100 kHz.
Fig 4. Power gain and drain efficiency as function of
peak envelope load power; typical values
001aal365
P
L(PEP)
(W)
IMD3 (dBc)
0
−10
−20
−30
−40
−50
−60
0 20016080 12040
(1) (2) (3) (4) (5) (6) (7)
VDS = 32 V; f = 1300 MHz; carrier spacing = 100kHz.
= 200 mA (for total device).
(1) I
Dq
= 400 mA (for total device).
(2) I
Dq
= 600 mA (for total device).
(3) I
Dq
= 900 mA (for total device).
(4) I
Dq
= 1200 mA (for total device).
(5) I
Dq
= 1400 mA (for total device).
(6) I
Dq
= 1800 mA (for total device).
(7) I
Dq
Fig 5. Third order intermodulation distortion as a
function of peak envelope load power; typical values
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 6 of 13
Page 7
NXP Semiconductors
001aal366

8.2 Reliability

Fig 6. BLF645 electromigration (I
5
10
ears
4
10
3
10
2
10
10
(10) (11)
1
0 20168124
TTF (0.1 % failure fraction).
= 100 °C.
(1) T
j
= 110 °C.
(2) T
j
= 120 °C.
(3) T
j
= 130 °C.
(4) T
j
= 140 °C.
(5) T
j
= 150 °C.
(6) T
j
= 160 °C.
(7) T
j
= 170 °C.
(8) T
j
= 180 °C.
(9) T
j
= 190 °C.
(10) T
j
= 200 °C.
(11) T
j
BLF645
Broadband power LDMOS transistor
(1) (2) (3) (4) (5) (6)
(7) (8) (9)
(A)
I
DS(DC)
, total device)
DS(DC)
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 7 of 13
Page 8
NXP Semiconductors
8

8.3 Test circuit

V
GG
C4
BLF645
Broadband power LDMOS transistor
V
DD
C15
C13
R3
C2
IN
50 Ω
R1
C6
C1
L3
C7
R2
C3
R4
C5
V
GG
C8
L4
L5
T1
L6
C9
L7
See Table 8 for a list of components.
Fig 7. Class-AB common-source production test circ u it
C4
R3
C6
C2
C1
C5
R1
C8
R2
C3
C7
R4
T1
BLF645 INPUT REVZ NXP
C9
L8
L9
C10
C10
L10
L12
L13
L11
BLF645 OUTPUT REVZ NXP
T2
R5
C11
L1
OUT 50 Ω
C17
L14
C12
T2
L2
R6
C14
C16
V
001aal367
DD
+
C15
C13
R5
L1
C11
C12
R6
C17
L2
C14
+
C16
001aal36
See Table 8 for a list of components.
Fig 8. Component layout for class-AB production test circuit
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 8 of 13
Page 9
NXP Semiconductors
BLF645
Broadband power LDMOS transistor
Table 8. List of components
For test circuit, see Figure 7 and Figure 8.
Component Description Value Remarks
C1 multilayer ceramic chip capacitor 47 pF C6, C7, C11, C12,
multilayer ceramic chip capacitor 27 pF
[1] [2]
C17 C2, C3 multilayer ceramic chip capacitor 100 nF Murata X7R or equivalent C4, C5, C13, C14 multilayer ceramic chip capacitor 4.7 μF TDK C4532X7R1E475MT020U or
capacitor of same quality. C8 multilayer ceramic chip capacitor 1.5 pF C9 multilayer ceramic chip capacitor 3.3 pF C10 multilayer ceramic chip capacitor 6.2 pF
[2] [2] [3]
C15, C16 electrolytic capacitor 220 μF TDK C4532X7R1E475MT020U or
capacitor of same quality. L1, L2 4 turns, 0.8 mm enameled copper wire D = 3.5 mm;
length = 4 mm
[4]
L3 microstrip ­L4, L5 microstrip ­L6, L7 microstrip ­L8, L9 microstrip ­L10, L11 microstrip ­L12, L13 microstrip ­L14 microstrip -
(W × L) 1.67 mm × 19.17 mm
[4]
(W × L) 1.9 mm × 23.7 mm
[4]
(W × L) 9.6 mm × 17.3 mm
[4]
(W × L)9mm12mm
[4]
(W × L) 8.5 mm × 31.0 mm
[4]
(W × L) 4.52 mm × 5.0 mm
[4]
(W × L) 1.67 mm × 21.67 mm R1, R2 SMD resistor 1 1 Ω 1206 R3, R4 SMD resistor 1 kΩ 1206 R5, R6 SMD resistor 12 Ω 1206 T1, T2 semi rigid coax Z = 50 Ω;
length = 34 mm
[1] American technical ceramics type 100A or capacitor of same quality. [2] American technical ceramics type 100B or capacitor of same quality. [3] American technical ceramics type 180R or capacitor of same quality. [4] Printed-Circuit Board (PCB): Taconic RF35; ε
thickness copper plating = 35 μm.
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 9 of 13
= 3.5 F/m; height = 0.79 mm; Cu (top/bottom metallization);
r
Page 10
NXP Semiconductors
A
BLF645
Broadband power LDMOS transistor

9. Package outline

Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT540
D
A
F
D
1
U
1
q
H
1
w
M M
2
C
C
12
H
U
2
5
A
e
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
mm
inches
A
5.77
5.00
0.227
0.197
8.51
8.26
0.335
0.325
c
0.15
0.10
0.006
0.004
Db
22.05
21.64
0.868
0.852
D
e U
1
10.21
0.402
10.26
10.06
0.404
0.396
22.05
21.64
0.868
0.852
43
b
0 5 10 mm
EE
1
10.31
10.01
0.406
0.394
F
1.78
1.52
0.070
0.060
scale
w
H
15.75
14.73
0.620
0.580
3
M
H
18.72
18.47
0.737
0.727
B
c
U
34.16
33.91
1.345
1.335
E
1
Q
2
9.91
9.65
0.390
0.380
w
1
E
w
3
2
1
0.250.25 0.51
0.0100.010 0.0201.100
p
w
M M M
AB
1
p
1
3.38
3.12
0.133
0.123
qw
Q
2.72
27.94
2.46
0.107
0.097
OUTLINE VERSION
SOT540A
REFERENCES
IEC JEDEC EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
99-08-27 99-12-28
Fig 9. Package outline SOT540A
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 10 of 13
Page 11
NXP Semiconductors

10. Abbreviations

Table 9. Abbreviations
Acronym Description
CW Continuous Waveform DC Direct Current D-MOS Diffusion Metal-Oxide Semiconductor ESD ElectroStatic Discharge HF High Frequency LDMOS Laterally Diffused Metal Oxide Semiconductor LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor RF Radio Frequency SMD Surface-Mount Device VSWR Voltage Standing-Wave Ratio

11. Revision history

BLF645
Broadband power LDMOS transistor
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF645_1 20100127 Product data sheet - -
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 11 of 13
Page 12
NXP Semiconductors
BLF645
Broadband power LDMOS transistor

12. Legal information

12.1 Data sheet status

Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this docu ment may have changed si nce this docum ent was pub lished and may dif fer in case of multiple devices. The latest product statu s
information is available on the Internet at URL http://www.nxp.com.
[1][2]
Product status
[3]
Definition

12.2 Definitions

Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

12.3 Disclaimers

General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
, including those pertaining to warranty,

12.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.

13. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
BLF645_1 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 27 January 2010 12 of 13
Page 13
NXP Semiconductors

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Application information. . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation . . . . . . . . . 3
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 4
8.1 RF performance . . . . . . . . . . . . . . . . . . . . . . . . 4
8.1.1 1-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
8.1.2 2-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8.2 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
8.3 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Contact information. . . . . . . . . . . . . . . . . . . . . 12
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
BLF645
Broadband power LDMOS transistor
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]
Date of release: 27 January 2010
Document identifier: BLF645_1
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