Philips BLF147 Datasheet

DISCRETE SEMICONDUCTORS
DATA SH EET
BLF147
VHF power MOS transistor
Product specification
September 1992
Philips Semiconductors Product specification
FEATURES
High power gain
Low intermodulation distortion
Easy power control
Good thermal stability
Withstands full load mismatch.
DESCRIPTION
Silicon N-channel enhancement mode vertical D-MOS transistor designed for industrial and military applications in the HF/VHF frequency range.
The transistor is encapsulated in a 4-lead, SOT121 flange envelope, with a ceramic cap. All leads are isolated from the flange.
A marking code, showing gate-source voltage (V
) information is provided
GS
for matched pair applications. Refer to 'General' section for further information.
PIN CONFIGURATION
ok, halfpage
43
g
MBB072
21
MLA876
d
s
Fig.1 Simplified outline and symbol.
CAUTION
The device is supplied in an antistatic package. The gate-source input must be protected against static charge during transport and handling.
WARNING
PINNING - SOT121
PIN DESCRIPTION
1 drain 2 source 3 gate 4 source
Product and environmental safety - toxic materials
This product contains beryllium oxide. The product is entirely safe provided that the BeO disc is not damaged. All persons who handle, use or dispose of this product should be aware of its nature and of the necessary safety precautions. After use, dispose of as chemical or special waste according to the regulations applying at the location of the user. It must never be thrown out with the general or domestic waste.
QUICK REFERENCE DATA
RF performance at T
MODE OF
OPERATION
= 25 °C in a common source test circuit.
h
f
(MHz)
V
(V)
DS
P
(W)
L
G
p
(dB)
η
(%)
D
d
3
(dB)
d
5
(dB)
SSB, class-AB 28 28 150 (PEP) > 17 > 35 <−30 <−30 CW, class-B 108 28 150 typ. 70 typ. 70 −−
September 1992 2
Philips Semiconductors Product specification
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
±V
GS
I
D
P
tot
T
stg
T
j
THERMAL RESISTANCE
SYMBOL PARAMETER THERMAL RESISTANCE
R
th j-mb
R
th mb-h
drain-source voltage 65 V gate-source voltage 20 V DC drain current 25 A total power dissipation up to Tmb = 25 °C 220 W storage temperature 65 150 °C junction temperature 200 °C
thermal resistance from junction to mounting base 0.8 K/W thermal resistance from mounting base to heatsink 0.2 K/W
2
10
handbook, halfpage
I
D
(A)
(1)
10
1
110
(1) Current is this area may be limited by R (2) Tmb = 25 °C.
Fig.2 DC SOAR.
MRA904
(2)
2
V
(V)
DS
DS(on)
10
.
300
handbook, halfpage
P
tot
(W)
200
100
0
0
(1) Short-time operation during mismatch. (2) Continuous operation.
(1)
(2)
50 100 150
Fig.3 Power/temperature derating curves.
MGP049
Th (°C)
September 1992 3
Philips Semiconductors Product specification
CHARACTERISTICS
T
= 25 °C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
V
GS
g
fs
R
DS(on)
I
DSX
C
is
C
os
C
rs
drain-source breakdown voltage ID = 100 mA; VGS = 0 65 −−V drain-source leakage current VGS = 0; VDS = 28 V −−5mA gate-source leakage current ±VGS = 20 V; VDS = 0 −−1µA gate-source threshold voltage ID = 200 mA; VDS = 10 V 2 4.5 V gate-source voltage difference of
ID = 100 mA; VDS = 10 V −−100 mV
matched pairs forward transconductance ID = 8 A; VDS = 10 V 5 7.5 S drain-source on-state resistance ID = 8 A; VGS = 10 V 0.1 0.15 on-state drain current VGS = 10 V; VDS = 10 V 37 A input capacitance VGS = 0; VDS = 28 V; f = 1 MHz 450 pF output capacitance VGS = 0; VDS = 28 V; f = 1 MHz 360 pF feedback capacitance VGS = 0; VDS = 28 V; f = 1 MHz 55 pF
handbook, halfpage
0
T.C.
(mV/K)
1
2
3
4
5
2
VDS = 28 V; valid for Th = 25 to 70 °C.
1
10
11010
ID (A)
Fig.4 Temperature coefficient of gate-source
voltage as a function of drain current, typical values.
MGP050
V
GS
MGP051
(V)
60
handbook, halfpage
I
D
(A)
40
20
0
0
VDS= 10 V.
510 2015
Fig.5 Drain current as a function of gate-source
voltage, typical values.
September 1992 4
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